Time: Three Hours

Register
Number:
B.E/ B.TECH
DEGREE
E,XAMINATION,
NOVIDEC2A1,3
Third Semester
(Regulation 2012)
UF,CT23O2.
DIGITAL
ELECTRONICS
(Electronics and Communication
Engineering)
Answer
All
Questions
PART A - (10 x2:20
marks)
Maximum:
100 Marks
1, Express
Gray code 1011 1 into binary
numbers'
2. State the DualitY
PrinciPle'
.. :,-
^
\T A \tT1
^^tac
E'/w rr z\
:
Im(0-6).
3. Implement
the given function
using NAND
gates F(x'y'z)
:
fm(0'6)'
4. Draw the logic diagram
for serial adder'
5.WritetheCharacteristicequationforJKflipflop,
8. What is ahazatdin
combinational
circuits?
g.
What is the difference
between
PAL and PLA?
10. Draw the logic diagram of memory cell'
PART B - (5 x 16: 80 marks)
(4)
;
! 11
(a)
|i], ffiil;::::ffiil*]i1?ll;jxlll"g2',scomplemen'binarvform
(4)
(iii) Explain the
gray code to binary converter
with the necessary
diagram'
(8)
(o0
(b)
{'
,*or"ss the following
Booiean
function
as Pos and soP form'
p:
(A'+BXB'+C)
(4)
(ii)MinimizeusingQuineM-c-Cluskyandverifyusingk-mapmethods.
f,m(0,1,4,11,13,15)
+ d(5,7,8)
anru
'vrr^r --^--e
02)
12,(a)(i)FindanetworkofANDandoRgatestotealizeF(a'b'c'd):!m(1'5'6'10'13'14)(10)
(ii)
prove
that NoR
gate is a universal
gate. Also
prove the terms for NAND'
(6)
(or)
I
A
(* B E
(
2
o ol3
ryl
13. (a)
Explain with necessary diagram a BCD to 7 segment display decoder.
(i) How will you convert a D flip flop into JK flip flop?
(i0 Explain the operation of a JK master slave flip flop.
(or)
Explain the operation of a 4 bit binary ripple counter.
(16)
(8)
(8)
(16)
(10)
(6)
(b)
14. (a) (i) Explain the steps involved in the reduction of state table.
(ii) Differentiate critical races from non-critical races.
(b)
I
15. (a)
(or)
What is aHazard? What are the types of hazards? Check whether the following circuit
contains an hazard or not Y
:
x1x2 + x2'x3. If the hazard is present, demonstrate its
removal. (16)
(i) Explain read and write operation of memory with timing waveforms. (8)
(8) (ii) Write a note on RAM.
(O,
(b)
A
combinational circuit is described by the functions F1
:fm(3,5,7),
F2=lm(4,5,7)
_lgplem.*A::ircy{
*,th, PLA h*i"e 3-il!{1i
gTdrylf"'*':41*"
outputs. (16)
Reg. No.:
Third Semester
(Regulation 2008)
"=::,'
,,:11
,t' ? : i
"ul
"I
Y
,:]
NMr.
"ut".'.*'.$tSi-
Question
Paper Code : T3032
:' .:\.. \r.
d
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B. E. /B. Te ch. DE GRE E EXAMINATI O N, NOVEMB ER/DECE$)[SE-H- 2$ O9.,,ir'
: rtn
Electronics and Communication Engineering
'
---.'
+ -
-=",:....a,,,,:S
EC 2203
-
DIGITAL ELtrCTRONICS
Maximum:
6. Distinguish between synchronous and asynchronous sequential circuits.
the ASM chart with a conventional flow chart.
100 Marks
-offi
r, trff\\
e
*
die K *.!fufl
.dr'$. s "w
,e&,6U-S
'
:,
2. Show that a
nositge
tqqq1ffiffiffi nesative logic NoR gate.
s. s.,es*h ffiffih%;;;S'dt$*itation
on the speed oran adder.
e_fu{$d%\d
=-*\,*. \"'
. "& \h &sw '\-
{& *
bhfJr""tiutu a decoder rrori=h=aBmr.ltiplexer.
-
E\ $q[& -
bh8r""tiute a decoder rrofi=h,.,,8*r.ltiplexer.
*EBWre*
ru
S
5. Write down the characteristic equation for JK flipflop.
Time : Three hours
1. Prove that the locical sum of all="qinteid ;f*#""ffirWdtffi'ir 2 variables
is 1.
E
..$' s
4ill.
Sl' rill
;\
a=r
rti i :a'
11.
(a) (r) Express
the Boolean
function
F
=
XY +XZ inproduct
of Maxper'm;'
'r
,,.r,.,,"'u''
:t**,,,,
\*)"t'
(i1) Reduce
the following
function
using K-man techniuffiH;'^,
f{A,
B,C' D)=n(o'z'
4'7'8'10'
12' ta)+d(2'"61
''
''
't".
(10)
or
#-{;."L.
. .
(b) Simplifv
the following
Boolean
function
bv using
e*-qi.ry-q.1.;
*"1:1
F(A, B, C, D) =) {o'
z' 3' 6' 7
'
8', 10', 12', 13) '
*"*
*
"
(16)
12.
(a) Design a carry
look ahEad adder
with necessary
diagrams'
(16)
Or
(b) (r) Implement
full subtractor
usingdemultiplexer'
t the
given Boolean4ufltio,n;lins
s:
<r a :i, .9. -*\":t:-
't,$d*dr,\*WW*.
:l 13.
(a) (i) How will
you convert
a-D'{
-:-^
|L^
^-^*.t;os''T***Jrtm#&raMriinop.
'
(8)
F(A, B,c) =
t(1,
3, 5,
qF'
6):u*,,-,g',,{
u-t
,i'
$',S*rf,*u*
t
.;
(i, ExPiain
the oPerati
? ult uirrrry
riPPle counter'
(16)
(b) Explain
ln
$tqlffiffiffi
+ urL u,rarr
rrvvrv
t4.
(a)
mfumffiW'*il:-'#J:i;
tunctions
with a PLA
.* ffiWh5,")=;h,"f++nl
"-
s$ fuB
\"r
-
* *\ffi\s
-
F,IA, B, c)
=!(o'
s' o' z)
\&ru
*
F.(A, B,c) =
t(o'
B' b' ?)'
(16)
Or
&)QudBlEqacombinationalcircuitusingaRoM.Thecircuitacceptsathree
sili$'-4ttilSi;Joutputs ';;;;;l'ber
"qoal
to the square
of the input
(16)
g'
uhu{bei."fl *F
"-r
;+ /,n -d"' *
J
J
S".f ,t f
^^..*ra*
,,oing'T flinfloos.
(16)
15.
(-)
.
P$:gA;doth'""
bit binarv
counter
using T flipflops'
'q" 'Y.
;t
Of
*d**
\**
#*
rl .S ."
*,ai-
;.s -$1 i$).+.."B.esign
a negative-ectge
triggered'T
flipflop''
(16)
+ e i: ft
*..
H
v' ru d --ol
",*
3
! .n ..* { ."
-'"
-{'"ogd
*
,"
f'
'
f
u,g"*.a
*"
r., z
T 3032
?t
t
+
+
J.n
F
"
q
*..
+"
.,r'
'nu'**
.,
!;
B.E.
/B.Tech'
DEGREtr
EXAMINATION'
APRIL/1\{AY
?0 19
Third
Semester
,,u.tt'
"n::fii:-ri
Electronics
and
Communications
UnUtfie'U'+ntrr'.-,.,
EC2203
-
DIGITAL
ELECTRONICS
'"+
(Regulation
2008)
Time:
Three
hours
Maximum:
100
Marks
in a full subtractor
circuit'
1.
2.
at.
6.
7.
i*r'u'
^"ttr;u*ggorv
expansion?
Mention
its limit'
tii
11. (a)
(,
PARTB_(Sx16=80Marks)
Exprcss
the Boolean
function
as
(1)
POS form
(2)
SOP form
.,-. ,,
i
:!'
-.,:
D
=
(A'+
B) (B'+
C)
i
:j
ri!
't':i-,1;;:|l
.,:';,,:t.,,,.
(4)
Minimize
the given
terms
,-,':
-r:::it
::,, ,:,
nM (0,
7, 4, 17, rr,^l?
I
nd, (5,__7,::il
,r'fuq*r"_#,...*
methods
and verifi,
the results
"rd
K-k;;
.qthods.
1,-,1"....
.]..,i..
(12)
Or " .l
,1i!:li:
(b) (r)
Implement
the foilowing
function
using NOR gates.
(g)
Output
= 1 when the inputs
are
Z m(0,1,2,5,4)
=
0 when the inputs
ar6
2' m,(g;q,q.
(i,
Discuss
the generat
chhragrerist,_fe
"f
i+I.rqg
CMOS l,
*
i'::'rl::':r?:'r''
?
_r.k,*ffiffiffi
(ii)
ffiW
r: r-'qrruffiW\#
*
(8)
t2. (a) (i)
Derive
the equatioh
ror, +_ug!,pffi1rm,\hdrffiri,".;r.
(6)
(iil'?T;"ilil,.1Jffiffiffii;
n ot' seriar
adder
to
1dd
'j1,.-q
-111','1",1.,na,
3!ti1s -"'":::
_ *&$\N
*&\'',*
)
'': also draw block aias111oitrr"
"i",t
urln iri*l],i"'|ffi?#f:t6
\N
ru*
-
(ii)
1.":;:H:.
i-pr"*"ri"fle
conversion
circuits
for Binary
code to
13. (a) (i)
',i
.l:j.*
Construct
a -,uonstruct a clocked
JK flip flop which is
?age or til;i;;rse
rr.- 6
^.r^^r-^r
.*tiq"'1d
at the positive
i;ffi;il::
clock purse
rrom
a clocked
sn A;;;;ffi:t#il':?
iil,, :jliifu, (t\
.".,i
.
\c)
;:T:lTH:.I.:ff^l. 111u":.1counrer
that wlr counr up from zero
-,*Ll?,?i;?L-*:";ll'n"^:.::"-;r;;;,:',
jff
f
ffi
,:"-Ti;ilX
'X;,"i with one rrl, sNT4Lsza
a""i""
;;";;
iilil"fiffi##
(8)
(4)
(12)
;ttl .$;;;:';
arr l
'i{o
one to,.,r-t$o
to three,
and wil *ruu,
*rr"'u
w,r cultnf, up rrom zero
t! loEic -o!l, r..t ,_i,
^^,._,
,--
never
an external
input
r
s,iru,fl *l :il.:::* t.y
r.:;;l;ffi;
t r:Ti:,il:;:;
E 3073
(i) (b) Write down the Characteristic table for the JK flif flop wifh
NOR gates.
'(4)
(i, What is meant by Universal Shift Register? Explain the principle of
operationof4.bitUniversalShiftRegister.i:::
t4. (a) (r)
15. (a) For the ci
(ii)
We can expand the word size of a RAM bv co,rybini+g two-or more
RAM chips. For instance, we can use twg,,! '!t;::8,rr"r-emo chips
where the number 32 represents the nuiiibet of wordsia-nd-!8
represents the number of bits per word, to obtain?tB2 x 16 R-AM7In
this case the number of words remains:the.s'aroe but=the ),ifi$th of
each word will two bytes long. Draw a bloCk din
e'n
to shgw how
we can use two 16 x 4 memory chips to obtain a 16 x 8
(8)
Explain the principle of operation of Bipolar SRAM cell.
(8)
Or
,4*
(i) A combinational circuit.*,aOfiiiaa as the functions
*ffiq%\
s.." fl*k $e
"
Fl
=
AR'C'+AB'C+ABC
.ffi*q k#*
Fz
=A'BC+AB'C+ABC
i
*&mW
*.
iiC*-+-I circuit *itil a t roarr"t
terms, and 2 outpuid."
fu ffiffi,*\#
"
(8)
(ii) Write a note on Snarf*A ffiY
(8)
(b)
dK,.s,\H
-
hhff'lr
*rite down the state table and d.raw the
*,qffi,,,ffiffi:"tlt*q
oiiery'Q$bn'
(16)
*$
s& R\B
& &Btw
*tu{wH*
qs
\s
i:
tit,,,a, (b)*,*tu,lVhat
[iare
calied as
s dlfi
11,9
ntlalX;Uir cuits ?
,,iiii;Give
ran
examPIe.
',1|,),'
Or
essential hazards?
How can the same
How does the hazard occur in
be eliminated using SR latches?
(16)
te
CP
E 3073
B.E./B.Tech.
DEG REE EXAMtNAT|
ON, MAY/J U NE 2007.
Fourth Semester
Electnonics and Communication
Engineering
EC242
_
DIGITAL ETECTRONICS
Time : Three hours Maximum : 100 marks
Answer AIL questions.
PART A
-
(10 >< 2 :20 marks)
1. Convert the binary number LOLI2 to gray
code.
2' Minimise the function using Boorean argebra f
=x
(y +w,z) +wxz
.
3. Vifhat is the advantage
of using Schottky TTL gate?
4. Define propagation
delay.
5. Design a 2 input NAND gate using 2 : 1 multiplexer.
6. Design a half adder.
7. write the characteristic
equation of JKFF and show how JKFF can be
converted into'T' FF?
B. Draw the logic diagram of 4 bit universalshift
register. (
9. What is a hazard in asynchronous
sequential circuit?
.
10' what are the different modes of operation in asynchronous
sequential circuits?
PARTB (5><t6:B0marks)
11' (a)
Find the minirnum sum of products
expression using K-map for the function
F
=Em('7,9,10,11,12,13,I4,15)
and realize the minimized
function using only NAND gates. (16)
Or
(b).
simplify using
Quine-lVlcclusky method F
=Em(0,1,2 ,3,Lo,r1,,L2,73,r4,1,s).. (16)
72' (a) Draw the circuit diagrams of 2 input cMos NoR gate and cMos NAND gate using cMos logic and
explain their operation. (16)
Or
(b)
what are the different types of TTL gates
available? Explain their operations taking suitable example.
(16)
13. (a) Design a 4 bit comparator
using logic gates. (16)
'Or
(b) implement
the given functions
using PROM and
pAL
F1. :Zm(0,1,3,5,7,9)
F2:Em (1,2,4,7,8,L0,L1).
(16')
M. (a) Design a synchronous
counter which counts in the seque nce o,2, 6, !,7,5, 0 .... using D FFS.
Draw the logic diagram and state c diagram.
Or
(b) (i)Write short notes on semiconductor
memories'
(6)
(ii)Reducethegivenstatetableusingimplicationchart(tabularmethod).1(1-0)
x=0x=l-2.
ABDl
BDFl
CDAO
DDEO.
EBCl
FCDO.
15.(a)(i)Writeshortnotesonracesandcyclesthatoccurinfundamentalmodecircuits.l-(10)
(ii) What is an essential
hazard?
Explain
with example'
(6)
Or
(b)(i)ExplainhowhazardfreerealisationcanbeobtainedforaBooleanfunction.(8)
(ii) Discuss
a method
used for race free assignments
with example'
(8)
B.E./B.Tech. DEGREE EXAM|NAT!ON,
MAy
/
JUNE 2006
FOURTH SEMESTER
EI-ECTRONICS AN D COMMU NICATION ENGINEERIIVG
EC242
-
DIGITAL ELECTRONICS
(REGULATTON
2004)
ANSWER ALL
QUESTIONS
TIME: THREE HOURS MAXIMUM: 1OO MARKS
PARTA-[10X
2=20 MARKS]
1) Find the 2's complement and 1,s complement of 101101.
2) Simplify x7 + xt x2.
3) Write down the characteristics
of NMOS logic gates.
4) write about thewtRED-AND
logic in open collector TTL NAND gate.
5) Find the standard sum for the following function.
f= xLx2x3 +x1x3x4 +x7x2x4
6) Draw a parity
checker circuit for 3 bit binary word x1x2x3.
7)What is a flip-flop?
8)Differentiate
between edge-triggered flip-flop and level triggered flip-flop.
9) What is Race problem
in flip-flops?
10) what are the classes of asynchronous sequential circuits?
PART B
- [s
X 16
=80 MARKS]
11) Design a negative edge triggered T flip flop. The circuit has two inputs, T(toggle) and C(clock) and
output
Q and
Q. The output state is complemented if T=1 and the clock C ctranjes irom 1 to 0.
Otherwise under any other input condition, the output
e remains unchanged.
ifO
fVfanfSI
12) (a)(i) Prove the Demorgan's laws using Boolean algebra.
[g
MARKS]
(ii) Find the minimal sum of product
form for the following switching function. f(x1,x2,x3,x4,x5)
=
S m(2,
3, 6, 7, 1,1, 72, 13, L4, 75, 23, 2g 29, 30, 31)
[g
MARKS]
OR
(b) Simplify the following Boolean expressions
(i) (x1 + x2) (x7'x3'+
x3) (x2, + x1x3),.
t6
MARKSI
(ii)
fin the minimal sum of product
expression for the following switching function. f(x1,x2,x3,x4,x5)
=
gry1
(L,2,3,
6, 8,9, 74, 17,24,25,26,27,30,
31) + Sd(4,5).
t10
MARKSI
13) (aXi)
Explain the working of a totempole two input TTL NAND gate and analyse its merits and
drawbacks if any.
[10
MARKSJ
(ii)
Define the terms: fan-out, noise margin, propagation
delay.
[6
MARI(S]
OR
(b) (i) Explain the working of a two input cMos NAND gate.
[6
MARKS]
(ii) Write notes on ECL, RTL, and HTL logic families.
[10
MARKS]
ry-
f+) (a)(i) Design and explain the working of a mod-9counter.
[10
MARKS]
(ii) Write notes on memory decoding techniques.
[6
MARKS]
OR
(b)(i) Explain the working of master-slave JK flip flop. State its merit.
[8
MARKS]
(ii) Explain the Read and Write cycles of RAM.
[8
MARKS]
15) (a) Design a BCD to Excess-3 code converter with (i) PLA (ii)PAL devices.
OR
(b) Design and explain
(i)4 bit magnitude comparator
(ii) Priority encoder.
[8+8
MARKS]