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EEEB273/ Electronics II Differential and Multistage Amplifiers (Part 4)

UNITEN, 2009/2010 1
Differential and Multistage Amplifiers (Part 4)
Gain Stage and Simple Output Stage

In virtually all op-amps:
Input stage =Diff amp with active load amplify difference
between input signals v
1
and v
2

2
nd
stage (gain stage) =Darlington pair provide additional gain
3
rd
stage (output stage) =Emitter follower minimise loading effect
on output signal

Darlington Pair and Simple Emitter-Follower Output


Figure 1: BJT diff-amp with three-transistor active load, Darlington pair gain stage,
and simple emitter-follower output stage.

EEEB273/ Electronics II Differential and Multistage Amplifiers (Part 4)
UNITEN, 2009/2010 2
Differential pair transistors are biased with a Widlar current source
at a bias current I
Q
.

For the diff-amp currents to be balanced:

(4.1)


From Figure 1,

(4.2)


For I
O
= I
B5
, it is required that I
C7
= I
Q
, i.e.

emitter resistors of Q
10
and Q
11
should have the same value
(R
2
= R
3
).

Q
11
active load for Darlington pair gain stage.
Q
8
and R
4
simple emitter-follower output stage minimises
loading effects because its output resistance is small.

Ideally,
when diff-amp input is pure common-mode, v
O
= 0.
Combination of Q
7
and Q
11
allows dc level to shift.
By slightly changing bias current I
C7
, V
EC7
and V
CE11
can be varied
such that v
O
=0.
This small variation in I
C7
will not significantly change the balance
between I
O
and I
B5
.

Darlington Pair: Input Impedance, Voltage Gain

The Darlington pair:
input impedance R
i
determines loading effect on the basic diff-
amp.
gain affects overall gain of the op-amp circuit.


( ) +
= =
1
5
Q
B O
I
I I
( ) ( ) +
=
+
= =
1 1
7 6
6
C E
B O
I I
I I
EEEB273/ Electronics II Differential and Multistage Amplifiers (Part 4)
UNITEN, 2009/2010 3

Figure 2: (a) The ac equivalent circuit, Darlington pair, and (b) small-signal
equivalent circuit, Darlington pair.

In the Darlington pair ac equivalent circuit (Figure 2(a)),
R
L7
=effective resistance connected between collector of Q
7
and signal
ground.

In Figure 2(b), the hybrid- equivalent circuits of Q
6
and Q
7
is turned upside
down compared to transistors in figure 2(a).

Writing KVL from B
6
to E
7
(refer to Figure 2(b)),

(4.3)

Writing KCL at node E
6
(refer to Figure 2(b)),

(4.4)


since
6 6 6 b
I r V

= and

=
6 6
r g
m
.

Therefore, by substituting eq (4.4) into (4.3),



Hence, the Darlington pair input resistance is:

(4.5)

( )
( )
6 7 6
6
7 6 6
6
6
7 7
1
1
b m
I r V
r
r V g
r
V
r V


+ =

+
=

+ =
7 6 6
V V V
b
+ =
( )
6 7 6 6 6
1
b b b
I r I r V

+ + =
( )

+ + = = 1
7 6
6
6
r r
I
V
R
b
b
i
EEEB273/ Electronics II Differential and Multistage Amplifiers (Part 4)
UNITEN, 2009/2010 4
Assuming I
C7
=I
Q
, the hybrid- parameters are:

(4.6)

and
(4.7)


Substituting eq. (4.6) and (4.7) into (4.5) yields:

(4.8)


The small-signal voltage gain of the Darlington pair circuit can be
determined from Figure 2(b), i.e.
(4.9)

and
(4.10)


Therefore, the small-signal voltage gain is:

(4.11)



Substituting for R
i
using eq. (4.8),

(4.12)


From Figure 1,
R
L7
=R
c11
|| R
b8


where
( ) [ ]
3 11 11 11 11
1 R r g r R
m o c
+ = resistance looking into collector of Q
11

( )
4 8 8
1 R r R
b

+ + = resistance looking into base of Q


8

See Example 11.16.
Q
T
C
T
I
V
I
V
r

= =
7
7
( )
Q
T
C
T
I
V
I
V
r

+
= =
1
6
6
( ) ( ) ( )
Q
T
Q
T
Q
T
i
I
V
I
V
I
V
R
+
=
+
+
+
=
1 2 1 1
( ) ( )
7 6 7 7 7 7 3
1
L b L b L c O
R i R i R i v + = = =
i
b
b
R
v
i
6
6
=
( )
i
L
b
O
v
R
R
v
v
A
7
6
3
1 +
= =
( )
( )
7
7
6
3
2
1 2
1
L
T
Q
Q
T
L
b
O
v
R
V
I
I
V
R
v
v
A

+
+
= =


(4.13)
EEEB273/ Electronics II Differential and Multistage Amplifiers (Part 4)
UNITEN, 2009/2010 5
Emitter Follower: Output Resistance

Emitter-follower output resistance R
O
determines loading effects on the
output signal.

(4.14)


where Z =equivalent impedance, or resistance, in the base of Q
8
.
In this case,

(4.15)

with R
c7
=resistance looking into the collector of Q
7

R
c11
=resistance looking into collector of Q
11


Note:
Darlington pair input resistance R
i
is in the megaohm range.
Darlington pair small-signal voltage gain is large due to active load
Q
11
and large emitter follower input resistance R
b8
.
Emitter follower output resistance R
o
is normally small due to the
factor (1+) in the denominator.

See Example 11.17.


Overall performance of multistage operational amplifier:
Input stage: Diff-amp with active load A
v1
=order of 10
3

Darlington pair small-signal voltage gain A
v2
=order of 10
3

Emitter follower small-signal voltage gain A
v3
=1
Hence,
overall voltage gain A
v
= (A
v1
) (A
v2
)(A
v3
) =order of 10
6








( )

+
+
=

1
8
4
Z r
R R
o
7 11 c c
R R Z =
EEEB273/ Electronics II Differential and Multistage Amplifiers (Part 4)
UNITEN, 2009/2010 6
Simplified BJT Operational Amplifier Circuit


Figure 3: Bipolar operational amplifier.

Simplified analysis and design only resistive loads considered.
Diff-amp is biased with Widlar current source.
One-sided output of diff-amp connected to Darlington pair gain stage.
Bypass capacitor C
E
included to increase small-signal voltage gain
Emitter follower output stage.
Generally, want dc output voltage v
O
= 0 when input voltage = 0.
insert dc level shifting circuit between v
O3
and

v
O
.

Analyse both dc and ac circuit characteristics.

See Example 11.18: DC characteristics
See Example 11.19: AC characteristics

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