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RS/)01 2ircuits #or All ccasions Designing RS!"# Ci$c%its $an A3elson !his article was originally publishe, in 2ircuit 2ellar- 4hen a network nee,s to trans#er small blocks o# in#ormation over long ,istances& RS/)01 is o#ten the inter#ace o# choice- !he network no,es can be P2s& microcontrollers& or any ,evices capable o# asynchronous serial communications- 2ompare, to Ethernet an, other network inter#aces& RS/)015s har,ware an, protocol re6uirements are simpler an, cheaper- !he RS/)01 stan,ar, is #le3ible enough to allow a choice o# ,rivers& receivers& an, other components ,epen,ing on the cable length& ,ata rate& number o# no,es& an, the nee, to conserve power- Several ven,ors o##er RS/)01 transceivers with various combinations o# #eatures- 7n a,,ition& there are options #or metho,s o# terminating an, biasing the line an, controlling the ,river/enable inputs- 7n this article& 7 show several circuits #or RS/)01 networks- Even i# you use prebuilt car,s or converters& un,erstan,ing the options will help you choose the right pro,uct an, con#igure it to get the best results #or your application- &a$tne$ Lin's (ools) D$ive$s) *i$m+a$e !he broa,est range o# pro,ucts an, services #or the USB ,eveloper- mcci-com ,igh -%alit. Em/edded 0S1 Most 8evice9Host controllers supporte,- Broa, range o# class ,rivers- www-H22/ Embe,,e,-com Net+o$'ing Ove$ 0S1 R*87S& 282/E2M9EEM 9*2M9A2M- Pre/con#igure, pro:ects available- www-H22/ Embe,,e,-com Em/edded &$og$amming E3perts in embe,,e, so#tware ,evelopment- Microchip 2erti#ie, 2onsults- Jan Axelson's Lakeview Research http://janaxelson.com/rs-485_circuits.htm 1 of 12 6/1/2014 10:13 PM RS!"# in 1$ie2 But #irst& a 6uick look at RS/)01- !he inter#ace popularly known as RS/)01 is an electrical speci#ication #or multipoint systems that use balance, lines- RS/)01 is similar to RS/)''& but RS/)'' allows :ust one ,river with multiple receivers& while RS/)01 supports multiple ,rivers an, receivers- !he speci#ication ,ocument& !7A/)01/A& ,e#ines the electrical characteristics o# the line an, its ,rivers an, receivers- !here are brie# suggestions relating to terminations an, wiring& but unlike RS/';'& there5s no ,iscussion o# connector pinouts or so#tware protocols- An RS/)01 network can have as many as ;' unit loa,s& with one unit loa, e6uivalent to an input impe,ance o# %'k- By using high/impe,ance receivers& you can have as many as '1< no,es- An RS/)01 link can e3ten, as #ar as )((( #t-& an, can trans#er ,ata at up to %( Mbps& but not both at the same time- At =( kbps the ma3imum cable length is )((( #t> at %Mbps& it ,rops to )(( #t& an, at %(Mbps& to 1( #t- "or more no,es or very long ,istances& you can use repeaters that regenerate the signals an, begin a new RS/)01 line- Although the RS/)01 stan,ar, says nothing about protocols& most RS/)01 links use the #amiliar asynchronous protocols supporte, by the UAR!s in P2s an, other computers- A transmitte, wor, consists o# a Start bit #ollowe, by ,ata bits& an optional parity bit& an, a Stop bit- !wo ways to a,, RS/)01 to a P2 are on an e3pansion car, an, by attaching an RS/)01 converter to an e3isting port- 2onverters #or RS/';' an, USB are available- n microcontrollers& you can connect an RS/)01 transceiver to any asynchronous serial port- Many network circuits also re6uire a port bit to control each transceiver5s ,river/enable input- Ports ,esigne, #or RS/';' communications can use the R!S output- 7# that5s not available& any spare output bit will ,o- Most serial/communications tools& inclu,ing ?isual Basic5s MS2omm& support RS/)01 communications with R!S controlle, in so#tware- 42S25s 2MM/8R? serial/port ,rivers have automatic R!S control built/in- absolute/ so#tware-co-uk 0S1 &$otocol Anal.3e$s ELL7S+S protocol analy@ers& generators& automate, compliance solutions- www-ellisys-com 0S1($ace 0S1 Anal.3e$ So#tware/base, USB Protocol Analy@er- Easy/to/use an, a##or,able- www-sysnucleus-com &o+e$2%l 0S1 Anal.3e$ Real/time USB '-( ,isplay A class ,eco,ing- See a vi,eo ,emo now- www-totalphase-com 0S1 to Ethe$net Connecto$ Share A access USB ,evices over local network or even 7nternetB www-eltima-com CCC !o #in, out about a,vertising on this site& please contact :an DatE :ana3elson-com- Jan Axelson's Lakeview Research http://janaxelson.com/rs-485_circuits.htm 2 of 12 6/1/2014 10:13 PM !he main reason why RS/)01 links can e3ten, so #ar is their use o# balance,& or ,i##erential& signals- !wo wires& usually a twiste, pair& carry the signal voltage an, its inverse- !he receiver ,etects the ,i##erence between the two- Because most noise that couples into the wires is common to both wires& it cancels out- 7n contrast& inter#aces like RS/';' use unbalance,& or single/ en,e,& signals- !he receiver ,etects the voltage ,i##erence between a signal voltage an, a common groun,- !he groun, wire ten,s to be noisy because it carries the return currents #or all o# the signals in the inter#ace& along with whatever other noise has entere, the wire #rom other sources- An, noise on the groun, wire can cause the receiver to misrea, transmitte, logic levels- !he chips5 ,ata sheets label the non/inverte, RS/)01 line as line A& an, the inverte, line as line B- An RS/)01 receiver must see a voltage ,i##erence o# :ust '((m? between A an, B- 7# A is at least '((m? greater than B& the receiver5s output is a logic high- 7# B is at least '((m? greater than A& the output is a logic low- "or ,i##erences less than '((m?& the output is un,e#ine,- At the ,river& the voltage ,i##erence must be at least %-1?& so the inter#ace tolerates a #air amount o# non/common/mo,e noise an, attenuation- ?en,ors o# RS/)01 transceivers inclu,e Linear !echnology& Ma3im& *ational Semicon,uctor& an, !e3as 7nstruments- !hese companies are also e3cellent sources #or application notes containing circuit e3amples an, e3planations o# the theory behin, them- RS/)01 is ,esigne, to be wire, in a ,aisy/chain& or bus& topology- Any stubs that connect a no,e to the line shoul, be as short as possible- Most links use twiste, pairs because o# their ability to cancel magnetically an, electromagnetically couple, noise- A 4ene$al5%$5ose Net+o$' Here is a no,e #or a general/purpose RS/)01 networkF Jan Axelson's Lakeview Research http://janaxelson.com/rs-485_circuits.htm 3 of 12 6/1/2014 10:13 PM Each no,e has a !e3as 7nstruments S*G1%G<B transceiver that inter#aces between RS/)01 an, !!L logic levels- !he chip has a '/wire RS/)01 inter#ace& a !!L ,river input an, receiver output& an, !!L enable inputs #or the ,river an, receiver- Similar chips inclu,e Linear !echnology5s L!2)01& Ma3im5s MAH)01& an, *ational Semicon,uctor5s 8S;<=1- !he circuit has two %'(/ohm terminating resistors connecte, in parallel& at or :ust beyon, the #inal no,e at each en, o# the link- ne en, o# the link also has two 1<(/ohm biasing resistors- !he terminations re,uce voltage re#lections that coul, cause the receiver to misrea, logic levels- !he receiver sees re#lecte, voltages as an output switches an, the line settles #rom its initial current to its #inal current- !he termination eliminates re#lections by making the initial an, #inal currents e6ual- Walkie Talkie Suppliers alibaba.com Choose from 1M+ Verified Suppliers. Contact Directly & et !i"e #uotes$ Jan Axelson's Lakeview Research http://janaxelson.com/rs-485_circuits.htm 4 of 12 6/1/2014 10:13 PM !he initial current is a #unction o# the line5s characteristic impe,ance& which is the input impe,ance o# an in#inite& open line- !he value varies with the wires5 ,iameters& the spacing between them& an, type o# insulation- "or ,igital signals& which mainly consist o# #re6uencies greater than %(( kH@& the characteristic impe,ance is mostly resistive> the in,uctive an, capacitive components are small- A typical value #or A4I J') twiste, pair is %'( ohms- !he #inal current is a #unction o# the line termination& the receivers5 input impe,ance& an, the line5s series impe,ance- 7n a typical RS/)01 line without a termination& the initial current is greater than the #inal current because the characteristic impe,ance is less than the receivers5 combine, input impe,ance- n a line without a termination& the #irst re#lection occurs when the initial current reaches the receiver- !he receiver5s input can absorb only a #raction o# the current- !he rest re#lects back to the ,river- As the current reverses ,irection& its magnetic #iel, collapses an, in,uces a voltage on the line- As a result& the receiver initially sees a greater voltage than what was transmitte,- 4hen the re#lecte, voltage reaches the ,river& which has a lower impe,ance than the line& the ,river absorbs some o# the re#lection an, bounces the rest back to the receiver- !his re#lection is o# opposite polarity to the #irst re#lection& an, causes the receiver to see a re,uce, voltage- !he re#lections bounce back an, #orth like this #or a #ew roun,s be#ore they ,ie out an, the line settles to its #inal current- 7# the line terminates with a resistor e6ual to the line5s characteristic impe,ance& there are no re#lections- 4hen the initial current reaches the termination& it sees e3actly what it was e3pectingF a loa, e6ual to the line5s characteristic impe,ance- !he entire transmitte, voltage ,rops across the loa,- 7n a network with two parallel terminations& the ,rivers actually ,rive two lines& each en,ing at a termination- !he biasing resistors hol, the line in a known state when no ,rivers are enable,- Most RS/)01 transceivers have internal biasing circuits& but a,,ing a termination ,e#eats their ability to bias the line- A typical internal circuit is a %((k pullup #rom line A to ?K& an, a %((k pull,own #rom line B to groun,- 4ith no termination& when no ,rivers are enable,& the biasing Jan Axelson's Lakeview Research http://janaxelson.com/rs-485_circuits.htm 5 of 12 6/1/2014 10:13 PM resistors hol, line A more positive than line B- 4hen you a,, two %'(/ohm terminations& the ,i##erence between A an, B shrinks to a #ew millivolts& much less than the re6uire, '((m?- !he solution is to a,, smaller resistors in parallel with the internal biasing& so that a greater proportion o# the series voltage ,rops across the termination- !he si@e o# the biasing resistors is a tra,eo##- "or a greater voltage ,i##erence an, higher noise immunity on an i,le line& use smaller values- "or lower power consumption an, a greater ,i##erential voltage on a ,riven line& use larger values- 4hen the receiver is ,isable,& the receiver5s output is high impe,ance- 7# the output ,oesn5t connect to a input with an internal pullup& a,,ing a pullup here will ensure that the no,e ,oesn5t see #alse Start bits when its receiver is ,isable,- !o comply with the speci#ication& all o# the no,es must share a common groun, connection- !his groun, may be isolate, #rom earth groun,- !he groun, wire provi,es a path #or the current that results #rom small imbalances in the balance, line- 7# the A an, B outputs balance e3actly& with e6ual& opposite currents& the two currents in the groun, wire cancel each other out an, the wire carries no current at all- 7n real li#e& components ,on5t balance per#ectly> one ,river will be a little stronger& an, one receiver will have a slightly larger input impe,ance- 4ithout a common groun,& the circuit may work& but the energy ,ue to the imbalance has to go somewhere& an, may ,issipate as electromagnetic ra,iation- !he RS/)01 speci#ication recommen,s connecting a %((/ohm resistor o# at least %9' 4att in series between each no,e5s signal groun, an, the network5s groun, wire& as the circuit above shows- !his way& i# the groun, potentials o# two no,es vary& the resistors will limit the current in the groun, wire- Sim5li2ied Lo+5o+e$ Lin' A,,ing terminations increases a link5s power consumption- 4ith two parallel %'(/ohm terminations an, a ,i##erential output o# %-1?& the current through the combine, terminations is '1 mA D,isregar,ing the e##ects o# biasing& attenuation& etc-E- 4ithout terminations& the loa, is the parallel combination o# the receivers5 input impe,ances& an, varies with the number o# receivers- !he ma3imum ;' unit loa,s have a combine, parallel impe,ance o# ;G1 ohms to groun, or ?K- Jan Axelson's Lakeview Research http://janaxelson.com/rs-485_circuits.htm 6 of 12 6/1/2014 10:13 PM "or some shorter an, slower links& you can save power an, components by not using terminating an, biasing components- !his is #easible i# the line is electrically short& which means that it behaves as a lumpe,& rather than ,istribute,& system- n a short line& the re#lections ,ie out long be#ore the receiver is rea,y to rea, the signal- A general gui,eline is that a line is short i# the rise time o# its signals is greater than #our times the signals5 one/way ,elay- !he one/way ,elay is the amount o# time nee,e, #or a signal to travel #rom the ,river to the receiver- 7t5s a #unction o# the line5s physical length an, the spee, o# signals in the line- 7n copper wire& a typical spee, is '9; the spee, o# light& which works out to 0 inches9nsec- 2able manu#acturers o#ten speci#y a value #or pro,ucts likely to be use, in network wiring- !he rise time is speci#ie, in the ,river5s ,ata sheet- !he slowest chip 75ve #oun, is Ma3im5s MAH;(0(& with a minimum rise time o# <<G nsec- 4ith cables o# up to %(( #t& the rise time is greater than #our times the one/way ,elay D) 3 %1( nsecE& so the line behaves as a short line an, ,oesn5t nee, terminating or biasing- Another a,vantage is that the internal biasing pulls i,le lines to nearly ?K an, groun,& so you get greater noise immunity- !he ,ownsi,e to using the MAH;(0( is that the slow rise time means that it5s rate, #or use only at %%1&'(( bps or less- Sho$tci$c%it 5$otection !he previous circuits ensure, that the line was in a pre,ictable state when i,le or open- !his circuit also protects the network as much as possible i# the signal lines are shorte,F Jan Axelson's Lakeview Research http://janaxelson.com/rs-485_circuits.htm 7 of 12 6/1/2014 10:13 PM 7nstea, o# a single pair o# biasing resistors #or the entire line& the circuit has #our biasing resistors at each no,e- !he circuit uses !e3as 7nstruments5 G1ALS%0(B transceivers& which have #ull/,uple3 RS/)01 inputs an, outputs- !he separate transmit an, receive pairs enable the receiver to have its own series biasing resistors- !he two RS/)01 lines connect :ust beyon, the biasing circuits- Jan Axelson's Lakeview Research http://janaxelson.com/rs-485_circuits.htm 8 of 12 6/1/2014 10:13 PM 7n this circuit& i# the signal lines short together& the %-0k series resistors in combination with the ;<k biasing resistors hol, input A more positive than B- # course& the no,e can5t communicate with the network i# the line is open or shorte,& but at least it will remain in an i,le state& with no #alse Start bits& until the problem is #i3e,- Another way to accomplish the same thing is to use transceivers with built/in #ail/sa#e protection #or open an, short circuits- 2hips that have this #eature take varying approaches- Linear !echnologies5 L!2%)0' has a carrier/,etect #unction that brings the receiver5s output high when the ,i##erential input voltage is too small to be a vali, logic level- !he chip also has a carrier/,etect output that in,icates when the line is in an invali, state- *ational Semicon,uctor5s 8S;<'G< also has internal circuits that bring the receiver5s output high i# the line is shorte, or open- Ma3im5s MAH;(0(/0= series provi,e short/circuit biasing by re,e#ining the threshol, #or logic (- 7nstea, o# speci#ying all ,i##erential inputs o# less than '((m? as un,e#ine,& these chips ,e#ine a ,i##erential voltage o# /1(m? or greater as a logic (- ?oltages e6ual to or more negative than /'((m? remain ,e#ine, as logic %s- !he only un,e#ine, region is #rom /1(m? to /'((m?- 4ith these ,e#initions& a shorte, line& which woul, result in a ,i##erential input o# (?& is a logic (& which results in a high output at the receiver- 6solated Lin' !he entire RS/)01 network has to share a groun,& but the network can be galvanically isolate, #rom other circuits the network connects to as well as #rom earth groun,- All RS/)01 components must be able operate with common/mo,e voltages between /G? an, K%'?- Some components have higher ratings- !he common/mo,e voltage at the receiver e6uals %9' the sum o# the two signal voltages& re#erence, to the receiver5s signal groun,- !he voltage varies with the ,i##erential signal voltages& the ,i##erence in groun, potentials between the ,river an, receiver& an, noise on the line- 4here the groun, connection is very long& isolating the groun, can ensure that the components ,on5t e3cee, their ratings- 7solation can also protect the circuits the network connects to i# Jan Axelson's Lakeview Research http://janaxelson.com/rs-485_circuits.htm 9 of 12 6/1/2014 10:13 PM the network circuits are ,amage, by high voltage- 2omplete isolation re6uires isolating the power supplies an, the network5s signals- !he power supplies typically use trans#ormer isolation& while the signals use optoisolatorsF A one/chip way to achieve isolation is to use Ma3im5s MAH%)0(& which contains its own trans#ormer/isolate, supply an, optoisolate, signal path- A%tos+itching Lin' ne o# challenges in ,esigning an RS/)01 link is controlling the ,river/enable lines- Because all o# the no,es share a ,ata path& only one ,river can be enable, at a time- Be#ore transmitting& a ,river must be sure that the previous ,river has been ,isable,- Many RS/)01 networks use a comman,9response protocol& where one no,e sen,s comman,s& an, the no,e being a,,resse, returns a response- !he UAR! in the no,e being a,,resse, ,etects the #inal Stop bit in the mi,,le o# the bit wi,th& or slightly sooner or later i# the sen,er5s clock ,oesn5t match e3actly- A very #ast no,e may be rea,y to sen, a reply within a #ew microsecon,s a#ter ,etecting the Stop bit- !o prevent the nee, #or a ,elay be#ore respon,ing& the sen,ing no,e5s ,river shoul, be ,isable, as soon as possible a#ter the lea,ing e,ge o# its #inal Stop bit- 7n most systems& the transmitting ,river is enable, on the lea,ing e,ge o# the Start bit an, remains enable, #or the entire transmission& then is ,isable, as soon as possible a#ter the #inal Stop bit- 7n the ,elays between transmissions& biasing hol,s the line in an i,le state- !here are various ways that the transmitting no,e can ,etermine when a transmission has #inishe, an, it5s sa#e to Jan Axelson's Lakeview Research http://janaxelson.com/rs-485_circuits.htm 10 of 12 6/1/2014 10:13 PM ,isable the ,river- !he no,e may rea, back what it sent& or it may use a har,ware or so#tware timer to estimate the time nee,e, to transmit- !his circuit shows a completely automatic way to control the enable line so that the ,river is ,isable, as 6uickly as possible& soon a#ter the lea,ing e,ge o# the Stop bitF 4ith this circuit& the program co,e ,oesn5t have to toggle a signal to enable an, ,isable the ,river& an, a transmitting ,river ,oesn5t nee, to allow e3tra time to be sure that the previous ,river has been ,isable,- Unlike other metho,s o# automatic control& there are no :umpers to set #or a particular bit rate- 7 #irst learne, o# this metho, when 7 saw it in R-E- Smith5s 7RS"2') 7solate, RS/)01 boar,- 7nstea, o# keeping the transmitter enable, #or the entire transmission& the circuit above enables the ,river on the lea,ing e,ge o# the Start bit or any logic low at the ,river5s input& an, it ,isables the ,river about )( microsecon,s a#ter Jan Axelson's Lakeview Research http://janaxelson.com/rs-485_circuits.htm 11 of 12 6/1/2014 10:13 PM the lea,ing e,ge o# the Stop bit or any logic high at the ,river5s input- 4hen the ,river is ,isable,& biasing resistors ensure that the receiver5s output is a logic high- !he ,elay is generate, by a 111 timer con#igure, as a monostable Done/shotE- !he enable inputs o# the ,river an, receiver are tie, together& so the receiver is ,isable, when the ,river transmits- !he timer5s output controls the transceiver5s enable inputs- A #alling e,ge at 8ata ut in,icates a Start bit an, triggers the timer- !he timer5s output goes high& enabling the ,river an, bringing line B more positive than line A- 8io,e #ee,back to the !rig input hol,s the timer5s output high #or as long as !rig remains low- 4hen 8ata ut goes high& the RS/)01 line switches& bringing line A more positive than line B- !he same logic high also causes the timer to begin timing out- About )( microsecon,s a#ter the rising e,ge& the timer5s output goes low& ,isabling the ,river- !he ,elay ensures that the ,river5s RS/)01 output switches without ,elay& while the ,river is enable,- 4hen the ,river is ,isable,& the biasing components continue to hol, A more positive than B- 7n a similar way& any #alling e,ges in the transmitte, ,ata enable the ,river& an, any rising e,ges ,isable the ,river a#ter the ,elay- n the #inal Stop bit& the ,river is ,isable, no later than )( microsecon,s a#ter the Stop bit5s lea,ing e,ge- At rates o# =<(( bps or less& the bit wi,th is greater than %(( microsecon,s& which means that the ,river is ,isable, at aroun, the mi,,le o# the bit wi,th- At #aster bit rates& the ,river will still be ,isable, no more than )( microsecon,s a#ter the Stop bit5s lea,ing e,ge- "or networks that nee, very #ast response time at #aster bit rates& ,ecrease R) #or a shorter ,elay- A ,ownsi,e to this circuit is that the #inal voltage #or logic @eros is the biasing voltage& which is usually less than the ,i##erential voltage when the ,river is enable,- But since the biasing voltage nee,s to be great enough to prevent errors ,ue to noise on an i,le line& it shoul, ,o the :ob #or active logic states as well- Jan Axelson's Lakeview Research http://janaxelson.com/rs-485_circuits.htm 12 of 12 6/1/2014 10:13 PM