Evaluation of DC-to-DC Converters Topologies with Quadratic

Conversion Ratios for Photovoltaic Power Systems

Jean-Paul GAUBERT, Gwladys CHANEDEAU
Universit de Poitiers, France
Laboratoire dAutomatique et dInformatique Industrielle (LAII-ESIP)
40, Avenue du Recteur Pineau, 86022 Poitiers Cedex, France
jean.paul.gaubert@univ-poitirs.fr gwladys.chanedeau@etu.univ-poitiers.fr
http://laii.univ-poitiers.fr

Keywords
Renewable energy systems, Photovoltaic, DC power supply, Converter circuit, converter
control
Abstract
This paper presents a new class of pulsewidth modulation (PWM) DC-to-DC converters with
quadratic conversion ratios for photovoltaic applications without a transformer. The aim of these
structures is to obtain at the same time high conversion ratio and excellent efficiency for a wide source
voltage range. The DC voltage conversion ratios of these converters have a quadratic dependence on
duty cycle providing thus a large step-up and offering the possibility of higher switching frequency.
This research focuses on the development of these new structures with only one single active switch
and their theoretical analysis with relevant equations and operating principle. Moreover, a complete
simulation and experimental results are presented to confirm their interest in photovoltaic applications.
These results are used to compare on the one hand the conversion ratios versus duty cycle and on the
other hand the efficiency versus the conversion ratios of each topology.
Introduction
Renewable energy sources play a more and more important role in electricity generation. Energy from
the sun or the wind nowadays represents the most suitable solution in particular for domestic power
levels. Moreover, they are available everywhere and are free to harness. Currently, in different
European countries, states or local councils, through electricity companies, are providing money
incentives for energy produced by renewable sources and injected or not into the utility grid.
In our laboratory, we have a project with the local council of a hybrid photovoltaic-wind generating
system for domestic applications. In our case the DC bus is common and its value is set at a constant
value. The two renewable energy sources are connected in parallel on the DC bus with their particular
converters contrary to a solution of multi-input [1]. The type of topology can be employed either in
grid connected or in stand-alone conversions systems [2] with a single inverter [3]. This study focuses
on photovoltaic system (PV) and DC-to-DC conversion stage with only one converter instead of a
cascade of basic choppers for every PV panel [4-5]. The aim is to reach the suitable DC voltage supply
for the inverter avoiding the use of a transformer and remain underneath security voltage (50 V) at the
output of PV. To lower module count, the DC-to-DC converter must operate at a high switching
frequency to reduce reactive component values and obtain useful conversion ratio with high
efficiency.
The paper proposes to evaluate performance of new topologies of step-up DC-to-DC converters with
quadratic conversion ratio based on a synthesis procedure with matrix representation. This theoretical
analysis permits to extract the topologies whose conversion ratio m is above one for a duty cycle equal
to 0.5 and has only one controllable switch associated with three diodes, two inductors and one
capacitor. Also, it is possible to apply a specific algorithm to obtain Maximum Power Point Tracking
(MPPT) of photovoltaic module [6], in the same way as basic converters such as boost.

Electrical characteristics of solar panels

The technology of photovoltaic (PV) is concerned with the solar energy conversion into usable
electrical form. The basic element of a PV array is the solar cell, which is basically a p-n
semiconductor junction. The mathematical model of a solar cell is usually based on a current source in
parallel with a one diode, one shunt resistance and one output series resistance [7]. The relationship
between current and voltage may be determined from the diode characteristic equation and is given
by:
( . ) .
exp 1
. .
s s
ph o
k sh
q V R I V R I
I I I
n k T R
=
+ +




(1)
Where V and I represent, respectively, the output voltage and current of the PV, ph I is the
photocurrent generated by the solar radiation, o I is the reverse saturation current, q is the electronic
charge, s R and sh R are the series and shunt resistance, n is a dimensionless factor, k is the Boltzman
constant, k T is the solar cell operating temperature in K . The current vs voltage ( ) I V of a solar cell
is equivalent to a diode characteristic curve. A computer simulation based in equation (1) is used to
obtain the output characteristics, first for various insulation levels from 400 to 1000W/m (Fig. 1), and
then for various temperatures (Fig. 2) for the module bp solar MSX60 taken as a typical example [8].


Fig. 1: Typical current/voltage
( ) I V characteristic for different insulations

Fig. 2: Effect of temperature on ( ) I V
characteristic
The output characteristics of a solar cell are non linear and are strongly influenced by solar radiation,
load condition and to a lesser extent by temperature. Moreover, there is a unique point on the ( ) I V
curve at which the solar cell will generate maximum power. It is designed by the maximum power
point. So, DC-to-DC converters are used to match the output of a PV generator to a variable load or to
a DC bus. Their control strategies have to operate the PV array at its maximum power point (MPP)
with the highest efficiency.

Circuit configurations

In DC-to-DC converters applications requiring high conversion ratios, elementary PWM topologies
must operate with a duty cycle close to one. Thus, on the one hand the regulation range is very low
and on the other hand the switching frequency is limited by the off times of the controllable switch.
Moreover, in the case of step-up converters, high conversion ratios are achieved for values of close
to one which correspond to an operating area where the efficiency is lower. This can be avoided with a
new family of DC-to-DC converters using only one controllable switch and three diodes and whose
conversion ration has a quadratic dependence on duty cycle . Also, conversion range can be extended
significantly and these new topologies provide high values for the output voltage without degrading
efficiency.
D
3

C
2
C
1

R
L
1

i
L1

T
2

i
s

v
C2

-
+
Vo
Vg
L
2
D
2

T
1

i
L2

i
C2


D
3

C
2
C
1

R
L
1

i
L1

T
2

i
s

v
C2

-
+
Vo
Vg
L
2
D
2

T
1

i
L2

i
C2

In these DC-to-DC converters, the ratio m between the output voltage and the input voltage is a
function of on-time T of the controllable switch, related to the switching period T. The main idea is
cascading two basic converters to obtain a quadratic conversion ratio but two controllable switches are
necessary in this case. So, additional complexity of the converter network may compromise potential
advantages of the extended conversion range. However, keeping the same components as for two basic
structures (4 switches, 2 inductors and 2 capacitors including the one parallel connected across the
load R) and placing them in different positions provide several solutions in which the conversion ratio
m is a function of, at least, one term in
2
and which have only one controllable switch. For example,
two boost converters in cascade provide a conversion ratio
2
1/(1 ) m = (Fig. 3), hence a higher
maximum value for m is achieved before the efficiency decreases. To eliminate the first controllable
switch, it is necessary to change its connection as shown in figure 4. The type of this new switch
depends on the variations of its current and its voltage. The locus of the operating point in the
current/voltage plane allows to decide whether the transition of the switch is forced (in the case of a
switching locus in a quadrant where i and v have the same sign) or spontaneous (in the case of a
switching locus in a quadrant where i and v have opposite signs). In the position like in figure 5, the
type of this new switch is a diode. Also, this solution owns only one controllable switch, three diodes,
two inductors and two capacitors by taking into account the output capacitor. Note that the two
topologies with ideal switches are electrically equivalent:
- first switched network(0 . ) t T < < : T1 and T2 (Fig. 3) or T2 and D1 (Fig. 5) ON; D2 and
D3 OFF,
- second switched network( . ) T t T < < : D2 and D3 ON; T1 and T2 (Fig. 3) or T2 and D1
(Fig. 5) OFF.








Fig. 3: Scheme of two series boost converters








Fig. 4: Slight modification scheme of two series
boost converters









Fig. 5: Modified Scheme of two series boost converters









Fig. 6: Basic scheme of generalized analysis








Fig. 7: Basic PWM converter structure,
2
/ ( ) m Vo Vg f = =
D
3

C
2

C
1

R
L
1

i
L1

T
2

i
s

v
C2

-
+
Vo
Vg
L
2

D
2

i
L2

D
1

C
2
C
1

R
i
s

-
+
Vo
Vg

C
1

R
i
s

-
+
Vo
Vg
1 2
0 0
Converter cell
This analysis can be generalized to the other basic structures of DC-to-DC converters such as buck [9]
or buck-boost [10-11] or Cuk [12] with the same configuration and elements (Fig. 6) or in other way
voltage lift technique [13].
In order to find out the entire set of these fourth-order converters, a synthesis procedure based on a
matrix representation of DC-to-DC converters topologies was required [14]. The basic PWM
converter structure is shown in figure 7 and consists of an input voltage source (point 1) and an output
voltage sink (point 2) both connected to the common node (reference potential or ground, point 0).
Here, load R is in parallel with a single capacitor
1
C . For the other elements: 2 inductors, one
capacitor and four switches are in the box named converter cell. Inside this one there thus exists an
additional node designed by point 3. The capacitor
2
C is obligatorily laid out between this point 3 and
another of the three external points (0, 1 and 2) because of the nature of input and output sources. All
possible configurations are generated by displacing the three energy-storage components: two
inductors (
1
L and
2
L ) and one capacitor
2
C , capacitor
1
C is always parallel connected across the load
resistance, between the three points previously mentioned. Now, graphs are obtained for the two
switched networks:
1
G if 0 . t T < < and
2
G if .T t T < < . The input voltage source and the two
capacitors are the branches and the two inductors with load R are the chords for the graphs
1
G and
2
G . In this case, figure 8 shows the six possibilities by taking into account the voltage polarity for
disposing capacitor
2
C and figure 9 the twelve possibilities of placement for inductors
1
L and
2
L with
reverse current.

Fig. 8: Possible positions of the capacitor
2
C in the graph
i
G of quadratic PWM converter




Fig. 9: Possible positions of an inductor (
1
L and
2
L ) in the graph
i
G of quadratic PWM converter

From the graphs of figures 8 and 9 it is possible to translate the various positions of the reactive
elements by a pair of incidence matrices (
1
H and
2
H ) which represent the two switched networks.
The rows of incidence matrices correspond to nodes and columns to edges of graph. By convention,
value 1 in the row corresponds to the from node, value -1 to the to node and all other entries are 0
for each oriented edge. For example, matrices (2) and (3) give results respectively for positions of
capacitor
2
C with the two polarities and for inductors (
1
L and
2
L ) with possibility of reverse current.
1 2 3 4 5 6
0 1 1 0 0 0 0
1 0 0 1 1 0 0
2 0 0 0 0 1 1
3 1 1 1 1 1 1

(2)

1 2 3 4 5 6 7 8 9 10 11 12
0 1 1 1 1 0 0 1 1 0 0 0 0
1 1 1 0 0 1 1 0 0 1 1 0 0
2 0 0 1 1 1 1 0 0 0 0 1 1
3 0 0 0 0 0 0 1 1 1 1 1 1




(3)

The pair of incidence matrices
1
H and
2
H can be written by an equivalent pair of numbers:
1 1 1 2 2 2
, i j k i j k . Index 1 corresponds to the first operating phase (graph
1
G ) while index 2
represents the second operating phase (graph
2
G ). Thus,
i
i represents the position of the capacitor
2
C
and belongs to { } 1, 2, 3, 4, 5, 6 ,
i
j and
i
k represent respectively the positions of inductors
1
L and
2
L and belong to { } 1, 2, 3, 4, 5, 6, 7,8, 9,10,11,12 . In this step, the full number of combinations is
very important. However, many combinations are redundant or degenerated and the number of valid
topologies is much lower. Moreover, all the unrealizable networks are automatically eliminated by a
procedure from systematic synthesis. Remaining solutions are analysed with a computer program by
respecting input requirements and following steps.
Conditions imposed by the specifications:
conversion ratio upper 1 for a duty cycle = 0.5,
only four switches among which one fully controllable associated with three
diodes.
The taking into account of a combination of 2 configurations and development of the
incidences matrices
1
H and
2
H corresponding to the graphs
1
G and
2
G with notations
adopted on figure 10.
The evaluation of the DC model by calculating the average values of the state variables.
Here, solutions which give null average values for capacitors voltages or inductors currents
and have a conversion ration lower 1 for = 0.5 are eliminated.
The switches insertion procedure is carried out using the incidence matrices
1
H and
2
H .
Figure 11 indicates how the switches must be placed to obtain the two configurations
1
G and
2
G .
The switches implementation is determined by applying the law of the nodes for the
currents in the switches when ON and the Kirchhoff's voltage law for the voltage across the
switches. So,
s
V and
s
I can be estimated for each ideal switch in networks
i
G . Under the
small ripple assumption, voltage across capacitor and current in inductor are DC only and it is
the same thing for voltages
s
V and currents
s
I . These DC quantities are functions of the duty
cycle . After, the choice of switch type depending on the sign of
s
V and
s
I over the two
switched network. Figure 12 shows the final solution for this example with only one
controllable switch (S3) associated with three diodes and the basic expression of the
conversion ratio m.

Matrice
1
H
1 2 1 2
0 1 1 1 1 1 0
1 1 0 0 0 1 1
2 0 1 0 1 0 0
3 0 0 1 0 0 1
Vg C C R L L

Graph
1
G

Matrice
2
H
1 2 1 2
0 1 1 0 1 0 0
1 1 0 0 0 1 0
2 0 1 1 1 0 1
3 0 0 1 0 1 1
Vg C C R L L

Graph
2
G

Fig. 10: Incidence matrices and associated graphs for the combination 1110, 61011










Fig. 11: Switches insertion procedure








Fig. 12: New quadratic converter: scheme G1,
2
(1 ) /(1 ) m = +

With this systematic analysis of all existing possibilities by a computer program a new family of step-
up converters was uncovered with quadratic conversion ratios. Figure 13 and 14 show the scheme for
two other new converters and also the basic expressions of the conversion ratio m for each of them.
There are other new or alternative quadratic converters to derive from this systematic analysis, we
retained here those which seemed to us most appropriate to our requirement in term of conversion
ratio and efficiency.










Fig. 13: New quadratic converter: scheme G2,
2
(1 ) /(1 ) m = +








Fig. 14: New quadratic converter: scheme G3,
2
1/(1 ) m =


Vg
L
1

1
L
2

C
2

C
1

R
3 2
0

Vg
L
1

1
L
2

C
2

C
1
R
3 2
0
Vg
L
1

1 L
2

C
2

C
1

R
3
2
S
2

S
1

S
3

S
4


D
1

D
2

D
3

C
2

C
1

R
L
2

L
1

i
L1

i
L2

i
C2

i
s

v
C2

T
Vo
-
+
Vg

D
1

D
2

D
3

C
2

C
1

R
L
2
L
1

i
L1

i
L2

i
C2

i
s

v
C2

T
Vo
-
+
Vg
D
1

D
2

D
3
C
2

C
1

R
L
2

L
1

i
L1

i
L2
i
C2

i
s

v
C2

T
-
+
Vg
Vo
Analysis of step-up converters

The aim of analysis is to compare relationships between these news converters and to check the
possibilities of each topology. These new quadratic conversion ratios step-up converters with two
inductors, two capacitors and four switches permit to reach higher output voltages values and
efficiency than the conventional converter, while using only one controllable switch. Thus a more
extensive study of the features is interesting in order to compare these circuits. In this respect, the
following parameters must be taken into account for the calculation:
- the inductors series resistance
i
r ,
- the internal resistance
DSON
R
of the transistor in the on-state if a power MOSFET is used,
- the threshold voltage
O
E and the dynamic resistance
ON
R of the diodes in the on-state.
The features of these new converters are analysed and compared in continuous conduction modes.
These studies permit to calculate the stresses on the switching devices and calibrate the energy-storage
components thereafter. With / g
E O
K E V = ,
1 1
/
RL
K r R = ,
2 2
/
RL
K r R = , /
RM DSON
K R R = and
/
RD ON
K R R = the results for the conversion ratio and efficiency expression are described by the
following equations.
1. Conventional boost converter:
[ ]
0 2
(1 ) * 1 *(1 )
/
(1 ) * *(1 )
E
g
RL RM RD
K
m V V
K K K



= =
+ + +
(4)
And *(1 ) m = (5)
2. Two series boost and G3 converters:
2 2
0
4 2 2 3
1 2
(1 ) * 1 *(1 (1 ) )
/
(1 ) *(1 ) * *(2 ) * 1 (1 )
E
g
RM RD RL RL
K
m V V
K K K K


+

= =
+ + + + +

(6)
And
2
*(1 ) m = (7)
3. Converter on scheme G1:
[ ]
2
0 2 2 2
1 2
(1 )* (1 ) 2* *(1 )
/
(1 ) *(1 ) * *(2 ) * (1 ) *(2 )
E
g
RM RD RL RL
K
m V V
K K K K


+

= =
+ + + +
(8)
And
2
(1 )
*
(1 )
m

=
+
(9)
4. Converter on scheme G2:
2 2
0 2 2 2
1 2
(1 )* (1 ) *(1 2* )
/
(1 ) *(1 ) * *(1 )
E
g
RM RD RL RL
K
m V V
K K K K


+ +

= =
+ + + +
(10)
And
2
(1 )
*
(1 )
m

=
+
(11)

Simulation results

At first the validity of the suggested schemes are analysed and tested by simulation carried out on
software Matlab\Simulink
TM
and SimPowerSystems Blockset. To check the performances of these
new topologies on the voltage gain and efficiency vs conversion ratio are established. For that the
values of the parameters are taken identical just as well in simulation as in experimental cases. Here
the following parameter set was used:
- input voltage 12 Vg V = ,
- output resistive charge: 500 R = ,
- two inductors of 2 L mH = with series resistance 0.04
i
r = ,
- a power MOSFETs HiPerFET
TM
IXFH21N50 with internal resistance
0.2
DSON
R =
,
- three HiPerFET
TM
epitaxial diodes DSEP 29-06A with threshold voltage 1.2
O
E V = at
10 ; 100
VJ FAV
I A T C = =
and dynamic resistance 0.0107
ON
R = ,
- two capacitors: output
1
470 C F = , intermediate
2
20 C F = ,
- the switching frequency is fixed at 20 KHz in respect with the possibility of real time
implementation system.
Results for classical boost and two series boost converters (or scheme G3) are given on figures 15 and
16. Figure 17 and 18 show the same characteristics for the other two new quadratic converters: scheme
G1 and G2.
0,0
2,0
4,0
6,0
8,0
10,0
12,0
14,0
16,0
18,0
20,0
22,0
0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8 0,9 1
Duty cycle

R
a
t
i
o

m

=

V
o
/
V
g
.
Boost Two boost
0
10
20
30
40
50
60
70
80
90
100
0 2 4 6 8 10 12 14 16 18 20 22
Conversion ratio m = Vo/Vg
E
f
f
i
c
i
e
n
c
y

i
n

%
Boost Two boost
Fig. 15: Variations of / ( ) m Vo Vg f = = Fig. 16: Variations of / ( ) Po Pg f m = =

0,0
2,0
4,0
6,0
8,0
10,0
12,0
14,0
16,0
18,0
20,0
0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8 0,9 1
Duty cycle
R
a
t
i
o

m
=
V
o
/
V
g
.
G1 G2
0
10
20
30
40
50
60
70
80
90
100
0 2 4 6 8 10 12 14 16 18 20
Conversion ratio m = Vo/Vg
E
f
f
i
c
i
e
n
c
y

i
n

%
G1 G2
Fig. 17: Variations of / ( ) m Vo Vg f = = Fig. 18: Variations of / ( ) Po Pg f m = =

These first results from the detailed analysis confirm that quadratic converters with only a single
active switch like two series boost converters and G3 make it possible to reach at the same time high
conversions ratio with duty cycle far away from the unit and very good efficiency. For the converters
G1 and G2 the characteristics are close to that of a conventional boost. It should be noted also that the
maximum conversion ratio is higher for two series boost, G1 and G3 converters that of conventional
boost.

Experimental results

The features of quadratic converters are depicted on the figures below. The predicted results are
confirmed by experimental verifications. So it is shown that two series boost or scheme G3 converters
provide a large voltage step up (up to twelve times the input voltage) without a duty cycle too close to
one and for a wide load range. Consequently, these transformerless DC-to-DC converters, which have
a quadratic dependence on duty cycle, can operate with higher switching frequencies on the one hand
and on the other hand with less stress on all components, leading to a significant improvement of the
system losses. Under the same conditions of tests and with identical reactive components the
efficiency is lower than the conventional boost for these two topologies. The rise of switching
frequency and a choice more adapted of components must make it possible to catch up this efficiency
variation. With regard to the new topologies G1 and G2, it proves that the structure G1 provides better
efficiency for the same conversion ratio than the conventional boost converter.

0,0
2,0
4,0
6,0
8,0
10,0
12,0
14,0
0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8 0,9 1
Duty cycle
R
a
t
i
o

m
=
V
o
/
V
g
.
Boost Two Boost
0
10
20
30
40
50
60
70
80
90
100
0 2 4 6 8 10 12 14
Conversion ratio m = Vo/Vg
E
f
f
i
c
i
e
n
c
y


i
n

%
Boost Two Boost
Fig. 19: Variations of / ( ) m Vo Vg f = = Fig. 20: Variations of / ( ) Po Pg f m = =

0,0
2,0
4,0
6,0
8,0
10,0
12,0
14,0
0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8 0,9 1
Duty cycle
R
a
t
i
o

m
=
V
o
/
V
g
.
G1 G2
0
10
20
30
40
50
60
70
80
90
100
0 2 4 6 8 10 12 14
Convertion ratio m = Vo/Vg
E
f
f
i
c
i
e
n
c
y

i
n

%
G1 G2
Fig. 21: Variations of / ( ) m Vo Vg f = = Fig. 22: Variations of / ( ) Po Pg f m = =
Table I: Experimental comparison of the topologies
Topologies Boost Two boost
or G3
G1 G2

m maximum

0.94 0.8 0.94 0.94
11.8 12.9 13.2 12.85
48.3 % 46.7 % 54.7 % 54.3 %
m = 8

0.885 0.67 0.86 0.89
83 % 77 % 88.5 % 83 %

Table I summarizes the possibilities of each studied structure for maximum and fixed conversion
ratios.

Conclusion

In this study, new DC to DC converters topologies with quadratic conversion ratios for photovoltaic
are investigated. These solutions permit to reach high conversion ratios without duty cycle too close to
one and with good efficiency or better than the classical boost converter. Moreover, as the maximum
of conversion ratio is reached with a duty cycle far away from the unit for two of them that decreases
the stress on the components of these quadratic topologies. The wide range of duty cycle involves a
better precision in strategy control. In addition, the possibility of increasing the switching frequency
makes it possible to reduce the reactive elements of these structures. It is also interesting to increase
the voltage variation of the photovoltaic generator and to operate with higher switching frequencies
without the use of a transformer for operating in a large input voltage variation. For quadratic
converters, it is evident that at least fourth-order networks are necessary in order to obtain required
features for these PWM DC-to-DC converters. In this way, efficiency, size, weight and cost
consideration for any higher order converters seem unsuitable for the majority of industrial
applications. The optimization of these structures is in progress in order to carry out a more precise
evaluation of the components and behavior in discontinuous mode. In parallel, a perturbation and
observation method is fitted to realize the MPPT algorithm for the PV array. The control circuit is
implemented in real time by using a single-board DS1104 on a laboratory test bench.

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