Eced Full Manual

CMS COLLEGE OF ENGINEERING
NAMAKKAL

DEPARTMENT
OF
ELECTRONICS AND COMMUNICATION
ENGINEERING

EC6211 CIRCUITS AND DEVICES LAB

EX NO: 01(a) VERIFICATION OF KIRCHOFFS CURRENT LAW

CIRCUIT DIAGRAM:

PRACTICAL MEASUREMENT:

AIM:
To verify the Kirchhoffs current law

APPARATUS REQUIRED:

S NO APPARATUS RANGE QUANTITY
1 Resistor 1K 3
2 Ammeter (0-200mA) 3
3 Bread Board - 1
4 Regulated Power Supply (0-30)V 1
5 Connecting Wires - As Required

THEORY:
The current entering any junction is equal to the current leaving
that junction.
i
2
+ i
3
= i
1
+ i
4

This law is also called Kirchhoff's first law, Kirchhoff's point rule, or
Kirchhoff's junction rule (or nodal rule).
The principle of conservation of electric charge implies that:

At any node (junction) in an electrical circuit, the sum of currents
flowing into that node is equal to the sum of currents flowing out of
that node,
or:
The algebraic sum of currents in a network of conductors
meeting at a point is zero.
Recalling that current is a signed (positive or negative) quantity
reflecting direction towards or away from a node, this principle can be
stated as:

n is the total number of branches with currents flowing towards or away
from the node.

TABULATION:

S NO
VOLTAGE
(volts)
I
1

(mA)
I
2

(mA)
I
3

(mA)

PROCEDURE:
Connections are given as per the circuit diagram
Vary the dual power supply and set the original output
Measure the varying current using Ammeter
Observation readings are completed as theoretical value
Switch off the power supply

PRECAUTIONS:

Ammeter should be connected in series
Voltmeter should be connected in parallel

RESULT:
Thus the Kirchhoffs current law is verified.
EX NO: 01(b) VERIFICATION OF KIRCHOFFS VOLTAGE LAW

CIRCUIT DIAGRAM:

PRACTICAL CIRCUIT:

AIM:
To verify the Kirchhoffs voltage law

APPARATUS REQUIRED:

1 Resistor 1K,2.2k,3.3k Each 1
2 Voltmeter (0-20) V 3
3 Bread Board - 1

THEORY:

Kirchhoffs voltage law states that the algebraic sum of voltage
taken around a closed loop is equal to zero. In other words it is In a
closed loop the algebraic sum of applied emf is equal to the algebraic
sum of product of current and resistance in that circuits.(i.e) potential
rise is equal to potential drop.

PROCEDURE:

Connections are given as per the circuit diagram
Vary the dual power supply and set the original output
Measure the varying voltages using Voltmeter
Observation readings are completed as theoretical value

TABULATION:

S NO VOLTAGE (volts) V
1
(volts) V
2
(volts) V
3
(volts)

PRECAUTIONS:
Ammeter should be connected in series
Voltmeter should be connected in parallel

RESULT:
Thus the Kirchhoffs voltage law is verified.
EX: NO: 02(a) VERIFICATION OF THEVENINS THEOREM

CIRCUIT DIAGRAM:

To Find
:

AIM:
To verify the Thevenins theorem and by using Thevenins theorem find
the current through 2.2k resistance of the given circuit.

APPARATUS REQUIRED:


1 Resistor
1K 2
2.2k,3.3k,560,
10k
Each 1
2 Voltmeter (0-20) V 1
3 Multi meter - 1
4 Bread Board - 1

THEORY:

THEVENINS THEOREM
Any linear active network with output terminal A and B can be
replaced by an equivalent circuit with a single voltage source Vth
(thevenins voltage) in series with Rth(thevenins resistance)
Vth open circuit voltage across terminal A & B
Rth equivalent resistance obtained by looking back the circuit
through the open circuit terminal A and B

THEORITICAL CALCULATION

Thevenins voltage, Vth = V *R2 / (R 1 + R 2)+ Volts

To Find
:

TABULATION:

S.No V
th
R
th
R
L

PROCEDURE:

Determination of Thevenins voltage, Vth:
Make the connections as per the circuit diagram
Switch on the power supply
Vary the regulated power supply to a specified voltage and note
down the corresponding voltmeter readings
Repeat the previous step for different voltage by varying the R. P. S.

Determination of load current, IL:
Make the connections as per the circuit diagram
Switch on the power supply
Vary the regulated power supply to a specified voltage and note
down the corresponding ammeter readings
Repeat the previous step for different voltage by varying the R. P. S.

RESULT:
Thus the Thevenins theorem is verified and current through 2.2 k is
calculated.
EX: NO: 02(b) VERIFICATION OF NORTONS THEOREM

CIRCUIT DIAGRAM

PRACTICAL DIAGRAM (To Measure I
N
)

AIM:
To verify the Nortons theorem and by using Nortons theorem find the
current through 3.3k resistance of the given circuit.

APPARATUS REQUIRED:

1 Resistor
1K,2.2k,3.3k,100,
10k
Each 1
2 Ammeter (0-200) mA 1
3 Multi meter - 1
4 Bread Board - 1

THEORY:
NORTONS THEOREM
Any linear active network with output terminals A & B can be
replaced by an equivalent circuit with a single current source I
with Rth (Thevenins resistance).
Where,
Rth is the equivalent resistance obtained by looking back the
circuit through the open terminal A & B.

TO MEASURE R
N
(R
TH
)

NORTONS EQUIVALENT CIRCUIT

TABULATION

S.No

I
N
(mA)

R
N
(k)

PROCEDURE:
Identify the element which we have to find the value of current.
Disconnect the load terminal and short circuit it.
Find the Current (Norton Circuits Current, I
N
) using current
division or Mesh Analysis.
For calculating R
th
or R
N
short circuit the voltage sources and open
circuit the terminal where the current is to be calculated (and
open the current source if present).
Draw Nortons equivalent circuit. Formula for calculating the load
current through the branch or load terminal is given by
= I
N
{
}

RESULT:
Thus the Nortons theorem is verified and current through 3.3 k is
calculated.

EX: NO: 03 VERIFICATION OF SUPERPOSITION THEOREM

CIRCUIT DIAGRAM:

V
1
SOURCE ALONE:

V
2
SOURCE ALONE:

AIM:
To verify the Superposition theorem and by using Superposition
theorem find the current through 3.3k resistance of the given circuit.

APPARATUS REQUIRED:

1 Resistor 1K,2.2k,3.3k Each 1
3 Multi meter - 1
4 Bread Board - 1

THEORY:

In a linear bilateral active network containing more than
one source the total response obtained is algebraic sum of
response obtained individually considering only one source at a
time the source being suitable suppressed.
While calculating response by a single source all the other
sources are replaced by their internal resistances. If no internal
resistance is there short circuit the voltage source and open circuit
the current source.

TABULATION 1:
S NO
VOLTAGE (V1)
In volts
VOLTAGE (V2)
In volts
AMMETER READING
I (mA)

TABULATION 2:
S NO
VOLTAGE
(V1)
In volts
AMMETER
READING
I (mA)
VOLTAGE
(V2)
In volts
AMMETER
READING
I (mA)
TOTAL CURRENT
I= I + I
In mA

PROCEDURE:

Connect the diagram as shown in the figure.
Vary V
1
and V
2
simultaneously and measure the
corresponding ammeter reading for each setting.
Tabulate the readings.
Vary V
1
and measure corresponding I
1
using ammeters.
Vary V
2
and measure corresponding I
2
using ammeters.
Calculate the total current I using I
1
+I
2
and compare it with
readings obtained

RESULT:
Thus the Superposition theorem is verified and current through
load resistor 3.3 k is calculated.

EX: NO: 04(a) VERIFICATION OF MAXIMUM POWER TRANSFER
THEOREM

CIRCUIT DIAGRAM:

MODEL GRAPH

AIM:

To verify the Maximum power transfer theorem in a purely passive
circuit and the load resistance is variable.

APPARATUS REQUIRED:

1 Resistor 10K,2.2k Each 1
3 Voltmeter (0-20)V 1
4 Bread Board - 1

THEORY:

Maximum power will be delivered from a voltage source to a load,
if load resistance is equal to the internal resistance of the sources.
P
max
=

Where V
th
is the open circuited voltage across the network terminals
and R
L
is the load resistance.

TABULATION:
S.
No
LOAD
RESISTANCE
(k)
VOLTAGE
(V)
CURRENT
(mA)
POWER
( P=VI )
(mW)

PROCEDURE:
Initially RPS voltages get constant for 10V.

Varying the load resistance (R
L
) corresponding to V, I are
noted.
Graph is drawn between R
L
and power.

P
max
=

RESULT:
Thus the maximum power transfer theorem is verified.

EX: NO: 04(b) VERIFICATION OF RECIPROCITY THEOREM

CIRCUIT DIAGRAM I

CIRCUIT DIAGRAM II

AIM:

To verify reciprocity theorem for a network practically with theoretical
calculation.

APPARATUS REQUIRED:

1
Resistor
1k,100, 100 ,
470
Each 1
3 Bread Board - 1

THEORY:
In any linear bilateral network the ratio of voltage to current
response, in any element to the input is constant even when the
position of the input and output are interchanged.

PROCEDURE:
Note down the ammeter readings and find the ratio of
output current to input voltage.
Interchange the position of ammeter reading and find the
ration of output current to input voltage.
Compare this value with the value observed in above step.

TABULATION I: (BEFORE INTERCHANGING)

S NO VOLTAGE (volts) CURRENT (mA)
Z=
k

TABULATION II: (AFTER INTERCHANGING)

S NO VOLTAGE (volts) CURRENT (mA)
Z=
k

RESULT:
Thus the Reciprocity theorem is verified for the given network
with the theoretical calculation.

EX: NO: 05(a) CHARACTERISTICS OF PN JUNCTION DIODE

CIRCUIT DIAGRAM:

FORWARD BIAS:

REVERSE BIAS:

AIM:

To study the characteristics of PN junction diode under forward bias and
reverse bias condition

APPARATUS REQUIRED:

1 Diode IN4007 1
2 Resister 1K 1
3 Ammeter (0-200)mA 1
5 Bread Board - 1

THEORY:
A diode is a two terminal unijunction device which is
formed by joining a P type and N type semiconductor through a metallic
junction. If the positive of the supply is connected to the P type material and
negative terminal is connected to the N type region then the diode is said to be
forward biasing. If the connections are reversed then it is known as reverse
bias.
During the forward biasing, electrons and holes are repelled toward the
PN junction, where they recombine to form neutral changes and are replaced
by free electrons from the battery. This movement of changes maintains a high
forward current through the diode in the form of free electrons passing from
the N material, toward the positive terminal of the battery. Because current
flows in this connection, the diode is said to have a low forward resistance.

SYMBOL

MODEL GRAPH:

PROCEDURE:
Connect the circuit as per the circuit diagram.
By varying the RPS get the different forward voltage in the
voltmeter and note down the corresponding forward
current in the ammeter.
Plot the graph between voltages vs. current.
For Reverse bias change the circuit according to the
diagram
Now vary the reverse voltage and note down the reverse
current value and plot the graph.

TABULATION:

FORWARD BIAS REVERSE BIAS
SUPPLY
VOLTAGE
(V)
VOLTAGE
IN volts
(
)
CURRENT
IN mA
(
)
SUPPLY
VOLTAGE
(V)
VOLTAGE
IN volts
(
)
CURRENT
IN mA
(
)

RESULT:
Thus the characteristics of PN junction diode is studied and its VI
characteristics is drawn
EX: NO: 05(b) CHARACTERISTICS OF ZENER DIODE

CIRCUIT DIAGRAM:

FORWARD BIAS:

REVERSE BIAS:

AIM:

To study the characteristics of Zener diode under forward bias and
reverse bias condition

APPARATUS REQUIRED:

1 Zener Diode IN4007 1
2 Resistor 1K 1
5 Bread Board - 1

THEORY:
A Zener diode is a diode which allows current to flow in the forward
direction in the same manner as an ideal diode, but will also permit it to flow in
the reverse direction when the voltage is above a certain value known as the
breakdown voltage, "zener knee voltage" or "zener voltage" or "avalanche
point".
The device was named after Clarence Zener, who discovered this
electrical property. Many diodes described as "zener" diodes rely instead on
avalanche breakdown as the mechanism. Both types are used. Common
applications include providing a reference voltage for voltage regulators, or to
protect other semiconductor devices from momentary voltage pulses.

SYMBOL

MODEL GRAPH:

PROCEDURE:
By varying the RPS get the different forward voltage in the
voltmeter and note down the corresponding forward
current in the ammeter.
Plot the graph between voltages vs. current.
For Reverse bias change the circuit according to the
diagram
Now vary the reverse voltage and note down the reverse
current value and plot the graph.
TABULATION:

SUPPLY
VOLTAGE
(V)
VOLTAGE
IN volts
(
)
CURRENT
IN mA
(
)
SUPPLY
VOLTAGE
(V)
VOLTAGE
IN volts
(
)
CURRENT
IN mA
(
)

RESULT:
Thus the characteristics of Zener diode is studied and its VI
characteristics is drawn.
EX: NO: 06 CHARACTERISTICS OF CE CONFIGURATION

SYMBOL: PIN DIAGRAM:

CIRCUIT DIAGRAM:

AIM:

To plot the characteristics curve of a Bipolar Junction Transistor in
Common Emitter configuration.

APPARATUS REQUIRED:

1 Bipolar Junction Transistor BC107 1
2 Resistor 1K 2
5 Dual Regulated Power
Supply
(0-30)V 1
6 Bread Board - 1

THEORY:
The transistor being three terminal devices makes it applicable as an
amplifier by making one of the terminal common to both the input and output.
Depending on which terminal is made common the transistor is classified into
three configurations Common Base, Common Collector, Common Emitter.

Common Emitter configuration: The input is given to the base and output is
observed at the collector here.

Ai = Ic/Ib since Ic>>Ib the current gain is high.

Similarly Av = Vc/Vb, Av=Ic.Rc/IbRb. Since Ic>>Ib and Rc>>Re,Av is also
high.

With high current gain and voltage gain the power gain is also high. Due
to this the CEconfiguration is most preferred.

MODEL GRAPH:

Input characteristics:

TABULATION FOR INPUT CHARACTERISTICS: V
CE =

S
NO
V
BE (V)
I
B (uA)
V
BE (V)
I
B (uA)

PROCEDURE:

Input Characteristics:
Find the value of I
B
with respect to the change in V
BE
at
constant value of V
CE
.
Repeat the same procedure for another V
CE
.
Plot the graph from the observed values.

Output Characteristics:
Find the value of I
C
CE
at
constant value of I
B
.
Repeat the same procedure for another I
B
.

MODEL GRAPH:

Output characteristics:

TABULATION FOR OUTPUT CHARACTERISTICS:
S
NO
I
B (uA) =
I
B (uA) =

V
CE(V)
I
C (mA)
V
CE(V)
I
C (mA)

RESULT:

Thus the characteristics curve of a Bipolar Junction Transistor in
Common Emitter configuration is plotted.

EX: NO: 07 CHARACTERISTICS OF CB CONFIGURATION

CIRCUIT DIAGRAM:

MODEL GRAPH:
Input characteristics: Output characteristics:

AIM:

To plot the characteristics curve of a Bipolar Junction Transistor in
Common Base configuration.

APPARATUS REQUIRED:

1 Bipolar Junction Transistor BC107 1
2 Resistor 1K 2
5 Dual Regulated Power
Supply
(0-30)V 1
6 Bread Board - 1

THEORY:
The transistor being three terminal devices makes it applicable as an
amplifier by making one of the terminal common to both the input and output.
Depending on which terminal is made common the transistor is classified into
three configurations Common Base, Common Collector, Common Emitter.

Common Base configuration: The input is given to the emitter and output is
observed at the collector here.

A
i
= I
c
/I
e

TABULATION FOR INPUT CHARACTERISTICS:
S
NO
V
CB =
V
CB =

V
EB (V)
I
(uA)
V
EB (V)
I
E (uA)

TABULATION FOR OUTPUT CHARACTERISTICS:
S
NO
I
B (uA) =
I
B (uA) =

V
CE(V)
I
C (mA)
V
CE(V)
I
C (mA)

PROCEDURE:

Input Characteristics:
Find the value of I
B
BE
at
constant value of V
CE
.
Repeat the same procedure for another V
CE
.

Output Characteristics:
Find the value of I
C
CE
at
constant value of I
B
.
Repeat the same procedure for another I
B
.

RESULT:

Thus the characteristics curve of a Bipolar Junction Transistor in
Common Emitter configuration is plotted.

EX: NO: 08 CHARACTERISTICS OF JFET
SYMBOL: PIN OUT:

CIRCUIT DIAGRAM:

AIM:

To plot the characteristics curve of a JFET( Junction Field Effect
Transistor).

APPARATUS REQUIRED:

1 Junction Field Effect Transistor BFW10 1
4 Dual Regulated Power Supply (0-30)V 1
5 Bread Board - 1

THEORY:

The junction gate field-effect transistor (JFET) is the simplest type of field
effect transistor. A piece of n-type semiconductor material (channel) is
sandwiched between two smaller pieces of p-type (gates). The ends of the
channel are designated as drain (D) and the source (S), and the two pieces of p-
type material are connected together and their terminal is named the gate (G).
When the gate is biased negative with respect to the source, the PN
junctions are reverse biased & depletion regions are formed. The channel is
more lightly doped than the p type gate, so the depletion regions penetrate
deeply in to the channel. The result is that the channel is narrowed, its
resistance is increased, & ID is reduced. When the negative bias voltage is
further increased, the depletion regions meet at the center & ID is cutoff
completely.

MODEL GRAPH:

Drain Characteristics: Transfer Characteristics:

TABULATION
DRAIN CHARACTERISTICS: TRANSFER CHARACTERISTICS:

PROCEDURE:

DRAIN CHARACTERISTICS:

Set the gate voltage V
GS
.
Vary V
DS
& note down the corresponding I
D
.
Plot the graph V
DS
Vs I
D
for constant V
GS
.

TRANSFER CHARACTERISTICS:

Set the drain voltage V
DS
.
Vary the gate voltage V
GS
& note down the corresponding I
D
.
Plot the graph V
GS
Vs I
D
for constant V
DS
.

RESULT:
Thus the drain and transfer characteristics of a JFET was obtained
successfully.

EX: NO: 09(a) CHARACTZERISTICS OF UJT


CIRCUIT DIAGRAM

EQUIVALENT CIRCUIT:

AIM:
To Study the characteristics of Unipolar Junction Transistor.

APPARATUS REQUIRED:

1 Transistor 2N2646 1
2 Resistor 1K 2
4 Volt meter (0-20)V 1
5 Bread Board - 1

THEORY:
UNIJUNCTION TRANSISTOR
This is a three terminals, single or uni junction semiconductor device.
The unijunction transistor (UJT) finds its main application in switching circuit,
where rapid discharge of the capacitor is desired.
UJT consists of an N type semiconductor bar, is lightly doped. Two
terminals base 1and base 2 are taken out from the upper and lower end of the
bar. A heavily doped P region is diffused into the n type bar, which results in
a PN junction. A terminal is taken out of this region and named as emitter.
The emitter is always forward biased with respect to base 1.When a voltage
Vbb is applied to the base terminals a drop appears across the internal
resistance as follows.Drop across the resistor between emitter & base 2 (R2) =
V2 + Vbb R2 / (R1 +R2).Similarly , the drop across resistor , R1 is V
1
= V
bb
R1 /
(R1+R2). The ratio of the internal resistors is defined as the Intrinsic stand off
ratio, h, so V1=hVbb. Due to the existing PN junction, a depletion potential
create and when a voltage is given to the device at the emitter terminal , the
device does not conduct still the emitter voltage, V
ee
exceeds the sum of the
depletion potential and the drop across R1, that is V
ee
>V
d
+ V
1.B
.

MODEL GRAPH:

TABULATION
S NO
V
BB1
V
BB2
= 2V
V
E
(V) I
E
(mA)

PROCEDURE:
Rig up the circuit as per the circuit diagram.
Set VBB = 10V.
Vary VEE and note down the readings of VEB1 & IE
Plot the graph: VEB1 vs IE for a constant VBB
Determine the intrinsic stand-off ratio.

RESULT:
Thus the Characteristics of UJT was plotted.
EX: NO: 09(b) CHARACTZERISTICS OF SCR


CIRCUIT DIAGRAM:

FORWARD CHARACTERISTICS:

AIM:
To Study the Operation and VI characteristics of Silicon Controlled
Rectifier

APPARATUS REQUIRED:

1 SCR TY604 1
2 Resistor 1K,6.8K 1,1
3 Ammeter
(0-200) mA
(0-500)uA
1
1
5 Bread Board - 1

THEORY:
The Silicon controlled Rectifier (SCR) is an unidirectional, Four
layer, PNPN device. The outer P and N layer are heavily doped. The outer P
layer is called Anode, the outer N layer is called cathode and the middle P layer
is called Gate. Under forward bias, Anode is +ve w.r.t Cathode. But the device
is not ON only under forward bias condition. To make it ON, current is passed
through the Gate terminal (IG). Hence the SCR is a current operating device.
When the Gate terminal is open, ie when IG =0, after a certain forward bias
voltage, the SCR turns ON. This voltage is called forward Break over Voltage
(VBO).When the Gate Cathode junction is forward biased, a current IG
flows.This current decreases the forward voltage, to make the SCR ON. Hence
the gate control is more convenient and useful method to turn ON the SCR
.Once if the device is ON, the Gate loses its control over it. To turn OFF the
device, the Anode to Cathode voltage (VAK) is reduced to 0. In the forward
characteristics of SCR, the region between 0 and VBO is the forward Blocking
region of SCR . Under this region, the SCR is under forward blocking state.
When the VBO is reduced, the voltage drop across SCR is reduced and the
current increases rapidly. Under this condition, SCR is in ON state or
conduction state.

REVERSE CHARACTERISTICS:

MODEL GRAPH:

PROCEDURE:
Connections are made as per the circuit diagram.
With a little gate current, increase the voltage across the
Anode and Cathode(VAK).
Note the corresponding meter readings.
After reaching the VBO, the SCR goes to ON state. Note the
respective voltage and currents.
Then increase the VAK and note the corresponding IA.
The graph for forward characteristics is drawn, taking VAK in X-
axis and IA in Y-axis.

TABULATION: I
G
= mA
FORWARD
VOLTAGE (V
f
)
FORWARD
CURRENT (I
f
)
REVERSE
VOLTAGE (V
r
)
REVERSE
CURRENT (I
r
)

RESULT:
Thus the Operation of SCR was studied and the characteristics of SCR was
plotted.

EX: NO: 10(a) CHARACTERISTICS OF DIAC
CIRCUIT DIAGRAM:

FORWARD CHARACTERISTICS:

REVERSE CHARACTERISTICS:

AIM:
To plot the VI characteristics of DIAC.

APPARATUS REQUIRED:

1 DIAC - 1
2 Resistor 1K 1,1
5 Bread Board - 1

THEORY:
A diac is a two terminal bidirectional semiconductor device which
can be switched from OFF state to ON state for either polarity of applied
voltage. When a positive or negative voltage is applied across the terminals,
onlya small amount of leakage current flow through it. As the applied voltage
isincreased, the leakage current will continue to flow until the voltage reaches
the break over voltage VBO. At this point avalanche breakdown occurs and the
device exhibits negative resistance, ie, current through the device increases
with the decreasing values of applied voltage.

MODEL GRAPH:

TABULATION:
VOLTAGE (V) CURRENT (mA) VOLTAGE (V) CURRENT (mA)

PROCEDURE:

FORWARD BIAS:
Vary the power supply in regular step and note down the
voltage and current of DIAC.
Plot the graph between V and I.
REVERSE BIAS:
Vary the power supply in regular step and note down the
voltage and current of DIAC.
Plot the graph between V and I.

RESULT:
Thus the VI characteristics of DIAC was plotted.
EX: NO: 12(a) RESONANCE IN RLC (SERIES) CIRCUIT

AIM:
To obtain the resonance frequency response of the given RLC series
electrical circuit.

APPARATUS REQUIRED:

1 Function generator (0-3)MHz 1
2 Resistor 1K 1
3 DIB - 1
5 Bread Board - 1
6 Capacitor 1uF 1

THEORY:
The resonance of a series RLC circuit occurs when the inductive
and capacitive reactances are equal in magnitude but cancel each other
because they are 180 degrees apart in phase. The sharp minimum in
impedance which occurs is useful in tuning applications. The sharpness of the
minimum depends on the value of R and is characterized by the "Q" of the
circuit.

PROCEDURE:
Vary the frequency of the function generator.
Measure the corresponding values of the voltage across R1 for
series RLC circuit.
Repeat the same values for different values of frequency
Note the frequency response from the table.

RESULT:
Thus the frequency response of the series RLC circuit is obtained.

EX: NO: 12(b) RESONANCE IN RLC (PARALLEL) CIRCUIT

CIRCUIT DIAGRAM:

MODEL GRAPH:

AIM:
To obtain the resonance frequency response of the given RLC series
electrical circuit.

APPARATUS REQUIRED:

1 Function generator (0-3)MHz 1
2 Resistor 1K 1
3 DIB - 1
5 Bread Board - 1
6 Capacitor 1uF 1

THEORY:
One of the ways to define resonance for a parallel RLC circuit is
the frequency at which the impedance is maximum. The general case is rather
complex, but the special case where the resistances of the inductor and
capacitor are negligible can be handled readily by using the concept of
admittance.

FORMULA:
Series resonance frequency, f
0
=

Parallel resonance frequency ,f
o
=

L=50mH; C=1uF

Therefore f
o
=711.8 KHz

PROCEDURE:
Vary the frequency of the function generator.
Measure the corresponding values of the voltage across R1 for
parallel RLC circuit.
Repeat the same values for different values of frequency
Note the frequency response from the table.

RESULT:
Thus the frequency response of the parallel RLC circuit is obtained.

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