SET - 1

Code No: 3220504

II B. Tech II Semester Regular Examinations April/May 2009

COMPUTER ORGANIZATION
(Common to C.S.E, I.T, E.C.C, I.C.E )
Time: 3 Hours Max. Marks: 80

Answer any FIVE questions.

All questions carry equal marks
******

1. a) Name four main components of a computer and give their functions.

b) What is the difference between binary, BCD and Gray code.
c) Show that the exclusive-OR function X=A⊕B⊕C is an even function
2. a) Draw the circuit diagram of a bus system for four registers by using
Tri-state buffers.
b) Describe the addressing mode that do not need address field at all and addressing
mode s that uses content of PC for calculating effective address.
3. a) Define the following
i) Micro operation ii) Micro instruction iii) Macro program
iv) Macro code
b) Give the circuit diagram for a micro program sequence for a control
memory
4. a) Derive an algorithm in flowchart form for fixed point binary division.
b) Give the flowchart for decimal multiplication.
5. a) Give the relative merits and demerits of three different mapping Processes for
cache organization.
b) Name some specific features of memory design that lead to superior
Performance.
c) Describe LRU algorithm for page replacement.
6. a) What is the purpose of an interface between the processor bus and peripheral
devices and what are the major differences between CPU and I/O characteristics that
are to be taken care of by the interface.
b) Describe asynchronous data transfer using handshaking.
c) Give the features of RS-232.
 SET - 1
Code No: 3220504

7. a) Describe a 4- segment pipeline for floating point addition and subtraction of two
binary numbers.
b) Describe Flynn’s classification of computer system.
c) Differentiate between arithmetic pipeline and instruction pipeline.
d) Name some pipeline conflicts. (6+4+3+3)
8. Write short notes on any two of the following.
a) Inter process arbitration b) Instruction pipeline c) ROMs.
 SET - 2
Code No: 3220504

II B. Tech II Semester Regular Examinations April/May 2009

COMPUTER ORGANIZATION
(Common to C.S.E, I.T, E.C.C, I.C.E)
Time: 3 Hours Max. Marks: 80

Answer any FIVE questions.

All questions carry equal marks
******

1. a) How many different patterns could be stored in a 8-bit register? What is the largest
value that could be stored?
b) Describe an error detection circuit for transmission of a 3-bit message using odd
parity bit.
2. a) Give the circuit diagram of a 4-bit binary adder-subtractor.
b) Give the characteristics of RISC.
3. a) Explain the difference between hardwired control and micro
programmed control.
b) What is the address sequencing capabilities required in a control memory?
c) Give the block diagram of a control memory and associated hardware needed for
selecting the next microinstruction address. (4+4+8)
4. a) With the help of a block diagram, explain how single digit decimal
numbers are added.
b) Multiply the following two numbers using Booth algorithm. (-7)x(3) Show the step
by step multiplication process.
5. a) Explain direct mapping scheme for transformation of data from main memory to
cache memory.
b) How to access data on a disk memory?
c) Describe different Read Only Memories and differentiate among them.
6. a) What are the three modes of data transfer to and from I/O devices?
What are the merits and demerits?
b) Describe PCI bus structure.
 SET - 2
Code No: 3220504

7. a) Draw space-time diagram for a 4-segment pipeline showing the time it takes to
process tasks.
b) A non pipeline system takes 50ns to process a task. The same task can be
processed in a 6-segmented pipeline with clock cycle of 10ns. Determine the speed up
ratio of the pipeline for 100 tasks. What is the maximum speed up that can be
achieved?
8. Write short notes on any two of the following.
a) Cache coherence b) Arithmetic pipeline c) DMA
 SET - 3
Code No: 3220504

II B. Tech II Semester Regular Examinations April/May 2009

COMPUTER ORGANIZATION
(Common to C.S.E, I.T, E.C.C, I.C.E)
Time: 3 Hours Max. Marks: 80

Answer any FIVE questions.

All questions carry equal marks
******

1. a) What is a stored program computer?

b) Describe a single bus structure with a suitable diagram.
c) How many different patterns could be stored in a 8-bit register? What is the largest
value that could be stored as a two’s complement signed integer in such a register?
What is the smallest value? How about the largest and smallest values that could be
stored as unsigned integers?
2. a) Draw the circuit diagram of a bus system for four registers using
multiplexers.
b) With the help of a truth table, design a full adder circuit using a suitable diagram.
3. a) Explain how the mapping from instruction code to a micro-
instruction address can be done.
b) Give the general configuration of a macro programmed control unit and explain it.
4. a) Give the Booth’s algorithm for multiplication of signed 2’s
complement numbers.
b) With the help of a block diagram, explain the working of a BCD adder.
5. a) What is the difference between static and dynamic memory calls? Which of these
calls can be non destructively read out? Which technology has higher density? Which
of these is faster?
b) What is refreshing? Which type of memory needs refreshing? How is
refreshing done?
c) Differentiate between synchronous and asynchronous DRAMs. (6+6+4)
6. a) Differentiate between isolated and memory mapped I/O.
b) Describe asynchronous serial transfer between two units.
c) Describe the daisy chaining priority arrangement.
 SET - 3
Code No: 3220504

7. a) Give the general structure of a four segment pipeline and explain its
operation. What is the speed up of this pipeline?
b) What are the different ways of handling branch instructions? Explain.
8. Write short notes on any two of the following.
a) Inter process communication in multiprocessors
b) Interrupt driven data transfer c) Addressing modes
 SET - 4
Code No: 3220504

II B. Tech II Semester Regular Examinations April/May 2009

COMPUTER ORGANIZATION
(Common to C.S.E, I.T, E.C.C, I.C.E)
Time: 3 Hours Max. Marks: 80

Answer any FIVE questions.

All questions carry equal marks
******

1. a) Describe the functional units and components that are used for
understanding of computer organization.
b) Describe the 2’s complement subtraction and explain detection of overflow
condition.
2. a) Describe the logic circuit, with suitable diagram that generates the four basic logic
micro operations: AND, OR, XOR and Complement.
b) Name at least 4 memory instructions and give the micro operations
needed to execute each of these instructions. (8+8)
3. a) Give the relative merits and demerits of micro programmed control
over hardwired control.
b) Give the 10- bit micro instruction format for control memory.
c) Differentiate between dynamic micro programming and static micro
program. Give their relative advantages and disadvantages. (5+5+6)
4. a) Show that there can no mantissa overflow after multiplication operation.
b) Prove that the multiplication of two n digit numbers gives a product no more than
2n digits in length.
c) What are the steps involved in addition / subtraction of two floating-point
numbers? Explain the operation through a flow chart.
5. a) What is memory interleaving? Describe two different memory
interleaving schemes?
b) Describe the memory mapping from virtual address to physical address in a
virtual memory organization.
c) Describe set associative mapping technique of cache memory
organization.
 SET - 4
Code No: 3220504

6. a) Describe asynchronous data transfer using strobe control.

b) Describe DMA transfer scheme.
7. a) What are the advantages of pipelines? Name three major differences that cause
instruction pipeline to deviate from its normal operation. Determine the number of
clock cycles that it takes to process 200 tasks in a six segment pipeline
b) What are the applications of vector processing?
8. Write short notes on any two of the following
a) Shared memory multiprocessors b) RAMs c) Booth algorithm