Proceedings of 2014 RAECS UIET Panjab University Chandigarh, 06 - 08 March, 2014

978-1-4799-2291-8/14/$31.00 2014 IEEE

A Nine-Level Inverter For Open-end Induction Motor
Sanjiv Kumar and Pramod Agarwal
Department of Electrical Engineering
Indian Institute of Technology Roorkee
Roorkee Uttarakhand, India
sanjiv.iitr@gmail.com

AbstractA novel nine-level inverter topology is presented
for an open-end winding induction motor drive. The presented
topology has the highest number of levels for a given number of
dc sources and power electronics switches. The conventional
configurations for multi-level inverter are neutral point clamp
(NPC), flying capacitor (FC) and series/cascade H-bridge. The
proposed topology does not require any clamping diodes as they
are needed in NPC. Apart from this there is no requirement of
capacitor bank as compare to flying capacitor schemes where for
nine-level inverter, twenty eight capacitor banks per phase are
required. The proposed inverter scheme requires only four DC
sources whereas series/cascade H-bridge nine-level inverter
requires at least six DC sources. Extensive simulation study of the
presented topology is done for the complete modulation range.
KeywordsOpen-end winding induction motor; Multilevel
Inverters; Induction motor drive.
I. INTRODUCTION
Multilevel inverters becomes the best choice for medium
and high voltage induction motor (IM) drive because of their
inherent total harmonic distortion (THD) reducing quality and
less switching loss apart from this they use switching devices
of low-voltage ratings [1,2]. The well established topology for
multilevel inverters are neutral point clamped [3], flying
capacitor [4] and cascaded H-bridge inverter topology [5].
Theoretically any number of voltage level can be achieved by
these configuration but practically as the number of level
increases system becomes complex and less reliable due to use
of large number of switches. Hence efficiency, reliability and
reduce circuit complexity are the prime challenges for
researchers in the field of multilevel inverters. H. Stemmler and
P. Guggenbach proposed a new concept of open-end stator
winding induction motor fed by two level inverter from both
ends in 1993 [6]. In this scheme, both ends of the phase
winding of induction motor are accessible and they are fed by
two-level inverter to get multilevel voltage waveform across
the phase winding. Three level voltage wave generation by
using two-level inverter with open-end stator winding
induction motor is presented in [7,8]. A five-level inverter
topology by using two three-level inverters, with symmetric
DC link is presented in [9]. These three-level inverters use two,
two-level inverters connected in cascade, to generate
three-level waveforms. A five-level inverter is proposed in
[10,11] by using one, three-level inverter and one, two-level
inverter with asymmetric DC link. A seven-level inverter is
presented in [12] which uses two, two-level inverters and six
capacitor fed H-bridges. A hybrid nine-level inverter is
presented in [13] which uses two, two-level inverters and six
capacitors fed H-bridges. Two separate DC sources of same
magnitude V
DC
/2 are used to power the two-level inverters. It is
well known established fact that as the number of level
increases THD reduces but it makes system costly, bulky,
complex and less reliable because higher number of level
require large number of power electronics component.
In this paper a novel nine-level inverter scheme is presented
which does not use any clamping diode or capacitor bank. The
suggested topology can produce a pulse width modulation
(PWM) waveform starting from two-level to go up to
nine-level including even numbers of level, for open-end
winding induction motor. In the presented scheme both end of
the open-end winding induction motor is fed by three-level
inverters. The three-level topology used is realised by
cascading two, two-level conventional inverters. Each three
level inverter uses two DC sources of same values, hence total
four DC sources are used. The level shifted multi-carrier
sinusoidal pulse width modulation (SPWM) scheme is used for
generation of switching pattern for the inverters. At each level,
a fixed DC voltage is added to the reference voltage wave just
to reduce the inverters switching losses at lower speed range.
The main advantage of this type of control strategy is that, at
lower speed ranges out of two, two-level inverter switching
accrue only in one inverter while other is fixed at one level
hence switching losses are just reduced to half and efficiency
of overall system gets improved. The proposed nine-level drive
system does not suffer from zero sequence currents because
both side inverters are fed by isolated DC supply. The
proposed scheme is simulated in MATLAB and simulation
results are presented.
II. PROPOSED NINE-LEVEL INVERTER SCHEME
A. Power Circuit
Fig.1 shows the power circuit of the proposed nine-level
inverter system along with open-end stator winding induction
motor. Each end of the open-end stator winding is fed by a
three-level inverter, which is basically cascade connection of
two, two-level inverters. One end of the open-end winding
(A
2
,B
2
,C
2
) is connected with three-level inverter-A and other
end (A
4
,B
4
,C
4
) with another three-level inverter-B. Inverter-A
is having two two-level inverters, inverter-1 and inverter-2 with
DC link voltage of (3/8)V
DC
each, where V
DC
is the equivalent
DC-link voltage required to operate conventional two-level
inverter fed induction motor drive. Inverter-B is also having
two two-level inverters, inverter-3 and inverter-4 but with three
times reduced, DC link voltage of (1/8)V
DC
as compare to
inverter-A. All two-level inverters are fed by separate DC

Fig. 1 Power Circuit of Proposed nine-level inverter scheme

supply generated by three phase AC-DC rectifiers, REC.1-4 as
shown in Fig.1. Any pole voltage V
A2O
, V
B2O
or V
C2O
of three-
level inverter-A, can have any of three levels 0, (3/8)V
DC
and
(6/8)V
DC
independently. Similarly inverter-B pole voltages
with respect to its own reference point O are V
A4O
, V
B4O
and
V
C4O
can also have any of three levels 0, (1/8)V
DC
and
(2/8)V
DC
independently. The combine effect of both three-level
inverters will be the generation of nine different levels in the
phase winding of induction motor. These levels are -(2/8)V
DC
,
-(1/8)V
DC
, 0, (1/8)V
DC
, (2/8)V
DC
, (3/8)V
DC
, (4/8)V
DC
, (5/8)V
DC
and (6/8)V
DC
.
B. Generation of different phase voltages
In the proposed topology the pole voltage of either phase A,
B or C of three-level inverter-A, for example phase A pole
voltage V
A2O
(Fig. 1) will have voltage level of (6/8)V
DC
if the
switch S
21
and S
11
are made turn 'ON' (Fig.1).
Similarly the pole voltage of either phase A, B or C of
three-level inverter-A, for example phase A pole voltage V
A2O

(Fig. 1) will have voltage level of (3/8)V
DC
if the switch S
21
and
S
14
are made turn 'ON' (Fig.1).
For getting pole voltage V
A2O
at zero level, switch S
24
has to
be made turn 'ON'. Any pole of three-level inverter-A can have
these three levels by proper selection of switch of two-level
inverter 1 and 2, which are made to be turn 'ON'.
Similarly the pole voltage of either phase A, B or C of
three-level inverter-B, for example phase A pole voltage V
A4O

(Fig. 1) will have voltage level of (2/8)V
DC
if the switch S
41
and
S
31
are made turn 'ON' (Fig.1).
Similarly the pole voltage of either phase A, B or C of
three-level inverter-B, for example phase A pole voltage V
A4O

(Fig. 1) will have voltage level of (1/8)V
DC
if the switch S
41
and
S
34
are made turn 'ON' (Fig.1).
For getting pole voltage V
A4O
at zero level, switch S
44
has to
be made turn 'ON'. Any pole of three-level inverter-B can have
these three levels by proper selection of switch of two-level
inverter 3 and 4, which are made to be turn 'ON'.
Thus, it is evident that, each of the three phases of the open-
end winding induction motor can attain nine distinct voltage
levels as shown in Table I.
From Table-I it is clear that the voltage level of -(2/8)V
DC

and -(1/8)V
DC
(Level 1 & 2) can be generated when inverter-A
is clamped at 'zero' voltage level and inverter-B is switched
TABLE I. NINE-LEVELS REALISED IN PHASE- A FOR COMBINATIONS OF
POLE VOLTAGES OF INVERTER-A AND INVERTER-B
Level
Pole Voltage
of Three-
Level
Inverter-A
(VA2O)
Pole Voltage
of Three-
Level
Inverter-B
(VA4O)
Motor Phase-
A Voltage
(VA2A4= VA2O -
VA4O)
L1 0 (2/8)VDC -(2/8)VDC
L2 0 (1/8)VDC -(1/8)VDC
L3 0 0 0
L4 (3/8)VDC (2/8)VDC (1/8)VDC
L5 (3/8)VDC (1/8)VDC (2/8)VDC
L6 (3/8)VDC 0 (3/8)VDC
L7 (6/8)VDC (2/8)VDC (4/8)VDC
L8 (6/8)VDC (1/8)VDC (5/8)VDC
L9 (6/8)VDC 0 (6/8)VDC

is switched between (2/8)V
DC
and (1/8)V
DC
. Hence at the lower
speed range switching losses occur only in inverter-B.
Switching states of related switches of all the four two-level
inverters to realize different levels across the winding of phase-
A of open-end induction motor are shown in Table II.
Both the switches of same leg of any two-level inverter
operate in complimentary fashion. Switches S
24
, S
26
and S
22
have to be rated for (6/8)V
DC
as they have to block (6/8)V
DC

when the top switches of Inverter-1, will ON. Similarly
switches S
44
, S
46
and S
42
have to be rated for (2/8)V
DC
as they
have to block (2/8)V
DC
when the top switches of Inverter-3,
will ON.
III. VOLTAGE SPACE VECTORS OF PRESENTED TOPOLOGY
If we consider that the points O and O are connected then,
the three phase voltages V
A2A4
, V
B2B4
and V
C2C4
of open-end
winding induction motor are given by
A4O' A2O A2A4
V V V = (1)
B4O' B2O B2B4
V V V = (2)
C4O' C2O C2C4
V V V = (3)
TABLE II. SWITCHING STATES OF RELATED SWITCHES OF ALL THE FOUR INVERTERS TO REALISE NINE LEVELS IN PHASE-A
Level
Motor Phase-A
Voltage VA2A4
Switch (State)
Inverter-1
Switch (State)
Inverter-2
Switch (State)
Inverter-3
Switch (State)
Inverter-4
L1 -(2/8)VDC S14 (ON) S24 (ON) S31 (ON) S41 (ON)
L2 -(1/8)VDC S14 (ON) S24 (ON) S34 (ON) S41 (ON)
L3 0 S14 (ON) S24 (ON) S34 (ON) S44 (ON)
L4 (1/8)VDC S14 (ON) S21 (ON) S31 (ON) S41 (ON)
L5 (2/8)VDC S14 (ON) S21 (ON) S34 (ON) S41 (ON)
L6 (3/8)VDC S14 (ON) S21 (ON) S34 (ON) S44 (ON)
L7 (4/8)VDC S11 (ON) S21 (ON) S31 (ON) S41 (ON)
L8 (5/8)VDC S11 (ON) S21 (ON) S34 (ON) S41 (ON)
L9 (6/8)VDC S11 (ON) S21 (ON) S34 (ON) S44 (ON)

The net effect of these 3-phase voltages on 120 apart
motor phase winding, at any instant could be given by Vs as
/3) j(4
C2C4
/3) j(2
B2B4 A2A4 s
.e V .e V V V

+ + = (4)
Now putting the value of phase voltages from (1) to (3) in (4)
gives
) 3 /
e
j(2
B4O' B2O A4O' A2O
s
). V (V ) V (V V + =
) 3 / 4 ( j
' O 4 C O 2 C e ). V V (

+ (5)
The space vector V
s
can also be written in terms of two 90
degree apart - component where -axis is align with the axis
of phase-A as shown in (Fig. 2). V
s
will be given by
) s( ) s( s
jV V V

+ = (6)
Where V
s()
is the summation of all components of V
A2A4
,
V
B2B4
and V
C2C4
in the direction of -axis and V
s()
is the
addition of all the components of V
B2B4
and V
C2C4
along the
-axis.

s() A2A4 B2B4() C2C4()
V V +V +V = (7)
s( ) B2B4( ) C2C4( )
V V +V

= (8)
S
A2A4
()
s
B2B4
()
C2C4
1 1
V
1 - -
V
2 2
= V
V
3 3
V 0 -
2 2













(9)

Now after putting the value of phase voltage from (1) to (3) in
(9), We get
1 1
1
2 2
3 3
0
2 2
A2O A4O'
()
s
B2O B4O'
()
s
C2O C4O'
V V
V
V V
V
V V

(10)
Any phase of the three-level inverters-A and B, can take
three levels of pole voltages independently as per the
switching state of four, two-level inverters. Switching states
for phase-A according to level of operation are shown in
Table-II, for other phase similar logic can be developed. Once
the phase voltages are known V
s
can be easily calculated from
(6) and (10). Different combinations of two, three-level
inverters pole voltages will generate voltage space vectors as
shown in Fig.3. Each three-level inverter can generate 64
switching state as they are having two, two-level inverter in
cascade combination and each two-level inverter can generate
8 switching hence total of 64 different combination of space
phasors. Together these two three-level inverter-A & B, will
generate total of 4096 i.e. (64x64) space phasors distributed
over 217 locations as shown in Fig. 3. In above discussion we
assume that the points O and O are connected but in actual
they are not connected, hence there will be voltage difference
between these two points, this voltage is known as common-
mode voltage. The effect of this voltage is only generation of
multiplicity of space vectors in different locations, and the
system with unconnected points O and O will generates the
same voltage space vectors as generated by Vs [9].
IV. MODULATION SCHEME FOR PROPOSED INVERTER
The control strategy used for generation of switching pulses
for devices is an extension of multilevel-carrier-based PWM
scheme described in[9], but for easy reference it is presented
here in brief. The level shifted triangular carrier pulse width
modulation scheme required N-1, level shifted triangular
carrier for N-level inverter. All carrier wave have same peak-
to-peak amplitude V
c
and the frequency f
c
[14]. If V
*
m
is the
maximum amplitude of the reference wave and f
m
*
is the
frequency of the reference wave then the amplitude modulation
index with respect to the total amplitude of carrier wave which
is V
c
(N-1), is given by m
a
as
1) (N V
V
m
c
*
m
a

=
2
(11)
The other parameter of level-shifted carrier based sinusoidal
pulse width modulation is the ratio m
f
= f
c
/f
m
*
which should be
kept high to keep the harmonics to the higher end. For the
nine-level inverter, eight level shifted triangular carrier waves
C
1
-C
8
are used which divide the entire range of operation in to


Fig. 2 Generation of space-vector Vs from phase voltages

nine regions R
1
-R
9
. Region below the C
1
is called R
1
, region
above C
1
and below C
2
is R
2
similarly region above C
2
and
below C
3
is called R
3
, in same way R
4
is the region between C
3

and C
4
, R
5
is the region between C
4
and C
5
, R
6
is the region
between C
5
and C
6
, R
7
is the region between C
6
and C
7
, R
8
is
the region between C
7
and C
8
and finally R
9
is the region above
C
8
. Depending upon the position of reference wave in the
regions switching signals are generated so that required
voltage level is applied across the phase winding. Table III
shows the value of applied voltage across the phase winding
depending upon the region selected.
Three 120 phase shifted sinusoidal waves are used as
reference signal for three phases. To achieve the higher
modulation index, 20% of the third harmonic component is
injected in all the three reference signals. For determining the
region of operation (R
1
-R
9
) all the three reference signals are
compared continuously with the level shifted triangular carrier
(C
1
-C
8
). Once the region is known the corresponding switches
of all the four, two-level inverters to applied the required
voltage level across the phase winding are made turn ON as
per Table II. For lower modulation range the proposed inverter
operates as two-level inverter as the modulation index
increases the operation is shifted from two-level to higher-
level. It can go up to nine-level operation including even
number of levels. When the magnitude V
*
m
of reference wave
is less than V
c
/2 the reference wave is placed at the middle of
the first triangular carrier C
1
(Fig. 4a). The reference wave
exists either in R
1
or R
2
and it will result two-level operation,
these are the first two levels L
1
(-2V
DC
/8) and L
2
(-V
DC
/8). When
the modulation index increases such that V
c
/2 < V
*
m
< V
c
, a DC

Fig. 3 Locations of space-phasors for nine-level inverter

voltage of magnitude V
c
/2 is added to the reference wave so
that its comes to the centre of two triangular carriers C
1
and
C
2
and operation will shifted from two-level to three-level
operation (Fig. 4b). In the same way as inverter operation
shifted to four-level, five-level and so on up to nine-level (Fig.
4c - Fig. 4h) a DC voltage of magnitude V
c
/2 is added to
reference wave in each step. Reference wave for maximum
value of modulation index during nine-level operation is shown
in Fig. 4i. One important point must be noted that to operate
drive in constant flux mode, frequency of reference wave has
to be changed as the level of operation changes to keep V/f
constant.
The equations of the three reference waves for phase -A, B
and C are given by (12) ,(13) and (14) respectively, where
value of 'n' changes from 1 to 8 for two-level to nine-level
operation.
0.2 3
2
* * * * c
a m
V
V =V sin w t+ sin w t+n (12)

2
0.2 3
3 2
* * * * c
b m
V
V =V sin (w t- )+ sin w t+n (13)

4
0.2 3
3 2
* * * * c
c m
V
V =V sin (w t- )+ sin w t+n (14)
In this scheme the switching losses are less as compare to
conventional SPWM scheme because in lower speed range
switching accrue only in Inverter-4 (two-level mode), in next
speed range only in Inverter-3 and Inverter-4 (three-level
mode), and in the middle speed ranges it accrues in Inverter-2,
Inverter-3 and Inverter-4, only in high speed range switching
losses accrue in all the four inverters.

TABLE III. APPLIED PHASE VOLTAGE IN DIFFERENT OPERATING REGION R1-R9
Region R1 R2 R3 R4 R5 R6 R7 R8 R9
Applied
Phase
Voltage
-(2/8)VDC -(1/8)VDC 0 (1/8)VDC (2/8)VDC (3/8)VDC (4/8)VDC (5/8)VDC (6/8)VDC

Fig. 4 (a) Triangular carrier and three reference waves during two-level operation, (b) Triangular carrier and three reference waves during three-level operation
(c) Triangular carrier and three reference waves during four-level operation, (d) Triangular carrier and three reference waves during five-level operation
(e) Triangular carrier and three reference waves during six-level operation, (f) Triangular carrier and three reference waves during seven-level operation
(g) Triangular carrier and three reference waves during eight-level operation, (h) Triangular carrier and three reference waves during nine-level operation
(i) Triangular carrier and three reference for maximum value of modulation index
V. SIMULATION RESULTS
To investigate the performance of proposed nine-level
inverter feeding an open-end winding induction motor in open-
loop constant V/f mode, simulation is done in MATLAB
environment. Sinusoidal pulse width modulation scheme as
discussed in previous section is simulated for generation of
switching signals. Inverter-1, Inverter-2, Inverter-3 and
Inverter-4 are having DC-bus voltages of (3/8) V
DC
, (3/8) V
DC
,
(1/8)V
DC
and (1/8)V
DC
respectively. It may be noted that V
DC
is
the equivalent DC-bus voltage required with conventional
two-level inverter.
Amplitude and frequency (V
*
m
& f
m
*
) of reference wave are
decided by desired speed keeping V/f constant. Once the
amplitude and frequency are known reference wave for all the
three phases are generated from (12), (13) and (14). To find the
level in which the instantaneous value of the reference wave
exists all the three reference waves are continuously compared
with the eight level shifted triangular carrier (C
1
-C
8
)

and
control signals for all the four, two-level inverters are
generated.
In simulation DC link voltage is taken as 600 volt. Inverter
is operated for complete modulation range and corresponding
waveforms are shown in Fig.5 for motor phase-A voltage
V
A2A4
. For lower modulation index which correspond to lower
speed range, inverter operates in two-level mode (Fig.5a). In
this case three-level Inverter-B is switched between (2/8)V
DC
and

(1/8)V
DC
whereas Inverter-A is clamped at zero. In the next
speed range inverter operates in three-level mode (Fig. 5b) in
this case Inverter-B takes all the three level (2/8)V
DC,
(1/8)V
DC
and zero,

whereas Inverter-A is still clamped at zero voltage.
For four-level to six-level operation which are consider as
levels for medium speed range, Inverter-A is clamped at
(3/8)V
DC
and Inverter-B takes all the three level (2/8)V
DC
,



(1/8)V
DC
and zero, the corresponding waveforms of motor
phase-A voltage V
A2A4
are shown in Fig.5c to Fig.5e
respectively. The next speed range which is consider as higher
speed range, Inverter-A is clamped at (6/8)V
DC
and Inverter-B
takes all the three level (2/8)V
DC ,
(1/8)V
DC
and zero. In this
speed range Phase-A voltage V
A2A4
for seven-level , eight-level
and nine-level operation are shown in Fig.5f, Fig.5g and Fig.5h
respectively. Fig.5i shows the normalized harmonic spectrum
of phase-A voltage V
A2A4
at modulation index of 0.99 pertaining
to nine-level operation . It can be observed from Fig.5 as the
inverter operation is shifted from two-level to nine-level the
motor phase voltage waveform approaches to sinusoidal and
harmonic spectrum is improved.
VI. CONCLUSION
In this paper, a new topology of nine-level inverter for an
open-end IM drive is proposed. Two cascade three-level
inverter feeding power to each end of the open-end induction
motor (IM) generating voltage-space phasors equivalent to
nine-level inverter. In proposed structure no requirement of
forty two clamping diodes which are required in nine-level
NPC inverter. Moreover it does not require any capacitor bank
as required in flying capacitor multi-level inverter schemes. As
compared with the series connected H-bridge topology which
needs at least six DC supplies, the proposed nine-level inverter
scheme requires only four DC supplies. Another interesting
feature of the proposed nine-level is its inherent quality of
improving overall efficiency of drive because less switching
accrue in that inverter which is having higher DC-link voltage,
as compare to the switching of inverter of less DC-link voltage.
Total harmonic distortion (THD) is improved as the inverter
operation is shifted towards nine-level operation because the
phase voltage waveform become more and more sinusoidal.



Fig. 5 (a) Motor phase voltage VA2A4 when inverter operated in two-level mode, (b) Motor phase voltage VA2A4 when inverter operated in three-level mode
(c) Motor phase voltage VA2A4 when inverter operated in four-level mode, (d) Motor phase voltage VA2A4 when inverter operated in five-level mode
(e) Motor phase voltage VA2A4 when inverter operated in six-level mode, (f) Motor phase voltage VA2A4 when invert0er operated in seven-level mode
(g) Motor phase voltage VA2A4 when inverter operated in eight-level mode, (h) Motor phase voltage VA2A4 when inverter operated in nine-level mode
(i) Normalized harmonic spectrum of phase-A voltage VA2A4 for nine-level operation

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