lElCE TRANS. ELECTRON., VOL.E91-C, NO.

5 MAY 2008
806

I LETTER

A 90 dB 1.32 mW 1.2 V 0.13 mm2 Two-Stage Variable Gain

Amplifier in 0.18 pm CMOS
Quoc-Hoang DUONGta), Jeong-Seon LEEt, Sang-Hyun MINtt, Joong-Jin KIMtt, Nonmembers,
and Sang-Gug LEEt, Member

SUMMARY An all CMOS variable gain amplifier (VGA) which fea-
tures wide dB-linear gain range per stage (45 dB), low power consumption
(1.32 mW), small chip size (0.13 mm2), and low supply voltage (1.2 V) is
described. The dB-linear range is extended by reducing the supply voltage
of the conventional V-to-I converter. The two-stage VGA implemented in
0.18 J1m CMOS offers 90 dB of gain variation, 3 dB bandwidth of greater
than 21 MHz, and maximin input IP3 and PI dB, respectively, of -5/-42
and -12/-50dBm.
key words: variable gain amplifier (VGA), automatic gain control (AGC),
amplifier, analog circuit, transceiver
1. Introduction
Variable gain amplifiers (VGA) are important blocks to
accommodate the large dynamic range of signals [I], [2].
VGAs require dB-linear gain variation which can be satis-
fied with components of the exponential 1- V characteristic.
Due to the square-law 1- V characteristic, CMOS transistors
cannot directly be applied for the dB-linear VGAs. Instead,
dB-linear performance is achieved by adopting the circuits
that approximate the exponential equations [I], [2]. In this
work, the conventional VGA cell based on the well-known
pseudo-exponential equation
y=!(x)=(I+x) (I)
(I - x)
is adopted as the basis for the proposed VGA design [2].
The conventional VGA that adopts (I) offers 15 dB of gain
variation with linearity error of less than ±0.5 dB [2]. Un-
fortunately, there are many applications that require a wide
dynamic gain range; for example, code-division multiple ac-
cess (COMA) systems need 80 dB of the gain variation. To
cover such a wide dynamic gain range, up to 6 VGAs that
adopt (I) must be cascaded in the COMA system, leading
to high power dissipation, large chip area, high noise fig-
ure, poor linearity, and high cost. The low-power VGA is
essential to reduce the overall power dissipation of the sys-
tem. Moreover, a VGA with a wider dynamic gain range is
one of the efficient solutions to decrease the number of the
required VGA stages, leading to reduction of the power dis-
sipation, chip area, and cost. Consequently, the VGA with a
wide dynamic gain range and low power dissipation is criti-
cally desired for low-power applications.
Lowering the supply voltage is also an effective way of
reducing power consumption and it is the technology trend.
However, many of the existing CMOS analogue building
blocks, designed to operate with higher supply voltages, will
lose a significant amount of operating range and need to be
reconsidered. In this letter, the disadvantage at low-voltage
operations is adopted as a mean to widen the dB-linear gain
range of the VGA drastically. The low supply voltage leads
to low power consumption and the wider decibel-linear gain
range reduces the number of the required VGAs such that
the power consumption and the chip size are reduced signif-
icantly. The circuit design detail is given in the following
section.
2. Newly Proposed VGA
Figure I shows a block diagram of the two-stage VGA
which includes a V-to-I converter, two VGA cells, and a
buffer. In Fig. I, the VGA cell adopts (I) for dB-linear gain
variation and the V-to-I converter generates currents to con-
trol the gain of the VGA cell. The buffer is added for mea-
surement purposes only.
Unlike conventional VGAs based on (I), the proposed
VGA adopts the V-to-I converter with distorted V-I char-
acteristic due to supply voltage reduction to extend the dB-
linear gain variation drastically. The schematic of the V-to-I
converter and VGA cell are shown in Figs. 2 and 3, respec-
v ••
v•.

Manuscript received March 12, 2007.

Manuscript revised May 21, 2007.
tThe authors are with the School of Engineering, RFME Labo-
ratory, Information and Communications University, 119-Munjiro,
Yuseong-gu, Daejeon, Republic of Korea, 305-714 Korea. v,
ttThe authors are with Samsung company, Suwon, Korea.
a) E-mail: hoang@icu.ac.kr
DOl: \O.1093jieteleje9I-c.5.806 Fig.l Block diagram of the proposed two-stage VGA.

Copyright © 2008 The Institute of Electronics, Information and Communication Engineers

LETTER I
I~
D---1 V.M,M. f-
I 807

-20
200
~i!i' 80
0
~-
80
-60
-40
20
40
·80

100

\
?
/"
\

-100 / -- at VDD= 1.2V \

,"'r -200
//
//
--
---- at VDD~ I 8V
at VDD= I.2V
-100
--
----
Ideal line
at ~~D = 1.8V
\
\
,
-0.6 ·0.4 -0.2 0.0 0.2 0.4 0.6 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6
MI4 CfRLI VCTRL (V) VC1RL (V)
variable
(a) (b)
gain
am plifier Fig. 4 Simulation for VDD = 1.2 and 1.8 V for (a) -It vs. VCTRL of V-
] To the to-I converter and (b) gain vs. VCTRL of the proposed VGA, (VB/AS = 0.9
C1RL,
and 0.7 V for VDD = 1.8 and 1.2 V, respectively).
Fig. 2 Schematic of the proposed V-to- I converter.

Ic,

Au = ( gm,M27,28
gm,M26,29 r IC2
(3)

where gm,M26,29 and gm,M27.28 are transconductances of the

cml"
V~to·l
converter
From the ( D
CTRL,
~ Variable gain amplifier
Fig. 3 Schematic of the VGA cell [I].
tively, where all transistors are biased in saturation region.
In the V-to-I converter shown in Fig. 2, the voltages V'.2 are
given as V,,2 = VB/AS ± (I/2)VcTRL, where VB/AS is the DC
bias and VCTRL the differential voltage to control the gain of
the VGA cell. Then, the currents II and h in Fig. 2 can be
given by
12 = -I, = (1m - 1m)
= (JinCox ~) (VB/AS - V3 - VTH)
where ID',D2, V3, and VTH are the drain currents, the source
and the threshold voltages, respectively, of transistors M7-8.
In Fig. 2, the currents Ic, = I, + 10 and IC2 = 12 + 10 are
used as gain control signals to the VGA cells, where 10 is
the bias current. The currents IC',2 from the V-to-I con-
verter are mirrored to transistors M32,33 of the VGA cell.
The VGA cell shown in Fig. 3 is a differential amplifier with
diode-connected loads [I]. Since the amplifier offers high
gain, the common-mode feedback circuit (CMFB) is needed
to stabilize the output DC voltage for biasing the following
stages [I]. Assuming that (WI L)M26,29 = (WI L)M27,28, the
gain of the proposed two-stage VGA shown in Fig. I can be
given by [I]
corresponding transistors. From (3), the gain of the pro-
posed VGA is equivalent to (I), where x = 1,110, and I, is a
function of VCTRL as given in (2). Consequently, the gain of
the VGA can be controlled by varying VCTRL.
Figure 4(a) shows plots of -I, in (2) as a function of
VCTRL for the supply voltage VDD of 1.8 and 1.2 V, respec-
tively. As shown in Fig.4(a) by the solid line, the 1"VcTRL
relation diverges from the linear behavior as VDD reduces
from 1.8 to 1.2 V. The divergence of the 1,- VCTRL charac-
teristic is caused by the early entry into the linear-mode op-
~ r---Common-mode
I _ circuit feedback --.{
eration of one of the transistors, M7 or M8, while the other
cuts off. Additionally, the divergence of the 1" VCTRL char-
acteristic is also caused by a small output resistance of the
current sources, hias, 1" and 12, as VDD is reduced.
For the linear IJ - VCTRL relation given in (2) and shown
in Fig. 4(a) by the dashed line, Fig. 4(b) shows the plot of (3)
(dashed line); Au as a function of VCTRL. As can be seen by
the dashed line in Fig. 4(b), the VGA offers only 30 dB of
gain variation with linearity error of less than ±0.5 dB and
the gain deviates from the dB-linear behavior as IVCTRLI in-
creases, To extend the dB-linear gain range of (3), the non-
linear 1,- VCTRL relation as shown in Fig.4(a) by the solid
VCTRL (2)
line is adopted. From Fig. 4(a), as VCTRL increases from 0 to
0.6 V, the numerator and denominator of (3) as a function of
VCTRL are respectively increased and decreased so that the
gain as given in (3) increases. Consequently, the dashed line
in Fig. 4(b) is shifted to the solid line, leading to extension of
the dB-linear gain range. Similarly, as VCTRL reduces from
o to -0.6 V, the numerator and denominator of (3) are re-
spectively decreased and increased so that (3) reduces from
the dashed line to the solid line, leading to the extension
of the dB-linear gain range. Consequently, it can be seen
that the divergence from the dB-linear characteristic of the
conventional VGA is compensated by introducing distortion
in the V-to-I converter through the supply voltage reduction.
With the proper amount of distortion in the V-to-I converter,
the VGA can be corrected to nearly ideal dB-linear perfor-
 IEICE TRANS. ELECTRON .. VOL.E91-C. NO.5 MAY 200S
808

mance, leading to the extension of the dB-linear gain range. gain versus VCTRL. In agreement with expectations, the pro-
The interesting aspect of the proposed VGA is that the posed VGA shows 90 dB (-45 - 45 dB) of gain variation
reduction in supply voltage, which tends to degrade circuit over a wide range of VCTRL (-0.4 - 0.4 V), which is a
performance in general, leads to an extension of the dB- significant improvement compared to conventional VGAs
linear gain range. Therefore, the proposed VGA is suit- that adopt (I) [2]. In Fig. 5, the proposed VGA offers
able for low-voltage and low-power applications. Since the about 85 dB of dB-linear range with linearity error of less
larger amount of dB-linear range reduces the number of than ± I dB. The measured 3 dB bandwidth is greater than
VGA stages, the proposed VGA offers advantages in power 21 MHz, and the maximin input IP3 and PI dB are -5/-42
dissipation, chip area, and cost. and -12/-50 dBm, respectively. Figure 6 shows the mi-
crophotograph of the tested chip where the active area oc-
3. Measurement Results cupies 0.13 mm2.
The proposed VGA described in this work represents
The proposed VGA is optimized for a supply voltage of a significant performance improvement in CMOS-based
1.2 V while dissipating 1.1 mA (excluding buffer) based on VGA designs. The key improvements are derived from
a 0.18 11m CMOS technology. Figure 5 shows the measured a huge extension of the dB-linear gain range by lowering
the supply voltage. The low supply voltage leads to low
power consumption. The wider decibel-linear gain range
" "2- 600
-0.4-20 I
I l') 4CDc:
e reduces the number of VGAs such that the power consump-
0-
20
40
-40
-60
-60.4 '0;
-2 I E
-4 m
, tion and the chip size are reduced significantly. Compared
0-8
2
-10
+1dB / to all previously-reported CMOS-based VGAs [I], [2], the
/..----
I '~---'~---- 1·'--_/ I, . proposed VGA offers lowest power, smallest size (lowest
I -1dB cost), and high performance solutions for the integrated low-
I
,,
I
voltage differential CMOS VGAs.
,I
I,I 4. Conclusions
I,
-- Gain vs. VcmL
- - -. Gain error
I
A wide dynamic range VGA by lowering the supply voltage
-0.2 0.0 0.2
has been presented. The wide gain range and the lower sup-
Vcnu. (V) ply voltage lead to low-power consumption and small chip
Fig. 5 VGA gain and linearity error vs. VCTRL. size. The proposed VGA can be used in many low-voltage
and low-power applications, such as medical equipments,
telecommunications systems, hearing aids, disk drives, etc.

Acknowledgements

This work was supported in part by MOST-KOSEF (Intel-

ligent Radio Engineering Center) under the SRC/ERC Pro-
gram.

References

[I] Q.-H. Duong, Q. Le, c.-w. Kim, and S.-G. Lee, "A 95-dB linear low-
power variable gain amplifier," IEEE Trans. Circuits Syst .. vo1.53.
no.8, pp.I648-1657. Aug. 2006.
[2] c.w. Mangelsdorf, "A variable gain CMOS amplifier with exponen-
Fig. 6 Microphotograph of the tested chip.
tial gain control," VLSI Circuits Dig. Tech. Papers, pp.146-149, 2000.