VLSI Email:vlsi@pantechmail.

com
[XilinxISE&Spartan3FPGA]
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2014PantechProEdPrivateLimited.
PROJECT
CODE
PROJECTTHEME APPLICATION TECHNOLOGY
PSVLSI01
LowPowerPulseTriggeredFlipFlopDesignBasedonaSignal
FeedThroughScheme Photovoltaics
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PSVLSI02
42CompressorDesignwithNewXORXNORModule
Avionics
PSVLSI03
AnewdesignoflowpowerhighspeedhybridCMOSfulladder
Avionics
PSVLSI04
ComparativeperformanceanalysisofXORXNORfunction
basedhighspeedCMOSfulladdercircuits Avionics
PSVLSI05
Lowpowernoisetolerantdomino1bitfulladder Digitalsignal
processing
PSVLSI06
DesignandAnalysisofApproximateCompressorsfor
Multiplication Photovoltaics
PSVLSI07
ReverseConverterDesignviaParallelPrefixAdders:Novel
Components,Methodology,andImplementations Avionics
PSVLSI08
AreaDelayPowerEfficientCarrySelectAdder Power
Management
PSVLSI09
AnArithmeticandLogicUnitOptimizedforAreaandPower Power
Management
PSVLSI10
SRAMcelldesignwithminimumnumberoftransistor Automotive
Electronics
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PSVLSI11
StabilityAnalysisofaNovelProposedLowPower10TSRAM
CellforWriteOperation
Automotive
Electronics
PSVLSI12
IncreaseinReadNoiseMarginofSingleBitLineSRAMUsing
AdiabaticChangeofWordLineVoltage Router
PSVLSI13
StabilityEstimationofa6TSRAMCellUsingaNonlinear
Regression Router
PSVLSI14
Anovellowleakageandhighdensity5TCMOSSRAMCellin
45nmtechnology Router
PSVLSI15
PowerandStabilityAnalysisofaProposed12TMTCMOSSRAM
CellforLowPowerDevices
Power
Management
PSVLSI16
Anewstructureoflowpowerandlowvoltagedoubleedge
triggeredflipflop
Power
Management
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PSVLSI17
AnalysisandDesignofaLowVoltageLowPowerDoubletail
comparator Avionics
PSVLSI18
DesignFlowforFlipFlopGroupinginDataDrivenClockGating
Photovoltaics
PSVLSI19
ALookAheadClockGatingBasedonAutoGatedFlipFlops Communicatio
nSystems
PSVLSI20
AnovelDFALbasedfrequencydivider Power
Management
PSVLSI21
AWiderangeLevelShifterusingaModifiedWilsonCurrent
MirrorHybridBuffer
Power
Management
PSVLSI22
AnalysisandDesignofaHighVoltageIntegratedClassB
AmplifierforUltraSoundTransducers Photovoltaics
PSVLSI23
LogicalEffortforCMOSBasedDualModeLogicGates Power
Management
PSVLSI24
CMOSStartupChargePumpWithBodyBiasandBackward
ControlforEnergyHarvestingStepUpConverters Photovoltaics
VLSI Email:vlsi@pantechmail.com
[XilinxISE&Spartan3FPGA]
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2014PantechProEdPrivateLimited.
PSVLSI25
Fasthardwarearchitectureforgreylevelimagemorphology
withflatstructuringelements
Computer
Vision
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PSVLSI26
AnFPGABasedFullySynchronizedDesignofaBilateralFilter
forRealTimeImageDenoising
Computer
Vision
PSVLSI27
UsingKMeansClusteringTechniquetoStudyofBreastCancer
BioMedical
PSVLSI28
ARealTimeMotionFeatureExtractionVLSIEmployingDigital
PixelSensorBasedParallelArchitecture
Computer
Vision
PSVLSI29
DesignandimplementationoffastFPGAbasedarchitecturefor
reversiblewatermarking Defence
PSVLSI30
BackgroundSubtractionwithDirichletProcessMixtureModels Computer
Vision
PSVLSI31
Improveddecisionmedianfilterforvideosequencescorrupted
byimpulsenoise
Computer
Vision
PSVLSI32
RunwayExtractioninLowVisibilityConditionsbasedonFusion
method MachineVision
PSVLSI33
SegmentationofBloodVesselsandOpticDiscinRetinalImages
BioMedical
PSVLSI34
OverviewonEdgeDetectionMethods Computer
Vision
PSVLSI35
VLSIarchitecturedesignofGuidedFilter Computer
Vision
PSVLSI36
DWTandLSBBasedAudioSteganography
Defence
PSVLSI37
HighspeedvedicmultiplierdesignsAreview Power
Management
PSVLSI38
NovelReconfigurableHardwareArchitectureforPolynomial
MatrixMultiplications MachineVision
PSVLSI39
Highperformance64bitbinarycomparator
Avionics
PSVLSI40
AgingAwareReliableMultiplierDesignwithAdaptivehold
Logic
Power
Management
PSVLSI41
AdaptiveWatermarkingandTreeStructureBasedImage
QualityEstimation
Computer
Vision
PSVLSI42
AnimprovedinvertedLSBimagesteganography
Defence
PSVLSI43
KeyDependentImageSteganographyUsingEdgeDetection
Defence
PSVLSI44
MultiprocessingonFPGAusingLightWeightProcessor
MachineVision
PSVLSI45
AnEfficientParallelAlgorithmforSecuredData
CommunicationusingRSAPublicKeyCryptographymethod NSAProducts
PSVLSI46
SIFTHardwareImplementationExtraction Computer
Vision
PSVLSI47
Implementationofavideostreamingsecuritysystemforsmart
device Defence
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PSVLSI48
LocalizationofLicensePlateNumberUsingDynamicImage
Processingtechniques MachineVision
PSVLSI49
PortableCameraBasedAssistiveTextandProductLabel
ReadingFromHandHeldObjectsforBlindPersons MachineVision
PSVLSI50
PreciseVLSIArchitectureforAIBased1D/2DDaub6
WaveletFilterBanksWithLowAdderCount
Computer
Vision
PSVLSI51
UltralowPowerNANDbasedMultiplexerandFlipflop
Photovoltaics

VLSI Email:vlsi@pantechmail.com
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2014PantechProEdPrivateLimited.
PSVLSI52
DevelopmentofparameterizedcellusingCadenceVirtuoso Power
Management
PSVLSI53
SRAMcelldesignwithminimumnumberoftransistor Automotive
Electronics
PSVLSI54
DesignandanalysisofFINFETpasstransistorbasedXORand
XNORcircuitsat45nmtechnology
Commercial
Devices
PSVLSI55
Designandperformanceanalysisofreversiblelogicmultiplexer
usingnanoscaletechnology
Power
Management
PSVLSI56
Newhighperformancelowpower4bitfulladderwithreduce
groundbouncenoise
DigitalSignal
Processing
PSVLSI57
DesignandanalysisofCMOSringoscillatorusing45nm
technology WaferTesting
PSVLSI58
Transistorgating:Reductionofleakagecurrentandpowerin
fullsubtractorcircuit
Power
Management
PSVLSI59
DesignofUltraLowpowerFullAdderUsingModifiedBranch
BasedLogicStyle Avionics
PSVLSI60
Reductionofleakagecurrentandpowerinfullsubtractorusing
MTCMOStechnique
Signal
Processing
PSVLSI61
Anovelflipflopdesignforlowpowerclockingsystem Power
Management
PSVLSI62
MultipliersUsingLowPowerAdderCellsUsing180nm
Technology RADAR
PSVLSI63
Anovel,highperformanceandpowerefficientimplementation
of88multiplierunitusingMTCMOStechnique Avionics
PSVLSI64
LowPowerDigitalSignalProcessingUsingApproximateAdders Power
Management
PSVLSI65
LowPowerDualDynamicNodePulsedHybridFlipFlop
FeaturingEfficientEmbeddedLogic Photovoltaics
PSVLSI66
DesignofaLowPowerPulseTriggeredFlipFlopwith
ConditionalClockTechnique
Power
Management
PSVLSI67
DesignofLowPowerSequentialCircuitUsingClockedPair
SharedFlipflop
Power
Management
PSVLSI68
LowPowerPulseTriggeredFlipFlopDesignWithConditional
PulseEnhancementScheme Photovoltaics
PSVLSI69
LowSwingDifferentialConditionalCapturingFlipFlopforLC
ResonantClockDistributionNetworks MEMS
PSVLSI70 UltralowVoltageProcessVariationTolerantSchmittTrigger
BasedSRAMDesign
Auotmotive
Electronics
PSVLSI71 AHighPerformanceDFlipFlopDesignwithLowPower
ClockingSystemusingMTCMOSTechnique Avionics
PSVLSI72 Improvednumberplatelocalisationalgorithmanditsefficient
fieldprogrammablegatearraysimplementation
ElectronicArticle
Surveillance
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PSVLSI73 PrototypeofaFingerprintBasedLicensingSystemForDriving
MachineVision
PSVLSI74 GestureRecognitionUsingFieldProgrammableGateArrays
MachineVision
PSVLSI75 ReconfigurableProcessorforBinaryImageProcessing
MachineVision
PSVLSI76 AnEfficientDenoisingArchitectureforRemovalofImpulse
NoiseinImages
Computer
Vision
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VLSI Email:vlsi@pantechmail.com
[XilinxISE&Spartan3FPGA]
14|P a g e
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2014PantechProEdPrivateLimited.
PSVLSI77 SelectiveEigenbackgroundforBackgroundModellingand
SubtractioninCrowdedScenes
Computer
Vision
PSVLSI78 OpticalFlowEstimationforFlameDetectioninVideos Computer
Vision
PSVLSI79 WaveletBasedECGSteganographyforProtectingPatient
ConfidentialInformationinPointofCareSystems BioMedical
PSVLSI80 FPGAImplementationofPipelinedArchitectureForSPIHT
Algorithm BioMedical
PSVLSI81 ModifiedGradientSearchforLevelSetBasedImage
Segmentation BioMedical
PSVLSI82 MemoryEfficientHighSpeedConvolutionbasedGeneric
StructureforMultilevel2DDWT MachineVision
PSVLSI83 ExploitingVulnerabilitiesinCryptographicHashFunctions
BasedonReconfigurableHardware Defence
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PSVLSI84 Securityanalysisofblowfishalgorithm
Defence
PSVLSI85 PerformanceanalysisofencryptionalgorithmsforInformation
Security NSAProducts
PSVLSI86 HardwareImplementationofaDigitalWatermarkingSystem
forVideoAuthentication Defence
PSVLSI87 ParallelAESEncryptionEnginesforManyCoreProcessor
Arrays NSAProducts
PSVLSI88 AnEfficientVLSIArchitectureforLiftingBasedDiscrete
WaveletTransform BioMedical
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PSVLSI89 AnFPGABasedHardwareImplementationofConfigurable
PixelLevelColorImageFusion
Computer
Vision
PSVLSI90 EdgeDetectionofAngiogramImagesUsingtheClassicalImage
ProcessingTechniques
Computer
Vision
PSVLSI91 ALevelSetBasedDeformableModelforSegmentingTumors
inMedicalImages BioMedical
PSVLSI92 AnefficientFPGAimplementationoftheAdvancedEncryption
StandardAlgorithm
Defence