2007 IXYS CORPORATION All rights reserved

600 Volt, 6 Ampere High & Low-side Driver

for N-Channel MOSFETs and IGBTs
IX6R11
Features
Floating High Side Driver with boot-strap Power
supply along with a Low Side Driver.
Fully operational to 600V
50V/ns dV/dt immunity
Gate drive power supply range: 10 - 35V
Undervoltage lockout for both output drivers
Separate Logic power supply range: 3.3V to V
CL
Built using the advantages and compatibility
of CMOS and IXYS HDMOS
TM
processes
Latch-Up protected over entire
operating range
High peak output current: 6A
Low output impedance
Low power supply current
Immune to negative voltage transients
General Description
The IX6R11 Bridge Driver for N-channel MOSFETs and
IGBTs with a high side and low side output, whose input
signals reference the low side. The High Side driver can
control a MOSFET or IGBT connected to a positive bus
voltage up to 600V. The logic input stages are
compatible with TTL or CMOS, have built-in hysteresis
and are fully immune to latch up over the entire
operating range. The IX6R11 can withstand dV/dt on the
output side up to 50V/ns.
Applications
Driving MOSFETs and IGBTs in half-bridge circuits
High voltage, high side and low side drivers
Motor Controls
Switch Mode Power Supplies (SMPS)
DC to DC Converters
Class D Switching Amplifiers
Ordering Information
The IX6R11 is available in the 14-Pin DIP, the 16-Pin
SOIC, and the heat-sinkable 18-Pin SOIC Cooltab
TM
packages.
DS99037G(10/07)
Figure 1. Typical Circuit Connection
I
X
6
R
1
1
S
6
I
X
6
R
1
1
S
3
Part Number Package Type
IX6R11P7 14-Pin DIP
IX6R11S3 16-Pin SOIC
IX6R11S6 18-Pin SOIC
Warning: The IX6R11 is ESD Sensitive
Precaution: when performing the High-Voltage tests,
adequate safety precautions should be taken!
Up to 600V
*Operational voltage rating of 600V determined in a typical half-bridge circuit configuration (refer to Figure 10 and Figure 11).
Operational voltage in other circuit configurations may vary.
IX6R11
IXYS reserves the right to change limits, test conditions, and dimensions.
Figure 2 - IX6R11 Functional Block Diagram
I
X
6
R
1
1
P
7
14-PIN DIP
1
2
3
4
5
6
7 8
9
10
11
12
13
14
LGO
LS
VCL
N/C
HS
VCH
HGO
NC
DG
LIN
ENB
HIN
VDD
N/C
I
X
6
R
1
1
S
3
16-PIN SOIC 18-PIN SOIC w/Cooltab
TM
I
X
6
R
1
1
S
6
SYMBOL FUNCTION DESCRIPTION
VDD Logic Supply Positive power supply for chip CMOS functions
HIN HS Input High side input signal, TTL or CMOS compatible; HGO in phase
LIN LS Input Low side input signal, TTL or CMOS compatible; LGO in phase
ENB Enable Chip enable, active low. When driven high, both outputs go low
DG Ground Logic reference ground
VCH Supply Voltage High side power supply, referenced to HS
HGO Output High side driver output
HS Return High side voltage return pin
VCL Supply Voltage Low side power supply, referenced to LS
LGO Output Low side driver output
LS Ground Low side voltage return pin
Pin Description and Configuration
HIN
Low to High
VDD
DG
HIN
HIN
OUT
IN
RST
VDD
HIN
LIN
ENB
DG
1
DG
VCH
UVCC
Isolated High Side
HS
Gate Current
Output
VCL
HS
HGO
VCH
VCL
Low to High
Side Delay
Equalizer
and
Shutdown
Shutdown
Logic
LS
UVCC
Detect
LS
LGO
Gate Current
Output
Detect
Cooltab is a trademark of IXYS Corporation
2007 IXYS CORPORATION All rights reserved
IX6R11
Symbol Definition Min Max Units
V
CH
High side floating supply voltage -0.3 +35 V
V
HS
High side floating supply offset Voltage -200 +600 V
V
HGO
High side floating output voltage V
HS
-0.3 V
CH
+0.3 V
V
CL
Low side fixed supply voltage -0.3 35 V
V
LGO
Low side output voltage -0.3 V
CL
+0.3 V
V
DD
Logic supply voltage -0.3 V
CL
+0.3 V
V
DG
Logic supply offset voltage V
LS
-3.8 V
LS
+3.8 V
V
IN
Logic input voltage(HIN & LIN) V
LS
-0.3 V
CL
+0.3 V
dV
S
/dt Allowable offset supply voltage transient 50 V/ns
P
D
Package power dissipation@ T
A
25C 1.25 W
P
D
Package power dissipation@ T
C
25C 2.5 W
R
THJ A
Thermal resistance, junction-to-ambient 100 K/W
Absolute Maximum Ratings
Symbol Definition Min Max Units
V
CH
High side floating supply absolute voltage V
HS
+10 V
HS
+20 V
V
HS
High side floating supply offset voltage -20 +600 V
V
HGO
High side floating output voltage V
HS
V
CH
+20 V
V
CL
Low side fixed supply voltage 10 20 V
V
LGO
Low side output voltage 0 V
CC
V
V
DD
Logic supply voltage V
DG
+3 V
DG
+V
CL
V
V
DG
Logic supply offset voltage V
LS
-0.5 V
LS
+0.5 V
V
IN
Logic input voltage(HIN, LIN, ENbar) V
DG
V
DD
V
T
A
Ambient Temperature -40 125
o
C
Recommended Operating Conditions
IX6R11
IXYS reserves the right to change limits, test conditions, and dimensions.
Dynamic Electrical Characteristics
*
Symbol Definition Test Conditions Min Typ Max Units
t
on
Turn-on propagation delay V
HS
=0V 120 160 ns
t
off
Turn-off propagation delay V
HS
=600V 94 125 ns
t
enb
Device not enable delay 110 140 ns
t
r
Turn-on rise time 25 35 ns
t
f
Turn-off fall time 17 25 ns
t
dm
Delay matching, HS & LS turn-on/off 25 50 ns
Static Electrical Characteristics
V
INH
Logic 1 input voltage, HIN, LIN, ENB V
DD
=V
CL
=15V 9.5 V
V
INL
Logic 0 input voltage, HIN, LIN, ENB V
DD
=V
CL
=15V 0 6 V
V
HLGO /
/ V
HHGO
High level output voltage, I
O
=0A 0.1 V
V
CH
-V
HGO
or V
CL
-V
LGO
V
LLGO /
/ V
LHGO
Low level output voltage, I
O
=0A 0.1 V
V
HGO
or V
LGO
I
HL
HS to LS bias current. V
HS
=V
CH
=600V 170 A
I
QHS
Quiescent V
CH
supply current V
IN
=0V or V
DD
=15V 1 3 mA
I
QLS
Quiescent V
CL
supply current V
IN
=0V or V
DD
=15V 1 3 mA
I
QDD
Quiescent V
DD
supply current V
IN
=0V or V
DD
=15V 15 30 A
I
IN
+ Logic 1 input bias current V
IN
=V
DD
20 40 A
I
IN
- Logic 0 input voltage V
IN
=0V 1 A
V
CHUV
+ V
CH
supply undervoltage positive going threshold. 7.5 8.6 9.7 V
V
CHUV
- V
CH
supply undervoltage negative going threshold. 7 8.2 9.4 V
V
CLUV
+ V
CL
supply undervoltage positive going threshold 7.4 8.5 9.6 V
V
CLUV
- V
CL
supply undervoltage negative going threshold. 7 8.2 9.4 V
I
GO
+ HS or LS Output high short circuit current; V
GO
=15V, V
IN
=15V, PW<10us 4 6 A
I
GO
- HS or LS Output low short circuit current; V
GO
=0V, V
IN
=0V, PW<10us -7 -5 A
* These characteristics are guaranteed by design only. Tested on a sample basis.
Symbol Definition Test Conditions Min Typ Max Units
V
CL
=V
CH
=V
DD
=+15V, C
load
=5nF, and V
DG
=V
LS
unless otherwise specified. The dynamic electrical characteristics are
measured using Figure 7.
2007 IXYS CORPORATION All rights reserved
IX6R11
Figure 6. Definitions of Delay Matching Waveforms Figure 5. Definitions of Switching Time Waveforms
Figure 7. Switching Time Test Circuit
13
(0 to 600V)
10
uF
10
uF
0.1
uF
CL
CL
0.1
uF
10
uF
HIN
ENB
LIN
HGO
LGO
VCH
VHS
VCL=15V
2
1
7
5
6 3 9
10
12
11
+
-
IX6R11
50% 50%
10%
90%
Input Signal
Outgoing Signal
HIN
LIN
HGO LGO
LGO HGO
tdm
tdm
~
~
~
~
~ ~
200kHz 500kHz 1MHz
600V
400V
0
f
PWM
V
+
+

B
u
s
s

(
V
)
H
S
S
a
m
p
l
e

T
e
s
t
e
d

f
o
r

O
p
e
r
a
t
i
o
n
500V
Figure 3. INPUT/OUPUT Timing Diagram
HIN/LIN
ENB
LGO/HGO
Figure 4. ENABLE Waveform Definitions
Figure 8. Device operating range: Buss voltage vs. Frequency
Tested in typical circuit configuration (refer to Figure 10 & 11)
ENB
LGO/HGO
t
enb
50%
10%
HIN/LIN
HGO/LGO
tdon tr
50% 50%
90%
10%
90%
10%
tdoff tf
IX6R11
IXYS reserves the right to change limits, test conditions, and dimensions.
Figure 9. Test circuit for allowable offset supply voltage transient.
I
X
6
R
1
1
S
6
V
CH
HGO
HS
NC
NC
LS
V
CL
LGO
LS
HS
NC
NC
V
DD
HIN
ENB
LIN
DG
LS
1k
1k
1k
HIN
ENB
LIN
V
DD
10uF/35V
1uF/35V MLCC
10
11
12
14
15
16
17
18
13
VIN+
VOUT-
VOUT+
GND
VOUT-
VOUT+
N
D
Y
1
2
1
5
C
1
0
u
F
/
3
5
V
1uF/35V MLCC
1k
V
CL
1uF/35V MLCC 10uF/35V
15
5.1
1N5817
1N5817
5.1
15
18uH
0.47uF 0.47uF
2
0
/
5
W
2
0
/
5
W
0.1uF/1kV
Up to 400V
V
CH
1
10
11
12
15
14
1
2
3
4
5
6
7
8
9
IXCP
10M90S
1
2
3
30
IXTH14N60P
IXTH14N60P
Figure 10. Test circuit for high frequency, 750kHz, operation.
V
DD
, V
CH
, V
CL
=15V
IX6R11
HS
VDD
HIN
ENB
LIN
DG
LS
VCH
HGO
HS
LS
VCL
LGO
LS
U1
U2
15V
1
V1
18V
BATTERY GND1
2
3
Vin
G
N
D
Vout 78L15
C2 +
10uF
C5
0.1uF
GND2
L1
200uH
C3
C6
10uF 0.1uF
GND1
+
D
S
E
I

1
2
-
1
0
A
D1
C1
100uF/250V
GND2
+
OUTPUT MONITOR
HV SCOPE PROBE
HV
600V
BNC
PULSE
GND2
U3
2
3
HCPL-314J

VCC
16
OUT
15
14
VEE
GND3
15V
V3
U2
2
1,8
6,7
4,5
-600V
IXDD414
C8
0.1uF
10uF
C9
IXFP4N100Q
Q1
D2
DSEI12-10A
GND3
Measure dV/dt (HV Scope Probe)
dVs/dt >50V/ns
HGO
HS
10K
2007 IXYS CORPORATION All rights reserved
I
X
6
R
1
1
S
6
V
CH
HGO
HS
NC
NC
LS
V
CL
LGO
LS
HS
NC
NC
V
DD
HIN
ENB
LIN
DG
LS
1k
1k
1k
HIN
ENB
LIN
V
DD
10uF/35V
1uF/35V MLCC
10
11
12
14
15
16
17
18
13
VIN+
VOUT-
VOUT+
GND
VOUT-
VOUT+
N
D
Y
1
2
1
5
C
1
0
u
F
/
3
5
V
1uF/35V MLCC
1k
V
CL
1uF/35V MLCC 10uF/35V
1N5817
5.1
15
0.1uF/1kV
Up to 600V
V
CH
1
10
11
12
15
14
1
2
3
4
5
6
7
8
9
IXCP
10M90S
1
2
3
30
36
1N5817
5.1
15 36
IXTH14N60P
IXTH14N60P
Figure 11. Test circuit for low frequency, 75kHz, operation.
V
DD
, V
CH
, V
CL
=15V
IX6R11
IX6R11
IXYS reserves the right to change limits, test conditions, and dimensions.
VDD Supply Voltage - Voltage
4 6 8 10 12 14 16 18 20
T
i
m
e

-

n
a
n
o
s
e
c
o
n
d
s
75
100
125
150
175
200
225
VDD Supply Voltage- Volts
4 6 8 10 12 14 16 18 20
T
i
m
e

-

n
a
n
a
s
e
c
o
n
d
s
40
80
120
160
200
VCH Supply Voltage - Volts
10 15 20 25 30 35
T
i
m
e

-

n
a
n
a
s
e
c
o
n
d
s
60
70
80
90
100
110
120
130
140
150
VCL Supply Voltage - Volts
5 10 15 20 25 30 35
T
i
m
e

-

n
a
n
o
n
s
e
c
o
n
d
s
100
110
120
130
140
150
160
170
180
190
Temperature - Degrees C
-50 -25 0 25 50 75 100 125
75
100
125
150
175
200
225
Temperature - Degrees C
-50 -25 0 25 50 75 100 125
T
i
m
e

-

n
a
n
o
s
e
c
o
n
d
s
50
75
100
125
150
175

T
i
m
e

-

n
a
n
o
s
e
c
o
n
d
s
Max. t
off
Typ. t
off
Typ. t
on
Typ. t
on
Max. t
off
Typ. t
off
Max. t
on
Typ. t
on
Max. t
off
Typ. t
off
Max. t
on
Typ. t
on
Max. t
off
Typ. t
off
Max. t
on
Typ. t
on
Max. t
off
Max. t
on
Typ. t
off
Max. t
on
Max. t
off
Typ. t
off
Typ. t
on
Max. t
on
Fig. 12a. Low side turn-on and turn-off delay times
vs. temperature.
Fig. 12b. High side turn-on and turn-off times
vs. temperature.
Fig. 13a. Low side turn-on and turn-off delay times vs. V
CL
. Fig. 13b. High side turn-on and turn-off delay times vs. V
CH
.
Fig. 14a. Low side turn-on and turn-off delay times
vs. V
DD
supply voltage.
Fig. 14b. High side turn-on and turn-off delay times vs. V
DD
.
2007 IXYS CORPORATION All rights reserved
VCL/VCH Suppl y Vol tage - Vol ts
10 15 20 25 30 35
T
u
r
n
-
o
f
f

F
a
l
l

T
i
m
e

-

n
s
10
15
20
25
VCL/VCH Suppl y Vol tage - Vol ts
10 15 20 25 30 35
T
u
r
n
-
o
n

R
i
s
e

T
i
m
e

-

n
s
10
15
20
25
Temperature - Degrees C
-50 -25 0 25 50 75 100 125
T
u
r
n
-
o
n

&

T
u
r
n
-
o
f
f

R
i
s
e

T
i
m
e

-

n
s
10
15
20
25
30
VDD Suppl y Vol tage - Vol ts
4 6 8 10 12 14 16 18 20
E
n
a
b
l
e

D
e
l
a
y

T
i
m
e

-

n
s
0
75
150
225
300
VCL/VCH Suppl y Vol tage - Vol ts
10 12 14 16 18 20 22 24 26 28 30
E
n
a
b
l
e

D
e
l
a
y

T
i
m
e

-

n
s
50
100
150
200
250
Temperature - Degrees C
-50 -25 0 25 50 75 100 125
E
n
a
b
l
e

D
e
l
a
y

T
i
m
e

-

n
s
50
75
100
125
150
175
200

Max. turn-off
Typ. turn-off
Typ. turn-on
Max. turn-on
Typ. Low si de
Max. Low si de
Max. Hi gh Si de
Typ. Hi gh Si de
Typ. Low si de
Max. Low si de
Max. Hi gh Si de
Typ. Hi gh Si de
Typ. Low si de
Max. Low si de
Max. Hi gh Si de
Typ. Hi gh Si de
Typ. Low si de
Max. Low si de
Max. Hi gh Si de
Typ. Hi gh Si de
Typ. Low si de
Max. Low si de
Max. Hi gh Si de
Typ. Hi gh Si de
Fig. 15a. High and Low side ENABLE (Shutdown) times
vs. temperature.
Fig.15b. High and Low side ENABLE (Shutdown) times
vs. supply voltage.
Fig. 15c. High and Low side ENABLE (Shutdown) times
vs. supply voltage.
Fig. 16a. Turn-on and turn-off rise times vs. temperature.
Fig. 16b. Turn-on rise times vs. bias supply voltages. Fig. 16c. Turn-off delay times vs. bias supply voltages.
IX6R11
IX6R11
IXYS reserves the right to change limits, test conditions, and dimensions.
Fig. 17. Logic input threshold voltage vs bias supply voltage. Fig. 18. Offset supply leakage current vs. temperature.
Fig. 19. Logic input current vs. bias voltage.
Fig. 21a. Output source current vs. temperature Fig. 21b. Output source current vs supply voltatge
Fig. 20. IX6R11S3 Case temperature rise vs. operating
frequency
V
BIAS
Supply Voltage (V)
10 15 20 25 30 35
O
u
t
p
u
t
S
o
u
r
c
e
C
u
r
r
e
n
t
(
A
)
0
2
4
6
8
10
12
14
16
18
Temperature - Degrees C
-50 -25 0 25 50 75 100 125
O
u
t
p
u
t
S
o
u
r
c
e
C
u
r
r
e
n
t
(
A
)
2
3
4
5
6
7
8
9
10
Frequency - kHz
100 200 300 400 500 600 700 800 900 1000
C
a
s
e
T
e
m
p
e
r
a
t
u
r
e
-
o
C
25
30
35
40
45
50
V
DD
Logic Supply Voltage (V)
0 2 4 6 8 10 12 14 16 18 20
L
o
g
i
c
I
n
p
u
t
B
i
a
s
C
u
r
r
e
n
t
-
A
0
10
20
30
40
50
60
Temperature - Degrees C
-50 -25 0 25 50 75 100 125
O
f
f
s
e
t
S
u
p
p
l
y
L
e
a
k
a
g
e
C
u
r
r
e
n
t
-
150
175
200
225
250
275
300
V
DD
Logic Supply Voltage - Volts
0 4 8 12 16 20
L
o
g
i
c
I
n
p
u
t
T
h
r
e
s
h
o
l
d
-
V
o
l
t
s
0
2
4
6
8
10
12

Maximum
Typi cal
Maximum
Typi cal
Maximum
Typi cal
Maximum
Typi cal
V = 500V V = 320V
V = 140V
Load: IXTU01N100
V =15V
CH
H
I
N

&

L
I
N

M
a
x

L
o
g
ic

ENB Max Logic 1

ENB Min Logic 0
H
IN
&
L
IN
M
in
L
o
g
ic
0

2007 IXYS CORPORATION All rights reserved

IX6R11
Mi n
Typ
Max
Mi n
Typ
Max
Mi n
Typ
Max
Mi n
Typ
Max
Mi ni mum
Typi cal

Temperature -
o
C
-50 -25 0 25 50 75 100 125
O
u
t
p
u
t

C
u
r
r
e
n
t

-

A
m
p
e
r
e
s
2
3
4
5
6
7
8
9
10
11
12
Bias Vol tage - Vol ts
10 15 20 25 30 35
O
u
t
p
u
t

C
u
r
r
e
n
t

-

A
m
p
e
r
e
s
0
2
4
6
8
10
12
14
16
18
20
Temperature -
o
C
-50 -25 0 25 50 75 100 125
U
n
d
e
r
v
o
l
t
a
g
e

L
o
c
k
o
u
t

(
+
)

-

V
o
l
t
s
5
6
7
8
9
10
11
12
13
14
15
Temperature -
o
C
-50 -25 0 25 50 75 100 125
U
n
d
e
r
v
o
l
t
a
g
e

L
o
c
k
o
u
t

(
-
)

-

V
o
l
t
s
4
5
6
7
8
9
10
11
12
13
14
15
16
Temperature -
o
C
-50 -25 0 25 50 75 100 125
U
n
d
e
r
v
o
l
t
a
g
e

L
o
c
k
o
u
t

(
+
)

-

V
o
l
t
s
5
6
7
8
9
10
11
12
13
14
15
Temperature -
o
C
-50 -25 0 25 50 75 100 125
U
n
d
e
r
v
o
l
t
a
g
e

L
o
c
k
o
u
t

(
-
)

-

V
o
l
t
s
5
6
7
8
9
10
11
12
13
14
15
Typi cal
Mi ni mum
Fig. 22a. Output sink current vs. temperature Fig. 22b. Output sink current vs. bias voltage
Fig. 23a. V
CH
Undervoltage positive trip vs. temperature.
Fig. 23b. V
CH
Undervoltage negative trip vs. temperature.
Fig. 24a. V
CL
Undervoltage positive trip vs. temperature. Fig. 24b. V
CL
Undervoltage negative trip vs. temperature.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
IX6R11
IXYS reserves the right to change limits, test conditions, and dimensions.
Frequency - kHz
100 200 300 400 500 600 700 800 900 1000
C
a
s
e

T
e
m
p
e
r
a
t
u
r
e

-

o C
25
30
35
40
45
50
55
60
65
70
75
Temperature -
o
C
-50 -25 0 25 50 75 100 125
V
C
L

C
u
r
r
e
n
t

-

A
600
650
700
750
800
850
900
950
1000
Temperature -
o
C
-50 -25 0 25 50 75 100 125
V
C
H

C
u
r
r
e
n
t

-

A
600
700
800
900
1000
1100

Maxi mum
Typi cal
Maxi mum
Typi cal
E
B
C
D
A
F
Frequency - kHz
100 200 300 400 500 600 700 800 900 1000
C
a
s
e

T
e
m
p
e
r
a
t
u
r
e

-

o C
25
30
35
40
45
50
55
60
65
70
75
V
CH
Voltage - Volts
10 15 20 25 30 35
V
C
H

C
u
r
r
e
n
t

-

A
600
700
800
900
1000
1100
Maxi mum
Typi cal
E
B
C
D
A
F
Fig. 25a. Quiescent current vs. temperature for the
high side power supply.
Fig. 25b. Quiescent current vs. voltage for the high side
power supply.
Fig. 26. Quiescent current vs. temperature for the low
side power supply
Fig. 27b. Case temperature rise vs. switching frequency
for IX6R11S6
Fig. 27a. Case temperature rise vs. switching frequency
for IX6R11S3
Load Conditions:
A: IXFK21N100F @ V
CH
= 400V
B: IXFK21N100F @ V
CH
= 200V
C: IXFH14N100Q @ V
CH
=400V
D: IXFH14N100Q @ V
CH
=200V
E: IXTU01N100 @ V
CH
= 400V
F: IXTU01N100 @ V
CH
= 200V
Load Conditions:
A: IXFK21N100F @ V
CH
= 400V
B: IXFK21N100F @ V
CH
= 200V
C: IXFH14N100Q @ V
CH
=400V
D: IXFH14N100Q @ V
CH
=200V
E: IXTU01N100 @ V
CH
= 400V
F: IXTU01N100 @ V
CH
= 200V
2007 IXYS CORPORATION All rights reserved
E1
E
eA
L
eB
e
D
D1
c
b2
b
A2
H E
e
D
A
B
A1
L
c
L
h
H
e
B
E
C
D
h x 45%%d
M
N
N
M
h
e
H E
D
B e
A1
A
L c
h x 45
D1
E1
IX6R11