INTRODUCTION

1.1 OBJECTIVE
The main aim of this project to provide secure banking system, by taking ids as
authorized identity at ATM/banks. The purpose of the project is to provide a secured and
reliable environment to the customers for their banking transactions by providing a unique
identity to every user using the ! identification technology.
The main objective of this system is to develop an embedded system, "hich is used
for ATM security applications. n these system, #ankers "ill collect the customer id s "hile
opening the accounts then customer "ill only access ATM machine. The "orking of these
ATM machine is "hen customer place id on the id module it displays the name of the
customer on the $%! connected to the micro controller. f the user does not have a account
activated by a &'!initially it does not allo" the user to do transactions.
(o"adays, using the ATM )Automatic Teller Machine* "hich provides customers
"ith the convenient banknote trading is very common. +o"ever, the financial crime case
rises repeatedly in recent years, a lot of criminals tamper "ith the ATM terminal and steal
user-s credit card and pass"ord by illegal means. .nce user-s bank card is lost and the
pass"ord is stolen, the criminal "ill dra" all cash in the shortest time, "hich "ill bring
enormous financial losses to customer. +o" to carry on the valid identity to the customer
becomes the focus in current financial circle. Traditional ATM systems authenticate generally
by using the credit card and the pass"ord, the method has some defects. /sing credit card
and pass"ord cannot verify the client-s identity e0actly. n recent years, the algorithm that the
&'!recognition continuously updated, "hich has offered ne" verification means for us, the
original pass"ord authentication method combined "ith the biometric identification
technology verify the clients- identity better and achieve the purpose that use of ATM
machines improve the safety effectively. This project can be e0tended to be operated "ith
pass"ord i.e., sending a unique pass"ord to the customer1s mobile every time the customer
places a id to do transactions, then the customer must enter the code and proceed further .
1
1.2 BACK GROUND OF BIOMETRICS
This invention relates to the field of biometrics. ATM makes the human life very
comfort. n olden days suppose "ant to dra" the money have to go to the bank, and have
to "ait until get my turn. #ut using these e0isting ATMs there is no time "aste. n the
e0isting system "e are dealing "ith a card and "e have an individual pass"ord to protect our
money. #ut anybody can kno" our pass"ord and steal our card. 2o there is no security to our
money.
n order to overcome that problem here is the &'! #A23! ATM 23%/&T4
242T3M. +ere card system doesn1t e0ist. 'irst of all "e have to give our id to the data base.
5henever "e "ant money "e have to go to the ATM machine and should give our id. f it
matches "ith the data base it displays our name, means it is another security to our system.
Then only further transaction "ill be done. f the date base is not matched no further
transaction "ill be done. 2o there is no need to "orry about our money. (obody can steal our
money.
1.3ADVANTAGES:
More secured as it is operated through id
%an be operated through picture as pass"ord
%ost effective
1.4APPLICATIONS:
%ell phones.
%omputers.
&obots.
nterfacing to t"o pc1s
2
BLOCK DIAGRAM
2.1 DESCRIPTION:
The block diagram sho"n in the 'ig 6.7 consists of A&M8, d Module, po"er
supply, &2696, 33:&.M, Touch :ad, and $%!. (o"adays, using the ATM )Automatic
Teller Machine* "hich provide customers "ith the convenient banknote trading is very
common.
3
Fig 2.1 RFID ba!" ATM !#$%i&' S'&!(
+o"ever, the financial crime case rises repeatedly in recent years, a lot of criminals
tamper "ith the ATM terminal and steal user-s credit card and pass"ord by illegal means.
.nce user-s bank card is lost and the pass"ord is stolen, the criminal "ill dra" all cash in the
4
shortest time, "hich "ill bring enormous financial losses to customer. +o" to carry on the
valid identity to the customer becomes the focus in current financial circle.
Traditional ATM systems authenticate generally by using the credit card and the
pass"ord, the method has some defects. /sing credit card and pass"ord cannot verify the
client-s identity e0actly. n recent years, the algorithm that the &'!recognition continuously
updated, "hich has offered ne" verification means for us, the original pass"ord
authentication method combined "ith the biometric identification technology verify the
clients- identity better and achieve the purpose that use of ATM machines improve the safety
effectively.
The embedded ATM client authentication system is based on &'!recognition "hich
is designed after analyzed e0isted ATM system. The 29%6;;< chip is used as the core of this
embedded system "hich is associated "ith the technologies of &'!recognition and current
high speed net"ork communication. The primary functions are sho"n as follo"s=
CIRCUIT DIAGRAM
3.1 DESCRIPTION OF T)E CIRCUIT
5
The %ircuit !iagram is sho"n in 'ig 9.7.+ere "e are using serial id scanner. t has
&2696 for serial communication. t has ; outputs.
7.76> :o"er supply,
6. &eception of data,
9. Transmission of data,
;. ?round.
5e are using MA@696 for >oltage and %urrent balance. 2canner 6 outputs
Transmission and &eception of data are given as inputs to its 79, 7; pins respectively. .utput
is taken from 76, 77 pins. These are given to 7<,77 pins of Micro controller ATAB2C6 "hich
has ;< pins.7A,7B pins of it are given to crystal oscillator 77.<CMhz.6< pin is ?round,;< pin
is :o"er supply of C>.
%oming to 7DE6 $%! it has 7D pins.
7.7D pin is connected to ?round,
6.7C pin are :o"er supply.
9.9 pin is for adjustment of brightness of screen.
5hen ne" user is using he has to press this push s"itch in order to enter into this
mode. 'irst the user should register his id . +e gets a message as &3?2T3&3! for his
registration. All id s are stored n the F%.
.ld user should use this s"itch. (o" he should keep his id on scanner for verification
process.
f id is matched he is the A/T+.&23! person. Then he is asked for pass"ord if it
is also correct then he has to enter the money. f it is not matched he gets a message as
/(A/T+.&23! person. 'urther transactions "ill not be done.
6
)ARD*ARE COMPONENTS
4.1 PO*ER SUPPL+ UNIT:
Ci%#$i& Diag%a(
7
Fig 4.1P,-!% S$../'
P,-!% $../' $0i& #,0i& ,1 1,//,-i0g $0i&
i* 2tep do"n transformer
ii* &ectifier unit
iii* nput filter
iv* &egulator unit
v* .utput filter
4.1.1 STEPDO*N TRANSFORMER:
The 2tep do"n Transformer is used to step do"n the main supply voltage from 69<>
A% to lo"er value. This 69< A% voltage cannot be used directly, thus it is stepped do"n. The
Transformer consists of primary and secondary coils. To reduce or step do"n the voltage, the
transformer is designed to contain less number of turns in its secondary core. The output
from the secondary coil is also A% "aveform. Thus the conversion from A% to !% is
essential. This conversion is achieved by using the &ectifier %ircuit//nit.
The secondary induced voltage >2, of an ideal transformer, is scaled from the primary
>: by a factor equal to the ratio of the number of turns of "ire in their respective "indings=
8

4.1.1.1 Bai# P%i0#i./!
The transformer is based on t"o principles= firstly, that an electric current can
produce a magnetic field )electromagnetism* and secondly that a changing magnetic field
"ithin a coil of "ire induces a voltage across the ends of the coil )electromagnetic induction*.
#y changing the current in the primary coil, it changes the strength of its magnetic field,
since the changing magnetic field e0tends into the secondary coil, a voltage is induced across
the secondary.
A simplified transformer design is sho"n belo". A current passing through the
primary coil creates a magnetic field. The primary and secondary coils are "rapped around a
core of very high magnetic permeability, such as iron, this ensures that most of the magnetic
field lines produced by the primary current are "ithin the iron and pass through the
secondary coil as "ell as the primary coil.
4.1.1.2 I0"$#&i,0 /a-
The voltage induced across the secondary coil may be calculated from 'araday-s la"
of induction, "hich states that=

5here >2 is the instantaneous voltage, (2 is the number of turns in the secondary coil
and G equals the magnetic flu0 through one turn of the coil. f the turns of the coil are
oriented perpendicular to the magnetic field lines, the flu0 is the product of the magnetic field
strength # and the area A through "hich it cuts. The area is constant, being equal to the
crossHsectional area of the transformer core, "hereas the magnetic field varies "ith time
according to the e0citation of the primary. 2ince the same magnetic flu0 passes through both
the primary and secondary coils in an ideal transformer, the instantaneous voltage across the
primary "inding equals
9

Taking the ratio of the t"o equations for VS and VP gives the basic equation

for
stepping up or stepping do"n the voltage

4.1.1.3 I"!a/ P,-!% E2$a&i,0
f the secondary coil is attached to a load that allo"s current to flo", electrical po"er
is transmitted from the primary circuit to the secondary circuit. deally, the transformer is
perfectly efficient, all the incoming energy is transformed from the primary circuit to the
magnetic field and into the secondary circuit. f this condition is met, the incoming electric
po"er must equal the outgoing po"er.
:incoming I :>: I :outgoing I 2>2
?iving the ideal transformer equation

10
Fig 4.2 T%a01,%(!%

:inHcoming I :>: I :outHgoing I 2>2
?iving the ideal transformer equation

f the voltage is increased )stepped up* )VS J VP*, then the current is decreased
)stepped do"n* )IS K IP* by the same factor. Transformers are efficient so this formula is a
reasonable appro0imation.
f the voltage is increased )stepped up* )VS J VP*, then the current is decreased
)stepped do"n* )IS K IP* by the same factor. Transformers are efficient so this formula is a
reasonable appro0imation.
The impedance in one circuit is transformed by the square of the turns ratio. 'or
e0ample, if an impedance ZS is attached across the terminals of the secondary coil, it appears
to the primary circuit to have an impedance of
11

This relationship is reciprocal, so that the impedance ZP of the primary circuit appears
to the secondary to be

4.1.2. R!#&i1i!% U0i&:
The &ectifier circuit is used to convert the A% voltage into its corresponding !%
voltage. The most important and simple device used in &ectifier circuit is the diode. The
simple function of the diode is to conduct "hen for"ard biased and not to conduct in reverse
bias. (o" "e are using three types of rectifiers. They are
7. +alfH"ave rectifier
6. 'ullH"ave rectifier
9. #ridge rectifier
F$//3-a4! %!#&i1i!%
A fullH"ave rectifier converts the "hole of the input "aveform to one of constant
polarity )positive or negative* at its output. 'ullH"ave rectification converts both polarities of
the input "aveform to !% )direct current*, and is more efficient.
B%i"g! %!#&i1i!%
12
)a/13-a4! %!#&i1i!%
n half "ave rectification, either the positive or negative half of the A% "ave is
passed, "hile the other half is blocked. #ecause only one half of the input "aveform
reaches the output, it is very inefficient if used for po"er transfer. +alfH"ave
rectification can be achieved "ith a single diode in a one phase supply, or "ith three
diodes in a threeHphase supply.
A bridge rectifier makes use of four diodes in a bridge arrangement to achieve fullH
"ave rectification. This is a "idely used configuration, both "ith individual diodes "ired as
sho"n and "ith single component bridges "here the diode bridge is "ired internally.

Fig 4.3 B%i"g! R!#&i1i!%
A "i,"! b%i"g! or b%i"g! %!#&i1i!% is an arrangement of four diodes in a bridge
configuration that provides the same polarity of output voltage for either polarity of input
voltage. 5hen used in its most common application, for conversion of alternating current
)A%* input into direct current )!%* output, it is kno"n as a bridge rectifier. A bridge rectifier
provides fullH"ave rectification from a t"oH"ire A% input, resulting in lo"er cost and "eight
as compared to a centerHtapped transformer design.
13
Fig.4.4. R!#&i1i!% *a4!1,%(
14
4.1.3 I0.$& Fi/&!%:
%apacitors are used as filter. The ripples from the !% voltage are removed and pure
!% voltage is obtained. And also these capacitors are used to reduce the harmonics of the
input voltage. The primary action performed by capacitor is charging and discharging. t
charges in positive half cycle of the A% voltage and it "ill discharge in negative half cycle.
2o it allo"s only A% voltage and does not allo" the !% voltage. This filter is fi0ed before
the regulator. Thus the output is free from ripples.
There are t"o types of filters. They are
7. $o" pass filter
6. +igh pass filter
L,- .a 1i/&!%:
Fig.4.5. L,- .a Fi/&!%
.ne simple electrical circuit that "ill serve as a lo"Hpass filter consists of a resistor in
series "ith a load, and a capacitor in parallel "ith the load. The capacitor e0hibits reactance,
and blocks lo"Hfrequency signals, causing them to go through the load instead. At higher
frequencies the reactance drops, and the capacitor effectively functions as a short circuit. The
combination of resistance and capacitance gives you the time constant of the filter L I RC
)represented by the ?reek letter tau*. The break frequency, also called the turnover frequency
or cutoff frequency )in hertz*, is determined by the time constant= or equivalently )in radians
per second*=
15
)ig6 .a 1i/&!%:
Fig.4.7 )ig6 .a 1i/&!%
The above circuit diagram illustrates a simple 'RC' highHpass filter. "e should find
that the circuit passes -high- frequencies fairly "ell, but attenuates -lo"- frequencies.
+ence it is useful as a filter to block any un"anted lo" frequency components of a
comple0 signal "hilst passing higher frequencies. %ircuits like this are used quite a lot in
electronics as a -!.%. #lock- H i.e. to pass a.c. signals but prevent any !.%. voltages from
getting through.
4.1.4 R!g$/a&,% U0i&:


Fig.4.8 89:5 R!g$/a&,%
16
&egulator regulates the output voltage to be al"ays constant. The output voltage is
maintained irrespective of the fluctuations in the input A% voltage. As and then the A%
voltage changes, the !% voltage also changes. Thus to avoid this &egulators are used. Also
"hen the internal resistance of the po"er supply is greater than 9< ohms, the output gets
affected. Thus this can be successfully reduced here. The regulators are mainly classified for
lo" voltage and for high voltage. 'urther they can also be classified as=
i* :ositive regulator
7* nput pin
6* ?round pin
9* .utput pin
t regulates the positive voltage.
ii* (egative regulator
7* ?round pin
6* nput pin
9* .utput pin
t regulates the negative voltage.
Fig.4.9 B/,#; "iag%a( ,1 %!g$/a&,%
17
4.1.5 O$&.$& Fi/&!%:
The 'ilter circuit is often fi0ed after the &egulator circuit. %apacitor is most often
used as filter. The principle of the capacitor is to charge and discharge. t charges during the
positive half cycle of the A% voltage and discharges during the negative half cycle. 2o it
allo"s only A% voltage and does not allo" the !% voltage. This filter is fi0ed after the
&egulator circuit to filter any of the possibly found ripples in the output received finally.
+ere "e used <.7F' capacitor. The output at this stage is C> and is given to the
Microcontroller. The output voltage overshoots "hen the load is removed or a short clears.
5hen the load is removing from a s"itching mode po"er supply "ith a $% lo"Hpass output
filter, the only thing the control loop can do is stop the s"itching action so no more energy is
taken from the source. The energy that is stored in the output filter inductor is dumped into
the output capacitor causing a voltage overshoot.
4.2 MA<232:
The MA@696 family of line drivers/receivers is intended for all 3A/TAH6963
communications interfaces. MA@696 is a level converter "hich converts the voltage levels
coming from one side, compatible to another side. 2o it helps in communication bet"een
microcontroller and ?2M and also bet"een ?2M and :%, performing &2696
communication.
Fig 4.=.Pi0 "iag%a( ,1 MA< 232
18

Tab/! 4.1 PIN D!#%i.&i,0 ,1 MA<232
4.2.1 F!a&$%!
.perates 5ith 2ingle CH> :o"er 2upply
#i%M.2 :rocess Technology
T"o !rivers and T"o &eceivers.M9<H> nput $evels
$o" 2upply %urrent. A mA Typical
Meets or 30ceeds TA/3AH696H' and T/
!esigned to be nterchangeable 5ith
Ma0im MA@696
19
Pi0
N,.
F$0#&i,0 Na(!
7
%apacitor connection pins
%apacitor 7 N
6 %apacitor 9 N
9 %apacitor 7 H
; %apacitor 6 N
C %apacitor 6 H
D %apacitor ; H
8 .utput pin, outputs the serially transmitted data at &2696 logic
level, connected to receiver pin of :% serial port
T6 .ut
A nput pin, receives serially transmitted data at &2 696 logic level,
connected to transmitter pin of :% serial port
&6 n
B .utput pin, outputs the serially transmitted data at TT$ logic
level, connected to receiver pin of controller.
&6 .ut
7< nput pins, receive the serial data at TT$ logic level, connected to
serial transmitter pin of controller.
T6 n
77H T7 n
76 .utput pin, outputs the serially transmitted data at TT$ logic
level, connected to receiver pin of controller.
&7 .ut
79 nput pin, receives serially transmitted data at &2 696 logic level,
connected to transmitter pin of :% serial port
&7 n
7; .utput pin, outputs the serially transmitted data at &2696 logic
level, connected to receiver pin of :% serial port
T7 .ut
7C ?round )<>* ?round
7D 2upply voltage, C> );.C> O C.C>* >cc
Applications
o TA/3AH696H'
o #atteryH:o"ered 2ystems
o Terminals
o Modems
o %omputers
32! :rotection 30ceeds 6<<< > :er
M$H2T!HAA9, Method 9<7C
:ackage .ptions nclude :lastic
4.2.2 L,gi# Sig0a/ V,/&ag!
2erial &2H696 )>.6;* communication "orks "ith voltages )bet"een H7C> ... H9> are
used to transmit a binary -7- and N9> ... N7C> to transmit a binary -<-* "hich are not
compatible "ith today-s computer logic voltages. .n the other hand, classic TT$ computer
logic operates bet"een <> ... NC> )roughly <> ... N<.A> referred to as low for binary -<-, N6>
... NC> for high binary -7- *. Modern lo"Hpo"er logic operates in the range of <> ... N9.9> or
even lo"er.
2o, the ma0imum &2H696 signal levels are far too high for today-s computer logic
electronics, and the negative &2H696 voltage can-t be grokked at all by the computer logic.
Therefore, to receive serial data from an &2H696 interface the voltage has to be reduced, and
the 0 and 1 voltage levels inverted.
n the other direction )sending data from some logic over &2H696* the lo" logic
voltage has to be Pbumped upP, and a negative voltage has to be generated, too.

&2H696 TT$ $ogic
HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
H7C> ... H9> KHJ N6> ... NC> KHJ 7
N9> ... N7C> KHJ <> ... N<.A> KHJ <
All this can be done "ith conventional analog electronics, e.g. a particular po"er
supply and a couple of transistors or the once popular 7;AA )transmitter* and 7;AB )receiver*
20
%s. +o"ever, since more than a decade it has become standard in amateur electronics to do
the necessary signal level conversion "ith an integrated circuit )%* from the MA@696
family )typically a MA@696A or some clone*. n fact, it is hard to find some &2H696
circuitry in amateur electronics "ithout a MA@696A or some clone.
2ome of the features are,
.perate from 2ingle NC> :o"er 2upply
$o"H:o"er &eceive Mode in 2hutdo"n )MA@669/MA@6;6*
Meet All 3A/TAH6963 and >.6A 2pecifications
Multiple !rivers and &eceivers
9H2tate !river and &eceiver .utputs
.penH$ine !etection )MA@6;9*
Fig. 4.1: I0&!%1a#! ,1 RS 232 &, MA< 232
RS232 Li0! T'.! > L,gi# L!4!/ RS232 V,/&ag!
TTL V,/&ag! &,?1%,(
MA<232
!ata Transmission )&0/T0* $ogic < N9 > to N7C > < >
!ata Transmission )&0/T0* $ogic 7 H9 > to H7C > C >
%ontrol 2ignals )&T2/%T2/!T&/!2&* $ogic < H9 > to H7C > C >
21
%ontrol 2ignals )&T2/%T2/!T&/!2&* $ogic 7 N9 > to N7C > < >
Tab/!4.2: Li& ,1 4,/&ag! /!4!/ i0 a0" ,$& $i0g MA<232
VOLTAGE LEVELS
t is helpful to understand "hat occurs to the voltage levels. 5hen a MA@696 %
receives a TT$ level to convert, it changes a TT$ $ogic < to bet"een N9 and N7C >, and
changes TT$ $ogic 7 to bet"een H9 to H7C >, and vice versa for converting from &2696 to
TT$. This can be confusing "hen you realize that the &2696 !ata Transmission voltages at a
certain logic state are opposite from the &2696 %ontrol $ine voltages at the same logic state.
To clarify the matter, see the table belo". 'or more information see &2H696 >oltage $evels.
*i"! A../i#a&i,0 Ra0g! ,1 I" -i&6 Di11!%!0& @$a/i&'
2elfHadaptive parameter adjustment mechanism is used in the course of
&'!enrollment..This ensures good image quality for even dry or "et ids, thus it
has "ider application range.
C,(.!&i&i4! P%i#!
The cost of module is greatly reduced by using selfHdeveloped optic
&'!enrollment device.
I((!0! I(.%,4!" A/g,%i&6(
d algorithm is specially "ritten according to optic imaging theory. The algorithm is
good for deHshaped or lo"Hquality ids due to its e0cellent correction and tolerance
features.
F/!Aib/! A../i#a&i,0
/ser can easily set d Module to different "orking modes depending on
comple0ity of application systems. /ser can conduct secondary development
"ith high efficiency and reliability.
L,- P,-!% C,0$(.&i,0
2leep/a"ake control interface makes d suitable for occasions that require lo"
22
po"er consumption.
Di11!%!0& S!#$%i&' L!4!/
/ser can set different security level according to different
application environment.
4.4 LCD BLI@UID CR+STAL DISPLA+C
$%! stands for Liquid Crystal Display. $%! is finding "ide spread use replacing
$3!s )seven segment $3!s or other multi segment $3!s* because of the follo"ing reasons=
7. The declining prices of $%!s.
6. The ability to display numbers, characters and graphics. This is in contrast to $3!s, "hich
are limited to numbers and a fe" characters.
9. ncorporation of a refreshing controller into the $%!, thereby relieving the %:/ of the
task of refreshing the $%!. n contrast, the $3! must be refreshed by the %:/ to keep
displaying the data.
;. 3ase of programming for characters and graphics.
These components are QspecializedR for being used "ith the microcontrollers, "hich
means that they cannot be activated by standard % circuits. They are used for "riting
different messages on a miniature $%!.
'ig ;.7C $%!
A model described here can display messages in t"o lines "ith 7D characters each. t
displays all the alphabets, ?reek letters, punctuation marks, mathematical symbols etc. n
23
addition, it is possible to display symbols that user makes up on its o"n. Automatic shifting
message on display )shift left and right*, appearance of the pointer, backlight etc. are
considered as useful characteristics.
4.2 Pi0 F$0#&i,0=
'ig ;.6 :in 'unctions
There are pins along one side of the small ed board used for connection to the
microcontroller. There are total of 7; pins marked "ith numbers )7D in case the background
light is built in*. Their function is described in the table belo"=
24
TABLE 4.3 LCD PIN DESCRIPTION
4.4.1 LCD S#%!!0:
$%! screen consists of t"o lines "ith 7D characters each. 3ach character consists of
C08 dot matri0. %ontrast on display depends on the po"er supply voltage and "hether
messages are displayed in one or t"o lines. 'or that reason, variable voltage <H>dd is applied
on pin marked as >ee. Trimmer potentiometer is usually used for that purpose. 2ome versions
of displays have built in backlight )blue or green diodes*. 5hen used during operating, a
resistor for current limitation should be used )like "ith any $3 diode*.
25
'ig= ;.9 :in !iagram of $%!
4.4.2 LCD Bai# C,((a0"
All data transferred to $%! through outputs !<H!8 "ill be interpreted as commands
or as data, "hich depends on logic state on pin &2= &2 I 7 H #its !< H !8 are addresses of
characters that should be displayed. #uilt in processor addresses built in Qmap of charactersR
and displays corresponding symbols. !isplaying position is determined by !!&AM address.
This address is either previously defined or the address of previously transferred character is
automatically incremented. &2 I < H #its !< H !8 are commands "hich determine display
mode. $ist of commands "hich $%! recognizes are given in the table belo"=
26
Tab/! 4.4 LCD C,((a0"
A /i2$i" #%'&a/ "i./a' BLCDC is a thin, flat display device made up of any number
of color or monochrome pi0els arrayed in front of a light source or reflector. 3ach .iA!/
consists of a column of liquid crystal molecules suspended bet"een t"o transparent
electrodes, and t"o polarizing filters, the a0es of polarity of "hich are perpendicular to each
other. 5ithout the liquid crystals bet"een them, light passing through one "ould be blocked
by the other. The liquid crystal t"ists the polarization of light entering one filter to allo" it to
pass through the other.
27
A program must interact "ith the outside "orld using input and output devices that
communicate directly "ith a human being. .ne of the most common devices attached to an
controller is an $%! display. 2ome of the most common $%!s connected to the controllers
are 17<1D 17A2 a0" 2:A2 displays. This means 7D characters per line by 7 line 7D characters
per line by 6 lines and 6< characters per line by 6 lines, respectively.
28
Many microcontroller devices use -smart $%!- displays to output visual information.
$%! displays designed around $%! (TH%7D77 module, are ine0pensive, easy to use, and it
is even possible to produce a readout using the C@8 dots plus cursor of the display. They
have a standard A2% set of characters and mathematical symbols. 'or an AHbit data bus, the
display requires a E5V $../' plus 7< /. lines )&2 &5 !8 !D !C !; !9 !6 !7 !<*. 'or
a ;Hbit data bus it only requires the supply lines plus D e0tra lines )&2 &5 !8 !D !C !;*.
5hen the $%! display is not enabled, data lines are triHstate and they do not interfere "ith
the operation of the microcontroller.
29
available. $ine lengths of
A, 7D,
6<, 6;,
96 and
;<
charact
ers are
all
standar
d, in
one,
t"o
4.4.3 S)APES AND SIFES:

;.6.7)a* 2+A:32 A(! 2S32 .' $%!
3ven limited to character based modules, there is still a "ide variety of shapes and
sizes available. $ine lengths of 9D 17D2:D24D32 a0" 4: characters are all standard, in one, t"o
and four line versions. 2everal different $% technologies e0ists. G$.!%&-i&H types, for
e0ample, offer mproved contrast and vie"ing angle over the older Qt"isted nematiR types.
2ome modules are available "ith back lighting, so that they can be vie"ed in dimlyHlit
conditions. The back lighting may be either G!/!#&%,3/$(i0!#!0&H, requiring a high voltage
inverter circuit, or simple $3! illumination.
4.4.4 E/!#&%i#a/ b/,#; "iag%a(:
30
'? ;.6.6)a* 3$3%T&%A$ #$.%T !A?&AM .' $%!
4.4.5 P,-!% $../' 1,% LCD "%i4i0g:
'? ;.6.9)a*= :.53& 2/::$4 '.& $%! !&>(?
4.4.7 Pi0 D!#%i.&i,0:
Most $%!s "ith 7 controller has 7; :ins and $%!s "ith 6 controller has 7D :ins
)t"o pins are e0tra in both for backHlight $3! connections*.
31
'?/&3;.6.; )a* :( !A?&AM .' 7@7D $(32 $%!


CONTROL LINES
EN= $ine is called P3nable.P This control line is used to tell the $%! that you are sending it
data. To send data to the $%!, your program should make sure this line is lo" )<* and then
set the other t"o control lines and/or put data on the data bus. 5hen the other lines are
completely ready, bring 3( high )7* and "ait for the minimum amount of time required by
the $%! datasheet )this varies from $%! to $%!*, and end by bringing it lo" )<* again.
RS= $ine is the P&egister 2electP line. 5hen &2 is lo" )<*, the data is to be treated as a
command or special instruction )such as clear screen, position cursor, etc.*. 5hen &2 is high
)7*, the data being sent is te0t data "hich should be displayed on the screen. 'or e0ample, to
display the letter PTP on the screen you "ould set &2 high.
R*= $ine is the P&ead/5riteP control line. 5hen &5 is lo" )<*, the information on the data
bus is being "ritten to the $%!. 5hen &5 is high )7*, the program is effectively querying
)or reading* the $%!. .nly one instruction )P?et $%! statusP* is a read command. All others
are "rite commands, so &5 "ill almost al"ays be lo".'inally, the data bus consists of ; or A
32
lines )depending on the mode of operation selected by the user*. n the case of an AHbit data
bus, the lines are referred to as !#<, !#7, !#6, !#9, !#;, !#C, !#D, and !#8.
L,gi# &a&$ ,0 #,0&%,/ /i0!:
3 H < Access to $%! disabled
7 Access to $%! enabled
&/5 H < 5riting data to $%!
7 &eading data from $%!
&2 H < nstructions
7 %haracter
*%i&i0g "a&a &, &6! LCD
2et &/5 bit to lo"
2et &2 bit to logic < or 7 )instruction or character*
to data lines )if it is "riting*
2et 3 line to high
2et 3 line to lo"
R!a" "a&a 1%,( "a&a /i0! Bi1 i& i %!a"i0gC ,0 LCD
2et &/5 bit to high
2et &2 bit to logic < or 7 )instruction or character*
2et data to data lines )if it is "riting*
2et 3 line to high
2et 3 line to lo"
E0&!%i0g T!A&:
'irst, a little tip= it is manually a lot easier to enter characters and commands in
he0adecimal rather than binary )although, of course, you "ill need to translate commands
from binary couple of subHminiature he0adecimal rotary s"itches is a simple matter, although
a little bit into he0 so that you kno" "hich bits you are setting*. &eplacing the s"itch pack
"ith a reH"iring is necessary.
The s"itches must be the type "here on I <, so that "hen they are turned to the zero
position, all four outputs are shorted to the common pin, and in position Q'R, all four outputs
are open circuit.
33
All the available characters that are built into the module are sho"n in Table 9.
2tudying the table, you "ill see that codes associated "ith the characters are quoted in binary
and he0adecimal, most significant bits )QleftHhandR four bits* across the top, and least
significant bits )QrightHhandR four bits* do"n the left.
Most of the characters conform to the A2% standard, although the Uapanese and
?reek characters )and a fe" other things* are obvious e0ceptions. 2ince these intelligent
modules "ere designed in the Q$and of the &ising 2un,R it seems only fair that their Tatakana
phonetic symbols should also be incorporated. The more e0tensive Tanji character set, "hich
the Uapanese share "ith the %hinese, consisting of several thousand different characters, is not
included.
/sing the s"itches, of "hatever type, and referring to Table 9, enter a fe" characters
onto the display, both letters and numbers. The &2 s"itch )27<* must be QupR )logic 7* "hen
sending the characters, and s"itch 3 )2B* must be pressed for each of them. Thus the
operational order is= set &2 high, enter character, trigger 3, leave &2 high, enter another
character, trigger 3, and so on.
Fig 4.13. LCD Ti(i0g -a4! 1,%(.
4.4.8 I0&!%1a#i0g LCD &, (i#%,#,0&%,//!%
A typical $%! "rite operation takes place as sho"n in the follo"ing timing "aveform=
The interface is either a ;Hbit or AHbit parallel bus that allo"s fast reading/"riting of
data to and from the $%!. This "aveform "ill "rite an A2% #yte out to the $%!-s screen.
34
The A2% code to be displayed is eight bits long and is sent to the $%! either four or eight
bits at a time. f ;Hbit mode is used, t"o nibbles of data )'irst high four bits and then lo" four
bits "ith an 3 %lock pulse "ith each nibble* are sent to complete a full eightHbit transfer. The
3 %lock is used to initiate the data transfer "ithin the $%!.AHbit mode is best used "hen
speed is required in an application and at least ten /. pins are available. ;Hbit mode requires
a minimum of si0 bits. n ;Hbit mode, only the top ; data bits )!#;H8* are used. The &/2 pin
is used to select "hether data or an instruction is being transferred bet"een the
microcontroller and the $%!. f the pin is high, then the byte at the current $%! %ursor
:osition can be read or "ritten.
'?.;.6.C (T3&'A%(? .' M%&.%.(T&.$$3& 5T+ $%!
4.5 MICROCONTROLLER
CHAPTER 2
ARM Architecture
35
MC
E
R/W
WR
S
DB7DB0
LCD
co!"o#
co$$%&c'!
&o( )%(
Microcontroller
8
ARM Architecture
ARM History
Architecture
ARM register fle & modes of operation
Instruction et
ARM History
36
T*+ ARM ,Acorn RIC Machine-'"c*&!+c!%"+ &( .+/+#o0+. '! Ac"o
Co$0%!+" L&$&!+. o1 C'$)"&.2+3 E2#'. )+!4++ 198351985. ARM L&$&!+.
1o%.+. & 1990. ARM )+c'$+ '( !*+ Ad!anced RIC Machine &( ' 325)&!
RISC 0"oc+((o" '"c*&!+c!%"+ !*'! &( 4&.+#6 %(+. & +$)+..+. .+(&2(. ARM co"+(
#&c+(+. !o (+$&co.%c!o" 0'"!+"( 4*o 1')"&c'!+ '. (+## !o !*+&" c%(!o$+"(.
ARM .o+( o! 1')"&c'!+ (&#&co &!(+#1
B+c'%(+ o1 !*+&" 0o4+" ('/&2 1+'!%"+(3 ARM CP7( '"+ .o$&'! &
!*+ $o)&#+ +#+c!"o&c( $'"8+!3 4*+"+ #o4 0o4+" co(%$0!&o &( ' c"&!&c'# .+(&2
2o'#. A( o1 20073 ')o%! 98 0+"c+! o1 !*+ $o"+ !*' ' )&##&o $o)&#+ 0*o+( (o#.
+'c* 6+'" %(+ '! #+'(! o+ ARM CP7.
To.'63 !*+ ARM 1'$&#6 'cco%!( 1o" '00"o9&$'!+#6 75: o1 '##
+$)+..+. 325)&! RISC CP7(3 $'8&2 &! !*+ $o(! 4&.+#6 %(+. 325)&! '"c*&!+c!%"+.
ARM CP7( '"+ 1o%. & $o(! co"+"( o1 co(%$+" +#+c!"o&c(3 1"o$ 0o"!')#+
.+/&c+( ,PDA(3 $o)&#+ 0*o+(3 &Po.( '. o!*+" .&2&!'# $+.&' '. $%(&c 0#'6+"(3
*'.*+#. 2'$&2 %&!(3 '. c'#c%#'!o"(- !o co$0%!+" 0+"&0*+"'#( ,*'". ."&/+(3
.+(8!o0 "o%!+"(-.
ARM .o+( o! $'%1'c!%"+ !*+ CP7 &!(+#13 )%! #&c+(+( &! !o o!*+"
$'%1'c!%"+"( !o &!+2"'!+ !*+$ &!o !*+&" o4 (6(!+$
ARM architecture
RIC"
RISC3 o" Reduced Instruction Set Computer. &( ' !60+ o1 $&c"o0"oc+((o"
'"c*&!+c!%"+ !*'! %!&#&;+( ' ($'##3 *&2*#65o0!&$&;+. (+! o1 &(!"%c!&o(3 "'!*+" !*'
' $o"+ (0+c&'#&;+. (+! o1 &(!"%c!&o( o1!+ 1o%. & o!*+" !60+( o1 '"c*&!+c!%"+(.
37
History "
T*+ <"(! RISC 0"o=+c!( c'$+ 1"o$ IBM3 S!'1o".3 '. 7C5B+"8+#+6 & !*+ #'!+ 70(
'. +'"#6 80(. T*+ IBM 8013 S!'1o". MIPS3 '. B+"8+#+6 RISC 1 '. 2 4+"+ '##
.+(&2+. 4&!* ' (&$&#'" 0*&#o(o0*6 4*&c* *'( )+co$+ 8o4 '( RISC. C+"!'&
.+(&2 1+'!%"+( *'/+ )++ c*'"'c!+"&(!&c o1 $o(! RISC 0"oc+((o"(>
one cycle execution time " RISC 0"oc+((o"( *'/+ ' CPI ,c#oc8 0+"
&(!"%c!&o- o1 o+ c6c#+. T*&( &( .%+ !o !*+ o0!&$&;'!&o o1 +'c* &(!"%c!&o
o !*+ CP7 '. ' !+c*&?%+ c'##+. @
pipelining " ' !+c*&?%+ !*'! '##o4( 1o" (&$%#!'+o%( +9+c%!&o o1 0'"!(3 o"
(!'2+(3 o1 &(!"%c!&o( !o $o"+ +Ac&+!#6 0"oc+(( &(!"%c!&o(@
large number of registers " !*+ RISC .+(&2 0*&#o(o0*6 2++"'##6
&co"0o"'!+( ' #'"2+" %$)+" o1 "+2&(!+"( !o 0"+/+! & #'"2+ '$o%!( o1
&!+"'c!&o( 4&!* $+$o"6

%2% &2%
:rice/:erformance 2trategies
:rice= move comple0ity from soft"are to
hard"are.
:erformance= make tradeoffs in favor of decreased
code size, at the e0pense of a higher %:.
:rice= move comple0ity from hard"are to soft"are
:erformance= make tradeoffs in favor of a lo"er
%:, at the e0pense of increased code size.
!esign !ecisions
30ecution of instructions takes many
cycles
2imple, singleHcycle instructions that
perform only basic functions. Assembler
38
!esign rules are simple thus core operates
at higher clock frequencies
MemoryHtoHmemory addressing modes.
A microcode control unit.
2pend fe"er transistors on registers.
instructions correspond to microcode
instructions on a %2% machine.
!esign rules are more comple0 and operates
at lo"er clock frequencies
2imple addressing modes that allo" only
$.A! and 2T.&3 to access memory. All
operations are registerHtoHregister.
direct e0ecution control unit.
spend more transistors on multiple banks of
registers.
use pipelined e0ecution to lo"er %:.
B'(+. %0o RISC A"c*&!+c!%"+ 4&!* +*'c+$+!( !o $++! "+?%&"+$+!( o1
+$)+..+. '00#&c'!&o( ARM &( *'/&2
7. A large uniform register file
6. $oadHstore architecture ,"here data processing operations operate on register
contents only
9. /niform and fi0ed length instructions
;. 96 Hbit processor
C. nstructions are 96Hbit long
D. ?ood 2peed/:o"er %onsumption &atio
8. +igh %ode !ensity
39
Har!ard architecture *'( (+0'"'!+ .'!' '. &(!"%c!&o )%((+(3 '##o4&2
!"'(1+"( !o )+ 0+"1o"$+. (&$%#!'+o%(#6 o )o!* )%((+( . B"+'!+" '$o%! o1
&(!"%c!&o 0'"'##+#&($ &( 0o((&)#+ & !*&( '"c*&!+c!%"+. Mo(! DSP( %(+ C'"/'".
'"c*&!+c!%"+ 1o" (!"+'$&2 .'!'. T*+ o#6 .&D+"+c+ & C'"/'". '"c*&!+c!%"+ !o
!*'! o1 #on $eumann architecture &( !*'! !*+ 0"o2"'$ '. .'!' $+$o"&+(
'"+ (+0'"'!+. '. %(+ 0*6(&c'##6 (+0'"'!+ !"'($&((&o 0'!*( . E')#+( !*+
$'c*&+ !o !"'(1+" &(!"%c!&o( '. .'!' (&$%#!'+o%(#6 +*'c+(
0+"1o"$'c+. C'"/'". '"c*&!+c!%"+ &( $o"+ co$$o#6 %(+. & (0+c&'#&;+.
$&c"o0"oc+((o"( 1o" "+'#5!&$+ '. +$)+..+. '00#&c'!&o. Co4+/+"3 o#6 !*+
+'"#6 DSP c*&0( %(+ !*+ C'"/'". '"c*&!+c!%"+ )+c'%(+ o1 !*+ co(!. T*+ 2"+'!+(!
.&('./'!'2+ o1 !*+ C'"/'". '"c*&!+c!%"+ &( 4*&c* ++.( !4&c+ '( $'6 '.."+((
'. .'!' 0&( o !*+ c*&0(
A #on $eumann architecture (!o"+ 0"o2"'$ '. .'!' & !*+ ('$+ $+$o"6
'"+' 4&!* ' (&2#+ )%(. So !*&( )%( o#6 &( %(+. 1o" )o!* .'!' !"'(1+"( '.
&(!"%c!&o 1+!c*+(3 '. !*+"+1o"+ .'!' !"'(1+"( '. &(!"%c!&o 1+!c*+( $%(! )+
(c*+.%#+. 5 !*+6 c' o! )+ 0+"1o"$+. '! !*+ ('$+ !&$+. Mo(! o1 !*+ 2++"'#5
0%"0o(+ $&c"o0"oc+((o"( (%c* '( Mo!o"o#' 68000 '. I!+# 80986 %(+ !*&(
'"c*&!+c!%"+. I! &( (&$0#+ & *'".4'"+ &$0#+$+!'!&o3 )%! !*+ .'!' '. 0"o2"'$
'"+ "+?%&"+. !o (*'"+ ' (&2#+ )%(.
ARM Processor Core "
40
T*+ <2%"+ (*o4( !*+ ARM co"+ .'!'Eo4 $o.+#. I 4*&c* !*+ ARM co"+ '(
1%c!&o'# %&!( co+c!+. )6 .'!' )%(+(3. A. !*+ '""o4( "+0"+(+! !*+ Eo4 o1
.'!'3 !*+ #&+( "+0"+(+! !*+ )%(+(3 '. )o9+( "+0"+(+! +&!*+" ' o0+"'!&o %&!
o" ' (!o"'2+ '"+'. T*+ <2%"+ (*o4( o! o#6 !*+ Eo4 o1 .'!' )%! '#(o !*+
')(!"'c! co$0o+!( !*'! $'8+ %0 ' ARM co"+.
F&2 > ARM co"+ .'!'Eo4 $o.+#


I !*+ ')o/+ <2%"+ !*+ %ata +!+"( !*+ 0"oc+((o" co"+ !*"o%2* !*+ D'!'
)%(. T*+ .'!' $'6 )+ ' &(!"%c!&o !o +9+c%!+ o" ' .'!' &!+$. T*&( ARM co"+
"+0"+(+!( !*+ #on $eumann &$0#+$+!'!&o o1 !*+ ARM .'!' &!+$( '.
&(!"%c!&o( (*'"+ !*+ ('$+ )%(. I co!"'(!3 C'"/'". &$0#+$+!'!&o( o1 !*+
ARM %(+ !4o .&D+"+! )%(+(.
41
T*+ instruction decoder !"'(#'!+( &(!"%c!&o( )+1o"+ !*+6 '"+
+9+c%!+.. E'c* &(!"%c!&o +9+c%!+. )+#o2( !o ' 0'"!&c%#'" &(!"%c!&o (+!.
T*+ ARM 0"oc+((o" 3#&8+ '## RISC 0"oc+((o"(3 %(+ ' load-store architecture.
T*&( $+'( &! *'( !4o &(!"%c!&o !60+( 1o" !"'(1+""&2 .'!' & '. o%! o1 !*+
0"oc+((o" > #o'. &(!"%c!&o( co06 .'!' 1"o$ $+$o"6 !o "+2&(!+"( & !*+ co"+3 '.
co/+"(+#6 !*+ (!o"+ &(!"%c!&o( co06 .'!' 1"o$ "+2&(!+"( !o $+$o"6. T*+"+ '"+
o .'!' 0"oc+((&2 &(!"%c!&o( !*'! .&"+c!#6 $'&0%#'!+ .'!' & $+$o"6. T*%(3
.'!' 0"oc+((&2 &( c'""&+. o%! (o#+#6 & "+2&(!+"(.
D'!' &!+$( '"+ 0#'c+. & !*+ register fle ' (!o"'2+ )'8 $'.+ %0 o1
325)&! "+2&(!+"(. S&c+ !*+ ARM co"+ &( ' 325 )&! 0"oc+((o"3 $o(! &(!"%c!&o( !"+'!
!*+ "+2&(!+"( '( *o#.&2 (&2+. o" %(&2+. 325)&! /'#%+(.
T*+ sign e&tend *'".4'"+ co/+"!( (&2+. 85)&! '. 165)&! %$)+"( !o
325)&! /'#%+( '( !*+6 '"+ "+'. 1"o$ $+$o"6 '. 0#'c+. & ' "+2&(!+".
T*+ AL7 , '"&!*$+!&c #o2&c %&! - o" MAC , $%#!&0#6 'cc%$%#'!+ %&! -
!'8+( !*+ "+2&(!+" /'#%+( Rn '. Rm 1"o$ !*+ A '. B )%(+( '. co$0%!+( '
"+(%#!. D'!' 0"oc+((&2 &(!"%c!&o( 4"&!+ !*+ "+(%#! & Rd .&"+c!#6 !o !*+ "+2&(!+"
<#+. Lo'. '. (!o"+ &(!"%c!&o( %(+ !*+ AL7 !o 2++"'!+ ' '.."+(( !o )+ *+#. &
!*+ '.."+(( "+2&(!+" '. )"o'.c'(! o !*+ A.."+(( )%(.
O+ &$0o"!'! 1+'!%"+ o1 !*+ ARM &( !*'! "+2&(!+" Rm '#!+"'!&/+#6 c' )+
0"+0"oc+((+. & !*+ )'""+# (*&1!+" )+1o"+ &! +!+"( !*+ AL7. To2+!*+" !*+ )'""+#
(*&1!+" '. AL7 c' c'#c%#'!+ ' 4&.+ "'2+ o1 +90"+((&o( '. '.."+((+(.
A1!+" 0'((&2 !*"o%2* !*+ 1%c!&o'# %&!(3 !*+ "+(%#! & Rd &( 4"&!!+ )'c8
!o !*+ "+2&(!+" <#+ %(&2 !*+ Result )%(. Fo" #o'. '. (!o"+ &(!"%c!&o( !*+
&c"+$+!+" %0.'!+( !*+ '.."+(( "+2&(!+" )+1o"+ !*+ co"+ "+'.( o" 4"&!+( !*+
+9! "+2&(!+" /'#%+ 1"o$ o" !o !*+ +9! (+?%+!&'# $+$o"6 #oc'!&o. T*+
0"oc+((o" co!&%+( +9+c%!&2 &(!"%c!&o( %!&# ' +9c+0!&o o" &!+""%0!
c*'2+( !*+ o"$'# +9+c%!&o Eo4.
'ARM (us Technology "
42
E$)+..+. (6(!+$( %(+ .&D+"+! )%( !+c*o#o2&+(. Mo(! co$$o PC )%(
!+c*o#o26 &( !*+ P+"&0*+"'# Co$0o+! I!+"co+c! , PCI - )%(. W*&c* co+c!(
.+/&c+( (%c* '( /&.+o c'". '. .&(8 co!"o##+"( !o !*+ G86 0"oc+((o" )%(. T*&(
!60+ o1 !+c*o#o26 &( c'##+. E9!+"'# o" OD c*&0 )%( !+c*o#o26.
E$)+..+. .+/&c+( %(+ ' o5c*&0 )%( !*'! &( &!+"'# !o !*+ c*&0 '.
'##o4( .&D+"+! 0+"&0*+"'# .+/&c+( !o )+ &!+" co+c!+. 4&!* ' ARM co"+.
T*+"+ '"+ !4o .&D+"+! !60+( o1 .+/&c+( co+c!+. !o !*+ )%(
1. B%( M'(!+"
2. B%( S#'/+
1. (us Master " A #o2&c'# .+/&c+ c'0')#+ o1 &&!&'!&2 ' .'!' !"'(1+" 4&!*
'o!*+" .+/&c+ 'c"o(( !*+ ('$+ )%( ,ARM 0"oc+((o" co"+ &( ' )%(
M'(!+" -.
2. (us la!e " A #o2&c'# .+/&c+ c'0')#+ o#6 o1 "+(0o.&2 !o ' !"'(1+"
"+?%+(! 1"o$ ' )%( $'(!+" .+/&c+ , P+"&0*+"'#( '"+ )%( (#'/+( -
B++"'##6 A B%( *'( !4o '"c*&!+c!%"+ #+/+#(
Physical le!er " W*&c* co/+"( +#+c!"&c'# c*'"'c!+"&(!&c( ' )%( 4&.!* ,16332364
)%(-.
Protocol le!el " 4*&c* .+'#( 4&!* 0"o!oco#
NOTE >5 ARM &( 0"&$'"&#6 ' .+(&2 co$0'6 . I! (+#.o$ &$0#+$+!( !*+ +#+c!"&c'#
c*'"'c!+"&(!&c( o1 !*+ )%( 3 )%! &! "o%!&+#6 (0+c&<+( !*+ )%( 0"o!oco#
AM(A )Ad!anced Microcontroller (us Architecture *(us protocol "
AMBA B%( 4'( &!"o.%c+. & 1996 '. *'( )++ 4&.+#6 '.o0!+. '( !*+
O C*&0 )%( '"c*&!+c!%"+ %(+. 1o" ARM 0"oc+((o"(.
T*+ <"(! AMBA )%(+( 4+"+
1. ARM S6(!+$ B%( , ASB -
43
2. ARM P+"&0*+"'# B%( , APB -
L'!+" ARM &!"o.%c+. 'o!*+" )%( .+(&2 c'##+. !*+ ARM C&2* 0+"1o"$'c+ B%( ,
ACB -
7(&2 AMBA
&. P+"&0*+"'# .+(&2+"( c' "+%(+ !*+ ('$+ .+(&2 o $%#!&0#+ 0"o=+c!(
&&. A P+"&0*+"'# c' (&$0#6 )+ )o#!+. o !*+ O C*&0 )%( 4&!* o%! *'/&2 !o
"+.+(&2 ' &!+"1'c+ 1o" +'c* .&D+"+! 0"oc+((o" '"c*&!+c!%"+.
T*&( 0#%25'.50#'6 &!+"1'c+ 1o" *'".4'"+ .+/+#o0+"( &$0"o/+( '/'&#')&#&!6 '.
!&$+ !o $'"8+!.
ACB 0"o/&.+( *&2*+" .'!' !*"o%2*0%! !*' ASB )+c'%(+ &! &( )'(+. o
c+!"'#&;+. $%#!&0#+9+. )%( (c*+$+ "'!*+" !*' !*+ ASB )&.&"+c!&o'# )%(
.+(&2. T*&( c*'2+ '##o4( !*+ ACB )%( !o "% '! 4&.!*( o1 64 )&!( '. 128 )&!(
ARM &!"o.%c+. !4o /'"&'!&o( o !*+ ACB )%(
1. M%#!&5#'6+" ACB
2. ACB5L&!+
I co!"'(! !o !*+ o"&2&'# ACB 3 4*&c* '##o4( ' (&2#+ )%( $'(!+" !o )+
'c!&/+ o !*+ )%( '! '6 !&$+ 3 !*+ M%#!&5#'6+" ACB )%( '##o4( $%#!&0#+ 'c!&/+ )%(
$'(!+"(.
ACB5L&!+ &( ' (%)(+! o1 !*+ ACB )%( '. &! &( #&$&!+. !o ' (&2#+ )%( $'(!+". T*&(
)%( 4'( .+/+#o0+. 1o" .+(&2( !*'! .o o! "+?%&"+ !*+ 1%## 1+'!%"+( o1 !*+
(!'.'". ACB )%(.
ACB '. M%#!&0#+5#'6+" ACB (%00o"! !*+ ('$+ 0"o!oco# 1o" $'(!+" '.
(#'/+ )%! *'/+ .&D+"+! &!+"co+c!(. T*+ +4 &!+"co+c!( & M%#!&5#'6+" ACB
'"+ 2oo. 1o" (6(!+$( 4&!* $%#!&0#+ 0"oc+((o"(. T*+6 0+"$&! o0+"'!&o( !o occ%"
& 0'"'##+# '. '##o4 1o" *&2*+" !*"o%2*0%! "'!+(.
ARCHITECT+RE Re!isions "
3very A&M processor implementation e0ecutes a specific instruction set architecture )2A*,
44
although an 2A revision may have more than one processor implementation
The 2A has evolved to keep up "ith the demands of the embedded market. This
evolution has been carefully managed by A&M , so that code "ritten to e0ecute on an earlier
architecture revision "ill also e0ecute on a later revision of the architecture.
The nomenclature identifies individual processors and provides basic information
about the feature set.
NOMENCLATURE =
A&M uses the nomenclature sho"n belo" is to describe the processor
implementations.The letters and numbers after the "ord QA&MR indicate the features a
processor may have.
ARM I A JI ' JI K JI T JI D JI M JI I JI E JIJ JI F JI 3S J
0 V family
y V memory management / protection unit
z V cache
T V Thumb 7D bit decoder
! V UTA? debug
M V fast multiplier
V 3mbedded%3 macrocell
3 V enhanced instruction ) assumes T!M *
U V Uazelle
45
' V vector floatingHpoint unit
2 V synthesizible version

All A&M cores after the A&M8T!M include the T!M features even though they
may not include those letters after the Q A&M R label
The processor family is a group of processor implementations that share the same
hard"are characteristics. 'or e0ample, the A&M8T!M, A&M8;<T, and A&M86<T
all share the same family characteristics and belong to the A&M8 family
JTAG is described by 333 77;B.7 standard Test Access :ort and boundary scan
architecture. t is a serial protocol used by A&M to send and receive debug
information bet"een the processor core and test equipment
E!e""e"ICE acrocell is the debug hard"are built into the processor that allo"s
breakpoints and "atchpoints to be set
S#nthesi$a!le means that the processor core is supplied as source code that can be
compiled into a form easily used by 3!A tools
I0&%,"$#&i,0 &, ARM8TDMI #,%!
T*+ ARM7TDMI co"+ &( ' 325)&! +$)+..+. RISC 0"oc+((o" .+#&/+"+. '( ' *'".
$'c"oc+## o0!&$&;+. !o 0"o/&.+ !*+ )+(! co$)&'!&o o1 0+"1o"$'c+3 0o4+" '.
'"+' c*'"'c!+"&(!&c(. T*+ ARM7TDMI co"+ +')#+( (6(!+$ .+(&2+"( !o )%&#.
+$)+..+. .+/&c+( "+?%&"&2 ($'## (&;+3 #o4 0o4+" '. *&2* 0+"1o"$'c+.
ARM,T%MI -eatures
32/165)&! RISC '"c*&!+c!%"+ ,ARM /4T-
325)&! ARM &(!"%c!&o (+! 1o" $'9&$%$ 0+"1o"$'c+ '. E+9&)&#&!6
165)&! T*%$) &(!"%c!&o (+! 1o" &c"+'(+. co.+ .+(&!6
7&<+. )%( &!+"1'c+3 325)&! .'!' )%( c'""&+( )o!* &(!"%c!&o( '. .'!'
46
T*"++5(!'2+ 0&0+#&+
325)&! AL7
H+"6 ($'## .&+ (&;+ '. #o4 0o4+" co(%$0!&o
F%##6 (!'!&c o0+"'!&o
Co0"oc+((o" &!+"1'c+
E9!+(&/+ .+)%2 1'c&#&!&+( ,E$)+..+.ICE .+)%2 %&! 'cc+((&)#+ /&' ITAB
&!+"1'c+ %&!-
(enefts
B++"&c #'6o%! c' )+ 0o"!+. !o (0+c&<c 0"oc+(( !+c*o#o2&+(
7&<+. $+$o"6 )%( (&$0#&<+( SoC &!+2"'!&o 0"oc+((
ARM '. T*%$) &(!"%c!&o( (+!( c' )+ $&9+. 4&!* $&&$'# o/+"*+'. !o
(%00o"! '00#&c'!&o "+?%&"+$+!( 1o" (0++. '. co.+ .+(&!6
Co.+ 4"&!!+ 1o" ARM7TDMI5S &( )&'"65co$0'!&)#+ 4&!* o!*+" $+$)+"( o1
!*+ ARM7 F'$&#6 '. 1o"4'".( co$0'!&)#+ 4&!* ARM93 ARM9E '. ARM10
1'$&#&+(3 !*%( &!J( ?%&!+ +'(6 !o 0o"! 6o%" .+(&2 !o *&2*+" #+/+#
$&c"oco!"o##+" o" $&c"o0"oc+((o"
S!'!&c .+(&2 '. #o4+" 0o4+" co(%$0!&o '"+ +((+!&'# 1o" )'!!+"6
50o4+"+. .+/&c+(
I(!"%c!&o (+! c' )+ +9!+.+. 1o" (0+c&<c "+?%&"+$+!( %(&2
co0"oc+((o"(
E$)+..+.ICE5RT '. o0!&o'# ETM %&!( +')#+ +9!+(&/+3 "+'#5!&$+
.+)%2 1'c&#&!&+(
ARM,T%MI Microcontrollers
1. A/'&#')#+ ARM7TDMI M&c"oco!"o##+"(
2. A'#o2 D+/&c+( AD%C 7999
3. A!$+# AT91SAM7
4. F"++(c'#+ MAC7100
5. NGP/P*&#&0( LPC2000
6. ST STR710
7.T+9'( I(!"%$+!( TMS470
47

2./ ARM Register fle & modes of operation
R!gi&!% : ?eneral :urpose registers hold either data or address they are identified "ith the
letter r prefi0ed to the register number. All registers are of 96 bits.
ARM 6a 38 %!gi&!% i0 &,&a/D a// ,1 -6i#6 a%! 323bi& /,0g.
7 dedicated program counter
7 dedicated current program status register
C dedicated saved program status register,9< general purpose registers.
+o"ever these are arranged into several banks, "ith the accessible bank being
governed by the processor mode. 3ach mode can access a particular set of r<Hr76
registers, a particular r79 )the stack pointer* and r7; )link register*, r7C )the
program counter*, cpsr )the current program status register*
and privileged modes can also access a particular spsr )saved program status register*.
n user mode 7D data registers and 6 status registers are visible. !epending upon conte0t,
register r79 and r7; can also be used as ?eneral :urpose &egisters. n A&M state the
registers r< to r79 are Orthogonal that means H any instruction "hich use r< can as "ell be
used "ith any other ?eneral :urpose &egister )r7Hr79*.
The A&M processor has three registers assigned to a particular task or special function=
r79,r7; and r7C. They are frequently given different labels to differentiate them from the
other registers.
&egister r1% is traditionally used as the stack pointer )s&* and stores the head of the
stack in the current processor mode
48
&egister r1' is called the link register ) lr ( and is "here the core puts the return
address "henever it calls a subroutine.
&egister r1) is the program counter ) &c * and contains the address of the ne0t
instruction to be fetched by the processor
The register file contains all the registers available to a programmer. 5hich registers are
visible to the programmer depend upon the current mode of the processor.
C$%%!0& .%,g%a( &a&$ %!gi&!% :
The A&M core uses the cpsr to monitor and control internal operations. The cpsr is a
dedicated 96Hbit register and resides in the register file. The follo"ing figure sho"s the
generic program status register.
'ig= :rogram 2tatus &egister 'ig= :rogram 2tatus &egister
The control bit field contains the processor mode, state , and interrupt mask bits ),'*.
&eserved bits are allocated for the future versions purpose.
The (, S, % and > are condition code flags "ill be changed as a result of arithmetic
and logical operations in the processor
( = (egative. S = Sero. % = %arry. > = .verflo"
The and ' bits are the interrupt disable bits
The M<, M7, M6, M9 and M; bits are the mode bits
P%,#!,% M,"!: :rocessor modes determine "hich register are active, and access rights to
49
%:2& register itself. 3ach processor mode is either :rivileged or (onHprivileged. A&M has
seven modes. These 8 modes are divided into t"o types.
P%i4i/!g!" :3 'ull readH"rite access to the %:2&. /nder this "e are having Ab,%&D Fa&
i0&!%%$.& %!2$!&D I0&!%%$.& %!2$!&D S$.!%4i,%DS'&!( a0" U0"!1i0!"
Ab,%& B1:111C :
"hen there is a failed attempt to access memory
Fa& i0&!%%$.& R!2$!& BFI@B1:::1CC > i0&!%%$.& %!2$!&B1::1:C :
correspond to interrupt levels available on A&M
S$.!%4i,% (,"!B1::11C : state after reset and generally the mode in "hich .2 kernel
e0ecutes
S'&!( (,"!B11111C :
special version of user mode that allo"s full readH"rite access of %:2&
U0"!1i0!"B11:11C :
"hen processor encounters an undefined instruction
N,03.%i4i/!g!" :3 .nly read access to the control filed of %:2& but readH"rite access to
the condition flags.
U!%B1::::C: /ser mode is user for programs and applications. And this the normal
mode
Ba0;!" R!gi&!% :
&egister file contains in all 98 registers. 6< registers are hidden from program at different
times. These registers are called banked registers. #anked registers are available only
50
"hen the processor is in a particular mode. :rocessor modes )other than system mode* have
a set of associated banked registers that are subset of 7D register
SPSR: SPSR:
3ach privileged mode )e0cept system mode* has associated "ith it a 2ave :rogram 2tatus
&egister, or 2:2&. This 2:2& is used to save the state of %:2& )%urrent program status
&egister* "hen the privileged mode is entered in order that the user state can be fully
restored "hen the user processor is resumed
Mode %hanging =
Mode changes by "riting directly to %:2& or by hard"are "hen the processor responds to
e0ception or interrupt
51
R+2&(!+" B'8
I.&c'!+( !*'! !*+ o"$'# "+2&(!+" %(+. )6 7(+" o" S6(!+$ $o.+
*'( )++ "+0#'c+. )6 ' '#!+"'!&/+ "+2&(!+" (0+c&<c !o !*+
+9c+0!&o $o.+
To return to user mode a special return instruction is used that instructs the core to restore the
original %:2& and banked registers
ARM I0&%$#&i,0 S!&
n this chapter "e are going to discuss about the most commonly used nstruction 2et
of A&M. !ifferent A&M architectures revisions support different instructions. +o"ever ne"
revisions usually add instructions and remain back"ardly compatible. The follo"ing sho"s
the type of instructions that A&M support.
. !ata :rocessing nstructions
. #ranch nstructions
. $oadHstore nstructions
>. 2oft"are nterrupt nstruction
>. :rogram 2tatus &egister nstructions
I. Da&a P%,#!i0g I0&%$#&i,0 :3
The data processing instructions manipulate data "ithin registers. Most data
processing instructions can process one of their operands using the barrel shifter. f "e use
the S suffi0 on a data processing instruction, then it updates the flags in the c&sr* Move and
logical operations update the carry flag %, negative flag (, and Sero flag S. The carry flag is
set from the result of the barrel shift as the last bit shifted out. The ( flag is set to bit 97 of
the result. The S flag is set if the result is zero. The follo"ing instructions are !ata
processing instructions.
iC. M,4! i0&%$#&i,0: This instruction is used to move the content of one register to another
register. The belo" instructions are the Move instructions
MOV : move a 96Hbit value into a register &dI&2
MOVN : move the (.T of the 96 bit value into a register &dI W&2
52
iiC. Ba%%!/ S6i1&!% :3 A unique and po"erful feature of A&M processor is ability to shift the
96Hbit binary pattern in one of the source registers left or right by a specific number of
positions before it enters the A$/. This is done by using the #arrel shifter. This
preprocessing or shift occurs "ithin the cycle time of the instruction. The five different shift
operations that "e can use "ithin the barrel shifter given belo".
$2$ = logical shift left
$2& = logical shift right
A2& = arithmetic right shift
&.& = rotate right
&&@ = rotate right e0tended
iii. A%i&6(!&i# I0&%$#&i,0 : The arithmetic instructions implement and subtraction of 96H
bit signed and unsigned values. 2ome of the instructions of Arithmetic instructions are given
belo".
A!! =add t"o 96Hbit values.
A!% =add t"o 96Hbit values and carry
2/# =subtract t"o 96Hbit values
2#% = subtract "ith carry of t"o 96Hbit values
&2# = reverse subtract of t"o 96Hbit values
&2% = reverse subtract "ith carry of t"o 96Hbit values
i4. L,gi#a/ I0&%$#&i,0 : :erforms the logical operations on t"o source registers
A(! = logical bit"ise A(! of t"o 96Hbit values
.&& = logical bit"ise .& of t"o 96Hbit values
3.& = logical e0clusive .& of t"o 96Hbit vlaues.
#% = $ogical bit clear )A(! (.T*
4. C,(.a%i,0 I0&%$#&i,0 : The comparison instructions are used to compare or test a
register "ith a 96 bit value. They update the c&sr flag bits )(, S, %, >* according to the
result, but do not affect other registers. After the bits have been set, the information can then
be used to change program flo" by using conditional e0ecution. 5e do not need to apply the
53
S suffi0 for comparison instructions to update the flag. The follo"ing instructions are belong
%omparison instructions
%M: )compare* = flags set as a result of &7H&6
%M( )compare negated* = flags set as a result of &7N&6
T2T )test for equality of t"o 96Hbit values* = flags set as a result of &7X&6
T3Y )test for equality of t"o 96Hbit values* = flags set as a result of &7Z&6
4i. M$/&i./' I0&%$#&i,0 : The multiply instructions multiply the content of a pair of
registers and , depending upon the instruction, accumulate the results in "ith another register.
The long multiplies accumulate onto a pair of registers representing a D; bit value. The final
result is placed in a destination register or a pair of registers.
M/$ = multiply
M$A = multiply and accumulate
$ong Multiply nstructions = ):roduce D; bit values,result "ill be placed in t"o 96 bit values*
2M$A$ = signed multiply accumulate long
2M/$$ = signed multiply accumulate
/M$A$ = unsigned multiply accumulate long
/M/$$ = unsigned multiply long
II. B%a0#6 I0&%$#&i,0 :3 A branch instruction changes the flo" of e0ecution or is used to
call a routine. This type of instruction allo"s programs to have subroutines, i+,then,else
structures, and loops. The change of e0ecution flo" forces the program counter &c to point to
ne" address. The belo" sho"n instructions are #ranch instructions.
# = branch
#$ = branch "ith link
#@ = branch e0change
#$@ = branch e0change "ith link
III. L,a"3&,%! I0&%$#&i,0 :3 $oadHstore instructions transfer data bet"een memory and
processor registers.
54
There are three types of loadHstore instructions =
i. single register transferring
ii. Multiple register transfer
iii. 2"ap
Si0g/! %!gi&!% &%a01!%%i0g :3 These instructions are used for moving a single data item in
and out of a register. The data types supported are signed and unsigned "ords)96Hbit*,
half"ords)7DHbit*, and bytes. The follo"ing instructions are various loadHstore singleHregister
transfer instructions.
$!& = load "ord into a register
2T& = save byte or "ord from a register
$!&# = load byte into a register
2T&# = save byte from a register
$!&+ = load half"ord into a register
2T&+ = save half"ord into a register
$!&2# = load signed byte into a register
$!&2+ = load signed half"ord into a register
M$/&i./! %!gi&!% &%a01!% : 3 $oadHstore multiple instructions can transfer multiple registers
bet"een memory and the processor in a single instruction. The transfer occurs from a base
address register Rn pointing into memory. MultipleHregister transfer instructions are more
efficient from singleHregister transfers for moving blocks of data around memory and saving
and restoring conte0t and stacks. f an interrupt has been raised, then it has no effect until the
loadHstore multiple instruction is complete.
$!M = load multiple registers
2TM = save multiple registers
S-a. :3 The s"ap instruction is a special case of a loadHstore instruction. t s"aps the
contents of memory "ith the contents of a register. This instruction is an atoic o&erationH it
reads and "rites a location in the same bus operation, preventing any other instruction from
reading or "riting to that location until it completes.
55
IV. S,1&-a%! I0&!%%$.& I0&%$#&i,0 :3 A soft"are interrupt instruction ) S-I * causes a
soft"are interrupt e0ception, "hich provides a mechanism for applications to call operating
system routines. The follo"ing instruction comes under soft"are interrupt instruction.
25 = soft"are interrupt
V. P%,g%a( S&a&$ R!gi&!% I0&%$#&i,0 :3 The A&M instruction set provides t"o
instructions to directly control a program status ) &sr *.
M&2 = This instruction transfers the contents of either the c&sr or s&sr into a register
M2& = This instruction transfers the content of a register into the c&sr or s&sr
Together the above t"o instructions are used to read and "rite the c&sr or s&sr
56
CHAPTER /
0PC2123 MICR4C4$TR400ER
57
0PC 2123 MICR4C4$TR400ER

G!0!%a/ "!#%i.&i,0 ,1 LPC 2149:
T*+ LPC2148 $&c"oco!"o##+"( &( )'(+. o ' 325)&! ARM7TDMI5S
CP7 4&!* "+'#5!&$+ +$%#'!&o '. +$)+..+. !"'c+ (%00o"!3 !*'! co$)&+
$&c"oco!"o##+"( 4&!* +$)+..+. *&2*5(0++. E'(* $+$o"6 "'2&2 1"o$ 32 8B !o
512 8B. A 1285)&! 4&.+ $+$o"6 &!+"1'c+ '. %&?%+ 'cc+#+"'!o" '"c*&!+c!%"+
+')#+ 325)&! co.+ +9+c%!&o '! !*+ $'9&$%$ c#oc8 "'!+. Fo" c"&!&c'# co.+ (&;+
'00#&c'!&o(3 !*+ '#!+"'!&/+ 165)&! T*%$)
$o.+ "+.%c+( co.+ )6 $o"+ !*' 30 : 4&!* $&&$'# 0+"1o"$'c+ 0+'#!6.
D%+ !o !*+&" !&6 (&;+ '. #o4 0o4+" co(%$0!&o3
LPC2141/42/44/46/48 '"+ &.+'# 1o" '00#&c'!&o( 4*+"+ $&&'!%"&;'!&o &( ' 8+6
"+?%&"+$+!3 (%c* '( 'cc+(( co!"o# '. 0o&!5o15('#+. S+"&'# co$$%&c'!&o(
&!+"1'c+( "'2&2 1"o$ ' 7SB 2.0 F%##5(0++. .+/&c+3 $%#!&0#+ 7ART(3 SPI3 SSP !o
I2C5)%( '. o5c*&0 SRAM o1 8 8B %0 !o 40 8B3 $'8+ !*+(+ .+/&c+( /+"6 4+##
(%&!+. 1o" co$$%&c'!&o 2'!+4'6( '. 0"o!oco# co/+"!+"(3 (o1! $o.+$(3 /o&c+
"+co2&!&o '. #o4 +. &$'2&23 0"o/&.&2 )o!* #'"2+ )%D+" (&;+ '. *&2*
0"oc+((&2 0o4+". H'"&o%( 325)&! !&$+"(3 (&2#+ o" .%'# 105)&! ADC(3 105)&! DAC3
PWM c*'+#( '. 45 1'(! BPIO #&+( 4&!* %0 !o &+ +.2+ o" #+/+# (+(&!&/+
+9!+"'# &!+""%0! 0&( $'8+ !*+(+ $&c"oco!"o##+"( (%&!')#+ 1o" &.%(!"&'# co!"o#
'. $+.&c'# (6(!+$(.
58
5eneral o!er!ie6 of in system programming )IP*"
I5S6(!+$ P"o2"'$$&2 ,ISP- &( ' 0"oc+(( 4*+"+)6 ' )#'8 .+/&c+ $o%!+. !o '
c&"c%&! )o'". c' )+ 0"o2"'$$+. 4&!* !*+ +.5%(+" co.+ 4&!*o%! !*+ ++. !o
"+$o/+ !*+ .+/&c+ 1"o$ !*+ c&"c%&! )o'".. A#(o3 ' 0"+/&o%(#6 0"o2"'$$+. .+/&c+
c' )+ +"'(+. '. R+ 0"o2"'$$+. 4&!*o%! "+$o/'# 1"o$ !*+ c&"c%&! )o'".. I
o".+" !o 0+"1o"$ ISP o0+"'!&o( !*+ $&c"oco!"o##+" &( 0o4+"+. %0 & ' (0+c&'#
KISP $o.+L. ISP $o.+ '##o4( !*+ $&c"oco!"o##+" !o co$$%&c'!+ 4&!* '
+9!+"'# *o(! .+/&c+ !*"o%2* !*+ (+"&'# 0o"!3 (%c* '( ' PC o" !+"$&'#. T*+
$&c"oco!"o##+" "+c+&/+( co$$'.( '. .'!' 1"o$ !*+ *o(!3 +"'(+( '.
"+0"o2"'$( co.+ $+$o"63 +!c. Oc+ !*+ ISP o0+"'!&o( *'/+ )++ co$0#+!+.
!*+ .+/&c+ &( "+co<2%"+. (o !*'! &! 4&## o0+"'!+ o"$'##6 !*+ +9! !&$+ &! &(
+&!*+" "+(+! o" 0o4+" "+$o/+. '. "+'00#&+.. A## o1 !*+ P*&#&0( $&c"oco!"o##+"(
(*o4 & T')#+ 1 '. T')#+ 2 *'/+ ' 1 8)6!+ 1'c!o"65$'(8+. ROM #oc'!+. & !*+
%00+" 1 8)6!+ o1 co.+ $+$o"6 (0'c+ 1"o$ FC00 !o FFFF. T*&( 1 8)6!+ ROM &( &
'..&!&o !o !*+ $+$o"6 )#oc8( (*o4 & T')#+ 1 '. T')#+ 2. T*&( ROM &( "+1+""+.
!o '( !*+ KBoo!"o$L. T*&( Boo!"o$ co!'&( ' (+! o1 &(!"%c!&o( 4*&c* '##o4( !*+
$&c"oco!"o##+" !o 0+"1o"$ ' %$)+" o1 F#'(* 0"o2"'$$&2 '. +"'(&2
1%c!&o(. T*+ Boo!"o$ '#(o 0"o/&.+( co$$%&c'!&o( !*"o%2* !*+ (+"&'# 0o"!.
T*+ %(+ o1 !*+ Boo!"o$ &( 8+6 !o !*+ coc+0!( o1 )o!* ISP '. I5A00#&c'!&o
P"o2"'$$&2 ,IAP-. T*+ co!+!( o1 !*+ )oo!"o$ '"+ 0"o/&.+. )6 P*&#&0( '.
$'(8+. &!o +/+"6 .+/&c+. W*+ !*+ .+/&c+ &( "+(+! o" 0o4+" '00#&+.3 '. !*+
EA/ 0& &( *&2* o" '! !*+ HPP /o#!'2+3 !*+ $&c"oco!"o##+" 4&## (!'"! +9+c%!&2
&(!"%c!&o( 1"o$ +&!*+" !*+ %(+" co.+ $+$o"6 (0'c+ '! '.."+(( 0000* ,Ko"$'#
$o.+L- o" 4&## +9+c%!+ &(!"%c!&o( 1"o$ !*+ Boo!"o$ ,ISP $o.+-.
5eneral 4!er!ie6 of I$ APP0ICATI4$ PR45RAMMI$5"
59
So$+ '00#&c'!&o( $'6 *'/+ ' ++. !o )+ ')#+ !o +"'(+ '. 0"o2"'$ co.+
$+$o"6 %.+" !*+ co!"o# 1o !*+ '00#&c'!&o. Fo" +9'$0#+3 ' '00#&c'!&o $'6
*'/+ ' ++. !o (!o"+ c'#&)"'!&o &1o"$'!&o o" 0+"*'0( ++. !o )+ ')#+ !o
.o4#o'. +4 co.+ 0o"!&o(. T*&( ')&#&!6 !o +"'(+ '. 0"o2"'$ co.+ $+$o"6 &
!*+ +.5%(+" '00#&c'!&o &( KI5A00#&c'!&o P"o2"'$$&2L ,IAP-. T*+ Boo!"o$
"o%!&+( 4*&c* 0+"1o"$ 1%c!&o( o !*+ F#'(* $+$o"6 .%"&2 ISP $o.+ (%c* '(
0"o2"'$$&23 +"'(&23 '. "+'.&23 '"+ '#(o '/'&#')#+ !o +.5%(+" 0"o2"'$(.
T*%( &! &( 0o((&)#+ 1o" ' +.5%(+" '00#&c'!&o !o 0+"1o"$ o0+"'!&o( o !*+ F#'(*
$+$o"6. A co$$o +!"6 0o&! ,FFF0*- !o !*+(+ "o%!&+( *'( )++ 0"o/&.+. !o
(&$0#&16 &!+"1'c&2 !o !*+ +.5%(+"( '00#&c'!&o. F%c!&o( '"+ 0+"1o"$+. )6
(+!!&2 %0 (0+c&<c "+2&(!+"( '( "+?%&"+. )6 ' (0+c&<c o0+"'!&o '. 0+"1o"$&2 '
c'## !o !*+ co$$o +!"6 0o&!. L&8+ '6 o!*+" (%)"o%!&+ c'##3 '1!+" co$0#+!&o
o1 !*+ 1%c!&o3 co!"o# 4&## "+!%" !o !*+ +.5%(+"M( co.+. T*+ Boo!"o$ &(
(*'.o4+. 4&!* !*+ %(+" co.+ $+$o"6 & !*+ '.."+(( "'2+ 1"o$ FC00* !o
FFFF*. T*&( (*'.o4&2 &( co!"o##+. )6 !*+ ENBOOT )&! ,A7GR1.5-. W*+ (+!3
'cc+((+( !o &!+"'# co.+ $+$o"6 & !*&( '.."+(( "'2+ 4&## )+ 1"o$ !*+ )oo!
ROM. W*+ c#+'"+.3 'cc+((+( 4&## )+ 1"o$ !*+ %(+"M( co.+ $+$o"6. I! 4&## )+
NECESSARN 1o" !*+ +.5%(+"M( co.+ !o (+! !*+ ENBOOT )&! 0"&o" !o c'##&2 !*+
co$$o +!"6 0o&! 1o" IAP o0+"'!&o(3 +/+ 1o" .+/&c+( 4&!* 16 8)6!+3 32 8)6!+3
'. 64 8)6!+ o1 &!+"'# co.+ $+$o"6. ,ISP o0+"'!&o &( (+#+c!+. )6 c+"!'&
*'".4'"+ co.&!&o( '. co!"o# o1 !*+ ENBOOT )&! &( '%!o$'!&c 4*+ ISP $o.+
&( 'c!&/'!+.-.
60
-EAT+RE 4- 0PC2123)ARM,* ARCHITECT+RE
7ey features"
165)&!/325)&! ARM7TDMI5S $&c"oco!"o##+" & ' !&6 LOFP64 0'c8'2+
8 8B !o 40 8B o1 o5c*&0 (!'!&c RAM '. 32 8B !o 512 8B o1 o5c*&0 E'(*
$+$o"6@ 1285)&! 4&.+ &!+"1'c+/'cc+#+"'!o" +')#+( *&2*5(0++. 60 MC;
o0+"'!&o
I5S6(!+$ P"o2"'$$&2/I5A00#&c'!&o P"o2"'$$&2 ,ISP/IAP- /&' o5c*&0
)oo! #o'.+" (o1!4'"+3 (&2#+ E'(* (+c!o" o" 1%## c*&0 +"'(+ & 400 $( '.
0"o2"'$$&2 o1 256 B & 1 $(.
E$)+..+. ICE RT '. E$)+..+. T"'c+ &!+"1'c+( oD+" "+'#5!&$+
.+)%22&2 4&!* !*+ o5c*&0 R+'# Mo&!o" (o1!4'"+ '. *&2*5(0++. !"'c&2
o1 &(!"%c!&o +9+c%!&o
7SB 2.0 F%##5(0++. co$0#&'! .+/&c+ co!"o##+" 4&!* 2 8B o1 +.0o&! RAM
I '..&!&o3 !*+ LPC2146/48 0"o/&.+( 8 8B o1 o5c*&0 RAM 'cc+((&)#+ !o
7SB )6 DMA
O+ o" !4o ,LPC2141/42 /(3 LPC2144/46/48- 105)&! ADC( 0"o/&.+ ' !o!'# o1
6/14 ''#o2 &0%!(3 4&!* co/+"(&o !&$+( '( #o4 '( 2.44 $( 0+" c*'+#
S&2#+ 105)&! DAC 0"o/&.+( /'"&')#+ ''#o2 o%!0%! ,LPC2142/44/46/48
o#6-
T4o 325)&! !&$+"(/+9!+"'# +/+! co%!+"( ,4&!* 1o%" c'0!%"+ '. 1o%"
co$0'"+
c*'+#( +'c*-3 PWM %&! ,(&9 o%!0%!(- '. 4'!c*.o2.
Lo4 0o4+" R+'#5T&$+ C#oc8 ,RTC- 4&!* &.+0+.+! 0o4+" '. 32 8C;
c#oc8 &0%!
M%#!&0#+ (+"&'# &!+"1'c+( &c#%.&2 !4o 7ART( ,16C550-3 !4o F'(! I2C5)%(
,400 8)&!/(-3
SPI '. SSP 4&!* )%D+"&2 '. /'"&')#+ .'!' #+2!* c'0')&#&!&+(
61
H+c!o"+. I!+""%0! Co!"o##+" ,HIC- 4&!* co<2%"')#+ 0"&o"&!&+( '. /+c!o"
'.."+((+(
70 !o 45 o1 5 H !o#+"'! 1'(! 2++"'# 0%"0o(+ I/O 0&( & ' !&6 LOFP64
0'c8'2+
70 !o 21 +9!+"'# &!+""%0! 0&( '/'&#')#+
60 MC; $'9&$%$ CP7 c#oc8 '/'&#')#+ 1"o$ 0"o2"'$$')#+ o5c*&0 PLL
4&!* (+!!#&2
!&$+ o1 100 $(
O5c*&0 &!+2"'!+. o(c&##'!o" o0+"'!+( 4&!* ' +9!+"'# c"6(!'# 1"o$ 1 MC;
!o 25 MC;
Po4+" ('/&2 $o.+( &c#%.+ I.#+ '. Po4+"5.o4
I.&/&.%'# +')#+/.&(')#+ o1 0+"&0*+"'# 1%c!&o( '( 4+## '( 0+"&0*+"'#
c#oc8 (c'#&2 1o" '..&!&o'# 0o4+" o0!&$&;'!&o
P"oc+((o" 4'8+5%0 1"o$ Po4+"5.o4 $o.+ /&' +9!+"'# &!+""%0! o" BOD
S&2#+ 0o4+" (%00#6 c*&0 4&!* POR '. BOD c&"c%&!(>
CP7 o0+"'!&2 /o#!'2+ "'2+ o1 3.0 H !o 3.6 H ,3.3 H P 10 :- 4&!* 5 H !o#+"'!
I/O 0'.(.
(04C7 %IA5RAM"
62
PI$ C4$-I5+RATI4$"
63
64
65
Pin %escription"
P8.8 to P8./1 I94 Port 8" Po"! 0 &( ' 325)&! I/O 0o"! 4&!* &.&/&.%'# .&"+c!&o
co!"o#( 1o" +'c* )&!. To!'# o1 31 0&( o1 !*+ Po"! 0 c' )+ %(+. '( ' 2++"'#
0%"0o(+ )&.&"+c!&o'# .&2&!'# I/O( 4*&#+ P0.31 &( o%!0%! o#6 0&. T*+ o0+"'!&o o1
0o"! 0 0&( .+0+.( %0o !*+ 0& 1%c!&o (+#+c!+. /&' !*+ 0& co+c! )#oc8.
P8.89T:%89P;M1"

P8.8 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
T:%8 < T"'($&!!+" o%!0%! 1o" 7ART0
P;M1 < P%#(+ W&.!* Mo.%#'!o" o%!0%! 1
P8.19R:%89P;M/9EI$T8"
P8.1 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
R:%8 < R+c+&/+" &0%! 1o" 7ART0
P;M/ < P%#(+ W&.!* Mo.%#'!o" o%!0%! 3
66
EI$T8 < E9!+"'# &!+""%0! 0 &0%!
P8.29C089 CAP8.8"
P8.2 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
C08 < I2C0 c#oc8 &0%!/o%!0%!3 o0+5."'& o%!0%! ,1o" I2C5)%( co$0#&'c+-
CAP8.8 < C'0!%"+ &0%! 1o" T&$+" 03 c*'+# 0
P8./9%A89 MAT8.89EI$T1>
P8./ < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
%A8 < I2C0 .'!' &0%!/o%!0%!3 o0+5."'& o%!0%! ,1o" I2C5)%( co$0#&'c+-
MAT8.8 < M'!c* o%!0%! 1o" T&$+" 03 c*'+# 0
EI$T1 < E9!+"'# &!+""%0! 1 &0%!
P8.29C789 CAP8.19A%8.=

P8.2 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
C78 < S+"&'# c#oc8 1o" SPI03 SPI c#oc8 o%!0%! 1"o$ $'(!+" o" &0%! !o (#'/+
67
CAP8.1 < C'0!%"+ &0%! 1o" T&$+" 03 c*'+# 0
A%8.= < ADC 03 &0%! 6.
P8.>9MI489 MAT8.19A%8.,
P8.> < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
MI48 < M'(!+" I S#'/+ O7T 1o" SPI03 .'!' &0%! !o SPI $'(!+" o" .'!' o%!0%!
1"o$
SPI (#'/+.
MAT8.1 < M'!c* o%!0%! 1o" T&$+" 03 c*'+# 1
A%8., < ADC 03 &0%! 7
P8.=9M4I89 CAP8.29A%1.8
P8.= < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
M4I8 < M'(!+" o%! S#'/+ I 1o" SPI03 .'!' o%!0%! 1"o$ SPI $'(!+" o" .'!'
I0%! !o SPI (#'/+
CAP8.2 < C'0!%"+ &0%! 1o" T&$+" 03 c*'+# 2
A%1.8 < ADC 13 &0%! 03 '/'&#')#+ & LPC2144/46/48 o#6
P8.,9E089P;M29EI$T2
68
P8., < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
E08 < S#'/+ S+#+c! 1o" SPI03 (+#+c!( !*+ SPI &!+"1'c+ '( ' (#'/+
P;M2 < P%#(+ W&.!* Mo.%#'!o" o%!0%! 2
EI$T2 < E9!+"'# &!+""%0! 2 &0%!
P8.39T:%19P;M29A%1.1
P8.3 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
T:%1 < T"'($&!!+" o%!0%! 1o" 7ART1
P;M2 < P%#(+ W&.!* Mo.%#'!o" o%!0%! 4
A%1.1 < ADC 13 &0%! 13 '/'&#')#+ & LPC2144/46/48 o#6
P8.?9R:%19 P;M=9EI$T/"
P8.? < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
R:%1 < R+c+&/+" &0%! 1o" 7ART1
P;M= < P%#(+ W&.!* Mo.%#'!o" o%!0%! 6
EI$T/ < E9!+"'# &!+""%0! 3 &0%!
P8.189RT19 CAP1.89A%1.2"
69
P8.18 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
RT1 < R+?%+(! !o (+. o%!0%! 1o" 7ART13 LPC2144/46/48 o#6
CAP1.8 < C'0!%"+ &0%! 1o" T&$+" 13 c*'+# 0
A%1.2 < ADC 13 &0%! 23 '/'&#')#+ & LPC2144/46/48 o#6
P8.119CT19 CAP1.19C01"
P8.11 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
CT1 < C#+'" !o (+. &0%! 1o" 7ART13 '/'&#')#+ & LPC2144/46/48 o#6
CAP1.1 < C'0!%"+ &0%! 1o" T&$+" 13 c*'+# 1
C01 < I2C1 c#oc8 &0%!/o%!0%!3 o0+5."'& o%!0%! ,1o" I2C5)%( co$0#&'c+-
P8.129%R19MAT1.89A%1./"
P8.12 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
%R1 < D'!' S+! R+'.6 &0%! 1o" 7ART13 '/'&#')#+ & LPC2144/46/48 o#6
MAT1.8 < M'!c* o%!0%! 1o" T&$+" 13 c*'+# 0
A%1./ < ADC &0%! 33 '/'&#')#+ & LPC2144/46/48 o#6
P8.1/9%TR19 MAT1.19A%1.2"
70
P8.1/ < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
%TR1 < D'!' T+"$&'# R+'.6 o%!0%! 1o" 7ART13 LPC2144/46/48 o#6
MAT1.1 < M'!c* o%!0%! 1o" T&$+" 13 c*'+# 1
A%1.2 < ADC &0%! 43 '/'&#')#+ & LPC2144/46/48 o#6
P8.129%C%19EI$T19%A1"
P8.12 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
%C%1 < D'!' C'""&+" D+!+c! &0%! 1o" 7ART13 LPC2144/46/48 o#6
EI$T1 < E9!+"'# &!+""%0! 1 &0%!
%A1 < I2C1 .'!' &0%!/o%!0%!3 o0+5."'& o%!0%! ,1o" I2C5)%( co$0#&'c+ LOW
o !*&( 0& 4*&#+ RESET &( LOW 1o"c+( o5c*&0 )oo! #o'.+" !o !'8+ o/+" co!"o# o1
!*+ 0'"! '1!+" "+(+!
P8.1>9RI19 EI$T29A%1.>"
P8.1> < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
RI1 < R&2 I.&c'!o" &0%! 1o" 7ART13 '/'&#')#+ & LPC2144/46/48 o#6
EI$T2 < E9!+"'# &!+""%0! 2 &0%!
A%1.> < ADC 13 &0%! 53 '/'&#')#+ & LPC2144/46/48 o#6
P8.1=9EI$T89MAT8.29CAP8.2"
71
P8.1= < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
EI$T8 < E9!+"'# &!+""%0! 0 &0%!
MAT8.2 < M'!c* o%!0%! 1o" T&$+" 03 c*'+# 2
CAP8.2 < C'0!%"+ &0%! 1o" T&$+" 03 c*'+# 2
P8.1,9CAP1.29 C719MAT1.2"
P8.1, < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
CAP1.2 < C'0!%"+ &0%! 1o" T&$+" 13 c*'+# 2
C71 < S+"&'# C#oc8 1o" SSP3 c#oc8 o%!0%! 1"o$ $'(!+" o" &0%! !o (#'/+
MAT1.2 < M'!c* o%!0%! 1o" T&$+" 13 c*'+# 2
P8.139CAP1./9MI419MAT1./"
P8.13 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
CAP1./ < C'0!%"+ &0%! 1o" T&$+" 13 c*'+# 3
MI41 < M'(!+" I S#'/+ O%! 1o" SSP3 .'!' &0%! !o SPI $'(!+" o" .'!' o%!0%!
1"o$ SSP (#'/+
MAT1./ < M'!c* o%!0%! 1o" T&$+" 13 c*'+# 3
72
P8.1?9MAT1.29M4I19CAP1.2"
P8.1? < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
MAT1.2 < M'!c* o%!0%! 1o" T&$+" 13 c*'+# 2
M4I1 < M'(!+" o%! S#'/+ I 1o" SSP3 .'!' o%!0%! 1"o$ SSP $'(!+" o" .'!' I0%!
!o SSP (#'/+
CAP1.2 < C'0!%"+ &0%! 1o" T&$+" 13 c*'+# 2
P8.289MAT1./9E019EI$T/"
P8.28 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
MAT1./ < M'!c* o%!0%! 1o" T&$+" 13 c*'+# 3
E01 < S#'/+ S+#+c! 1o" SSP3 (+#+c!( !*+ SSP &!+"1'c+ '( ' (#'/+
EI$T/ < E9!+"'# &!+""%0! 3 &0%!
P8.219P;M>9A%1.=9CAP1./"
P8.21 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
P;M> < P%#(+ W&.!* Mo.%#'!o" o%!0%! 5
A%1.= < ADC 13 &0%! 63 '/'&#')#+ & LPC2144/46/48 o#6
CAP1./ < C'0!%"+ &0%! 1o" T&$+" 13 c*'+# 3
P8.229A%1.,9CAP8.89MAT8.8"
73
P8.22 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
A%1., < ADC 13 &0%! 73 '/'&#')#+ & LPC2144/46/48 o#6
CAP8.8 < C'0!%"+ &0%! 1o" T&$+" 03 c*'+# 0
MAT8.8 < M'!c* o%!0%! 1o" T&$+" 03 c*'+# 0
P8.2/9#(+"
P8.2/ < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
#(+ < I.&c'!+( !*+ 0"+(+c+ o1 7SB )%( 0o4+"
T*&( (&2'# $%(! )+ CIBC 1o" 7SB "+(+! !o occ%"
P8.2>9A%8.29A4+T"
P8.2> < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
A%8.2 < ADC 03 &0%! 4
A4+T < DAC o%!0%!3 '/'&#')#+ & LPC2142/44/46/48 o#6
P8.239A%8.19CAP8.29MAT8.2"
74
P8.23 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
A%8.1 < ADC 03 &0%! 1
CAP8.2 < C'0!%"+ &0%! 1o" T&$+" 03 c*'+# 2
MAT8.2 < M'!c* o%!0%! 1o" T&$+" 03 c*'+# 2
P8.2?9A%8.29CAP8./9MAT8./"
P8.2? < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
A%8.2 < ADC 03 &0%! 2
CAP8./ < C'0!%"+ &0%! 1o" T&$+" 03 C*'+# 3
MAT8./ < M'!c* o%!0%! 1o" T&$+" 03 c*'+# 3
P8./89A%8./9EI$T/9CAP8.8"
P8./8 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
A%8./ < ADC 03 &0%! 3
EI$T/ < E9!+"'# &!+""%0! 3 &0%!
CAP8.8 < C'0!%"+ &0%! 1o" T&$+" 03 c*'+# 0
P8./19+P@0E%9C4$$ECT
P8./1 < B++"'# 0%"0o(+ o%!0%! o#6 .&2&!'# 0& ,BPO-
75
+P@0E% < 7SB Boo. L&8 LED &.&c'!o"3 &! &( LOW 4*+ .+/&c+ &( co<2%"+.
,o5co!"o# +.0o&!( +')#+.-3 &! &( CIBC 4*+ !*+ .+/&c+ &( o! co<2%"+. o"
.%"&2 2#o)'# (%(0+.
C4$$ECT < S&2'# %(+. !o (4&!c* ' +9!+"'# 1.5 8o*$( "+(&(!o" %.+" !*+
So1!4'"+ co!"o#3 %(+. 4&!* !*+ So1! Co+c! 7SB 1+'!%"+
Important" T*&( &( ' .&2&!'# o%!0%! o#6 0&3 !*&( 0& M7ST NOT )+ +9!+"'##6
0%##+. LOW 4*+ RESET 0& &( LOW o" !*+ ITAB 0o"! 4&## )+ .&(')#+. P1.0 !o
P1.31 I/O Port 1" Po"! 1 &( ' 325)&! )&.&"+c!&o'# I/O 0o"! 4&!* &.&/&.%'# .&"+c!&o
co!"o#( 1o" +'c* )&!3 !*+ o0+"'!&o o1 0o"! 1 0&( .+0+.( %0o !*+ 0& 1%c!&o
(+#+c!+. /&' !*+ 0& co+c! )#oc83 0&( 0 !*"o%2* 15 o1 0o"! 1 '"+ o!
A/'&#')#+.
P1.1=9TRACEP7T8
P1.1= < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
TRACEP7T8 < T"'c+ P'c8+!3 )&! 03 (!'.'". I/O 0o"! 4&!* &!+"'# 0%##5%0
P1.1,9TRACEP7T1
P1.1, < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
TRACEP7T1 < T"'c+ P'c8+!3 )&! 13 (!'.'". I/O 0o"! 4&!* &!+"'# 0%##5%0
P1.139TRACEP7T2
76
P1.13 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
TRACEP7T2 < T"'c+ P'c8+!3 )&! 23 (!'.'". I/O 0o"! 4&!* &!+"'# 0%##5%0
P1.1?9TRACEP7T/
P1.1? < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
TRACEP7T/ < T"'c+ P'c8+!3 )&! 33 (!'.'". I/O 0o"! 4&!* &!+"'# 0%##5%0
P1.289TRACEA$C
P1.28 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
TRACEA$C < T"'c+ S6c*"o&;'!&o3 (!'.'". I/O 0o"! 4&!* &!+"'# 0%##5%0
$ote" LOW o !*&( 0& 4*&#+ RESET &( LOW +')#+( 0&( P1.25>16 !o o0+"'!+ '(
T"'c+ 0o"! '1!+" "+(+!
P1.219PIPETAT8
P1.21 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
PIPETAT8 < P&0+#&+ S!'!%(3 )&! 03 (!'.'". I/O 0o"! 4&!* &!+"'# 0%##5%0
P1.229PIPETAT1
P1.22 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
77
PIPETAT1 < P&0+#&+ S!'!%(3 )&! 13 (!'.'". I/O 0o"! 4&!* &!+"'# 0%##5%0
P1.2/9PIPETAT2
P1.2/ < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
PIPETAT2 < P&0+#&+ S!'!%(3 )&! 23 (!'.'". I/O 0o"! 4&!* &!+"'# 0%##5%0
P1.229TRACEC07
P1.22 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
TRACEC07 < T"'c+ C#oc83 (!'.'". I/O 0o"! 4&!* &!+"'# 0%##5%0
P1.2>9E:TI$8
P1.2> < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
E:TI$8 < E9!+"'# T"&22+" I0%!3 (!'.'". I/O 4&!* &!+"'# 0%##5%0
P1.2=9RTC7
P1.2= < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
RTC7 < R+!%"+. T+(! C#oc8 o%!0%!3 +9!"' (&2'# '..+. !o !*+ ITAB 0o"!3 '((&(!(
.+)%22+" (6c*"o&;'!&o 4*+ 0"oc+((o" 1"+?%+c6 /'"&+(3 )&.&"+c!&o'# 0&
4&!* &!+"'# 0%##5%0
78
$ote" LOW o RTCQ 4*&#+ RESET &( LOW +')#+( 0&( P1.31>26 !o o0+"'!+ '
D+)%2 0o"! '1!+" "+(+!
P1.2,9T%4
P1.2, < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
T%4 < T+(! D'!' o%! 1o" ITAB &!+"1'c+
P1.239T%I
P1.23 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
T%I < T+(! D'!' & 1o" ITAB &!+"1'c+
P1.2?9TC7
P1.2? < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
TC7 < T+(! C#oc8 1o" ITAB &!+"1'c+
P1./89TM
P1./8 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
TM < T+(! Mo.+ S+#+c! 1o" ITAB &!+"1'c+
79
P1.31/TRST
P1./1 < B++"'# 0%"0o(+ &0%!/o%!0%! .&2&!'# 0& ,BPIO-
TRT < T+(! R+(+! 1o" ITAB &!+"1'c+
%B> 7SB )&.&"+c!&o'# DR #&+
%C > 7SB )&.&"+c!&o'# D5 #&+
REET E&ternal reset input" A LOW o !*&( 0& "+(+!( !*+ .+/&c+3 c'%(&2 I/O
0o"!( '. 0+"&0*+"'#( !o !'8+ o !*+&" .+1'%#! (!'!+(3 '. 0"oc+((o" +9+c%!&o !o
)+2& '! '.."+(( 03 TTL 4&!* *6(!+"+!&c3 5 H !o#+"'!
:TA01> I0%! !o !*+ o(c&##'!o" c&"c%&! '. &!+"'# c#oc8 2++"'!o" c&"c%&!(
:TA02> O%!0%! 1"o$ !*+ o(c&##'!o" '$0#&<+"
RTC:1> I I0%! !o !*+ RTC o(c&##'!o" c&"c%&!
RTC:2> O%!0%! 1"o$ !*+ RTC o(c&##'!o" c&"c%&!
#> 63 183 253 423 50 0&( '"+ 1o" (%00#6 /o#!'2+.
5round" 0 H "+1+"+c+.
80
#A Analog ground" 0 H "+1+"+c+3 !*&( (*o%#. o$&'##6 )+ !*+ ('$+
/o#!'2+ '(
HSS3 )%! (*o%#. )+ &(o#'!+. !o $&&$&;+ o&(+ '. +""o"
#%% 2/D 2/D >1 I /./ # po6er supply" T*&( &( !*+ 0o4+" (%00#6 /o#!'2+ 1o" !*+
co"+ '. I/O 0o"!(.
#%%A , I Analog /./ # po6er supply" T*&( (*o%#. )+ o$&'##6 !*+ ('$+
/o#!'2+ '(
HDD )%! (*o%#. )+ &(o#'!+. !o $&&$&;+ o&(+ '. +""o"3 !*&( /o#!'2+ &( o#6 %(+.
!o 0o4+" !*+ o5c*&0 ADC,(- '. DAC
#RE- A%C reference !oltage" T*&( (*o%#. )+ o$&'##6 #+(( !*' o" +?%'# !o
!*+
HDD /o#!'2+ )%! (*o%#. )+ &(o#'!+. !o $&&$&;+ o&(+ '. +""o"3 #+/+# o !*&(
P& &( %(+. '( ' "+1+"+c+ 1o" ADC,(- '. DAC
#(AT RTC po6er supply !oltage" 3.3 H o !*&( 0& (%00#&+( !*+ 0o4+" !o !*+
RTC.
-unctional %escription"
Architectural 4!er!ie6"
T*+ ARM7TDMI5S &( ' 2++"'# 0%"0o(+ 325)&! $&c"o0"oc+((o"3 4*&c*
oD+"( *&2* 0+"1o"$'c+ '. /+"6 #o4 0o4+" co(%$0!&o. T*+ ARM '"c*&!+c!%"+
81
&( )'(+. o R+.%c+. I(!"%c!&o S+! Co$0%!+" ,RISC- 0"&c&0#+(3 '. !*+
&(!"%c!&o (+! '. "+#'!+. .+co.+ $+c*'&($ '"+ $%c* (&$0#+" !*' !*o(+ o1
$&c"o 0"o2"'$$+. Co$0#+9 I(!"%c!&o S+! Co$0%!+"( ,CISC-. T*&( (&$0#&c&!6
"+(%#!( & ' *&2* &(!"%c!&o !*"o%2*0%!
A. &$0"+((&/+ "+'#5!&$+ &!+""%0! "+(0o(+ 1"o$ ' ($'## '. co(!5+D+c!&/+
0"oc+((o" co"+. P&0+#&+ !+c*&?%+( '"+ +$0#o6+. (o !*'! '## 0'"!( o1 !*+
0"oc+((&2 '. $+$o"6 (6(!+$( c' o0+"'!+ co!&%o%(#6. T60&c'##63 4*&#+ o+
&(!"%c!&o &( )+&2 +9+c%!+.3 &!( (%cc+((o" &( )+&2 .+co.+.3 '. ' !*&".
&(!"%c!&o &( )+&2 1+!c*+. 1"o$ $+$o"6. T*+ ARM7TDMI5S 0"oc+((o" '#(o
+$0#o6( ' %&?%+ '"c*&!+c!%"'# (!"'!+26 8o4 '( T*%$)3 4*&c* $'8+( &! &.+'##6
(%&!+. !o *&2*5/o#%$+ '00#&c'!&o( 4&!* $+$o"6 "+(!"&c!&o(3 o" '00#&c'!&o(
4*+"+ co.+ .+(&!6 &( ' &((%+. T*+ 8+6 &.+' )+*&. T*%$) &( !*'! o1 ' (%0+"5
"+.%c+. &(!"%c!&o (+!.
E((+!&'##63 !*+ ARM7TDMI5S 0"oc+((o" *'( !4o &(!"%c!&o (+!(>
E T*+ (!'.'". 325)&! ARM (+!
E A 165)&! T*%$) (+!
T*+ T*%$) (+!M( 165)&! &(!"%c!&o #+2!* '##o4( &! !o '00"o'c* !4&c+ !*+
.+(&!6 o1 (!'.'". ARM co.+ 4*&#+ "+!'&&2 $o(! o1 !*+ ARMM( 0+"1o"$'c+
'./'!'2+ o/+" ' !"'.&!&o'# 165)&! 0"oc+((o" %(&2 165)&! "+2&(!+"(. T*&( &(
0o((&)#+ )+c'%(+ T*%$) co.+ o0+"'!+( o !*+ ('$+ 325)&! "+2&(!+" (+! '(
ARM co.+. T*%$) co.+ &( ')#+ !o 0"o/&.+ %0 !o 65 : o1 !*+ co.+ (&;+ o1 ARM3
'. 160 : o1 !*+ 0+"1o"$'c+ o1 ' +?%&/'#+! ARM 0"oc+((o" co+c!+. !o
' 165)&! $+$o"6 (6(!+$. T*+ 0'"!&c%#'" E'(* &$0#+$+!'!&o & !*+
LPC2141/42/44/46/48 '##o4( 1o" 1%## (0++. +9+c%!&o '#(o & ARM $o.+. I! &(
"+co$$+.+. !o 0"o2"'$ 0+"1o"$'c+ c"&!&c'# '. (*o"! co.+ (+c!&o( ,(%c*
'( &!+""%0! (+"/&c+ "o%!&+( '. DSP '#2o"&!*$(- & ARM $o.+. T*+ &$0'c!
o !*+ o/+"'## co.+ (&;+ 4&## )+ $&&$'# )%! !*+ (0++. c' )+ &c"+'(+. )6 30
: o/+" T*%$) $o.+.
82
4nCChip -lash Program memory"
T*+ LPC2141/42/44/46/48 &co"0o"'!+ ' 32 8B3 64 8B3 128 8B3 256 8B
'. 512 8B E'(* $+$o"6 (6(!+$ "+(0+c!&/+#6. T*&( $+$o"6 $'6 )+ %(+. 1o"
)o!* co.+ '. .'!' (!o"'2+. P"o2"'$$&2 o1 !*+ E'(* $+$o"6 $'6 )+
'cco$0#&(*+. & (+/+"'# 4'6(. I! $'6 )+ 0"o2"'$$+. I S6(!+$ /&' !*+ (+"&'#
0o"!. T*+ '00#&c'!&o 0"o2"'$ $'6 '#(o +"'(+ './o" 0"o2"'$ !*+ E'(* 4*&#+ !*+
'00#&c'!&o &( "%&23 '##o4&2 ' 2"+'! .+2"++ o1 E+9&)&#&!6 1o" .'!' (!o"'2+ <+#.
<"$4'"+ %02"'.+(3 +!c. D%+ !o !*+ '"c*&!+c!%"'# (o#%!&o c*o(+ 1o" ' o5c*&0
)oo! #o'.+"3 E'(* $+$o"6 '/'&#')#+ 1o" %(+"M( co.+ o LPC2141/42/44/46/48 &(
32 8B3 64 8B3 128 8B3 256 8B '. 500 8B "+(0+c!&/+#6.
T*+ LPC2141/42/44/46/48 E'(* $+$o"6 0"o/&.+( ' $&&$%$ o1
100000 +"'(+/4"&!+ c6c#+( '. 20 6+'"( o1 .'!'5"+!+!&o.
4nCChip tatic RAM"
O5c*&0 (!'!&c RAM $'6 )+ %(+. 1o" co.+ './o" .'!' (!o"'2+. T*+
SRAM $'6 )+ 'cc+((+. '( 85)&!3 165)&!3 '. 325)&!. T*+ LPC21413 LPC2142/44
'. LPC2146/48 0"o/&.+ 8 8B3 16 8B '. 32 8B o1 (!'!&c RAM "+(0+c!&/+#6. I
c'(+ o1 LPC2146/48 o#63 ' 8 8B SRAM )#oc8 &!+.+. !o )+ %!&#&;+. $'&#6 )6
!*+ 7SB c' '#(o )+ %(+. '( ' 2++"'# 0%"0o(+ RAM 1o" .'!' (!o"'2+ '. co.+
(!o"'2+ '. +9+c%!&o.
Memory Map"
83
T*+ LPC2141/42/44/46/48 $+$o"6 $'0 &co"0o"'!+( (+/+"'# .&(!&c!
"+2&o(3 '( (*o4 )+#o4.
84
Interrupt controller"
T*+ H+c!o"+. I!+""%0! Co!"o##+" ,HIC- 'cc+0!( '## o1 !*+
&!+""%0! "+?%+(! &0%!( '. c'!+2o"&;+( !*+$ '( F'(! I!+""%0! R+?%+(! ,FIO-3
/+c!o"+. I!+""%0! R+?%+(! ,IRO-3 '. o5/+c!o"+. IRO '( .+<+. )6
0"o2"'$$')#+ (+!!&2(. T*+ 0"o2"'$$')#+ '((&2$+! (c*+$+ $+'( !*'!
0"&o"&!&+( o1 &!+""%0!( 1"o$ !*+ /'"&o%( 0+"&0*+"'#( c' )+ .6'$&c'##6 '((&2+.
'. '.=%(!+..
F'(! &!+""%0! "+?%+(! ,FIO- *'( !*+ *&2*+(! 0"&o"&!6. I1 $o"+
!*' o+ "+?%+(! &( '((&2+. !o FIO3 !*+ HIC co$)&+( !*+ "+?%+(!( !o 0"o.%c+
!*+ FIO (&2'# !o !*+ ARM 0"oc+((o". T*+ 1'(!+(! 0o((&)#+ FIO #'!+c6 &( 'c*&+/+.
4*+ o#6 o+ "+?%+(! &( c#'((&<+. '( FIO3 )+c'%(+ !*+ !*+ FIO (+"/&c+ "o%!&+
.o+( o! ++. !o )"'c* &!o !*+ &!+""%0! (+"/&c+ "o%!&+ )%! c' "% 1"o$ !*+
&!+""%0! /+c!o" #oc'!&o. I1 $o"+ !*' o+ "+?%+(! &( '((&2+. !o !*+ FIO c#'((3
!*+ FIO (+"/&c+ "o%!&+ 4&## "+'. ' 4o". 1"o$ !*+ HIC !*'! &.+!&<+( 4*&c* FIO
(o%"c+,(- &( ,'"+- "+?%+(!&2 ' &!+""%0!.
H+c!o"+. IRO( *'/+ !*+ $&..#+ 0"&o"&!6. S&9!++ o1 !*+ &!+""%0!
"+?%+(!( c' )+ '((&2+. !o !*&( c'!+2o"6. A6 o1 !*+ &!+""%0! "+?%+(!( c' )+
'((&2+. !o '6 o1 !*+ 16 /+c!o"+. IRO (#o!(3 '$o2 4*&c* (#o! 0 *'( !*+ *&2*+(!
0"&o"&!6 '. (#o! 15 *'( !*+ #o4+(!. No5/+c!o"+. IRO( *'/+ !*+ #o4+(! 0"&o"&!6.
T*+ HIC co$)&+( !*+ "+?%+(!( 1"o$ '## !*+ /+c!o"+. '. o5
/+c!o"+. IRO( !o 0"o.%c+ !*+ IRO (&2'# !o !*+ ARM 0"oc+((o". T*+ IRO (+"/&c+
"o%!&+ c' (!'"! )6 "+'.&2 ' "+2&(!+" 1"o$ !*+ HIC '. =%$0&2 !*+"+. I1 '6 o1
!*+ /+c!o"+. IRO( '"+ 0+.&23 !*+ HIC 0"o/&.+( !*+ '.."+(( o1 !*+ *&2*+(!5
0"&o"&!6 "+?%+(!&2 IRO( (+"/&c+ "o%!&+3 o!*+"4&(+ &! 0"o/&.+( !*+ '.."+(( o1 '
.+1'%#! "o%!&+ !*'! &( (*'"+. )6 '## !*+ o5/+c!o"+. IRO(. T*+ .+1'%#! "o%!&+
c' "+'. 'o!*+" HIC "+2&(!+" !o (++ 4*'! IRO( '"+ 'c!&/+.
85
Interrupt ources"
E'c* 0+"&0*+"'# .+/&c+ *'( o+ &!+""%0! #&+ co+c!+. !o !*+
H+c!o"+. I!+""%0! Co!"o##+"3 )%! $'6 *'/+ (+/+"'# &!+"'# &!+""%0! E'2(.
I.&/&.%'# &!+""%0! E'2( $'6 '#(o "+0"+(+! $o"+ !*' o+ &!+""%0! (o%"c+.
Pin Connect (locF"
T*+ 0& co+c! )#oc8 '##o4( (+#+c!+. 0&( o1 !*+ $&c"oco!"o##+" !o
*'/+ $o"+ !*' o+ 1%c!&o. Co<2%"'!&o "+2&(!+"( co!"o# !*+ $%#!&0#+9+"( !o
'##o4 co+c!&o )+!4++ !*+ 0& '. !*+ o c*&0 0+"&0*+"'#(. P+"&0*+"'#( (*o%#.
)+ co+c!+. !o !*+ '00"o0"&'!+ 0&( 0"&o" !o )+&2 'c!&/'!+.3 '. 0"&o" !o '6
"+#'!+. &!+""%0!,(- )+&2 +')#+.. Ac!&/&!6 o1 '6 +')#+. 0+"&0*+"'# 1%c!&o
!*'! &( o! $'00+. !o ' "+#'!+. 0& (*o%#. )+ co(&.+"+. %.+<+..
T*+ P& Co!"o# Mo.%#+ 4&!* &!( 0& (+#+c! "+2&(!+"( .+<+( !*+
1%c!&o'#&!6 o1 !*+ $&c"oco!"o##+" & ' 2&/+ *'".4'"+ +/&"o$+!. A1!+" "+(+!
'## 0&( o1 Po"! 0 '. Po"! 1 '"+ co<2%"+. '( &0%! 4&!* !*+ 1o##o4&2 +9c+0!&o(>
I1 .+)%2 &( +')#+.3 !*+ ITAB 0&( 4&## '((%$+ !*+&" ITAB 1%c!&o'#&!6@ &1 !"'c+ &(
+')#+.3 !*+ T"'c+ 0&( 4&## '((%$+ !*+&" !"'c+ 1%c!&o'#&!6. T*+ 0&( '((oc&'!+.
4&!* !*+ I2C0 '. I2C1 &!+"1'c+ '"+ o0+ ."'&.
-ast 5eneral purpose Parallel I94"
D+/&c+ 0&( !*'! '"+ o! co+c!+. !o ' (0+c&<c 0+"&0*+"'#
1%c!&o '"+ co!"o##+. )6 !*+ BPIO "+2&(!+"(. P&( $'6 )+ .6'$&c'##6
co<2%"+. '( &0%!( o" o%!0%!(. S+0'"'!+ "+2&(!+"( '##o4 !*+ (+!!&2 o" c#+'"&2
o1 '6 %$)+" o1 o%!0%!( (&$%#!'+o%(#6. T*+ /'#%+ o1 !*+ o%!0%! "+2&(!+" $'6
)+ "+'. )'c83 '( 4+## '( !*+ c%""+! (!'!+ o1 !*+ 0o"! 0&(. LPC2141/42/44/46/48
&!"o.%c+( 'cc+#+"'!+. BPIO 1%c!&o( o/+" 0"&o" LPC2000 .+/&c+(>
86
E BPIO "+2&(!+"( '"+ "+#oc'!+. !o !*+ ARM #oc'# )%( 1o" !*+ 1'(!+(! 0o((&)#+ I/O
!&$&2
E M'(8 "+2&(!+"( '##o4 !"+'!&2 (+!( o1 0o"! )&!( '( ' 2"o%03 #+'/&2 o!*+" )&!(
%c*'2+.
E A## BPIO "+2&(!+"( '"+ )6!+ '.."+((')#+
E E!&"+ 0o"! /'#%+ c' )+ 4"&!!+ & o+ &(!"%c!&o
E B&!5#+/+# (+! '. c#+'" "+2&(!+"( '##o4 ' (&2#+ &(!"%c!&o !o (+! o" c#+'" '6
%$)+" o1 )&!( & o+ 0o"!
E D&"+c!&o co!"o# o1 &.&/&.%'# )&!(
E S+0'"'!+ co!"o# o1 o%!0%! (+! '. c#+'"
E A## I/O .+1'%#! !o &0%!( '1!+" "+(+!
18 Git A%C"
T*+ LPC2141/42 co!'& o+ '. !*+ LPC2144/46/48 co!'& !4o ''#o2
!o .&2&!'# co/+"!+"(. T*+(+ co/+"!+"( '"+ (&2#+ 105)&! (%cc+((&/+
'00"o9&$'!&o ''#o2 !o .&2&!'# co/+"!+"(. W*&#+ ADC0 *'( (&9 c*'+#(3 ADC1
*'( +&2*! c*'+#(. T*+"+1o"+3 !o!'# %$)+" o1 '/'&#')#+ ADC &0%!( 1o"
LPC2141/42 &( 6 '. 1o" LPC2144/46/48 &( 14.
18 Git %AC"
T*+ DAC +')#+( !*+ LPC2141/42/44/46/48 !o 2++"'!+ ' /'"&')#+
''#o2 o%!0%!. T*+ $'9&$%$ DAC o%!0%! /o#!'2+ &( !*+ HREF /o#!'2+.
87
+( 2.8 %e!ice controller"

T*+ 7SB &( ' 454&"+ (+"&'# )%( !*'! (%00o"!( co$$%&c'!&o )+!4++ '
*o(! '. ' %$)+" ,127 $'9- o1 0+"&0*+"'#(. T*+ *o(! co!"o##+" '##oc'!+( !*+
7SB )'.4&.!* !o
A!!'c*+. .+/&c+( !*"o%2* ' !o8+ )'(+. 0"o!oco#. T*+ )%( (%00o"!( *o! 0#%22&23
%0#%22&23 '. .6'$&c co<2%"'!&o o1 !*+ .+/&c+(. A## !"'('c!&o( '"+
&&!&'!+. )6 !*+ *o(! co!"o##+".
T*+ LPC2141/42/44/46/48 &( +?%&00+. 4&!* ' 7SB .+/&c+ co!"o##+" !*'!
+')#+( 12 M)&!/( .'!' +9c*'2+ 4&!* ' 7SB *o(! co!"o##+". I! co(&(!( o1 '
"+2&(!+" &!+"1'c+3 (+"&'# &!+"1'c+ +2&+3 +.0o&! )%D+" $+$o"6 '. DMA
co!"o##+". T*+ (+"&'# &!+"1'c+ +2&+ .+co.+( !*+ 7SB .'!' (!"+'$ '. 4"&!+(
.'!' !o !*+ '00"o0"&'!+ +. 0o&! )%D+" $+$o"6. T*+ (!'!%( o1 ' co$0#+!+. 7SB
!"'(1+" o" +""o" co.&!&o &( &.&c'!+. /&' (!'!%( "+2&(!+"(. A &!+""%0! &( '#(o
2++"'!+. &1 +')#+.. A DMA co!"o##+" ,'/'&#')#+ & LPC2146/48 o#6- c'
!"'(1+" .'!' )+!4++ ' +.0o&! )%D+" '. !*+ 7SB RAM.

+ART"
T*+ LPC2141/42/44/46/48 +'c* co!'&( !4o 7ART(. I '..&!&o !o
(!'.'". !"'($&! '. "+c+&/+ .'!' #&+(3 !*+ LPC2144/46/48 7ART1 '#(o 0"o/&.+
' 1%## $o.+$ co!"o# *'.(*'8+ &!+"1'c+. Co$0'"+. !o 0"+/&o%( LPC2000
$&c"oco!"o##+"(3 7ART( & LPC2141/42/44/46/48 &!"o.%c+ ' 1"'c!&o'# )'%. "'!+
2++"'!o" 1o" )o!* 7ART(3 +')#&2 !*+(+ $&c"oco!"o##+"( !o 'c*&+/+ (!'.'".
)'%. "'!+( (%c* '( 115200 4&!* '6 c"6(!'# 1"+?%+c6 ')o/+ 2 MC;. I '..&!&o3
88
'%!o5CTS/RTS Eo45co!"o# 1%c!&o( '"+ 1%##6 &$0#+$+!+. & *'".4'"+ ,7ART1 &
LPC2144/46/48 o#6-.
I2C (us erial I94 Controller
T*+ LPC2141/42/44/46/48 +'c* co!'&( !4o I2C5)%( co!"o##+"(.
T*+ I2C5)%( &( )&.&"+c!&o'#3 1o" &!+"5IC co!"o# %(&2 o#6 !4o 4&"+(> ' (+"&'#
c#oc8 #&+ ,SCL-3 '. ' (+"&'# .'!' #&+ ,SDA-. E'c* .+/&c+ &( "+co2&;+. )6 '
%&?%+ '.."+(( '. c' o0+"'!+ '( +&!*+" ' "+c+&/+"5o#6 .+/&c+ ,+.2.3 ' LCD
."&/+" o" ' !"'($&!!+" 4&!* !*+ c'0')&#&!6 !o )o!* "+c+&/+ '. (+. &1o"$'!&o
,(%c* '( $+$o"6--. T"'($&!!+"( './o" "+c+&/+"( c' o0+"'!+ & +&!*+" $'(!+" o"
(#'/+ $o.+3 .+0+.&2 o 4*+!*+" !*+ c*&0 *'( !o &&!&'!+ ' .'!' !"'(1+" o" &(
o#6 '.."+((+.. T*+ I2C5)%( &( ' $%#!&5$'(!+" )%(@ &! c' )+ co!"o##+. )6 $o"+
!*' o+ )%( $'(!+" co+c!+. !o &!. T*+ I2C5)%( &$0#+$+!+. &
LPC2141/42/44/46/48 (%00o"!( )&! "'!+( %0 !o 400 8)&!/( ,F'(! I2C5)%(-.
PI erial I94 Controller"
T*+ LPC2141/42/44/46/48 +'c* co!'& o+ SPI co!"o##+". T*+ SPI &(
' 1%## .%0#+9 (+"&'# &!+"1'c+3 .+(&2+. !o *'.#+ $%#!&0#+ $'(!+"( '. (#'/+(
co+c!+. !o ' 2&/+ )%(. O#6 ' (&2#+ $'(!+" '. ' (&2#+ (#'/+ c'
co$$%&c'!+ o !*+ &!+"1'c+ .%"&2 ' 2&/+ .'!' !"'(1+". D%"&2 ' .'!'
!"'(1+" !*+ $'(!+" '#4'6( (+.( ' )6!+ o1 .'!' !o !*+ (#'/+3 '. !*+ (#'/+
'#4'6( (+.( ' )6!+ o1 .'!' !o !*+ $'(!+".
89
P erial I94 Controller
T*+ LPC2141/42/44/46/48 +'c* co!'&( o+ SSP. T*+ SSP
co!"o##+" &( c'0')#+ o1 o0+"'!&o o ' SPI3 454&"+ SSI3 o" M&c"o 4&"+ )%(. I! c'
&!+"'c! 4&!* $%#!&0#+ $'(!+"( '. (#'/+( o !*+ )%(. Co4+/+"3 o#6 ' (&2#+
$'(!+" '. ' (&2#+ (#'/+ c' co$$%&c'!+ o !*+ )%( .%"&2 ' 2&/+ .'!'
!"'(1+". T*+ SSP (%00o"!( 1%## .%0#+9 !"'(1+"(3 4&!* .'!' 1"'$+( o1 4 )&!( !o 16
)&!( o1 .'!' Eo4&2 1"o$ !*+ $'(!+" !o !*+ (#'/+ '. 1"o$ !*+ (#'/+ !o !*+
$'(!+". O1!+ o#6 o+ o1 !*+(+ .'!' Eo4( c'""&+( $+'&21%# .'!'.
5eneral Purpose timers9e&ternal e!ent counters
T*+ T&$+"/Co%!+" &( .+(&2+. !o co%! c6c#+( o1 !*+ 0+"&0*+"'#
c#oc8 ,PCLQ- o" ' +9!+"'##6 (%00#&+. c#oc8 '. o0!&o'##6 2++"'!+ &!+""%0!( o"
0+"1o"$ o!*+" 'c!&o( '! (0+c&<+. !&$+" /'#%+(3 )'(+. o 1o%" $'!c* "+2&(!+"(. I!
'#(o &c#%.+( 1o%" c'0!%"+ &0%!( !o !"'0 !*+ !&$+" /'#%+ 4*+ ' &0%! (&2'#(
!"'(&!&o(3 o0!&o'##6 2++"'!&2 ' &!+""%0!. M%#!&0#+ 0&( c' )+ (+#+c!+. !o
0+"1o"$ ' (&2#+ c'0!%"+ o" $'!c* 1%c!&o3 0"o/&.&2 ' '00#&c'!&o 4&!* So"M
'. S'.M3 '( 4+## '( S)"o'.c'(!M 1%c!&o( '$o2 !*+$. T*+
LPC2141/42/44/46/48 c' co%! +9!+"'# +/+!( o o+ o1 !*+ c'0!%"+ &0%!( &1
!*+ $&&$%$ +9!+"'# 0%#(+ &( +?%'# o" #o2+" !*' ' 0+"&o. o1 !*+ PCLQ. I !*&(
co<2%"'!&o3 %%(+. c'0!%"+ #&+( c' )+ (+#+c!+. '( "+2%#'" !&$+" c'0!%"+
&0%!(3 o" %(+. '( +9!+"'# &!+""%0!(.
;atchdog Timer
T*+ 0%"0o(+ o1 !*+ 4'!c*.o2 &( !o "+(+! !*+ $&c"oco!"o##+" 4&!*& '
"+'(o')#+ '$o%! o1 !&$+ &1 &! +!+"( ' +""o+o%( (!'!+. W*+ +')#+.3 !*+
4'!c*.o2 4&## 2++"'!+ ' (6(!+$ "+(+! &1 !*+ %(+" 0"o2"'$ 1'&#( !o S1++.M ,o"
"+#o'.- !*+ 4'!c*.o2 4&!*& ' 0"+.+!+"$&+. '$o%! o1 !&$+.
90
Real Time ClocF"
T*+ RTC &( .+(&2+. !o 0"o/&.+ ' (+! o1 co%!+"( !o $+'(%"+ !&$+
4*+ o"$'# o" &.#+ o0+"'!&2 $o.+ &( (+#+c!+.. T*+ RTC *'( )++ .+(&2+. !o
%(+ #&!!#+ 0o4+"3 $'8&2 &! (%&!')#+ 1o" )'!!+"6 0o4+"+. (6(!+$( 4*+"+ !*+ CP7
&( o! "%&2 co!&%o%(#6 ,I.#+ $o.+-.
Pulse 6idth modulator
T*+ PWM &( )'(+. o !*+ (!'.'". !&$+" )#oc8 '. &*+"&!( '## o1 &!(
1+'!%"+(3 '#!*o%2* o#6 !*+ PWM 1%c!&o &( 0&+. o%! o !*+
LPC2141/42/44/46/48. T*+ !&$+" &( .+(&2+. !o co%! c6c#+( o1 !*+ 0+"&0*+"'#
c#oc8 ,PCLQ- '. o0!&o'##6 2++"'!+ &!+""%0!( o" 0+"1o"$ o!*+" 'c!&o( 4*+
(0+c&<+. !&$+" /'#%+( occ%"3 )'(+. o (+/+ $'!c* "+2&(!+"(. T*+ PWM 1%c!&o
&( '#(o )'(+. o $'!c* "+2&(!+" +/+!(.

T*+ ')&#&!6 !o (+0'"'!+#6 co!"o# "&(&2 '. 1'##&2 +.2+ #oc'!&o( '##o4(
!*+ PWM !o )+ %(+. 1o" $o"+ '00#&c'!&o(. Fo" &(!'c+3 $%#!&50*'(+ $o!o"
co!"o# !60&c'##6 "+?%&"+( !*"++ o5o/+"#'00&2 PWM o%!0%!( 4&!* &.&/&.%'#
co!"o# o1 '## !*"++ 0%#(+ 4&.!*( '. 0o(&!&o(.

T4o $'!c* "+2&(!+"( c' )+ %(+. !o 0"o/&.+ ' (&2#+ +.2+ co!"o##+.
PWM o%!0%!. O+ $'!c* "+2&(!+" ,MR0- co!"o#( !*+ PWM c6c#+ "'!+3 )6 "+(+!!&2
!*+ co%! %0o $'!c*. T*+ o!*+" $'!c* "+2&(!+" co!"o#( !*+ PWM +.2+ 0o(&!&o.
A..&!&o'# (&2#+ +.2+ co!"o##+. PWM o%!0%!( "+?%&"+ o#6 o+ $'!c* "+2&(!+"
+'c*3 (&c+ !*+ "+0+!&!&o "'!+ &( !*+ ('$+ 1o" '## PWM o%!0%!(. M%#!&0#+ (&2#+
+.2+ co!"o##+. PWM o%!0%!( 4&## '## *'/+ ' "&(&2 +.2+ '! !*+ )+2&&2 o1 +'c*
PWM c6c#+3 4*+ ' MR0 $'!c* occ%"(.
T*"++ $'!c* "+2&(!+"( c' )+ %(+. !o 0"o/&.+ ' PWM o%!0%! 4&!*
)o!* +.2+( co!"o##+.. A2'&3 !*+ MR0 $'!c* "+2&(!+" co!"o#( !*+ PWM c6c#+
"'!+. T*+ o!*+" $'!c* "+2&(!+"( co!"o# !*+ !4o PWM +.2+ 0o(&!&o(. A..&!&o'#
.o%)#+ +.2+ co!"o##+. PWM o%!0%!( "+?%&"+ o#6 !4o $'!c*+( "+2&(!+"( +'c*3
91
(&c+ !*+ "+0+!&!&o "'!+ &( !*+ ('$+ 1o" '## PWM o%!0%!(. W&!* .o%)#+ +.2+
co!"o##+. PWM o%!0%!(3 (0+c&<c $'!c* "+2&(!+"( co!"o# !*+ "&(&2 '. 1'##&2
+.2+ o1 !*+ o%!0%!. T*&( '##o4( )o!* 0o(&!&/+ 2o&2 PWM 0%#(+( ,4*+ !*+ "&(&2
+.2+ occ%"( 0"&o" !o !*+ 1'##&2 +.2+-3 '. +2'!&/+ 2o&2 PWM 0%#(+( ,4*+ !*+
1'##&2 +.2+ occ%"( 0"&o" !o !*+ "&(&2 +.2+-.
ystem Control
1. Crystal 4scillator>
O5c*&0 &!+2"'!+. o(c&##'!o" o0+"'!+( 4&!* +9!+"'# c"6(!'# &
"'2+ o1 1 MC; !o 25 MC;. T*+ o(c&##'!o" o%!0%! 1"+?%+c6 &( c'##+. 1o(c '. !*+
ARM 0"oc+((o" c#oc8 1"+?%+c6 &( "+1+""+. !o '( CCLQ 1o" 0%"0o(+( o1 "'!+
+?%'!&o(3 +!c. 1o(c '. CCLQ '"+ !*+ ('$+ /'#%+ %#+(( !*+ PLL &( "%&2 '.
co+c!+..
2. P00"
T*+ PLL 'cc+0!( ' &0%! c#oc8 1"+?%+c6 & !*+ "'2+ o1 10
MC; !o 25 MC;. T*+ &0%! 1"+?%+c6 &( $%#!&0#&+. %0 &!o !*+ "'2+ o1 10 MC; !o
60 MC; 4&!* ' C%""+! Co!"o##+. O(c&##'!o" ,CCO-. T*+ $%#!&0#&+" c' )+ '
&!+2+" /'#%+ 1"o$ 1 !o 32 ,& 0"'c!&c+3 !*+ $%#!&0#&+" /'#%+ c'o! )+ *&2*+"
!*' 6 o !*&( 1'$&#6 o1 $&c"oco!"o##+"( .%+ !o !*+ %00+" 1"+?%+c6 #&$&! o1 !*+
CP7-. T*+ CCO o0+"'!+( & !*+ "'2+ o1 156 MC; !o 320 MC;3 (o !*+"+ &( '
'..&!&o'# .&/&.+" & !*+ #oo0 !o 8++0 !*+ CCO 4&!*& &!( 1"+?%+c6 "'2+ 4*&#+
!*+ PLL &( 0"o/&.&2 !*+ .+(&"+. o%!0%! 1"+?%+c6. T*+ o%!0%! .&/&.+" $'6 )+ (+!
!o .&/&.+ )6 23 43 83 o" 16 !o 0"o.%c+ !*+ o%!0%! c#oc8. S&c+ !*+ $&&$%$ o%!0%!
.&/&.+" /'#%+ &( 23 &! &( &(%"+. !*'! !*+ PLL o%!0%! *'( ' 50 : .%!6 c6c#+. T*+ PLL
&( !%"+. oD '. )60'((+. 1o##o4&2 ' c*&0 "+(+! '. $'6 )+ +')#+. )6
(o1!4'"+. T*+ 0"o2"'$ $%(! co<2%"+ '. 'c!&/'!+ !*+ PLL3 4'&! 1o" !*+ PLL !o
Loc83 !*+ co+c! !o !*+ PLL '( ' c#oc8 (o%"c+. T*+ PLL (+!!#&2 !&$+ &( 100 $(.
92
/. Reset and ;aFe up Timer"
R+(+! *'( !4o (o%"c+( o !*+ LPC2141/42/44/46/48> !*+
RESET 0& '. 4'!c*.o2 "+(+!. T*+ RESET 0& &( ' Sc*$&!! !"&22+" &0%! 0& 4&!*
' '..&!&o'# 2#&!c* <#!+". A((+"!&o o1 c*&0 "+(+! )6 '6 (o%"c+ (!'"!( !*+ W'8+5
%0 T&$+" ,(++ W'8+5%0 T&$+" .+(c"&0!&o )+#o4-3 c'%(&2 !*+ &!+"'# c*&0 "+(+!
!o "+$'& '((+"!+. %!&# !*+ +9!+"'# "+(+! &( .+5'((+"!+.3 !*+ o(c&##'!o" &(
"%&23 ' <9+. %$)+" o1 c#oc8( *'/+ 0'((+.3 '. !*+ o5c*&0 E'(* co!"o##+"
*'( co$0#+!+. &!( &&!&'#&;'!&o.

W*+ !*+ &!+"'# "+(+! &( "+$o/+.3 !*+ 0"oc+((o" )+2&(
+9+c%!&2 '! '.."+(( 03 4*&c* &( !*+ "+(+! /+c!o". A! !*'! 0o&!3 '## o1 !*+
0"oc+((o" '. 0+"&0*+"'# "+2&(!+"( *'/+ )++ &&!&'#&;+. !o 0"+.+!+"$&+. /'#%+(.
T*+ W'8+5%0 T&$+" +(%"+( !*'! !*+ o(c&##'!o" '. o!*+"
''#o2 1%c!&o( "+?%&"+. 1o" c*&0 o0+"'!&o '"+ 1%##6 1%c!&o'# )+1o"+ !*+
0"oc+((o" &( '##o4+. !o +9+c%!+ &(!"%c!&o(. T*&( &( &$0o"!'! '! 0o4+" o3 '##
!60+( o1 "+(+!3 '. 4*++/+" '6 o1 !*+ '1o"+$+!&o+. 1%c!&o( '"+ !%"+. oD
1o" '6 "+'(o. S&c+ !*+ o(c&##'!o" '. o!*+" 1%c!&o( '"+ !%"+. oD .%"&2
Po4+"5.o4 $o.+3 '6 4'8+5%0 o1 !*+ 0"oc+((o" 1"o$ Po4+"5.o4 $o.+ $'8+(
%(+ o1 !*+ W'8+5%0 T&$+".
T*+ W'8+5%0 T&$+" $o&!o"( !*+ c"6(!'# o(c&##'!o" '( !*+
$+'( o1 c*+c8&2 4*+!*+" &! &( ('1+ !o )+2& co.+ +9+c%!&o. W*+ 0o4+" &(
'00#&+. !o !*+ c*&03 o" (o$+ +/+! c'%(+. !*+ c*&0 !o +9&! Po4+"5.o4 $o.+3
(o$+ !&$+ &( "+?%&"+. 1o" !*+ o(c&##'!o" !o 0"o.%c+ ' (&2'# o1 (%Ac&+!
'$0#&!%.+ !o ."&/+ !*+ c#oc8 #o2&c. T*+ '$o%! o1 !&$+ .+0+.( o $'6 1'c!o"(3
&c#%.&2 !*+ "'!+ o1 HDD "'$0 ,& !*+ c'(+ o1 0o4+" o-3 !*+ !60+ o1 c"6(!'# '.
&!( +#+c!"&c'# c*'"'c!+"&(!&c( ,&1 ' ?%'"!; c"6(!'# &( %(+.-3 '( 4+## '( '6 o!*+"
93
+9!+"'# c&"c%&!"6 ,+.2. c'0'c&!o"(-3 '. !*+ c*'"'c!+"&(!&c( o1 !*+ o(c&##'!o" &!(+#1
%.+" !*+ +9&(!&2 '$)&+! co.&!&o(.
2. (ro6n out %etector

T*+ LPC2141/42/44/46/48 &c#%.+( 25(!'2+ $o&!o"&2 o1 !*+
/o#!'2+ o !*+ HDD 0&(. I1 !*&( /o#!'2+ 1'##( )+#o4 2.9 H3 !*+ BOD '((+"!( '
&!+""%0! (&2'# !o !*+ HIC. T*&( (&2'# c' )+ +')#+. 1o" &!+""%0!@ &1 o!3
(o1!4'"+ c' $o&!o" !*+ (&2'# )6 "+'.&2 .+.&c'!+. "+2&(!+".
T*+ (+co. (!'2+ o1 #o4 /o#!'2+ .+!+c!&o '((+"!( "+(+! !o
&'c!&/'!+ !*+ LPC2141/42/44/46/48 4*+ !*+ /o#!'2+ o !*+ HDD 0&( 1'##(
)+#o4 2.6 H. T*&( "+(+! 0"+/+!( '#!+"'!&o o1 !*+ E'(* '( o0+"'!&o o1 !*+ /'"&o%(
+#+$+!( o1 !*+ c*&0 4o%#. o!*+"4&(+ )+co$+ %"+#&')#+ .%+ !o #o4 /o#!'2+. T*+
BOD c&"c%&! $'&!'&( !*&( "+(+! .o4 )+#o4 1 H3 '! 4*&c* 0o&! !*+ POR c&"c%&!"6
$'&!'&( !*+ o/+"'## "+(+!.
Bo!* !*+ 2.9 H '. 2.6 H !*"+(*o#.( &c#%.+ (o$+ *6(!+"+(&(. I o"$'#
o0+"'!&o3 !*&( *6(!+"+(&( '##o4( !*+ 2.9 H .+!+c!&o !o "+#&')#6 &!+""%0!3 o" '
"+2%#'"#65+9+c%!+. +/+! #oo0 !o (+(+ !*+ co.&!&o.
>. Code ecurity
T*&( 1+'!%"+ o1 !*+ LPC2141/42/44/46/48 '##o4( ' '00#&c'!&o !o
co!"o# 4*+!*+" &! c' )+ .+)%22+. o" 0"o!+c!+. 1"o$ o)(+"/'!&o. I1 '1!+" "+(+!
o5c*&0 )oo! #o'.+" .+!+c!( ' /'#&. c*+c8(%$ & E'(* '. "+'.( 098765 4321
1"o$ '.."+(( 091FC & E'(*3 .+)%22&2 4&## )+ .&(')#+. '. !*%( !*+ co.+ &
E'(* 4&## )+ 0"o!+c!+. 1"o$ o)(+"/'!&o. Oc+ .+)%22&2 &( .&(')#+.3 &! c' )+
+')#+. o#6 )6 0+"1o"$&2 ' 1%## c*&0 +"'(+ %(&2 !*+ ISP.
94
=. E&ternal Interrupt Inputs"

T*+ LPC2141/42/44/46/48 &c#%.+ %0 !o &+ +.2+ o" #+/+#
(+(&!&/+ E9!+"'# I!+""%0! I0%!( '( (+#+c!')#+ 0& 1%c!&o(. W*+ !*+ 0&( '"+
co$)&+.3 +9!+"'# +/+!( c' )+ 0"oc+((+. '( 1o%" &.+0+.+! &!+""%0!
(&2'#(. T*+ E9!+"'# I!+""%0! I0%!( c' o0!&o'##6 )+ %(+. !o 4'8+5%0 !*+
0"oc+((o" 1"o$ Po4+"5.o4 $o.+. A..&!&o'##6 c'0!%"+ &0%! 0&( c' '#(o )+
%(+. '( +9!+"'# &!+""%0!( 4&!*o%! !*+ o0!&o !o 4'8+ !*+ .+/&c+ %0 1"o$ Po4+"5
.o4 $o.+.
,. Memory Mapping Control
T*+ M+$o"6 M'00&2 Co!"o# '#!+"( !*+ $'00&2 o1 !*+ &!+""%0!
/+c!o"( !*'! '00+'" )+2&&2 '! '.."+(( 090000 0000. H+c!o"( $'6 )+ $'00+.
!o !*+ )o!!o$ o1 !*+ o5c*&0 E'(* $+$o"63 o" !o !*+ o5c*&0 (!'!&c RAM. T*&(
'##o4( co.+ "%&2 & .&D+"+! $+$o"6 (0'c+( !o *'/+ co!"o# o1 !*+ &!+""%0!(.
3. Po6er Control
T*+ LPC2141/42/44/46/48 (%00o"!( !4o "+.%c+. 0o4+" $o.+(> I.#+
$o.+ '.
Po4+"5.o4 $o.+.

I I.#+ $o.+3 +9+c%!&o o1 &(!"%c!&o( &( (%(0+.+. %!&# +&!*+" '
"+(+! o" &!+""%0! occ%"(. P+"&0*+"'# 1%c!&o( co!&%+ o0+"'!&o .%"&2 &.#+
$o.+ '. $'6 2++"'!+ &!+""%0!( !o c'%(+ !*+ 0"oc+((o" !o "+(%$+ +9+c%!&o.
95
I.#+ $o.+ +#&$&'!+( 0o4+" %(+. )6 !*+ 0"oc+((o" &!(+#13 $+$o"6 (6(!+$( '.
"+#'!+. co!"o##+"(3 '. &!+"'# )%(+(.
I Po4+"5.o4 $o.+3 !*+ o(c&##'!o" &( (*%! .o4 '. !*+ c*&0
"+c+&/+( o &!+"'# c#oc8(. T*+ 0"oc+((o" (!'!+ '. "+2&(!+"(3 0+"&0*+"'#
"+2&(!+"(3 '. &!+"'# SRAM /'#%+( '"+ 0"+(+"/+. !*"o%2*o%! Po4+"5.o4 $o.+
'. !*+ #o2&c #+/+#( o1 c*&0 o%!0%! 0&( "+$'& (!'!&c. T*+ Po4+"5.o4 $o.+ c'
)+ !+"$&'!+. '. o"$'# o0+"'!&o "+(%$+. )6 +&!*+" ' "+(+! o" c+"!'& (0+c&<c
&!+""%0!( !*'! '"+ ')#+ !o 1%c!&o 4&!*o%! c#oc8(. S&c+ '## .6'$&c o0+"'!&o o1
!*+ c*&0 &( (%(0+.+.3 Po4+"5.o4 $o.+ "+.%c+( c*&0 0o4+" co(%$0!&o !o
+'"#6 ;+"o. S+#+c!&2 ' +9!+"'# 32 8C; c#oc8 &(!+'. o1 !*+ PCLQ '( ' c#oc85
(o%"c+ 1o" !*+ o5c*&0 RTC 4&## +')#+ !*+ $&c"oco!"o##+" !o *'/+ !*+ RTC 'c!&/+
.%"&2 Po4+"5.o4 $o.+. Po4+"5.o4 c%""+! &( &c"+'(+. 4&!* RTC 'c!&/+.
Co4+/+"3 &! &( (&2&<c'!#6 #o4+" !*' & I.#+ $o.+. A Po4+" Co!"o# 1o"
P+"&0*+"'#( 1+'!%"+ '##o4( &.&/&.%'# 0+"&0*+"'#( !o )+ !%"+. oD &1 !*+6 '"+ o!
++.+. & !*+ '00#&c'!&o3 "+(%#!&2 & '..&!&o'# 0o4+" ('/&2( .%"&2 'c!&/+
'. I.#+ $o.+.
?. #P( (+"

T*+ HPB .&/&.+" .+!+"$&+( !*+ "+#'!&o(*&0 )+!4++ !*+
0"oc+((o" c#oc8 ,CCLQ- '. !*+ c#oc8 %(+. )6 0+"&0*+"'# .+/&c+( ,PCLQ-. T*+ HPB
.&/&.+" (+"/+( !4o 0%"0o(+(. T*+ <"(! &( !o 0"o/&.+ 0+"&0*+"'#( 4&!* !*+ .+(&"+.
PCLQ /&' HPB )%( (o !*'! !*+6 c' o0+"'!+ '! !*+ (0++. c*o(+ 1o" !*+ ARM
0"oc+((o". I o".+" !o 'c*&+/+ !*&(3 !*+ HPB )%( $'6 )+ (#o4+. .o4 !o 1T2 !o
1T4 o1 !*+ 0"oc+((o" c#oc8 "'!+. B+c'%(+ !*+ HPB )%( $%(! 4o"8 0"o0+"#6 '!
0o4+"5%0 ,'. &!( !&$&2 c'o! )+ '#!+"+. &1 &! .o+( o! 4o"8 (&c+ !*+ HPB
.&/&.+" co!"o# "+2&(!+"( "+(&.+ o !*+ HPB )%(-3 !*+ .+1'%#! co.&!&o '! "+(+! &(
1o" !*+ HPB )%( !o "% '! 1T4 o1 !*+ 0"oc+((o" c#oc8 "'!+. T*+ (+co. 0%"0o(+ o1
!*+ HPB .&/&.+" &( !o '##o4 0o4+" ('/&2( 4*+ ' '00#&c'!&o .o+( o! "+?%&"+
'6 0+"&0*+"'#( !o "% '! !*+ 1%## 0"oc+((o" "'!+. B+c'%(+ !*+ HPB .&/&.+" &(
co+c!+. !o !*+ PLL o%!0%!3 !*+ PLL "+$'&( 'c!&/+ ,&1 &! 4'( "%&2- .%"&2
I.#+ $o.+.
96
18. Emulation and %eGugging"
T*+ LPC2141/42/44/46/48 (%00o"! +$%#'!&o '. .+)%22&2 /&' '
ITAB (+"&'# 0o"!. A !"'c+ 0o"! '##o4( !"'c&2 0"o2"'$ +9+c%!&o. D+)%22&2 '.
!"'c+ 1%c!&o( '"+ $%#!&0#+9+. o#6 4&!* BPIO( o Po"! 1. T*&( $+'( !*'! '##
co$$%&c'!&o3 !&$+" '. &!+"1'c+ 0+"&0*+"'#( "+(&.&2 o Po"!0 '"+ '/'&#')#+
.%"&2 !*+ .+/+#o0$+! '. .+)%22&2 0*'(+ '( !*+6 '"+ 4*+ !*+ '00#&c'!&o
&( "% & !*+ +$)+..+. (6(!+$
11. EmGedded ICE

S!'.'". ARM E$)+..+. ICE #o2&c 0"o/&.+( o5c*&0 .+)%2
(%00o"!. T*+ .+)%22&2 o1 !*+ !'"2+! (6(!+$ "+?%&"+( ' *o(! co$0%!+" "%&2
!*+ .+)%22+" (o1!4'"+ '. ' E$)+..+. ICE 0"o!oco# co/+"!+". E$)+..+. ICE
0"o!oco# co/+"!+" co/+"!( !*+ "+$o!+ .+)%2 0"o!oco# co$$'.( !o !*+ ITAB
.'!' ++.+. !o 'cc+(( !*+ ARM co"+.
T*+ ARM co"+ *'( ' D+)%2 Co$$%&c'!&o C*'+# ,DCC- 1%c!&o
)%&#!5&. T*+ DCC '##o4( ' 0"o2"'$ "%&2 o !*+ !'"2+! !o co$$%&c'!+ 4&!*
!*+ *o(! .+)%22+" o" 'o!*+" (+0'"'!+ *o(! 4&!*o%! (!o00&2 !*+ 0"o2"'$ Eo4
o" +/+ +!+"&2 !*+ .+)%2 (!'!+. T*+ DCC &( 'cc+((+. '( ' co50"oc+((o" 14 )6
!*+ 0"o2"'$ "%&2 o !*+ ARM7TDMI5S co"+. T*+ DCC '##o4( !*+ ITAB 0o"! !o
)+ %(+. 1o" (+.&2 '. "+c+&/&2 .'!' 4&!*o%! 'D+c!&2 !*+ o"$'# 0"o2"'$
Eo4. T*+ DCC .'!' '. co!"o# "+2&(!+"( '"+ $'00+. & !o '.."+((+( & !*+
E$)+..+. ICE #o2&c.

12. EmGedded Trace"
97
S&c+ !*+ LPC2141/42/44/46/48 *'/+ (&2&<c'! '$o%!( o1 o5c*&0 $+$o"63 &!
&( o! 0o((&)#+ !o .+!+"$&+ *o4 !*+ 0"oc+((o" co"+ &( o0+"'!&2 (&$0#6 )6
o)(+"/&2 !*+ +9!+"'# 0&(. T*+ E$)+..+. T"'c+ M'c"o c+## ,ETM- 0"o/&.+( "+'#5
!&$+ !"'c+ c'0')&#&!6 1o" .++0#6 +$)+..+. 0"oc+((o" co"+(. I! o%!0%!(
&1o"$'!&o ')o%! 0"oc+((o" +9+c%!&o !o !*+ !"'c+ 0o"!. T*+ ETM &( co+c!+.
.&"+c!#6 !o !*+ ARM co"+ '. o! !o !*+ $'& AMBA (6(!+$ )%(. I! co$0"+((+(
!*+ !"'c+ &1o"$'!&o '. +90o"!( &! !*"o%2* ' '""o4 !"'c+ 0o"!. A +9!+"'#
!"'c+ 0o"! ''#6;+" $%(! c'0!%"+ !*+ !"'c+ &1o"$'!&o %.+" (o1!4'"+ .+)%22+"
co!"o#. I(!"%c!&o !"'c+ ,o" PC !"'c+- (*o4( !*+ Eo4 o1 +9+c%!&o o1 !*+
0"oc+((o" '. 0"o/&.+( ' #&(! o1 '## !*+ &(!"%c!&o( !*'! 4+"+ +9+c%!+..
I(!"%c!&o !"'c+ &( (&2&<c'!#6 co$0"+((+. )6 o#6 )"o'.c'(!&2 )"'c*
'.."+((+( '( 4+## '( ' (+! o1 (!'!%( (&2'#( !*'! &.&c'!+ !*+ 0&0+#&+ (!'!%( o '
c6c#+ )6 c6c#+ )'(&(. T"'c+ &1o"$'!&o 2++"'!&o c' )+ co!"o##+. )6 (+#+c!&2
!*+ !"&22+" "+(o%"c+. T"&22+" "+(o%"c+( &c#%.+ '.."+(( co$0'"'!o"(3 co%!+"(
'. (+?%+c+"(. S&c+ !"'c+ &1o"$'!&o &( co$0"+((+. !*+ (o1!4'"+ .+)%22+"
"+?%&"+( ' (!'!&c &$'2+ o1 !*+ co.+ )+&2 +9+c%!+.. S+#15$o.&16&2 co.+ c' o!
)+ !"'c+. )+c'%(+ o1 !*&( "+(!"&c!&o.
1/. Real Monitor"
R+'# Mo&!o" &( ' co<2%"')#+ (o1!4'"+ $o.%#+3 .+/+#o0+. )6 ARM Ic.3 4*&c*
+')#+( "+'#5!&$+ .+)%2. I! &( ' #&2*!4+&2*! .+)%2 $o&!o" !*'! "%( & !*+
)'c82"o%. 4*&#+ %(+"( .+)%2 !*+&" 1o"+2"o%. '00#&c'!&o. I! co$$%&c'!+(
4&!* !*+ *o(! %(&2 !*+ DCC3 4*&c* &( 0"+(+! & !*+ E$)+..+. ICE #o2&c. T*+
LPC2141/42/44/46/48 co!'&( ' (0+c&<c co<2%"'!&o o1 R+'# Mo&!o" (o1!4'"+
0"o2"'$$+. &!o !*+ o5c*&0 E'(* $+$o"6
RFID SECTION
INTRODUCTION TO RFID
98
&'! is an acronym for Ra"io .requenc# I"enti+ication* n
general terms, &'! is a means of identifying a person or object using a radio frequency
transmission. n other "ords &'! is an electronic method of e0changing data over radio
frequency "aves. The technology can be used to identify, track, sort or detect a "ide variety
of objects.
There are three major components to a &'! system: T%a0.,0"!% )Tag*, A0&!00a
and a C,0&%,//!%. %ommunication takes place bet"een a &eader )some times called
interrogator* and a Transponder /Silicon Chi& connecte" to an antenna( often called a Tag*
RFID SYSTEM
n a typical &'! system tags are attached to objects. 3ach tag has a
certain amount of internal memory )33:&.M* in "hich it stores information about the
object, such as its $0i2$! ID )serial* number, or in some cases more details including
manufacture date and product composition. 5hen these tags pass through a field generated
by a reader, they transmit this information back to the reader, thereby identifying the object.
/ntil recently the focus of &'! technology "as mainly on tags
and readers "hich "ere being used in systems "here relatively lo" volumes of data are
involved. This is no" changing as &'! in the supply chain is e0pected to generate huge
volumes of data, "hich "ill have to be filtered and routed to the backend T systems. To
solve this problem companies have developed special soft"are packages called savants,
"hich act as buffers bet"een the &'! front end and the T backend. 2avants are the
equivalent to middle"are in the T industry.
COMMUNICATION
The C,(($0i#a&i,0 process bet"een the R!a"!% and Tag is
99
managed and controlled by one of several protocols, such as the 2. 7CDB9 and 2. 7A<<<H9
for +' or the 2. 7A<<<HD, and 3:% for /+'.
#asically "hat happens is that "hen the reader is s"itched on,
it starts emitting a signal at the selected frequency band )typically AD< H B7CM+z for /+' or
79.CDM+z for +'*. Any corresponding tag in the vicinity of the reader "ill detect the signal
and use the energy from it to "ake up and supply operating po"er to its internal circuits. The
tags must use the po"er they receive to operate their integrated circuits and return a signal
"ith their ! to the reader. .nce the Tag has decoded the signal as valid, it replies to the
reader, and indicates its presence by modulating )affecting* the reader field.
TAGS:
The Transponder )3lectronic Transmitter/&esponder* contains a silicon
microchip, smaller than a grain of rice, and a small antenna.

Tag "ith an Antenna Tag
Tags are classified into t"o types based on operating po"er supply fed to it.
7. Active Tags
6. :assive Tags
100
ACTIVE TAGS:
These tags have integrated batteries for po"ering the chip. Active Tags are po"ered
by batteries and either have to be recharged, have their batteries replaced or be disposed of
"hen the batteries fail.
PASSIVE TAGS:
:assive tags are the tags that do not have batteries and have indefinite life
e0pectancies.

Di11!%!0& &'.! ,1 &ag
Tags come in a variety of shapes and sizes. Tags can be attached to various objects. These
objects include products, cartons, totes, pallets, parts, assemblies in manufacturing, cars,
trucks, physical assets, etc. Tags come in various forms including 2mart cards, Tags, $abels,
"atches and even embedded in mobile phones. Tags are sold in various types. These include
101
adhesive back labels, credit card shaped laminate, scre" do"n plastic assemblies and a host
of other types of tags.
ANTENNA
The Antenna is a device that either reads data from tags or, in some cases,
"rites data to tags using radio 'requency "aves. Antenna-s come in all shapes and sizes
depending on the environment or the required range. Antennas can be mounted on the floor,
to sides of conveyors, on lift trucks, or on building structures.
Antennas come in all sorts of sizes and shapes. The size of the antenna
determines the range of the application. $arge antennas used "ith Active Tags can have a
range of 7<< feet or more. $arge antennas used "ith :assive Tags generally have a range of
7< feet of less. There are dock door antennas )some times called :ortals* that allo" a forklift
driver to drive bet"een t"o antennas. nformation can be collected from the tags "ithout the
forklift driver having to stop. There are antennas that mount bet"een rollers on conveyors for
reading/"riting from belo". 5hile other antennas are available that mount to the side of or
above the conveyors. +andheld &eader/5riters are available as "ell.
READERS
The %ontroller )nterrogator* is the electronic device that receives the data
from the antenna, or transmits data to the antenna, and usually communicates this data to a
host computer or Microcontrollers.
?enerally &eaders are realized using the Microcontroller. &eaders are
available to communicate "ith most (et"orks )3thernet, !evice (et, :roH'ibus, etc*. They
typically have serial ports for programming and data transfer. &eaders )realized using
Microcontrollers* are usually shipped "ith programming soft"are to setHup and customize
the application.
102
RFID FREQUENCIES
Tags and Antennas are tuned or matched much the same "ay as a radio is
tuned to a frequency to receive different channels. These frequencies are grouped into 'our
basic ranges= $o" 'requency, +igh 'requency, >ery +igh 'requency and /ltraH+igh
'requencies. The communication frequencies used depends to a large e0tent on the
application, and range from 76C T+z to 6.;C ?+z.
3ach frequency range has its advantages and disadvantages. 3urope uses
ADA M+z. for its /+' applications "hile the /2 uses B7C M+z. for its /+' applications.
Uapan does not allo" the use of the /+' frequency for &'! applications. $o" 'requency
tags )$'* are less costly to manufacturer than /ltra +igh 'requency )/+'* tags. /+' tags
offer better read/"rite range and can transfer data faster then other tags. +' tags "ork best at
close range but are more effective at penetrating nonHmetal objects especially objects "ith
high "ater content.
ANTI-COLLISION:
103
f many tags are present then they "ill all reply at the same time, "hich
at the reader end is seen as a signal collision and an indication of multiple tags. The reader
manages this problem by using an antiHcollision algorithm designed to allo" tags to be sorted
and individually selected. There are many different types of algorithms )#inary Tree,
Aloha....* "hich are defined as part of the protocol standards. The number of tags that can be
identified depends on the frequency and protocol used, and can typically range from C< tags /
s for +' and up to 6<< tags / s for /+'.
.nce a tag is selected, the reader is able to perform a number of
operations such as read the tags identifier number, or in the case of a read/"rite tag "rite
information to it. After finishing dialoging "ith the tag, the reader can then either remove it
from the list, or put it on standby until a later time. This process continues under control of
the anti collision algorithm until all tags have been selected.
RFID READER used in Proje!
The &'! &eader used in our project is 6A pin %. The pinHout diagram of &'! &eader
along "ith its clip is sho"n belo".
104
PIN NO. SIGNAL DESCRIPTION
:in (o = D T0!
Transmit data )TT$ level* output from
module to serial interface
:in (o = ;
5iegand !ATA +?+
) available in 5iegand *
t "ill give !ATA +?+ signal.
:in (o = A &0!
&eceive data )TT$ level* input to the
module from serial interface
:in (o = 76 #uzzer )active lo"*
#uzzer "ill buzz for 6A< ms "hen tag
is detected
:in (o = 79 $3! ) active lo"*
$3! "ill glo" for 6A< ms "hen tag is
detected
:in (o = 7;

5iegand !ATA $.5
) available in 5iegand *
t "ill give !ATA $.5 signal.
105
:in (o=68,6A Antenna nput $oop Antenna should be connected.
USES ,1 RFID
'or many years &'! technology has been used for tracking livestock on farms. Tags
are installed either on or under the skin of animals. These tags store information about
the animal such as its identification number, its medical history, and its "eight and
age. #eing able to identify the needs of an animal during feeding and medical
attention "ithout having to look up the animals history in ed logs saves the farm
considerable time and money.
2ome airports currently use &'! technology to track and sort baggage in the
terminal. This allo"s for a completely automated baggage handling facility.
%urrently the applications of &'! include material handling, logistics, "arehousing,
manufacturing, personal identification and many more applications. 2imply put,
applications are limited only by your imagination.
106
ADVANTAGES OF RFID
&'! technology is frequently compared to #arcode technology. 5hile &'!
technology "ill probably never replace #arcode technology, it does have many advantages.
The follo"ing is a list of a fe" of these advantages=
[ 4ou must have -$ine of 2ightP to read a barcode label.
[ &'! tags can be placed inside containers or on surfaces that are not in the line of
sight from the antenna.
[ &'! technology has a longer read range compared to #arcode Technology.
[ %onsiderably more data can be stored on &'! tags than on a #arcode label.
[ 4ou cannot "rite to a barcode label "hereas some &'! tags have &ead/5rite capabilities.
.
RFID R!a"!% LRKI31513M
The &'! reader sends a pulse of radio energy to the tag and listens for the tag1s
response. The tag detects this energy and sends back a response that contains the tag1s serial
number and possibly other information as "ell.
n simple &'! systems, the reader1s pulse of energy functioned as an onHoff s"itch,
in more sophisticated systems, the reader1s &' signal can contain commands to the tag,
instructions to read or "rite memory that the tag contains, and even pass"ords.
+istorically, &'! reader "ere designed to read only a particular king of tag,but soH
called ultio"e rea"ers that can read many different kinds of tags are becoming
increasingly popular.&'! readers are usually on, continually transmitting radio energy and
a"aiting any tags that enter their field of operation. +o"ever, for some applications, this is
unnecessary and could be undesirable in batteryHpo"ered devices that need to conserve
energy. Thus, t is possible to configure an &'! reader so that it sends the radio pulse only
in response to an e0ternal event. 'or e0ample, most electronic toll collection systems have
107
the reader constantly po"ered up so that every passing car "ill be recorded. .n the other
hand, &'! scanners used in veterinarian1s offices are frequently equipped "ith triggers and
po"er up the only "hen the trigger is pulled.
$ike the tag themselves, &'! readers come in many size. The largest readers might
consist of a desktop personal computer "ith a special card through shielded cable. 2uch A
reader "ould typically have a net"ork connection as "ell so that it could report tags that it
reads to other computers. The smallest readers are the size of a postage stamp and are
designed to be embedded in mobile telephones
This module is designed to directly connect &'! reader via computer /2# port. t gives
/2#//A&T/5iegand6D output. t contains a &'! &eader Module of 76CT+z onboard.
F!a&$%!
[ /2# %able and 7@ &'! %lamshell TA? included in :ackage
[ %onnects to computer via virtual serial port created through /2#
[ /A&T and 5iegand6D output
[ #uzzer and $3! to indicate detection
[ :rotection for multiple detection
[ 5iegand6D selection jumper )7H6 2erial, 6H9 5iegand6D*;
108
I0&!%1a#i0g RFID R!a"!% M,"$/!
3.1 A##!i0g (,"$/! b' #,((a0" B#("C .%,(.&
%ommand prompt is a tool "hich comes "ith Microsoft "indo"s and it can be used to
interface the com port "ith the &'! module or any other pheripharal.t is a kind of
2imulator.
To start the command prompt=
2tart %ommand :rompt
3.2 R!a"i0g &6! #,"! -i&6i0 RFID (,"$/! ,1 RFID &ag i0 .%,(.& -i0",-
o %onnect the &'! Module "ith desired %.M port
o +ere in the connection there are t"o pin out for 2erial commutation
o T@
o &@
o 3nter the code for the %.M access in command prompt
o 2"itch on the supply of the module
o Then put the tag and then by the serial communication the serial data is being
transferred to the computer through %.M port and the "indo" display the 76 bit
code of the &'! tag in the prompt "indo"
109
5.1 S,1&-a%! T,,/
TeilH%
5.1.1 I0&%,"$#&i,0 &, E(b!""!" NCO:
EA: )i&!# P #D K!i/ P #
+HT3%+ 2oft"are makes industrialHstrength soft"are development tools and %
compilers that help soft"are developers "rite compact, efficient embedded processor code.
'or over t"o decades +HT3%+ 2oft"are has delivered the industry-s most reliable
embedded soft"are development tools and compilers for "riting efficient and compact code
to run on the most popular embedded processors. /sed by tens of thousands of customers
including ?eneral Motors, 5hirlpool, Yualcomm, Uohn !eere and many others, +HT3%+-s
reliable development tools and % compilers, combined "ith "orldHclass support have helped
serious embedded soft"are programmers to create hundreds of breakthrough ne" solutions.
5hichever embedded processor family you are targeting "ith your soft"are, "hether
it is the A&M, :%% or A<C7 series, +HT3%+ tools and % compilers can help you "rite
better code and bring it to market faster.
5.1.2. E(b!""!" NCO C,(.i/!%
A(2 % H full featured and portable
&eliable H mature, fieldHproven technology
Multiple % optimization levels
'ull linker, "ith overlaying of local variables to minimize &AM usage
%omprehensive % library "ith all source code provided
110
ncludes support for 6;Hbit and 96Hbit 333 floating point and 96Hbit long data types
Mi0ed % and assembler programming
%ompatible H integrates into the M:$A#

!3, M:$A# %! and most 9rdHparty
development tools
&uns on multiple platforms= 5indo"s, $inu0, /(@, Mac .2 @, 2olaris
E(b!""!" D!4!/,.(!0& E04i%,0(!0&
This environment allo"s you to manage all of your :% projects. 4ou can compile,
assemble and link your embedded application "ith a single step.
.ptionally, the compiler may be run directly from the command line, allo"ing you to
compile, assemble and link using one command. This enables the compiler to be integrated
into third party development environments, such as Microchip-s M:$A# !3.
5.2. E(b!""!" S'&!( T,,/
5.2.1. A!(b/!%
An assembler is a computer program for translating assembly language \ essentially,
a mnemonic representation of machine language \ into object code. A cross assembler )see
cross compiler* produces code for one type of processor, but runs on another. The
computational step "here an assembler is run is kno"n as assembly time. Translating
assembly instruction mnemonics into op codes, assemblers provide the ability to use
symbolic names for memory locations )saving tedious calculations and manually updating
addresses "hen a program is slightly modified*, and macro facilities for performing te0tual
substitution \ typically used to encode common short sequences of instructions to run inline
instead of in a subroutine. Assemblers are far simpler to "rite than compilers for highHlevel
languages
.
A!(b/' La0g$ag! 6a S!4!%a/ B!0!1i&:
S.!!"= Assembly language programs are generally the fastest programs around.
S.a#!= Assembly language programs are often the smallest
111
Ca.abi/i&': 4ou can do things in assembly "hich are difficult or impossible in high
level languages.
K0,-/!"g!= 4our kno"ledge of assembly language "ill help you "rite better
programs, even "hen using +igh level languages. An e0ample of an assembler "e use in our
project is &A! C7.
5.2.2 Si($/a&,%
2imulator is a machine that simulates an environment for the purpose of training or
research. 5e use a /M:2 simulator for this purpose in our project.
5.2.3 C,(.i/!%
A compiler is a program that reads a program in one language, the source language
and translates into an equivalent program in another language, the target language. The
translation process should also report the presence of errors in the source program.
2ource
:rogram
V %ompiler V
Target
:rogram
]

3rror
Messages

There are t"o parts of compilation. The analysis part breaks up the source program
into constant piece and creates an intermediate representation of the source program. The
synthesis part constructs the desired target program from the intermediate representation.
2imilarly, intermediate code generator takes a tree as an input produced by semantic
analyzer and produces intermediate code.
112
5.3. U!% I0&!%1a#!
/ser interfaces for embedded systems vary "idely, and thus deserve some special
comment. /ser interface is the ultimate aim for an embedded module as to the user to check
the output "ith complete convenience. .ne standard interface, "idely used in embedded
systems, uses t"o buttons )the absolute minimum* to control a menu system )just to be clear,
one button should be Pne0t menu entryP the other button should be Pselect this menu entryP*.
Another basic trick is to minimize and simplify the type of output. !esigns sometimes
use a status light for each interface plug, or failure condition, to tell "hat failed. A cheap
variation is to have t"o light bars "ith a ed matri0 of errors that they selectH the user can glue
on the labels for the language that he speaks. 'or e0ample, most small computer ers use
lights labeled "ith stickHon labels that can be ed in any language. n some markets, these are
delivered "ith several sets of labels, so customers can pick the most comfortable language.
n many organizations, one person approves the user interface. .ften this is a
customer, the major distributor or someone directly responsible for selling the system.
5.4 P/a&1,%(
There are many different %:/ architectures used in embedded designs such as A&M,
M:2, %oldfire/DAk, :o"er:%, @AD, :%, A<C7, Atmel A>&, +A, 2+, >AC<, '&H>, M96&
etc.
This in contrast to the desktop computer market, "hich as of this "riting )6<<9* is
limited to just a fe" competing architectures, mainly the ntel/AM! 0AD, and the
Apple/Motorola/#M :o"er:%, used in the Apple Macintosh. 5ith the gro"ing acceptance
of Uava in this field, there is a tendency to even further eliminate the dependency on specific
%://hard"are )and .2* requirements. 2tandard :%/7<; is a typical base for small, lo"H
volume embedded and ruggedized system design. These often use !.2, $inu0 or an
embedded realHtime operating system such as Y(@ or nferno.
A common configuration for veryHhighHvolume embedded systems is the system on a
chip, an applicationHspecific integrated circuit, for "hich the %:/ "as purchased as
intellectual property to add to the %-s design. A related common scheme is to use a fieldH
113
programmable gate array, and program it "ith all the logic, including the %:/. Most modern
':?As are designed for this purpose.
5.5 T,,/
$ike typical computer programmers, embedded system designers use compilers,
assemblers, and debuggers to develop embedded system soft"are. +o"ever, they also use a
fe" tools that are unfamiliar to most programmers.
2oft"are tools can come from several sources=
2oft"are companies that specialize in the embedded market.
:orted from the ?(/ soft"are development tools.
2ometimes, development tools for a personal computer can be used if the embedded
processor is a close relative to a common :% processor. 3mbedded system designers also use
a fe" soft"are tools rarely used by typical computer programmers.
.ne common tool is an PinHcircuit emulatorP )%3* or, in more modern designs, an
embedded debugger. This debugging tool is the fundamental trick used to develop embedded
code. t replaces or plugs into the microprocessor, and provides facilities to quickly load and
debug e0perimental code in the system. A small pod usually provides the special electronics
to plug into the system. .ften a personal computer "ith special soft"are attaches to the pod
to provide the debugging interface.
Another common tool is a utility program )often homeHgro"n* to add a checksum or
%&% to a program, so it can check its program data before e0ecuting it.
An embedded programmer that develops soft"are for digital signal processing often
has a math "orkbench such as MAT+%A! or Mathematics to simulate the mathematics.
$ess common are utility programs to turn data files into code, so one can include any
kind of data in a program. A fe" projects use 2ynchronous programming languages for e0tra
reliability or digital signal processing.
5.5.1 D!b$ggi0g
114
The $:%67;7/;6/;;/;D/;A support emulation and debugging via a UTA? serial port.
A trace port allo"s tracing program e0ecution. !ebugging and trace functions are
multiple0ed only "ith ?:.s on :ort 7. This means that all communication, timer and
interface peripherals residing on :ort < are available during the development and debugging
phase as they are "hen the application is run in the embedded system itself.
5.5.2 E(b!""!" ICE
2tandard A&M 3mbedded %3 logic provides onHchip debug support. The debugging
of the target system requires a host computer running the debugger soft"are and an
3mbedded %3 protocol convertor. 3mbedded %3 protocol convertor converts the remote
debug protocol commands to the UTA? data needed to access the A&M core.
The A&M core has a !ebug %ommunication %hannel )!%%* function builtHin. The
!%% allo"s a program running on the target to communicate "ith the host debugger or
another separate host "ithout stopping the program flo" or even entering the debug state.
The !%% is accessed as a coHprocessor 7; by the program running on the A&M8T!MH2
core. The !%% allo"s the UTA? port to be used for sending and receiving data "ithout
affecting the normal program flo". The !%% data and control registers are mapped in to
addresses in the 3mbedded %3 logic.
This clock must be slo"er than 7D of the %:/ clock )%%$T* for the UTA?
interface to operate.
115
OVERALL S+STEM RESULT
Thus from this ID BASED ATM "e are able to operate as usual as the present ATM
system that "e are currently using "e include this ! "here the security is provided and also
"e provide the for each and every user to "hom they registered the account. The system "e
developed is "orking accordingly as "e supposed.
Fig 7.1 I" ba!" ATM S!#$%i&' S'&!(
116
CONCLUSION AND FUTURE SCOPE
8.1CONCLUSION
3asyHtoHuse design environment\ t "as a challenge for us to gain basic kno"ledge
about soft"are and hard"are development and conduct systematic design, implementation of
! #A23! ATM 23%/&T4 242T3M has been successfully designed and tested.
ntegrated features of all the hard"are components used and developed it. :resence of
module has been reasoned out and placed carefully thus contributing to the best "orking of
the unit .2econdly using high advanced %s and "ith the help of gro"ing technology the
project has been successfully implemented.
3very coin has t"o sides. 2imilarly although our project provides more security it is
slightly e0pensive task.
8.2 FUTURE SCOPE
n this project "e can only "ithdra" our money. #y e0tending this project "e can
deposit our money also. This is another mode of operation. 'irst system asks us to enter the
amount. 5henever "e are depositing our money the machine itself taking the money and
calculate the amount. f both the amounts are equal then that money is transferred to our
account.
117
BIBLIOGRAP)+
^7_ &'!dentification 2ystem #ased on the (ios :rocessor by $inchuan $i, 4ao
Shang, %hengdong ?e
^6_ ntroduction to embedded system by &ajkamal
^9_ %haracteristics of biometric system by %ernet
^;_ The art of electronics by +oro"itz
^C_ """ atmel.databook.com
^D_ """.kiel.com
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