Different Examples of HDL

Hardware Description Languages (HDLs) have two basic purpose in Logic design. HDLs
can be used for analog circuit design and also in digital circuit design, or in some cases, in
mixed-signal systems. Various simulators are capable of supporting discrete-event (digital) and
continuous-time (analog) modeling and HDLs targeted for each are available.

HDL for Analog Circuit Design
1. Verilog AMS
Verilog AMS is a direct derivative of the HDL Verilog. AMS stands for Analog
and Mixed-Signal extensions. Basically, it is an extension of Verilog primarily made for
analog circuits and some mixed analog and digital circuits.
It is an industry standard modeling language for mixed-signal circuits and it
extends the event-based loops of Verilog. A sample code using the Verilog-AMS is
shown below.

Figure 1. Verilog-AMS sample code
To use and run the Verilog-AMS codes, it needs an Integrated Development
Environment (IDE) and one IDE of Verilog-AMS looks like:

Figure 2. Example IDE of Verilog-AMS
2. VHDL-AMS
VHDL-AMS is a direct derivative of VHSIC HDL and just like Verilog-AMS, it is also
made as a counterpart of VHDL to analog and mixed-signal circuits. It has an advantage
for complex analog, mixed-signal and radio frequency integrated circuits and typically, a
design in VHDL-AMS consists of an entity and an architecture. A sample look of its code
is:

Figure 3. VHDL-AMS sample code

HDL for Digital Circuit Design
1. Advanced Boolean Expression Language (ABEL)
Advanced Boolean Expression Language (ABEL) is an example of HDL which have
a set of design tools for Programmable Logic Devices (PLDs). This HDL was created in
1983 by Data I/O Corporation. It was created mainly for PLDs thats why it has a great
advantage over other HDLs when it is used on PLDs. Through a series of acquisitions,
ABEL is now owned by Xilinx. Here is a sample code and an ABEL IDE of MS DOSBOX:

Figure 4. ABEL sample code

Figure 5. MS DOSBOX IDE for ABEL
2. Altera Hardware Description Language
Altera HDL is made by the Altera Corporation and is used for Altera Corp.s
Complex Programmable Logic Devices (CPLDs) and their Field programmable Gate
Arrays (FPGAs). This HDL has an Ada programming language-like syntax and a primary
disadvantage of AHDL is that it is proprietary.

Figure 6. Altera HDL sample code
3. ELLA
Ella is an HDL developed by the Royal Signals and Radar Establishment during the
1980s and 90s. It has support toolset which includes:
Design transformation
Symbolic Simulations
Formal Verifications
But with its toolset as an advantage, it also has its counterpart disadvantages
which is that it is really hard to understand at simple glance (i.e., low code readability)
and it is no longer in common use.

Figure 7. ELLA sample code
4. ESys.net
An HDL which is a .net framework written in C#. A hardware system design
library for the .net framework that is basically a port of the SystemC (another HDL)
Advantage from SystemC: Tasks are said to be easier to accomplish. Below is an IDE of
ESys.net:

Figure 8. IDE for ESys.net
5. Handel-C
A rich subset of C programming language and is commonly used in programming
Field Programmable Gate Arrays (FPGAs). Its advantage is that it has easier code
readability.

Figure 9. IDE for Handel-C
6. Impulse-C
Another subset of C programming language and developed by Impulse Accelerated
Technologies in 2003. It targets Field Programmable Gate Arrays (FPGAs). The advantage of this
language over Handel-C is that it supports parallel programming.

Figure 10. IDE for Impulse-C
7. Just-Another Hardware Description Language (JHDL)
Originally, the J in "JHDL" stood for "Java". However, to prevent trademark
issues, the name has been backronymed to stand for Just-Another Hardware Description
Language. It is based on Java programming language and an HDL focusing on building
circuits via an object oriented approach.
Its advantages are that it has a structural hardware design and flexible module
generators. Also, it has table-generated finite state machines and a graphical workbench
toolkit which includes a schematic viewer and multi-clock cycle.

8. PALASM
An early developed HDL and it is developed by John Birkner in the early 1980s.
This HDL is primarily used for Programmable Array Logic (PAL). Can be used to translate
Boolean functions to state transition tables. This HDL is not case-sensitive and it is an
open-source software.

Figure 11. PALASM sample code




9. SystemC
SystemC is based from C++ programming language and its features includes that
it can simulate concurrent processes and also in a real-time environment.

Figure 12. SystemC sample code

Figure 13. IDE for SystemC
10. Verilog
Verilog first appeared in 1984 and it uses a structured paradigm in programming.
It is also one of the two most commonly used in the design and verification of digital
circuits.
It is one of the first modern hardware description language to be invented and it
is a case-sensitive programming language. Up to date, it has a user community of more
than 50,000 active circuit designers.


Figure 14. Verilog sample code

Its advatages are:
Codes are usually shorter than other HDLs
Based on users, it simulates faster
It allows hardware to be described in a wide variety of styles
One example of an IDE used for Verilog is shown below:


Figure 15. IDE for Verilog


11. VHSIC Hardware Description Language (VHDL)

This HDL first appeared in 1980s and it is influenced by Ada and Pascal
programming languages. It is used in digital and mixed-signal systems and it is one of the
most commonly used HDL in the world.

This HDL can also be used in parallel programming. Parallel computing is a form
of computation in which many calculations are carried out simultaneously.

Figure 16. VHDL sample code
The advantages of this HDL are:
It allows the description of a concurrent system
VHDL is a dataflow language, unlike procedural computing languages such as BASIC
and C, which all run sequentially, one instruction at a time
It supports hybrid modeling

Figure 17. IDE for VHDL
REFERENCES (Paayos na lang)
Verilog-AMS http://en.wikipedia.org/wiki/Verilog-AMS
VHDL-AMS http://en.wikipedia.org/wiki/VHDL-AMS
Advanced Boolean Expression Language
http://en.wikipedia.org/wiki/Advanced_Boolean_Expression_Language
Handel-C http://en.wikipedia.org/wiki/Handel-C
JHDL http://en.wikipedia.org/wiki/JHDL
PALASM http://en.wikipedia.org/wiki/PALASM
Verilog - accelerating digital design http://www.bawankule.com/verilogcenter/accverilog.html
M. Morris Mano, M. D. ( 2013). Digital Design with an Introduction to the Verilog HDL. New
Jersey: Pearson Education, Inc., publishing as Prentice Hall, One Lake Street, Upper
Saddle.
Complete Digital Design : A Comprehensive Guide to Digital Electronics and Computer System
Architecture: A Comprehensive Guide to Digital Electronics and Computer System Architecture
Mark Balch. McGraw Hill Professional. Jun 20, 2003
Digital Electronics Demystified - Mike Predko. McGraw Hill. 2005