Using SVA for scoreboarding and testbench design

Ben Cohen http://systemverilog.us/

Abstract
Though assertions are typically used for the verification of properties, they can be applied in
many other verification applications. For example, in scoreboarding functions can be called
from within a sequence match item after the assertion reaches a desired point.
Concept
If a sequence expression succeeds, an attached sequence match item would be executed if it
exists. er !"##, $nnex $, a sequence_match_item can be one of the following:
operator_assignment
| inc_or_dec_expression
| subroutine_call
The access to a subroutine call from a sequence match item is the unique feature that allows
many options in the construction of the testbench. For example, the subroutine call can do
one %or more& of the following:
!. covergroup sampling, as shown below
% http://systemverilog.us/papers/cpu'cg'module.sv&
sequence q_fetch; @ (clk)
mode==FETCH ##1 (1, instr_cg1s!m"le(), !ddr_cg1s!m"le());
endsequence # q_fetch
cover property (q_fetch);
(. )alculating the successful ranges in which an assertion was exercised.
% http://systemverilog.us/papers/reqac*'sequence'cover.sv&
int req!ckdone; $$ co%nt
default clocking c&_ck1 @ (posedge clk); endclocking
$$ co%nt
function void set_req!ckdone(int ');
req!ckdone=';
endfunction # set_req!ckdone

property "_seq_req!ck;
int '_co%nt;
(req, '_co%nt=()
##1 (rd), '_co%nt*=1)
##1 (1, '_co%nt*=1)+,1#-.
##( (done, set_req!ckdone('_co%nt), cg_insts!m"le());
endproperty # "_seq_req!ck
$$ c"_seq_req!ck# co'er "ro"ert)(req ##1 rd) ##+1#-. done);
c"_seq_req!ck/# cover property("_seq_req!ck); $$ 0111111111111

covergroup cg_req!ck_"!th_length;
req!ckdone_c" # coverpoint req!ckdone
2
bins !3 = 2 34;
bins !- = 2 - 4; $$ 2 +-#-. 4;
bins !5 = 2 5 4; $$ 2 +5#5. 4;
4
endgroup
cg_req!ck_"!th_length cg_inst = new();
+. erforming complex scoreboarding operations at specific points in the assertion. The
assertion can be brought to a specific F,- point, and then call functions to do the
scoreboarding. The next subsection addresses this application by example.
Application example
In the following example %http://systemverilog.us/papers/matrix.sv
http://systemverilog.us/papers/matrix(.sv & the model holds an image in a (.x(. matrix array.
/ach pixel in that image is an unsigned integer. The image is partitioned into (. slices or
quadrants, and the scoreboard needs to compute within a .x. slice the number of pixels
greater than +. The image is loaded when done_image is true, and the slice to be selected
is determined at a new ld signal. The done_image occurs within ! to + cycles after the ld
signal.
In this model, the selection of the slice to be processed is randomly selected0 this approach
demonstrates the application of function calls from a sequence match item. Two functions are
called from the sequence match item of a sequence in a property. These include:
module m!tri6;
int unsigned slice +(#5.+(#5.;
int unsigned im!ge +(#35.+(#35.;
bit clk;
bit ld, done_im!ge;
int co%nt;
typedef struct 2
int 6;
int );
4 q%!dr!nd_t;
$$ q%!dr!nd_t qd=2(,14;
q%!dr!nd_t fo%nd_qd;
// Function select_slice copies pixels from an image into a slice
// It is used by the co%nt_t!rgets_in_q%!dr!nt function
// There are (. quadrants in the image, ranging from quadrant # to quadrant (1.
function void select_slice(q%!dr!nd_t qd);
int unsigned ' +(#5.+(#5.;
for (int i=(; i07; i**) begin
for (int 8=(; 807; 8**) begin
'+i.+8.=im!ge+qd6,5*i.+qd),5*8.;
end
end
slice=';
endfunction # select_slice

// Function find'quadrant randomly finds a quadrant
// )alled by property
function q%!dr!nd_t find_q%!dr!nt();
logic+(#-. 6, );
q%!dr!nd_t '_qd;
if (9r!ndomi:e(6, )) with 26 07; )07;4)
`uvm_error(;<=E>>;, ;This is ! r!ndomi:e error of find_q%!dr!nt;);
'_qd6=6;
'_qd)=);
fo%nd_qd = '_qd;
return '_qd;
endfunction # find_q%!dr!nt
// Function count_targets_in_quadrant counts the
// number pixels 2+ within the selected slice
// )alled by property
function void co%nt_t!rgets_in_q%!dr!nt(q%!dr!nd_t '_qdt);
automatic int unsigned '_co%nt=(;
select_slice('_qdt);
foreach (slice+i,8.) begin
if (slice+i.+8. ? -) '_co%nt**; $$ - is ! threshold
end
co%nt = '_co%nt;
endfunction # co%nt_t!rgets_in_q%!dr!nt

3hen the assertion detects a new ld, the local variable v_qdt of the property saves value of
the selected quadrant through a call to find_quadrant. 3hen done_image is detected,
the number of pixels 2 + within that selected quadrant is computed through a call to
count_targets_in_quadrant(v_qdt) with the previously computed quadrant passed as
an actual argument.
default clocking c&_ck1 @ (posedge clk); endclocking
property "_t!rgets;
int unsigned '_slice +(#5.+(#5.;
q%!dr!nd_t '_qdt;
first_match(($rose(ld), '_qdt=find_q%!dr!nt()) ##+1#-. done_im!ge) @1?
(1, co%nt_t!rgets_in_q%!dr!nt('_qdt));
endproperty # "_t!rgets
!"_t!rgets# assert property("_t!rgets);
Where should assertion be written?
Concurrent assertions are illegal in classes. Thus, assertions are best written in modules, or modules
bound to other modules, or in interfaces. The body functions may use class members or methods.
However, assertions may not use members referenced with class handles. Thus, the following is
illegal:
class c;
int unsigned slice +(#5.+(#5.;
int unsigned im!ge +(#35.+(#35.;
typedef struct 2
int 6;
int );
4 q%!dr!nd_t;

q%!dr!nd_t fo%nd_qd;
int co%nt;

function logic+(#-. find_q%!dr!nt(bit ');
static logic+(#-. 6, );
$$!%tom!tic q%!dr!nd_t '_qd;
if(') begin
if (9r!ndomi:e(6, )) with 26 07; )07;4)
`uvm_error(;<=E>>;, ;This is ! r!ndomi:e error of find_q%!dr!nt;);
return 6;
end
else return );
endfunction # find_q%!dr!nt
..
endclass # c
module m!tri6;
parameter seed=1(;
c c_h=new();
property "_t!rgets;
int unsigned '_slice +(#5.+(#5.;
logic+(#-. '_6, '_);
first_match(($rose(ld), '_6=c.h_find_quadrant(1), // illegal referencing
'_)=c_h.find_quadrant(0)) ##+1#-. done_im!ge)
@1?
(1, c_hco%nt_t!rgets_in_q%!dr!nt('_6, '_)));
endproperty # "_t!rgets