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CSR Energy
CSR1000
QFN
Bluetooth
v4.0 specification
7.5dBm Bluetooth low energy maximum transmit
output power
10-bit ADC
12 digital PIOs
3 analogue AIOs
UART
IC / SPI for EEPROM / flash memory ICs and
peripherals
Debug SPI
3 PWM modules
Wake-up interrupt and watchdog timer
Healthcare
Home entertainment
Office and mobile accessories
Automotive
Commercial
Watches
-92.5dBm sensitivity
Including encryption
Software stack in firmware includes:
GAP
L2CAP
Security manager
Attribute protocol
Attribute profile
Bluetooth low energy profile support
Synthesiser
Fully integrated synthesiser requires no external
VCO varactor diode, resonator or loop filter
Baseband and Software
Digital PIOs
Analogue AIOs
UART
Auxiliary Features
Battery monitor
Power management features include software
shutdown and hardware wake-up
or
NSMD lands (lands smaller than the solder mask aperture) are preferred, because of the greater accuracy
of the metal definition process compared to the solder mask process. With solder mask defined pads, the
overlap of the solder mask on the land creates a step in the solder at the land interface, which can cause
stress concentration and act as a point for crack initiation.
CSR recommends that the PCB land pattern is in accordance with IPC standard IPC-7351.
Encryption
Data whitening
1 switch-mode regulator, which generates the main supply rail from the battery
1 low-voltage linear regulator
Figure 6.1 shows the configuration for the power control and regulation with the CSR1000 QFN.
G
-
T
W
-
0
0
0
5
3
6
7
.
4
.
3
Switch-mode
Regulator
Switch
SMPS_LX
VDD _BAT _SMPS
Low-voltage
VDD_DIG
Linear Regulator
VDD_AUX 1.35V
VDD_RADIO 1.35V
VDD_ANA 1.35V
Digits 0.65/1.20V
VDD _CORE
VDD_REG_IN
Figure 6.1: Voltage Regulator Configuration
6.1 Switch-mode Regulator
The switch-mode regulator generates the main rail from the battery supply, VDD_BAT_SMPS. The main rail supplies
the lower regulated voltage to a further digital linear regulator and also to the analogue sections of the CSR1000 QFN.
The switch-mode regulator generates typically 1.35V.
6.2 Low-voltage VDD_DIG Linear Regulator
The integrated low-voltage VDD_DIG linear regulator powers the CSR1000 QFN digital circuits. The input voltage
range is 0.65V to 1.35V. It can supply programmable voltages of 0.65V to 1.20V to the digital area of the
CSR1000 QFN. The maximum output current for this regulator is 30mA.
Connect a minimum 470nF low ESR capacitor, e.g. MLC, to the VDD_CORE output pin. Software controls the output
voltage.
Important Note:
This regulator is only for CSR internal use. Section 7 shows CSR's recommended circuit connection.
6.3 Reset
CSR1000 QFN is reset by:
Power-on reset
Software-configured watchdog timer
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6.3.1 Digital Pin States on Reset
Table 6.1 shows the pin states of CSR1000 QFN on reset. PU and PD default to weak values unless specified
otherwise.
Pin Name / Group On Reset
I2C_SDA Strong PU
I2C_SCL Strong PU
PIO[11:0] Weak PD
Table 6.1: Pin States on Reset
6.3.2 Power-on Reset
Table 6.2 shows how the power-on reset occurs.
Power-on Reset Typ Unit
Reset release on VDD_DIG rising 1.05
V Reset assert on VDD_DIG falling 1.00
Reset assert on VDD_DIG falling (Sleep mode) 0.60
Hysteresis 50 mV
Table 6.2: Power-on Reset
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7 Example Application Schematic
G
-
T
W
-
0
0
0
5
4
5
2
.
9
.
5
OUT
2
IN
4
GND
1
GND
3
2.45GHz
U3
G
R
E
E
N
D1
G
R
E
E
N
D2
Pull to VDD_PADS to enable debug SPI
C2032 BATTERY HOLDER
+
1
-
2
BAT1
VDD_BAT
470n
C3
470n
C4
820R
R1
820R
R2
32.768kHz
X2
SO-8
AT24C512BN-SH
VCC
8
GND
4
A2
3
SCL
6
A1
2
A0
1
WP
7
SDA
5
U1
GND GND
VCHG
1
SPI_MOSI
2
SPI_CLK
3
SPI_CSB
4
SPI_MISO
5
SER-
6
SER+
7
GND
8
CASE
9
CASE
10
CASE
11
CASE
12
CON1
MINI SMT CONNECTOR 8PIN
RF
7
V
D
D
_
R
E
G
_
I
N
6
V
D
D
_
C
O
R
E
5
W
A
K
E
4
X
T
A
L
_
3
2
K
_
O
U
T
2
X
T
A
L
_
3
2
K
_
I
N
3
V
D
D
_
B
A
T
/
V
R
E
G
_
E
N
1
V
D
D
_
B
A
T
_
S
M
P
S
3
2
S
M
P
S
_
L
X
3
1
I2C_SDA
29
I2C_SCL
28
PIO[0]
14
PIO[1]
15
PIO[2]
27
PIO[3]
16
PIO[4]
17
PIO[5]
18
PIO[6]
19
PIO[7]
20
PIO[8]
22
PIO[9]
23
PIO[10]
24
PIO[11]
25
SPI_PIO#_SEL
26
X
T
A
L
_
1
6
M
_
O
U
T
9
X
T
A
L
_
1
6
M
_
I
N
1
0
AIO[0]
13
AIO[1]
12
V
S
S
0
V
D
D
_
C
O
R
E
3
0
V
D
D
_
P
A
D
S
2
1
AIO[2]
11
V
D
D
_
X
T
A
L
8
U2
CSR1000
SB1
VDD_BAT
SB3
SB2
PIO9
AIO[2]
AIO[1]
AIO[0]
1
3
2
PWR J1
SW1
4u7
L1
47n
C13
GND GND GND
GND
10p
C9
1u0
C6
2u2
C2 0R0
R7
+
1
-
2
SP1
GND
100u
C1
16MHz X1
15p
C7
8p2
C8
10p
C10
470n
C16
ANT1
0R0
R3
2u2
C12
33p
C14
150n
C5
47n
C18
GND
M
M
Z
1
0
0
5
Y
1
5
2
C
L2
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8 Electrical Characteristics
8.1 Absolute Maximum Ratings
Rating Min Max Unit
Storage temperature -40 85 C
Battery (VDD_BAT) operation
(a)
1.8 3.6 V
I/O supply voltage -0.4 3.6 V
Other terminal voltages
(b)
VSS - 0.4 VDD + 0.4 V
(a)
CSR1000 QFN is reliable and qualifiable to 4.2V, but there will be minor deviations in performance relative to published performance values
for 1.8V to 3.6V.
(b)
VDD = Terminal Supply Domain.
8.2 Recommended Operating Conditions
Operating Condition Min Typ Max Unit
Operating temperature range -30 - 85 C
Battery (VDD_BAT) operation
(a)
1.8 - 3.6 V
I/O supply voltage (VDD_PADS)
(b)
1.2 - 3.6 V
(a)
CSR1000 QFN is reliable and qualifiable to 4.2V, but there will be minor deviations in performance relative to published performance values
for 1.8V to 3.6V.
(b)
Safe to 4.2V if VDD_BAT = 4.2V.
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8.3 Input/Output Terminal Characteristics
8.3.1 Switch-mode Regulator
Switch-mode Regulator Min Typ Max Unit
Input voltage 1.8 - 3.6 V
Output voltage 0.65 1.35 1.35 V
Temperature coefficient -200 - 200 ppm/C
Normal Operation
Output noise, frequency range 100Hz to 100kHz - - 0.4 mV rms
Settling time, settling to within 10% of final value - - 30 s
Output current (I
max
) - - 50 mA
Quiescent current (excluding load, I
load
< 1mA) - - 20 A
Ultra Low-power Mode
Output current (I
max
) - - 100 A
Quiescent current - - 1 A
8.3.2 Low-voltage Linear Regulator
Normal Operation Min Typ Max Unit
Input voltage 0.65 - 1.35 V
Output voltage 0.65 - 1.20 V
Important Note:
This regulator is only for CSR internal use. Section 7 shows CSR's recommended circuit connection.
8.3.3 Digital Terminals
Input Voltage Levels Min Typ Max Unit
V
IL
input logic level low -0.4 - 0.4 V
V
IH
input logic level high
0.7 x
VDD_PADS
-
VDD_PADS +
0.4
V
T
r
/T
f - - 25 ns
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Output Voltage Levels Min Typ Max Unit
V
OL
output logic level low, l
OL
= 4.0mA - - 0.4 V
V
OH
output logic level high, l
OH
= -4.0mA
0.75 x
VDD_PADS
- - V
T
r
/T
f - - 5 ns
Input and Tristate Currents Min Typ Max Unit
With strong pull-up -150 -40 -10 A
IC with strong pull-up -250 - - A
With strong pull-down 10 40 150 A
With weak pull-up -5.0 -1.0 -0.33 A
With weak pull-down 0.33 1.0 5.0 A
C
I
input capacitance 1.0 - 5.0 pF
8.3.4 AIO
Input/Output Voltage Levels Min Typ Max Unit
Input voltage 0 - VDD_AUX V
Output voltage 0 - VDD_AUX V
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8.3.4.1 Auxiliary ADC
Auxiliary ADC Min Typ Max Unit
Resolution - - 10 Bits
Input voltage range
(a)
0 - VDD_AUX V
Accuracy
(Guaranteed monotonic)
INL -1 - 1 LSB
DNL 0 - 1 LSB
Offset -1 - 1 LSB
Gain error -0.8 - 0.8 %
Input bandwidth - 100 - kHz
Conversion time 1.38 1.69 2.75 s
Sample rate
(b)
- - 700 Samples/s
(a)
LSB size = VDD_AUX/1023
(b)
The auxiliary ADC is accessed through a VM function. The sample rate given is achieved as part of this function.
8.3.4.2 Auxiliary DAC
Auxiliary DAC Min Typ Max Unit
Resolution - - 10 Bits
Supply voltage, VDD_ANA 1.30 1.35 1.40 V
Output voltage range 0 - VDD_AUX V
Full-scale output voltage 1.30 1.35 1.40 V
LSB size 0 1.32 2.64 mV
Offset -1.32 0 1.32 mV
Integral non-linearity -1 0 1 LSB
Settling time - - 250 ns
Important Note:
Access to the auxiliary DAC is firmware-dependent, for more information about its availability contact CSR.
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8.4 ESD Protection
Apply ESD static handling precautions during manufacturing.
Table 8.1 shows the ESD handling maximum ratings.
Condition Class Max Rating
Human Body Model Contact Discharge per JEDEC EIA/JESD22-A114 2 2000V (all pins)
Machine Model Contact Discharge per JEDEC EIA/JESD22-A115 200V 200V (all pins)
Charged Device Model Contact Discharge per JEDEC EIA/JESD22-C101 III 500V (all pins)
Table 8.1: ESD Handling Ratings
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9 Current Consumption
Table 9.1 shows CSR1000 QFN total typical current consumption measured at the battery.
Mode Description Total Typical Current at 3V
Dormant
All functions are shut down. To wake them up, toggle the
WAKE pin.
<600nA
Hibernate
VDD_PADS = ON, REFCLK = OFF, SLEEPCLK = ON,
VDD_BAT = ON
<1.5A
Deep sleep
VDD_PADS = ON, REFCLK = OFF, SLEEPCLK = ON,
VDD_BAT = ON, RAM = ON, digital circuits = ON,
SMPS = ON (low-power mode), 1ms wake-up time
<5A
Idle
VDD_PADS = ON, REFCLK = ON, SLEEPCLK = ON,
VDD_BAT = ON, RAM = ON, digital circuits = ON,
MCU = IDLE, <1s wake-up time
~1mA
RX / TX active - ~16mA @ 3V peak current
Table 9.1: Current Consumption
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10 CSR Green Semiconductor Products and RoHS Compliance
CSR confirms that CSR Green semiconductor products comply with the following regulatory requirements:
Set of technologies providing audio and data transfer over short-range radio connections
CSR Cambridge Silicon Radio
CTS Clear To Send
dBm Decibels relative to 1 mW
DC Direct Current
DNL Differential Non Linearity (ADC accuracy parameter)
e.g. exempli gratia, for example
EDR Enhanced Data Rate
EEPROM Electrically Erasable Programmable Read Only Memory
EIA Electronic Industries Alliance
ESD Electrostatic Discharge
ESR Equivalent Series Resistance
GAP Generic Access Profile
GATT Generic ATTribute protocol
GSM Global System for Mobile communications
HID Human Interface Device
IC Inter-Integrated Circuit Interface
I/O Input/Output
IC Integrated Circuit
IF Intermediate Frequency
INL Integral Non-Linearity (ADC accuracy parameter)
IPC See www.ipc.org
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Term Definition
IQ In-Phase and Quadrature
JEDEC Joint Electron Device Engineering Council (now the JEDEC Solid State Technology
Association)
KB Kilobyte
L2CAP Logical Link Control and Adaptation Protocol
LC An inductor (L) and capacitor (C) network
LED Light-Emitting Diode
LNA Low Noise Amplifier
LSB Least Significant Bit (or Byte)
MAC Medium Access Control
MCU MicroController Unit
MISO Master In Slave Out
MLC MultiLayer Ceramic
MOSI Master Out Slave In
NSMD Non-Solder Mask Defined
PA Power Amplifier
PC Personal Computer
PCB Printed Circuit Board
PD Pull-down
PIO Parallel Input/Output
PIO Programmable Input/Output, also known as general purpose I/O
plc public limited company
ppm parts per million
PU Pull-Up
PWM Pulse Width Modulation
QFN Quad-Flat No-lead
RAM Random Access Memory
RF Radio Frequency
RISC Reduced Instruction Set Computer
RoHS Restriction of Hazardous Substances in Electrical and Electronic Equipment Directive
(2002/95/EC)
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Term Definition
ROM Read Only Memory
RSSI Received Signal Strength Indication
RTS Request To Send
RX Receive or Receiver
SIG (Bluetooth) Special Interest Group
SMP Security Manager Protocol
SPI Serial Peripheral Interface
TCXO Temperature Compensated crystal Oscillator
TV TeleVision
TX Transmit or Transmitter
UART Universal Asynchronous Receiver Transmitter
VCO Voltage Controlled Oscillator
W-CDMA Wideband Code Division Multiple Access
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