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Phase detector 1 compares off-air line sync pulses with divided-by-32 output from the 500kHz oscillator. Second phase detector compares timing of divided down output with line output transformer derived pulses. The output from this detector is applied to the line drive pulse generator circuit. This enables the start of the scan and thus the horizontal picture position to. Be set.
Phase detector 1 compares off-air line sync pulses with divided-by-32 output from the 500kHz oscillator. Second phase detector compares timing of divided down output with line output transformer derived pulses. The output from this detector is applied to the line drive pulse generator circuit. This enables the start of the scan and thus the horizontal picture position to. Be set.
Phase detector 1 compares off-air line sync pulses with divided-by-32 output from the 500kHz oscillator. Second phase detector compares timing of divided down output with line output transformer derived pulses. The output from this detector is applied to the line drive pulse generator circuit. This enables the start of the scan and thus the horizontal picture position to. Be set.
The off-air line sync pulses and the divided-by-32
output from the 500kHz oscillator are compared in phase
detector 1, which controls the 500kHz oscillator. Thus all the outputs from the dividers are synchronised to the incoming line sync pulses. This phase detector has time- constant switching, operated by a voltage supplied to pin 23 by the central processor chip IR01 - programme selectors 8, 9 and 10 are reserved for AV use. The chip also switches to the AV time-constant when there is no or a very noisy video signal. The second phase detector compares the timing of the divided down output from the 500kHz oscillator with line output transformer derived pulses which are fed in at pin 12, arriving at the phase detector via the sandcastle pulse generator circuit. The output from this detector is applied to the line drive pulse generator circuit. This enables the start of the scan and thus the horizontal picture position to. be set. There is also a d.c. input from the line shift control, giving manual adjustment of the picture within the raster. During normal operation the line drive pulse generator stage produces from the output of the sawtooth line oscillator a constant 26psec wide pulse which is passed via the output stage to pin 10. At start up however the pulse width is narrower, giving a soft-start action to prevent overloading the line output transistor. The output from the saMooth line oscillator is also applied to the chopper drive modulator and the field drive modulator. For chopper pulse width modulation the modulator stage is under the control of an operational amplifier whose inverting input is taken to the slider of the set h.t. control. As previously mentioned, the mark-space ratio of the chopper drivc pulses is reduced at switch on to give a soft-start action. The field drive system is a bit more elaborate. A field- frequency sawtooth oscillator controlled by the vertical timing circuit provides, at pin 3, an output for the EW correction circuit in the TDA4950 chip IG01. This output is also shaped and fed back to pin 2, one of the inputs of another operational amplifier, together with a feedback waveform from the field output stage. The sawtooth output from this operational amplifier is fed, along with the output from the sawtooth line oscillator, to the field drive modulator circuit. The result of mixing these two signals is a pulse-width modulated output, i.e. the output from the field drive modulator consists of line-frequency pulses modulated at field rate. At the beginning of the field scan the pulses are narrow. They gradually increase in width during the field scan. Those familiar with the old Philips G1l chassis will recognise this as class D drive. We shall see how it's used shortly. Interchannel sound muting is based on detecting the presence of off-air sync pulses. Pin 24 goes low when a video signal is present, rising to 6.7V in the absence of a video signal to activate the sound muting system. The TDA2029C incorporates a safety circuit which shuts down the line, field and chopper drive outputs in the event of excessive output voltages in the line output or chopper circuits. Voltage sensing is at pin 28, which is normally at 0V and rises to about 6V in the trip condition. Line Deflection The line driver and output stages follow conventional practice. A BU508A or S2fil0A3 acts as the line output transistor (TL31). Taps and windings on the line output transformer provide zffiV, 23V and 13V lines and the c.r.t.'s heater supply. The diode-split winding provides the 680 e.h.t. and the input to the combined focus/first anode control unit on the c.r.t. base panel. A further winding provides current for the thyristor field output stage. Field Deflection Field scanning is controlled by an ESM740G thyristor, DL21, whose gate is coupled via RL21 to IL14's field output pin 4, which as we have seen produces a pulse- width modulated output. The arrangement is shown in Fi g. 7. The reason for using a winding on the line output transformer as a load for DL2l is the need to be able to switch it off. As you will doubtless know, a thyristor can be switched on by applying a positive-going pulse to its gate but will switch off only when the voltage across it is reduced to zero. The line flyback pulses picked up by winding 4-11 of the line output transformer switch DL22 on, with the result that DL21 is switched off once per line. The pulse-width modulation applied to DL21's gate switches it on once per line at a progressively earlier point as the field scan progresses. Since the impedance of the field scan coils at line frequency is large they have an integrating effect on the field scan current. In this way the steadily increasing current pulses are smoothed to produce a ramp. Current flows from chassis via DL2l, LL32, winding 4-11 on the line output transformer, RL50, the field scan coils and RF17 to the 23V supply. During the field flyback period DL21 remains cut off and DL22 acts as a clamp. The voltage developed across CL54 rises to some 200V and the direction of current through the scan coils is reversed. RF17 is included to provide a feedback signal which is tapped from the height control and fed back to pin 2 of TLI4. EW Correction A conventional diode modulator arrangement is used for EW correction, with the driver and waveform shaping circuitry incorporated in a TDA4950 chip (IG01). Fig. 8 shows the circuitry here. The field-frequency sawtooth waveform fed into pin 1 is converted to a parabolic waveform by the first stage, a Miller integrator. PG02 adjusts the tilt of the parabolic waveform to provide keystone correction. Overall feedback is applied to pin 7 to control the gain of the internal circuitry, PG08 adjust- ing the degree of pincushion correction provided. An anti- breathing input from the earthy end of the e.h.t. circuit is also applied to pin 7. The other input to the operational amplifier, at pin 8, is fed with a sawtooth waveform derived from a 50V peak+o-peak pulse obtained from the line output transformer. This signal is in anti-phase to the line scan, and as PG12 sets its amplitude this preset operates as a width control. NS Correction With Super-Planar tubes additional S correction plus pincushion and "gullwing" (or moustache) correction are required. These are provided by the NS correction cir- cuitry on board NS5000M. Text and Graphics Most receivers that incorporate the ICC5 chassis also have Fastext and on-screen graphics. A set of three chips TELEVISION JULY 1989 T coni r ol Gat i nq DUr SeS Composi te vids inDst Fig.7: The field deflection circuit. provides the Fastext facilities, with a 4-page memory. The SAA5231 text acquisition chip IV03 feeds an SAA5243 device (IV02) which is dcscribed as a computer-controlled teletext chip - it's controlled by IR01 via the I2C bus. Captured pages of data are transferred to IV01, a static RAM (p.PD43&C[5L).IV02 contains a character gener- ator which provides RGB text signals plus blanking suitable for text-only, mixed or subtitle operation. The teletext panel also contains two custom-built chips, IV05 and IV06, which provide synchronised RGB graphics for user-control information, station identification and the point-of-sale message. ln Conclusion Much has been fitted into this compact chassis by clever TELEVISION JULY 1989 Sandc asl t e pul ses Fig. 8: Circuitry around the TDA4950 chip which controls the EW diode modulator. use of conventional and MELF (metal-ended leadless- frame, i.e. surface mounted) components. Some might query the return of plug-in modules, but the plug and socketry is of a high standard and will permit a degree of panel jockeying in the event of a bout of technofear. The performance provided by the chassis should win many admirers. It's an interesting change from established UK and Japanese designs. 681 Hori zontal t hi t t Fig. 6: Simplified block diagram of the TEA2029C power processor chip. Wi ndrng on LOPI I I tt t t I t I PWM fi el d dri ve l r om l L16