Miikka Ylimaula, Markku Aberg, J yrki Kiihamaki, Hannu Ronkainen VTT Information Technology, Microelectronics, P.O.B. 1208, FIN-02044, Finland Tel. +35894566603, Fax +35894567012, e-mail: Mii!&a.Ylimaula@vtt.fi Abstract: We report an integrated monolithic micromechanical capacitive pressure sensor circuit based on novel method f or fabricating pressure detecting vacuum cavities into buried oxide of SOI-wafer. The method allows fabricating the readout circuit with standard bulk CMOSprocess. The readout circuit of the pressure sensor is a lowpower CMOS relaxation oscillator. 1. Introduction Nowadays there is an increasing need for low-cost absolute pressure sensors, especially in automotive industry. The monolithic SoC approach offers many advantages compared to.a hybrid or multi-chip structure. Firstly, monolithic sensors reduce paracitics and extemal noise because the pressure signal is processed in close proximity to the transducer. The overall die area is typically smaller, too. There are some process descriptions of integrated MEMS in the literature [1,2,3,4,5]. Usually they suffer from compromises made between the two technologies: polysilicon MEMS is difficult to prepare over the IC, or the IC must he fabricated after making complex embedded polysilicon structures. In either case device properties are compromised or expensive process technology is needed. In our modular approach, however, there is a synergy between MEMS and IC, both MEMS and IC are made of the same material and, for example, MEMS isolation can he used also for reduction of transistor parasitic capacitances and the metallization structures are common for both. 2. Process description Bonded silicon on insulator (SOI) wafers are used as starting material. The handle wafer is heavily doped p- type silicon and the resistivity of the p-type structure layer is around I O Rcm to accommodate conventional CMOS. Structure layer and buried oxide thicknesses are 8 pm and 1 pm, respectively. So the structure layer behaves like hulk silicon from the CMOS processing and device point of view. The vacuum ' cavities forming the sensor devices (schematically shown in Fig. 1.) are fabricated using Plug-up sequence [6,7] as follows: 1. An etch-stop layer is deposited on SO1 wafers. 2. An array of approximately micron-sized openings is etched through the device layer of SO1 with slight overetching into the buried oxide to form antistiction bumps. 3. Semipermeable polysilicon is deposited in such a way that pinholes remain at the bottom of each well. 4. Buried oxide is locally removed through pinholes. 5. The wells are plugged up with a layer of LPCVD polysilicon film. The cavities remain in vacuum. 6. After etchback, the IC-compatible, single crystal silicon surface is revealed. Besides active cavities for microelectromechanical devices, substrate contacts and isolation trenches are generally needed. The schematical cross-section of these sub-modules is shown in Fig. 2. In this study the integrated substrate contacts were omitted. In the future runs in-situ doped polysilicon will he used for substrate contacts. The DRIE etched isolation trenches are refilled with oxide after cavity formation, just before the formation of CMOS wells. During the cavity formation the area designated for CMOS is protected by a stack of selected thin film. The integrated circuit process selected for this demonstration is a 1 pm gate length bipolar enhanced molybdenum gate CMOS. In principle also any polysilicon CMOS process compatible with the p-type structure layer conductivity could he used instead. Only the low voltage CMOS pari of Ihc process was used for the circuit presented here. The BeCMOS process is optimised for analog and mixed-signal circuits. It uses a p-type substrate with triple well. Besides the standard n- and p-wells the process has a deep n-well with a shallow p-well inside it. This structure is used for isolating analog NMOS transistors and vertical pnp transistors. An extra well was added to the MEMS region to enhance the conductivity of the structure layer.. The higher doping level is needed to reduce the temperature and voltage sensitivity of the anchor area of MEMS devices. Tailoring of the structure layer doping profile by blanket implantation before wafer bonding is also an altemative to make the top electrode more conductive. CMOS portion of the process uses self-aligned molybdenum gate with 20 nm gate oxide. Molybdenum gate metal is used also as a bottom electrode for metal- insulator-metal capacitors. Stacked floating gate MOS 61 1 0-7803-8 108-4/03/$17.0002003 IEEE. Etch acces holes in Silicon substrate Figure 1. Schematic cross-section of a plugged-up SO1 cavity before etchback with typical dimensions. transistors with capacitively connected control electrodes can be used as EEPROM memory cells. The bipolar transistors, ifused, are processed before the CMOS gate process. Both npn and pnp transistors have conventional .triple diffused structure with implanted emitters. The key properties of the processed circuit elements-are tabulated in the Table 1. Mosi of the circuit elements are modular and they can be omitted from the fabrication process if so desired. The high voltage NMOS is an important option if electrostatic drive of capacitive resonant elements is required. - Table 1. List of circuit elements of the modular BeCMOS-process. The wafer processing was mostly done ai 'VTT Information Technology facilities. 3. Pressure sensing cavity The structure of pressure sensor is presented in Figure 2. The top electrode is isolated from CMOS-bulk with a oxide~trench. Substrate iihighly dbped and it forms the large chip wide bottom electrode. The bottom electrode can be connected to readout circuit with three different methods:. 1. ~ With capacitive coupling to CMOS-hulk. This method is simplest hut it is limited to cases where bottom electrode can be at lowest voltage. Good capacitive coupling (Cbp>>Cs) requires that cavity area is smaller than the non-cavity chip area. 2. With resistive path through polysilicon plug (Fig 1.). This method allows us to connect the bottom electrode freely to the readout circuit, this is usually preferred method. 3. With external wiring. In this work the first method was used. The simplified electrical model of the sensor is presented in Figure 3. Cs is the capacitance of the vacuum cavity and the buried oxide layer between cavity and oxide trench, Ctr is the capacitance of the trench oxide and Cbp is the capacitance between bottom-electrode (substrate) and CMOS-hulk. Since the pressure sensing range is determined by the ratio of cavity diameter to height of structure layer, proper sensor range can he controlled in design by calculating proper value for the diameter. In this work we used hexagonal shaped sensor with 300 nmdiameter. Figure 2. Side view of pressure sensor,. a) (optional) electrical substrate contact through SO1 buried oxide, not used in this work, b) trench isolation and c) vacuum cavity. TOP "I. .i; 2;- Crr T,T CMOS-bulk Figure 3. Electrical model 4. Readout circuit The capacitance measurement is based on the relaxation oscillator principle. The sensor capacitor is modulated by pressure and this modulates the frequency of the oscillator. The principle of the readout circuit, is presented in Figure 4. . A more detailed schematic of the circuit is in Figure 5. The readout circuit is a CMOS current controlled astable multivibrator [8,9] and it uses constant current source and sink method for oscillation, that is the timing Capacitor or the sensor capacitance is charged and discharged alternately by constant ,net current. The differential pair Mnl-Mn2 senses the voltage across the timing capacitor and controls current sources Mp5 and Mn7 to initiate charge and discharge cycles. Since the timing capacitor is continuously charged by Il=lMps, the discharging tail current I2=I&, must he larger than I,,,. 612 - - Figure 5. The readout circuit. To make waveform symmetrical, the tail current IMn7 must he 21Mp5. When I u , , , = ~ I ~ ~ ~ , the frequency.of the oscillator is where VI and V,, voltages over CO, are switching points of the multivibrator. The current mirror Mp6-Mp7 provides positive feedback. Moreover, the bias circuit [lo], formed by Mpl-Mp4 and MnlO-Mnll, is included to provide gate voltages to current sources Mp5, Mp9, Mn7 and Mn8. Inverter (Mn9 and MplO) is used as a buffer. voo A Figure 4. The principle of the readout circuit. CO is the total sensor capacitance. 5. Experimental results The photograph of the fabricated prototype is presented in Figure 6. Output waveform (Figure 7.) was measured with HP54602B-oscilloscope. Measured current consumption was 21 uA at 3 V supply voltage. Measured pressure response is presented in Figure 8. Pressure range is 1-4 bar and linearity error is 37.5 % of the full- scale output. 1 5 2 s 3 3 5 A ~* OI YI L p'8rru.e ,bar] Figure 8. Pressure response The temperature dependency of the sensor capacitance was measured in various pressures (Figure 9.). It IS caused mainly by temperature dependencies of parasitic capacitances. Figure 6. Microphotograph of fully integrated pressure sensor. 613 6. Conclusions The operation of the fully integrated pressure sensor was demonstrated and its properties were discussed. The readout circuit presented here has only the core part of a full sensor system. The MEMS process used sets no restrictions on the CMOS process for electronics and all auxiliary blocks: compensation, calibration, converters, DSP or communications circuits can easily be added to the circuit. In future to eliminate temperature dependency of parasitic capacitances a reference cavity must be utilised and the capacitance ratio or the capacitance difference of the cavities must be measured, perhaps with some kind of switched capacitor circuit. 2.851 I , , , 2.45 20 30 40 50 60 70 60 90 100 Temperature [c] Figure 9. Temperature dependency of vacuum cavity. Acknowledgements This work was partly funded by Finnish Technology Agency, Okmetic Oyj, VTI Technologies Inc. and Micro Analog Systems Oy. Part of the BeCMOS processing was made at Micro Analog Systems production facilities in Espoo. Tapani Vehmas, Ari Haira and especially Teija Hakinen are gratefully acknowledged for their contribution to the results achieved. We acknowledge Heikki Kuisma at VTI Technologies Inc. for valuable discussion conceming pressure sensor design. Moreover, we thank J aakko Ruohio at VTI Technologies Inc. for his contribution to measurements. Yasaitis et. al. A modular process for integrating thick polysilicon MEMS devices with submicron CMOS Proc. SPIE, Vol. 4979 (2003) 145-154. R. Aigner, K-G. Oppermann, H. Kapels, S. Kolb, Cavity-Micromachining Technology: Zero- Package Solution for Inertial Sensors, Proc. 1 I Int. Conf. On Solid-state Sensors and Actuators, Mnnchen, Germany, J une 10-14, 2001, vol.l., pp.186-189. A. V. Chavan and K. D. Wise, A Monolithic Fully- integrated Vacuum-sealed CMOS Pressure Sensor, IEEE . . .2000 K. Kasten, N. Kordas, H. Kappert and W. Mokwa, Capacitive pressure sensor with monolithically 614 integrated CMOS readout circuit for high temperature applications, Sensors and Actuators A 3193,2002, pp. 1-5. 1. Baskett, R. Frank and E. Ramsland, The Design of a Monolithic, Signal Conditioned Pressure Sensor, IEEE 1991 Custom Integrated Circuits Conference,pp. 27.3.1 -27.3.4. J . Kiihamaki et. al., Plug-Up - A new concept for fabricating SOIMEMS devices DTIP 2003 conference. J . Kiihamaki et. al., Modular integration of CMOS and SOI-MEMS using plug-up concept Transducers 2003, Boston, USA. I. Filanovsky and H. Bakes, A Novel CMOS Multivibrator Analog Integrated Circuits and Signal Process., vol2., pp. 217-222, Sept. 1992. [9] Changku Hwang et. al:,-A Very Low Frequency, Micropower, Low Voltage CMOS Oscillator for Noncardiac Pacemakers IEEE Trans. Circuits and Systems I: Fund. Theory and Appl., vol. 42, No. 11, Nov. 1995. [ IO] E. Vittoz, The Design of high performance analog circuits on digital CMOS chips, IEEE J. Solid- State Circuits, vol. SC-20, pp.657-665, J une 1985.