D08 Getting Started with DE2 Development Board (VHDL)
D08 - Getting Started with DE2 Development Board VHDL
! E"#ipment 1. Altera DE2 Development board (equipped with Cyclone II EP2C35F!2C FP"A# 2. $%& Cable 3. 'equired File( ()ound on blac*board# a+ tut,quartu(,intro,vhdl+pd) b+ DE2,pin,a((i-nment(+c(v c+ DE2,$(er.anual+pd) (a( a re)erence# d+ tut,initialDE2+pd) (a( a re)erence# 4. Altera /uarta( II 0eb Edition 9.0sp2 2! Ba$%gro#nd &n'ormation 12he DE2 board )eature( a power)ul Cyclone' II FP"A chip+ All important component( on the board are connected to the pin( o) thi( chip3 allowin- the u(er to con4-ure the connection between the variou( component( a( de(ired+ For (imple e5periment(3 the DE2 board include( a (u6cient number o) (witche( (o) both to--le and pu(hbutton variety#3 7ED(3 and !8(e-ment di(play(+ For more advanced e5periment(3 there are %'A.3 %D'A.3 and Fla(h memory chip(3 a( well a( a 9 x 2 character di(play+ For e5periment( that require a proce((or and (imple I:; inter)ace(3 it i( ea(y to in(tantiate Altera<( =io( II proce((or and u(e inter)ace (tandard( (uch a( '%8232 and P%:2+ For e5periment( that involve (ound or video (i-nal(3 there are (tandard connector( provided on the board+ For lar-e de(i-n pro>ect(3 it i( po((ible to u(e $%& and Ethernet connection(3 a( well a( the %D memory card+ Finally3 it i( po((ible to connect other u(er8de(i-ned board( to the DE2 board by mean( o) two e5pan(ion header(+? @9A (! E)periment *verview 9+ "ettin- %tarted In /uartu( II 2+ In(tallation o) the $%&8&la(ter Driver (u(ed to communicate with the DE2 &oard# 3+ Compile3 %imulate and Pro-ram your 4r(t BCD7 Pro>ect D+ Per)orm 7aboratory E5erci(e( +evi,ed- .#l/ 2000 1age 22 D08 Getting Started with DE2 Development Board (VHDL) 3! 1ro$ed#re 4.1 Installation of USB-Blaster Driver Plu- in the E8volt adapter to provide power to the board+ $(e the $%& cable to connect the le)tmo(t $%& connector (the one clo(e(t to the power (witch# on the DE2 board to a $%& port on a computer that run( the /uartu( II (o)tware+ 2urn on the power (witch on the DE2 board (red#+ 2he computer will reco-niFe the new hardware connected to it( $%& port3 but it will be unable to proceed i) it doe( not have the required driver already in(talled+ 2he DE2 board i( pro-rammed by u(in- Altera<( $%&8&la(ter mechani(m+ I) the $%&8&la(ter driver i( not already in(talled3 the =ew Cardware 0iFard in Fi-ure 9 will appear+ %ince the de(ired driver i( not available on the 0indow( $pdate 0eb (ite3 (elect No, not this time in re(pon(e to the que(tion a(*ed and clic* Next+ 2hi( lead( to the window in Fi-ure 2+ +evi,ed- .#l/ 2000 1age 222 D08 Getting Started with DE2 Development Board (VHDL) 2he driver i( available within the /uartu( II (o)tware+ Cence3 (elect Install from a specific location and clic* Next to -et to Fi-ure 3+ =ow3 choo(e Search for the best driver in these locations and clic* Browse to -et to the pop8 up bo5 to 4nd the )older+ At thi( point the in(tallation will commence3 but a dialo- bo5 will appear indicatin- that the driver ha( not pa((ed the 0indow( 7o-o te(tin-+ Clic* Continue Anyway+ +evi,ed- .#l/ 2000 1age (22 D08 Getting Started with DE2 Development Board (VHDL) 2he driver will now be in(talled+ Clic* Finish and you can (tart u(in- the DE2 board+ 2urn the device oG until you pro-ram the FP"A+ +evi,ed- .#l/ 2000 1age 322 D08 Getting Started with DE2 Development Board (VHDL) 4.2 Getting Started In Quartus II Each lo-ic circuit3 or (ubcircuit3 bein- de(i-ned with /uartu( II (o)tware i( called a project+ 2he (o)tware wor*( on one pro>ect at a time and *eep( all in)ormation )or that pro>ect in a (in-le directory ()older# in the 4le (y(tem+ 1 Create a directory to hold your pro>ect<( 4le(+ ! %tart the /uartu( II (o)tware+ " %elect File H New #ro$ect %i&ard3 thi( open( a dialo- which indicate( the capability o) thi( wiFard+ Pre(( Next ' %et the wor*in- directory to be the directory you created in (tep 9 or enter a new )older and the wiFard will create the directory )or you+ 2he pro>ect mu(t have a name3 which i( u(ually the (ame a( the top8level de(i-n entity that will be included in the pro>ect+ Choo(e light a( the name )or both the pro>ect and the top8 level entity+ Pre(( Next+ ( 2he wiFard ma*e( it ea(y to (peci)y which e5i(tin- 4le( (i) any# (hould be included in the pro>ect+ A((umin- that we do not have any e5i(tin- 4le(3 clic* Next+ ) 0e have to (peci)y the type o) device in which the de(i-ned circuit will be implemented+ Choo(e Cyclone II a( the tar-et device )amily+ 0e can let /uartu( II (o)tware (elect a (peci4c device in the )amily3 or we can choo(e the device e5plicitly+ 0e will ta*e the latter approach+ From the li(t o) available device(3 choo(e the device called EP2C35F672C6 which i( the FP"A u(ed on Altera<( DE2 board+ Pre(( Next+ * %ince we will rely (olely on /uartu( II tool(3 we will not choo(e any other 3 rd party tool(+ Pre(( Next+ + A (ummary o) the cho(en (ettin-( appear( in the (creen+ Pre(( Finish3 which return( to the main /uartu( II window3 but with light (peci4ed a( the new pro>ect3 in the di(play title bar+ 4.3 Compile Simulate and !rogram "our first #$D% !ro&e't Prep: 9+ 'ead throu-h the tutorial tut_quartus_intro_vhdl.pdf available on blac*board+ In Lab: 9+ Continue the 4le tut_quartus_intro_vhdl.pdf )rom (ection 3 (pa-e E#+ =oteI 2he tutorial wa( written u(in- /uartu(II ver(ion J+ I) prep ha( been done thi( (ection will not ta*e lon- in the lab+ Doin- thi( (ection thorou-hly will help you with under(tandin- and -ive you the ba(ic (*ill( to u(e /uartu(II e6ciently+ Summary Copy -iven BCD7 into created pro>ect (pa-e 9K# Compile BCD7 (pa-e 93# 7earn how to handle (ynta5 error( in BCD7 (pa-e 9D895# Per)orm manual pin a((i-nment (pa-e 9589# +evi,ed- .#l/ 2000 1age 422 D08 Getting Started with DE2 Development Board (VHDL) Per)orm pin a((i-nment )rom +c(v 4le (pa-e 9!89J# Important %imulate BCD7 (pa-e 9E823# Pro-ram the FP"A Device (pa-e 2D82E# +evi,ed- .#l/ 2000 1age 522 D08 Getting Started with DE2 Development Board (VHDL) 4.4 !erform %a(orator" )*er'ises 2he purpo(e o) thi( e5erci(e i( to learn how to connect (imple input and output device( to an FP"A chip and implement a circuit that u(e( the(e device(+ 0e will u(e the (witche( %09!LK on the DE2 board a( input( to the circuit+ 0e will u(e li-ht emittin- diode( (7ED(# and !8(e-ment di(play( a( output device(+ $(e !"# pro-rammin- )or the remainder o) the laboratory+ 3!3! E)er$i,e Prep: 2he DE2 board provide( 9J to--le (witche(3 called SW9!K3 that can be u(ed a( input( to a circuit3 and 9J red li-ht(3 called LEDR9!K3 that can be u(ed to di(play output value(+ Fi-ure 9 (how( a (imple BCD7 entity that u(e( the(e (witche( and (how( their (tate( on the 7ED(+ %ince there are 9J (witche( and li-ht( it i( convenient to repre(ent them a( array( in the BCD7 code3 a( (hown+ 0e have u(ed a (in-le a((i-nment (tatement )or all 9J LEDR output(3 which i( equivalent to the individual a((i-nment( 7ED'(9!# <M %0(9!#N 7ED'(9# <M %0(9#N . . . 7ED'(K# <M %0(K#N 2he DE2 board ha( hardwired connection( between it( FP"A chip and the (witche( and li-ht(+ 2o u(e SW9!K and LEDR9!K it i( nece((ary to include in your /uartu( II pro>ect the correct pin a((i-nment(3 which are -iven in the DE2 ser !anual+ For e5ample3 the manual (peci4e( that SWK i( connected to the FP"A pin "2# and LEDRK i( connected to pin $E2%+ A -ood way to ma*e the required pin a((i-nment( i( to import into the /uartu( II (o)tware the 4le called DE2 pin assign&ents.csv ((ee blac*board#3 which i( provided on the DE2 S'ste& (D and in the $niver(ity Pro-ram (ection o) Altera<( web (ite+ 2he procedure )or ma*in- pin a((i-nment( i( de(cribed in the tutorial )uartus ** *ntroduction using +,DL Design3 which i( al(o available )rom Altera+ It i( important to realiFe that the pin a((i-nment( in the DE2 pin assign&ents.csv 4le are u(e)ul only i) the pin name( -iven in the 4le are e5actly the (ame a( the port name( u(ed in your BCD7 entity+ 2he 4le u(e( the name( SW@KA . . . SW@9!A and LEDR@KA . . . LEDR@9!A )or the (witche( and li-ht(3 which i( the rea(on we u(ed the(e name( in Fi-ure 9 (note that the /uartu( II (o)tware u(e( @ A (quare brac*et( )or array element(3 while the BCD7 (ynta5 u(e( ( # round brac*et(#+ @3A LIBRARY ieee; USE ieee.std_logic_1164.all; -- Simple module that coects the S! s"itches to the LE#R lights E$%I%Y pa&t1 IS '(R% ) S! * I$ S%#_L(+I,_-E,%(R)1. #(!$%( /0; LE#R * (U% S%#_L(+I,_-E,%(R)1. #(!$%( /0 -- &ed LE#s 0; 1 E$# pa&t1; AR,1I%E,%URE Beha2io& (3 pa&t1 IS +evi,ed- .#l/ 2000 1age 622 D08 Getting Started with DE2 Development Board (VHDL) BE+I$ LE#R <4 S!; --15 S"itches 6coected to7 15 &ed LE#s E$# Beha2io&; Lab: Per)orm the )ollowin- (tep( to implement a circuit corre(pondin- to the code in Fi-ure 9 on the DE2 board+ 9+ Create a new /uartu( II pro>ect )or your circuit+ %elect Cyclone II EP2C35F!2C a( the tar-et chip3 which i( the FP"A chip on the Altera DE2 board+ 2+ Create a BCD7 entity )or the code in Fi-ure 9 and include it in your pro>ect+ 3+ Include in your pro>ect the required pin a((i-nment( )or the DE2 board3 a( di(cu((ed above+ Compile the pro>ect+ D+ Download the compiled circuit into the FP"A chip+ 2e(t the )unctionality o) the circuit by to--lin- the (witche( and ob(ervin- the 7ED(+ 3!3!2 E)er$i,e 2 Prep: &uild a -.seg&ent decoder module that ha( the two8bit input c9cK+ 2hi( decoder produce( (even output( that are u(ed to di(play the corre(pondin- numer$% %&ara%ter on the !8(e-ment di(play+ 2he (even (e-ment( in the di(play are identi4ed by the indice( K to (hown below+ Each (e-ment i( illuminated by drivin- it to the 'o($% )a'ue 0 (active low#+ Oou are to write a BCD7 entity that implement( lo-ic )unction( that repre(ent circuit( needed to activate each o) the (even (e-ment(+ $(e only (imple BCD7 a((i-nment (tatement( in your code to (peci)y each lo-ic )unction u(in- a &oolean e5pre((ion+ 2here are multiple !8(e-ment di(play( on the DE2 boardN in DE2_pin_assign&ents.csv the ri-ht8mo(t di(play i( called CEPK+ Each (e-ment o) the di(play i( a (in-le bit within the array CEPK+ !rut& !ab'e # Inputs Outputs a b c d e f g C 1 C 0 0 1 2 3 4 5 6 0 / / / / / / / / 1 1 / 1 1 / / 1 1 1 1 2 1 / / / 1 / / 1 / 3 1 1 / / / / 1 1 / E*amp'e +,-L .or output se(ment 0 / 1 1E8/)/0 <4 $(%),)100 A$# ,)/0; --e9uatio :o& segmet a )/0 +evi,ed- .#l/ 2000 1age 822 D08 Getting Started with DE2 Development Board (VHDL) 1E8/)10 <4 6/7; --e9uatio :o& segmet ; )10 Lab: 9+ Create a new /uartu( II pro>ect )or your circuit (name it decode2to-seg#+ 2+ Create a BCD7 entity )or the !8(e-ment decoder+ Connect the c9cK input( to (witche( SW9K3 and connect the output( o) the decoder to the ,E/0 di(play on the DE2 board+ 2he (e-ment( in thi( di(play are called ,E/0K3 ,E/093 . . .3 ,E/0+ Oou (hould declare the !8bit port 1E8/ * (U% S%#_L(+I,_-E,%(R)/ %( 60; in your BCD7 code (o that the name( o) the(e output( match the corre(pondin- name( in the DE2 ser !anual and the DE2 pin assign&ents.csv 4le+ 3+ A)ter ma*in- the required DE2 board pin a((i-nment(3 compile the pro>ect+ D+ Download the compiled circuit into the FP"A chip+ 2e(t the )unctionality o) the circuit by to--lin- the SW9K (witche( and ob(ervin- the !8(e-ment di(play+ 5+ En(ure you (ave thi( circuit a( it will be u(ed later+ 3!3!( E)er$i,e ( 2he purpo(e o) thi( e5erci(e i( to create a 28bit counter u(in- the /$A'2$% II vi(ual circuit de(i-n pac*a-e+ Prep: De(i-n a 28bit counter with d8Qip8Qop( and lo-ic -ate( in the (pace belowI +evi,ed- .#l/ 2000 1age 022 D08 Getting Started with DE2 Development Board (VHDL) Lab: 1. Create a new /uartu( II pro>ect )or your circuit (name it counter22it#+ 2. Create a bloc* dia-ram by 3ile 4 "e5 4 6loc7 Diagra&8Sche&atic 3ile. %. $(e the (ymbol tool3 3 or right.clic7 4 insert 4 s'&2ol to in(ert d8Qip8Qop(3 lo-ic -ate( and input and output pin(+ $(e the ortho-onal node tool3 3 to connect component(+ 9. Compile and (imulate the circuit to chec* )unctionality ((ee (ection D+3#+ 3!3!3 E)er$i,e 3 2he purpo(e o) thi( e5erci(e i( to (how how lo-ic can be encap(ulated into Rblac* bo5< (ymbol(+ Lab: 1. Create a new /uartu( II pro>ect )or the current e5erci(e (name it counting-seg#+ Include the BCD7 4le )rom e5erci(e2 and the (chematic 4le )rom e5erci(e3 in the pro>ect+ 2. Create a bloc* dia-ram by 3ile 4 "e5 4 6loc7 Diagra&8Sche&atic 3ile. %. ;pen your BCD7 4le )rom e5erci(e 2 (4le( tab in pro>ect navi-ator#+ 0ith thi( 4le open (elect the )ollow menu option(I 3ile 4 (reate8pdate 4 (reate S'&2ol 3iles for (urrent 3ile 9. ;pen your (chematic 4le )rom e5erci(e 3 and crete a (ymbol 4le )or thi( 4le a( in (tep 3+ #. $(e the (ymbol tool3 3 or right.clic7 4 insert 4 s'&2ol to in(ert the new (ymbol( by brow(in- )or the created 4le( (+b()# or by loo*in- in the pro>ect node+ In(ert both (ymbol(+ :. %ome modi4cation( to e5erci(e2 entity declaration will be needed to be)ore you can connect the two component(+ -. Connect the component( (o that an input pin i( u(ed a( the cloc* to drive the counter and the output( o) the counter drive the decoder S you (hould end up with (omethin- (imilar to the ima-e below+ ;. 0hen connectin- node( to a bu( (bu( mer-e or bu( rip# it i( the namin- that connect( them (not the vi(ual >oin#+ 'i-ht8clic* on the node line or bu( and (elect propertie( to name in a (imilar )a(hion to the ima-e above+ +evi,ed- .#l/ 2000 1age 022 D08 Getting Started with DE2 Development Board (VHDL) <. =ame the input pin to a (witch and the output pin( to a !(e-ment di(play a( li(ted in the pin a((i-nment c(v 4le+ A)ter importin- DE2 pin assign&ents.csv= compile the pro>ect+ 10. Download the compiled circuit into the FP"A chip and te(t the )unctionality+ 3!3!4 E)er$i,e 4 E5tend the la(t e5erci(e to a 3 bit counter and decoder+ Con(ider u(in- a BCD7 %ase statement )or an ea(ier be&a)$oura' $mp'ementat$on o) the decoder or a 0$t&1se'e%t10&en statement )or a %on%urrent stru%tura' $mp'ementat$on+ 4! Bi7liograph/ +evi,ed- .#l/ 2000 1age 22 D08 Getting Started with DE2 Development Board (VHDL) @9A Altera3 >etting Started 5ith $ltera?s DE2 6oard+ 2KKJ+ @2A Altera3 )uartus ** *ntroduction sing +,DL Design+ 2KKJ+ @3A Altera3 La2orator' E@ercise 1+ 2KK+ +evi,ed- .#l/ 2000 1age 222