Table of Contents

I. Introduction .................................................................................................................................. 8
II. Literature Review ...................................................................................................................... 8
1. Application of LR-WPAN ......................................................................................................... 8
2. Development Tendency of LR-WPAN ...................................................................................... 9
3. Current Works on LR-WPAN.................................................................................................. 11
III. Project Scope........................................................................................................................... 11
IV. System Specification ............................................................................................................... 12
1. System design ......................................................................................................................... 12
1.1 Network node ........................................................................................................................ 12
1.2 Network structure .................................................................................................................. 13
2. Features ................................................................................................................................... 13
V. Implementation ....................................................................................................................... 14
1. Hardware implementation ........................................................................................................... 14
2. Software implementation ............................................................................................................ 25
VI. Testing & Results .................................................................................................................... 36
1. Test cases ................................................................................................................................ 36
VII. Timeline .................................................................................................................................. 38
1. Work Breakdown Structure (WSB) ......................................................................................... 38
2. Milestones ............................................................................................................................... 38
VIII. Budget ................................................................................................................................. 39
IX. Conclusion and Future Development ....................................................................................... 40
References ......................................................................................................................................... 41










List of Figures
Figure 1 - Operating space of various WLAN and WPAN standards [1] ............................................... 8
Figure 2 - General architecture of a wireless sensor node [14] .............................................................. 9
Figure 3 - Apply wireless sensor network to detect fire in forest [15] ................................................. 10
Figure 4 - Abstracted architecture for the node ................................................................................... 12
Figure 5 - Abstract network architecture............................................................................................. 13
Figure 6 - Bias circuit for RF chip CC1101 at 868 MHz ..................................................................... 15
Figure 7 - Modified bias circuit for RF chip CC1101.......................................................................... 16
Figure 8 - PCB layout for RF bias circuit ........................................................................................... 17
Figure 9 - PCB of RF board ............................................................................................................... 17
Figure 10 - Purchased RF board ......................................................................................................... 18
Figure 11 - Voltage regulator ............................................................................................................. 18
Figure 12 - Audio capture module ...................................................................................................... 19
Figure 13 - PWM digital to analog converter ...................................................................................... 20
Figure 14 - RF board interface............................................................................................................ 20
Figure 15 - UART interface ............................................................................................................... 21
Figure 16 - General purpose buttons (left) and Reset button (right) .................................................... 21
Figure 17 - 7-segments LED display .................................................................................................. 22
Figure 18 - Clock configuration ......................................................................................................... 22
Figure 19 - Full function node ............................................................................................................ 23
Figure 20 - Reduced function node ..................................................................................................... 24
Figure 21 - Source code organization ................................................................................................. 25
Figure 22 - A-law Encoding formula [22]........................................................................................... 26
Figure 23 - Interrupt service routine ................................................................................................... 27
Figure 24 - Event based application structure ..................................................................................... 27
Figure 25 - Receive RF packet upon GDO0 falling edge interrupt ...................................................... 33
Figure 26 - Transmit radio using "listen before talk" scheme .............................................................. 34
Figure 27 - Packet structure for wireless transmission ........................................................................ 35
Figure 28 - Spectrum analysis of RF transmission .............................................................................. 36
Figure 29 - Listen_before_talk test ..................................................................................................... 37
Figure 30 - WBS Diagram .................................................................................................................. 38

List of Tables
Table 1 - Expensed budget ................................................................................................................. 39
Abbreviation terms
ADC Analog to Digital Conversion
ADPCM Adaptive Differential Pulse Code Modulation
DAC Digital to Analog Conversion
DSP Digital Signal Processing
FIFO First In First Out
IEEE Institute of Electrical and Electronics Engineers
IDE Integrated Development Environment
I/O Input/ Output
ksps kilo sample per second (sampling rate)
kbps kilo bit per second (bit rate)
LR-WPAN Low Rate Wireless Personal Area Network
LTE Long-Term Evolution (4
th
generation of mobile network)
MCU Micro Controller Unit
msps mega sample per second
OS Operation System
PCB Printed Circuit Board
PWM Pulse Width Modulation
RAM Random Access Memory
RF Radio Frequency
SPI Serial Peripheral Interface
TI Texas Instruments
USART Universal Asynchronous Receiver/Transmitter
WPAN Wireless Personal Area Network
WSN Wireless Sensor Network


I. Introduction
In this project, both hardware and software of a low rate wireless network platform is developed and
implemented targets the general purpose uses. The hardware for each network node includes the
microcontroller (MCU) dsPIC33FJ16MC102 from Microchip, the radio chip CC1101 provided by
TexasInstrument (TI), and some other supporting peripherals to interface the node with user and
surrounding environment. The selected MCU is a DSP target MCU, which offers many advantages
such as larger amount of RAM (1kB) and hardware 32bit multiplication, along with a prebuilt DSP
library. These advantages will provide more freedom in application development for the resulted
system. In addition, the radio chip from TI is also a good chip for low rate wireless purpose, with low
power consumption, integrated hardware packet handler and modulator, wide range of frequency, and
many others. More than that, their price is also low enough to allow the resulted system to be used in
different circumstances. In software side, the MPLAB tool from Microchip is used for best
compatibility. As no existing network protocol can be adopted, a new simple protocol is built along
with control interface for all included hardware.
II. Literature Review
1. Application of LR-WPAN
As the demand for high data rate wireless communication is dramatically increased in recent years,
majority of researches had focused on improving throughput. New standards of Wifi, mobile network,
satellite link had emerged to fulfill customers needs, such as IEEE 802.11 N, 4G LTE. Those
connections provide very large bandwidth to satisfy even the high definition multimedia transfer, but
they also require very complicated platform to take part in the network. That in turn increases the cost
and power consumption. However, there are other fields of application, which can take advantage of
the wireless connection to improve productivity and efficiency, but do not require large bandwidth.
They include sensor networking, automation, surveillance and many more. Low-Power, Low-Cost
Wireless Personal Area Networks (LR-WPAN) is a wireless network standard proposed by IEEE
which targets in cheap applications that cannot afford current popular wireless specifications like Wi-Fi
or Bluetooth [1]. Since its definition, LR-WPAN has become an interesting research area to apply
cheap wireless communication in various fields includes industries, agriculture, healthcare, automation,
security and even military [2].

Figure 1 - Operating space of various WLAN and WPAN standards [1]
Figure 1 is a simple comparison chart to explain the different between WPAN (Wireless Personal Area
Networks) and LR-WPAN. While both of them target short-range communication, the divergence of
those standards is the data throughput and thus it relates to the complexity of the system. WPAN
standards aim at high-speed link in order to serve in multi-media environment such as computer
network, high definition media transferring. LR-WPAN in contrast, target very low data rate system
like sensor networks and automation control. Those applications require very little and infrequent
information transfer. Therefore, the top priority in system design is very low power consumption, low
cost, and simple to be deployed.
Applications of LR-WPAN are varied. In industry and agriculture, the LR-WPAN can be implemented
as sensor network for monitoring the manufacturing environment [3], [4], [5]. In healthcare, LR-
WPAN can be used in cooperation with other electronic devices to monitor the patient health status and
accelerate the detection of sudden illness or accidents [6]. It can also be employed as a surveillance
system [7]. In a bigger scale, the sensor networks can be implement to detect earthquake, flood,
pollution, fire [8], [9]. Due to the ease of deployment and low cost, LR-WPAN can be implemented in
different geographies and structures.
In another trend, the LR-WPAN can be configured to be a control network in consumer product. For a
long time, devices like washing machine, micro oven needed separate direct control. Today, they can
be connected into a simple inexpensive network to be controlled automatically with the help of LR-
WPAN [10], [11]. Home automation and security is has become a market for wireless applications.
The LR-WPAN has also been used in short-range and indoor navigation help by utilizing the Received
Signal Strength parameter of the wireless devices [12], [13]. This feature is not supported by popular
positioning system like GPS.
2. Development Tendency of LR-WPAN
The biggest part in LR-WPAN is still the sensor network. These networks include many simple
terminal devices (nodes) which contains simple control unit, radio transceiver (RF) and various
application depended sensors for information collecting. Figure 2 represents an abstract view of a
general node used in wireless sensor networks (WSN). Each node will basically contain a micro
controller unit (MCU) to control and process data, a RF transceiver to transfer and receive information
within network, the power source (battery) to operate the node. On some specific applications, the node
can also include different sensors to collect data, memory to save essential information, and various
input/output (I/O) interfaces to interact with outside environment.

Figure 2 - General architecture of a wireless sensor node [14]
Then in Figure 3 is an application of these WSN, where sensor nodes are placed in the forest to monitor
the environment parameters like temperature, humidity, light intensity. When problem happen, this
network of sensor can immediately collect essential information and feedback to the sink node, and
then this sink node will notify the control center for appropriate intervention. Because each cheap node
of the WSN can work for very longtime with battery power source, and because they work wirelessly,
the network is easy and inexpensive to be implemented. Upon accidents like fire, the destruction of
these nodes will not be a remarkable lost compare to the benefit they can serve.

Figure 3 - Apply wireless sensor network to detect fire in forest [15]
The main targets in developing WSN are to improve durability, reduce power consumption to extend
the service life of the node. In some applications that require large coverage of the network, the options
to lengthen the communication range of the node is also important.
The second trend of LR-WPAN research is the control network. This network work in reversed
direction compare to sensor network. In WSN, information is collected by nodes and send back to
center node, where in this case commands is send from center node to control devices attached to the
nodes. The nodes now become a command translator for the control center, and therefore its
functionality is very simple. The nodes are normally attach to the device with powerful power source,
the low power consumption is no longer a big constrain. The top priority is to reduce the cost to
minimum, so it can be applied in manufacturing to generate profit.
Another big target of LR-WPAN development is responsive network where information flows in both
directions, from nodes to center and vice versa. These networks are normally used in simple
communication system to apply in class, museum, gamming, voting [16]. They can also be used to
establish communication channel in regions where other technologies are not applicable like remote
area, mining case [17]. This direction of development focuses more on bandwidth improvement,
routing protocol and collision avoidance.


3. Current Works on LR-WPAN
LR-WPAN is currently a promising research space for development and application adapting.
However, a few obstacles need to be removed to enable further progress. In term of hardware, the main
constraints are to reduce the power consumption of micro controller unit, improve the bandwidth of the
RF transceiver, and reduce cost. Top semiconductor providers are trying to improve their products
overtime to target those requirements. MSP430 MCU family from Texas Instruments [18], or eXtreme
Low Power PIC Microcontrollers from Microchip [19] had reduced current consumption down to
nano-Ampere scale with the part cost start from less than 1$. CC1101 RF transceiver from TI [20] had
provided up to 600kbps bandwidth, which is quite abundant for most applications. At higher level,
various researches try to apply new MCU and RF chips in design application board that can serve in
more sophisticate situations. In term of software, networking protocol is a big field to work on.
Different standards had been proposed and applied, like ZigBee, SimpliciTI. However, many problems
still exist due to the low bandwidth nature of LR-WPAN and the transmitting collision caused by the
limited capability of the low power RF transceivers. Efficient compression algorithms and routing
techniques are still on demand.
III. Project Scope
The project focuses on applying existing technologies to implement the LR-WPAN, which targets in
responsive communication. Responsive means data can be transferred in both directions. The network
utilizes the bandwidth provided by the transceiver as much as possible to transfer different kinds of
data back and forth between network nodes and the control center. Existing micro controllers and RF
transceivers were selected to implement the hardware platform, which targets low power consumption,
low cost and high level of resource utilization. The ultimate target of the project is to establish a
network running normally at proposed bandwidth. As only cheap and available resources are used, the
target network should be simple, inexpensive, and useful, but it is not necessary to be complied with
any existing standard. This project does not focus on any specific application, and thus it is built in a
generic form to transfer data in general perspective.



IV. System Specification
1. System design
Development of the system can be divided into two main sections. The first section is to build the
hardware which can communicate with each other via RF wireless channel. The second section is to
build a network protocol to regulate the way network nodes talk to each other with the target of
improving efficiency and eliminate confliction.
1.1 Network node
Figure 4 describes general structure of a network node. Each node consists of a control board
connected with an RF board via SPI interface. The duties of control board include data acquisition,
interfacing, processing, and control the RF board to work in a network environment. The RF board has
only one responsibility that is to provide a data exchange interface via wireless channel.

Figure 4 - Abstracted architecture for the node
1.1.1 RF board
Communication board includes the RF transceiver chip, the matching circuit (which is not shown in the
diagram to reduce complexity) and an antenna. As mentioned, the task of RF board is to establish and
maintain the wireless connection to other network nodes based on commands from control board. The
RF chip will work like a bridge to convert between digital signal of the (micro processing unit) MCU
and analog signal of the wireless channel and help them talk to each other. It is also built-in with
various modulation and packet handling technique to archive the best efficiency in data transmission.
The matching circuit will filter the analog signal for unwanted noise as well as amplify the signal the
better quality. Another task of matching circuit is to match the output impedance of the IC to the
impedance of antenna, which is expected to have value of 50 Ohm. This matching is critical for signal
power efficiency, especially for small signal in micro and nano ampere scale. The antenna then will be
the gate to help the board communicate with the network via RF channel. Initially, a PCB antenna
design by TI (RF chip provider) [21] will be implemented to reduce the cost as well as to improve
durability and portability. Later on, if this antenna cannot offer acceptable performance, the whip
antenna will be used. Power source to operate the RF board is provided by control board through the
I/O connector.
1.1.2 Control board
Control board includes the MCU, which is the heart of the node, voltage regulator, power source, and
various peripheral modules. There are two types of node in the network, full function node and reduced
function node. Therefore, there are two different configurations for the control board, mainly in the
peripheral modules. The full function nodes normally work with permanent power supply and stays at
fixed position, then it can be connected to computer for better control and interfacing. One of the
simplest methods to do that is using an UART connection, and thus a UART driver will be included in
full function node. A reduced function node is built to work with battery supply, and is portable to
move around. Therefore it should not be wired to any device, and so the UART module will be
removed. It should also contain basic inputs and outputs to interact with user and surrounding
environment. A simple key board to input command, simple display (character LCD or LEDs) to
display status, audio input and output, are all added for this purpose.
The main part of the control board is still the MCU. It controls all activities occur in the network node,
include data processing, capture inputs, provide outputs, control RF board via SPI inter face, and
manage peripherals.
The power source is also an important part to be considered. To generate appropriate and stable voltage
for the MCU and RF chip, a voltage regulator is built on the board. This voltage will then be share with
the RF board via I/O connection between the twos.
1.2 Network structure
Figure 5 visualize a network structure which can be built with the hardware platform of this project.
The star topology, where user nodes are grouped into small group of 4 to 5 nodes communicate via a
shared node called coordinator, will be used to minimize confliction and simplify the routing
procedure. The coordinator and master nodes are full function node, with the main duties are routing
and network management. They work as repeaters to transfer messages between server and the slave
nodes. Slave node, on the other hand are reduced function nodes, with main responsibilities of user
interacting and data collection.

Figure 5 - Abstract network architecture
All nodes will communicate with each other through the RF wireless channel. The coordinator board in
addition will have serial connection to computer for control and managing purpose. To simplify the
development and reduce the cost, the RS232 cable will be used to establish an UART connection
between the master node and the PC. This type of connection is widely available, cheap to buy, easy to
use, and fast enough to manage the bandwidth of the whole network.
2. Features
The network upon implementation will be capable to support up to 500 kbps data bandwidth. Suppose
that human voice is transmit in the network using A-law logarithm compression [22], then it can allow
up to 8 nodes continuously talking at the same time. In case not all nodes request continuous
communication, the system can support many more users.
In term of communication range, the longest distance from the node to the server can be extended up to
160m. The connection will be self-established again when the node is in range (if network is not full).
Every node in the network is equipped with self-restarting feature. When the critical error happen,
involved nodes will restart, and connection is setup again. For the reduced function node that runs on
battery, it must be able to operate at least 1 month without battery replacement.
V. Implementation
1. Hardware implementation
1.1 Hardware selection
The radio transceiver CC1101 from Texas Instruments is selected due to many advantages [20]. This
IC provides many different operating frequencies from 315MHz up to 2.4 GHz. This option will
contribute to improve the network performance in case a certain frequency band become noisy.
Initially, the sub-GHz frequency band will be selected because it has better communication range and
penetrating power compare to the 2.4GHz band [23]. Sub-GHz band also has less interference
compares to 2.4GHz where Wi-Fi and Bluetooth are utilizing. More than that, it includes modulation
hardware, which supports different modulating techniques that can provide the data rate up to 600 kbps
with only 1% error rate. This superiority will alleviate the bandwidth pressure in transferring
continuous data such as human voice. In addition, the CC1101 transceiver is also built-in with the
package handler, which will help to reduce various noises, speed up the transmission, and share the
processing task with the MCU. More than that, those extraordinary features do not compromise power
efficiency of the chip. During transmission, current consumption is just below 34mA, while in idle state
the chip only draws about 200nA from the power source.
In term of processing unit, the MSP430F438 [24] is initially chosen due to many advantages. However,
there is difficulty to obtain this MCU in Vietnam; therefore another MCU has been selected as an
alternative. The chosen IC is the dsPIC33FJ16MC102 [25]. This chip is and DSP targeting micro
controller, which has built-in hardware for complex signal processing computation such as multiplier,
large memory, fast ADC, and popular communication interfaces. The hardware multiplier support up to
32-bit multiplication will both speed up data processing and improve accuracy. Memory of 1kB
provides comfortable space for complex computations to run at maximum speed. The 10-bit ADC
which support up to 1.1 Msps will be very helpful in general purpose sampling such as voice capture.
Then different kinds of interface provided on the chip will help the chip be able to communicate with
various devices include computer, Infra-Red controller, and other MCU. In addition, the power rating
of the MCU is also fairy low, with supply voltage of 3 to 3.6V, and typical dynamic current
consumption about 1mA per MHz of operation frequency. With the effective power saver scheme
include idle and sleep mode will help the MCU operate for months with the battery source.
In commercial point of view, both the MCU and the RF transceiver have very affordable price. For
mass production, MCU and transceiver cost just about $2.5 each; therefore, it is possible to build a
node for less than $5. In addition, the development software for the MCU is also provided freely by IC
manufacture. The IDE also include C language compiler, which will considerably reduce time and
effort needed to develop the firmware for the MCU. Furthermore, MCU provider also public many
reference designs to help designer getting start. The RF chip provider on the other hand provide
different PCB antenna systems [26] which can grant good performance, high durability, and high
portability at very low cost. All of those mentioned above will be applied and judged throughout the
project. If they can provide acceptable result, it will be a very big advantage to ease the project
development.
1.2 RF board
RF board is one of the two main hardware parts of to be implemented in this project. The RF board will
use the TIs CC1101 radio chip as the core to cover all steps to establish and maintain connection in a
wireless network. Design a radio platform that must be stable enough to support the target 500kbps
data bandwidth is a complicated task that is far beyond the scope of this project. In the meantime, as TI
also provides circuits for their RF chip which has been tested and improved over the products
development to have a good performance [27]. Therefore, their recommended circuit will be used in
advance. Their suggested circuit [20] is show in Figure 6.

Figure 6 - Bias circuit for RF chip CC1101 at 868 MHz
TI recommends using surface mounting device at size 0402 (0.4mm x 0.2mm) provided by Murata to
implement the RF circuit, however this type of device is not available in Vietnam. Information on
available devices in Vietnams market is collected and analyzed to find the best replacement. Then a
combination include three different sizes, 0402, 0603, and 0805, from different vendors has been
selected to build the RF circuit. The circuit is redrawn as in Figure 7 to be able to be implemented
using available devices. The combinations of available devices to form equivalent devices to TIs
recommended circuit are enclosed in green rectangle for easy reference.

Figure 7 - Modified bias circuit for RF chip CC1101
The layout of this circuit is designed follow the strict requirements on the datasheet of RF chip. Some
tips from TIs design note [27] and others designers [28] are also included.
- Length of trace from ICs RF input and output pins (RF_N and RF_P) to the single ended port
(red circle near L123_1) should be equal to balance phase and amplitude.
- The trace and component must place in symmetry to reduce the harmonic noise and improve
power.
- Pad area under the chip must be connected to ground using many vias to ensure solid ground
and thermal dissipation, recommended number is 9 vias.
- Supply capacitor must place as clear as possible to the supply pins.
- The signal trace must be curved in the region near oscillator. No shape edge is allowed.
- Component must be as small as possible, size 0402 (0.4mm x 0.2mm) is recommended. Due to
the limited available devices in Vietnam, different sizes are used, include up to size 0805.
- Trace width between components in the matching and balun (BALance - to - Unbalance)
network must be as big as possible to reduce resistance and signal delay.
- The region underneath IC must be solid ground for both sides of the board to minimize noise;
therefore the power routing must be taken outside of the IC region.
- Use separate decoupling capacitor for each pin as request by IC provider; do not share the
decoupling capacitor.
The footprint for the RF chip CC1101 can be downloaded from TIs website for exact dimensions. A
free utility named Ultra Library can be used to convert from TIs provided .bxl file to the .olb and .llb
files that are usable in ORCAD (schematic and layout, respectively).
To make the board compact, a PCB antenna solution is selected. TI also provides different designs of
PCB antenna for different radio frequencies. A model named Invert-F taken from [21] is selected as a
L123_1
8.2n
1 2
C125_1
10p
GDO2_3
C125_2
2.2p
L132_12
8.2n
1 2
CSn_7
SI_20
L131_2
3.9n
1 2
GDO0_6
gnd
L131_1
8.2n
1 2
J1
CON8
1
2
3
4
5
6
7
8
0
L132_22
2.7n
1 2
v dd
gnd
C123_2
1p
0
C122
1.5p
GDO0_6
R171_2
47k
L121_1
8.2n
1 2
0
L122_11
8.2n
1
2
CSn_7
L122_22
2.7n
1
2
v dd
C123_1
2.2p
L132_21
2.7n
1 2
0
gnd
C51
100n
C81
27p GDO2_3
C121
1p
L122_12
8.2n
1
2
SO_2
C124
100p
L122_21
2.7n
1
2
SCLK_1
v dd
XTAL1
CRYSTAL
1 2
L124_1
8.2n
1 2
ANT1
ANTENNA
v dd
R171_1
10k
C101
27p
SCLK_1
L121_2
3.9n
1 2
L123_2
3.9n
1 2
L132_11
8.2n
1 2
SI_20
L124_2
3.9n
1 2
Texas Instruments
http://www.ti.com/lit/gpn/CC1101
VQFN
6LoWPAN
20
RTK
Low-Power Sub-1GHz RF Transceiv er
CC1101
U2
Ty pe
AVDD
9
AVDD_1
11
AVDD_2
14
AVDD_3
15
CSN
7
DCOUPL
5
DGUARD
18
DVDD
4
EPAD
21
GDO0
6
GDO2
3
GND
16
GND_1
19
RBIAS
17
RF_N
13
RF_P
12
SCLK
1
SI
20
SO
2
XOSC_Q1
8
XOSC_Q2
10
SO_2
C131
1.5p
best compromise. This design, provided with details layout dimension, had been tested to be able to
provide very good performance, with bandwidth efficiency up to 80%. Altogether, complete layout for
the communication board is designed as in Figure 8, which has size of 46mm x 72 mm, which is fairly
small.

Figure 8 - PCB layout for RF bias circuit
The final PCB of RF board is shown in Figure 9.

Figure 9 - PCB of RF board
The RF had been tested to be able to response to command from MCU via SPI interface. State machine
inside RF chip is monitored and shown correct operation. However, due to the transition from Vietnam
to Australia in last semester, the implementation of RF board had to be stopped. Then to keep the
project progressing, pre-built RF boards are purchased.
The purchased board is shown in Figure 10. This board is built for transmission at frequency of 433
MHz, also using TIs recommended circuit. Unfortunately, its working frequency is different from our
design (868 MHz), they are not interchangeable. Therefore, the target frequency has to change to 433
MHz, and design of MCU board has to change to adapt to the purchased RF boards.

Figure 10 - Purchased RF board
1.3 MCU board
Generally, in a LR-WPAN network, there will be two kinds of node, the full function node and the
reduced function node. The full function nodes work with permanent power supply and carry heavy
tasks. The reduced function nodes work with battery supply and normally perform simple and casual
tasks. This simplification help reduced function node save energy and extend the battery life. Both of
them will use a same MCU to share the software, but each will be programmed by different code. To
connect this project with real life application, both full function and reduced function nodes will be
implemented. There will be some modules that are existed in both types of node, while there are other
modules that are dedicated for one type of node only.
1.3.1 Supporting modules
Voltage regulator
Selected MCU (dsPIC33FJ16MC102) can work with voltage supply from 3V to 3.6V. The RF chip
CC1101s supply voltage range is 1.8V to 3.6V. Lower voltage supply will reduce power consumption
of network node, but will also reduce the sensitivity of radio chip. Therefore 3.3V supply is selected to
balance the pros and cons.
The stability of supply voltage will determine the performance of radio board, thus the role of this
module is critical. Using dedicated voltage regulator should be the best option in this case. L1117T
package is selected [29], and the configuration circuit is shown in Figure 11.

Figure 11 - Voltage regulator
Supported input voltage ranges from 4V to 15V, which is quite popular. For permanent supply, the
USB power of 5V can be used, and for battery supply the 9V battery or 3x1.5V AA batteries can be
used as power source. Small capacitor is added to filter voltage at the output of module to reduce the
high frequency noise that may affect the operation of radio board. 3.3V output from this module
(VDD33) is then used as the unique power supply for all other modules in the node.
C52
10u
VDD33
U42
LM120H-5.0/TO3
3 2
1
IN OUT
G
N
D
0
C72
10u GND
POWER12
HEADER 2
1
2
Audio input
Voice transmission is one of the useful applications that can be implemented on low rate radio network.
The audio input module [30] is then added to enable this feature.

Figure 12 - Audio capture module
The module includes one compact microphone to capture sound signal, and a simple amplifier circuit to
boost and filter the signal captured by the microphone. BC547 [31], which is one of the transistors
designed for switching and audio applications, will be a suitable choice for good voice quality.
Output of the module, which is the voice signal, will be fed directly to the ADC channel (ADC_IN) of
the MCU for digitalizing. The dsPIC33FJ16MC102 MCU selected for this project supports 10bits
ADC module with 1.1 msps sampling rate will be more than enough to capture any audible sound. An
enable switch is also included to turn on/off the module when needed to save power.
PWM audio output
The counterpart of the audio input module will be the audio output module to produce sound. The
MCU does not have DAC module, therefore the most simple and cheapest way to play audio is to use
the PWM channel. The PWM can convert the digital value to analog signal by adjusting the output
pulse width. A series of digital values will be transform into a series of pulses with the width if each
pulse depends on the value of its digital correspondence. These pulses will then be smoothed out by a
simple RC filter to produce audible sound.
The upper part of Figure 13 presents the connection of PWM module used in this project. The lower
part visualizes an example of signal at PWM output and its filtered version.
C6 1u
C3
0.1u
R6
10k
ADC_IN
R8
100
R9
47k
VDD33
0
MIC1
MICROPHONE
Audio En
1 2
0
R7
220k
R5
1k
C4
220u
Q1
BC547


Figure 13 - PWM digital to analog converter
RF board interfacing

Figure 14 - RF board interface
This interface is setup follow the design of purchased RF board. Beside the power connections (VDD
and GND), the interface includes the SPI connections and two general purpose links. The SPI interface
consists of 4 connections, MOSI (Master Output Slave Input), MISO (Master Input Slave Output), CSn
(Chip Select), and SCLK (Clock). The MCU has provided a 3-wire dedicated SPI interface with MISO,
MOSI and SLCK respectively at pins 18, 17, and 16, then only the CSn connection need extra effort to
setup. The CSn link is used by master (the MCU) to enable or disable the slave (RF chip) for data
transmission, thus one other general I/O port of the MCU can be used as CSn connection. Pin 15 is
selected for CSn signal for ease of setup. The other two connections, GDO2 and GDO0, are used by RF
board to show various information on the operation of RF chip. Then can be connected as digital inputs
to the MCU at two other general purpose I/O ports, pin 12 and pin 7.
UART transmission
The MCU is designed for low power operation, which is not suitable to handle heavy and time
restricted tasks. More than that, the MCU has limited interface to interact with user, which may lead to
difficulties in control the operation of the device. One of the best ways to solve these problems is to
connect the MCU to the computer and let the computer perform the heavy tasks.
UART is a simple serial protocol that is popular, cheap, and simple to be used as interface to computer.
UART interface includes 2 wires, one for transmitting and the other for receiving. There is widely
available USB to UART cable to help microcontroller device connect with almost any computer via
AUDIO1
COAX
1
3
2
R4
470
C2
0.01u
PWM_OUT
0
VDD33
SPI1
HEADER 5X2
2
4
6
8
10
1
3
5
7
9
MOSI
CSn
GND
MISO
VDD33
SCLK
GDO2
GDO0
GND
RC filter
output
USB port using serial link. In the meantime, the selected MCU also provide a built-in UART module
that connects to the pins 26 and 25. Therefore, the UART protocol is selected as the method to transfer
data and command back and forth between MCU and computer.
While the USB to UART cable use the EIA-232 voltage level which may range from -15V to 15V, the
MCU use CMOS voltage level ranges from 0V to 3.3V, they cannot talk to each other. A driver IC is
needed to convert between those two voltage levels. MAX232 IC from TI [32] is selected for this task
as it is cheap, popular and easy to be configured. Figure 15 shows the schematic connection for this IC.

Figure 15 - UART interface
The pin marked with RX and TX will be connected to corresponding UART pins on MCU, at pin 25
and 26, respectively. And two pins on HEADER2 will be connected to the USB to UART cable and
connect to computer.
Control buttons
Few buttons are provided as basic input channels for users to interact with MCU. There is 1 reset
button on every node to reset the program. The reduced function nodes are also equipped with 2
general purpose buttons for data input. These two buttons do not exist on full function nodes because
they already have the UART link for much more versatile data exchange.
The configuration for each button is provided in the following figure.

Figure 16 - General purpose buttons (left) and Reset button (right)
Basically, each button connects the target MCU pin with the power source (VDD33). When the button
is not pressed, the target pin is connecting to ground via a pull down resistor. When the button is
pressed, a voltage equal to VDD33 is presented at the target pin. The MCU then can read the digital
input at target pin to acknowledge whether a button had been pressed.
C19
1u
UART1
HEADER 2
1
2
C17 1u
RX_COM
TX_COM
C18
1u
0
0
MX232_1
HEADER 8X2
2
4
6
8
10
12
14
16 1
3
5
7
9
11
13
15
RX
TX
C15
1u
C16 1u
VDD33
R3 10k
BT1
1
2
0
R2 10k
BT2
1
2
VDD33
BUTTON2
BUTTON1
R1
10k
MCLR
VDD33
RST1
SWITCH
0
7 segments LED display
One 7-segment LED display is also added to the reduced function node for basic status display. There
is LED represent the dot in the 7-segments LED module, but it is left unconnected because it seems not
to be useful with a single display. The circuit to configure the 7-segments LED is provided in Figure
17. The purchased part is type A, which is active low, so the common bulk at pin 3 and pin 8 is
connected to supply power (VDD33). To turn on each segment of the device, the corresponding digital
output of MCU should be set to zero.

Figure 17 - 7-segments LED display
Clock generator
This module provides clock source for the MCU. While the MCU itself has built-in fast RC oscillator
and low frequency crystal oscillator, the fast external crystal is added as a precise clock source for high
speed and time critical applications. The configuration circuit is shown in Figure 18.

Figure 18 - Clock configuration
Two very small capacitors are added at two terminals of the crystal to remove very high frequency
noise that may occur. A resistor of 1 M (10
6
) is added in parallel with the crystal to stabilized it in
high frequency operation, as indicated in the datasheets tips.
1.3.2 Full function node
The full function node is equipped with Voltage regulator module, UART module, SPI module, Clock
generator module, Audio input module, Audio output module, and Reset button. General purpose
buttons and 7-segments LED display are not included as the full function node already has the UART
connection which can provide much better control input and display interface. Some of unused general
I/O pins of the MCU are connected to a header for another purpose if needed (J33). There are few
capacitor added at pin 28 and pin 20 of the MCU for power filtering purpose. Full schematic, layout
and implemented prototype of full function node are shown in Figure 19.
RLED1 220
RLED2 220
RLED6 220
VDD33
HEX0
RLED3 220
RLED0 220
HEX1
HEX2
HEX3
RLED5 220
HEX4 RLED4 220
HEX5
HEX6
A
B
C
D
E
F
G
D
P
D4
LDS-AA1R
3
7
6
4
2
1
9
10
5
8
OPEN1
Y22
CRYSTAL
0
C102
1n
C112
1n
OPEN0
R202
1Meg


Figure 19 - Full function node
1.3.3 Reduced function node
Reduced function node consists of Voltage regulator module, Clock generator module, Audio input
module, Audio output module, General purpose buttons, 7-segments LED display, SPI module, and
Reset button. The UART module is removed to reduce energy consumption. Buttons and 7-segments
LED display is added for basic user interfacing. These two modules will not consume current if not in
use, thus they will not affect the power consumption of the node. The Clock generator is maintained as
0
VDD33
GDO2
C32
0.1u
UART driver
C52
10u
PGED1
0
U1
Ty pe
AN4/C3INC/C2INC/RP2/CN6/RB2 6
AN5/C3IND/C2IND/RP3/CN7/RB3 7
AVDD
28 AVSS
27
FLTA1*/ASCL1/RP6/CN24/RB6
15
FLTB1*/ASDA1/RP5/CN27/RB5 14
MCLR* 1
OSCI/CLKI/CN30/RA2 9
OSCO/CLKO/CN29/RA3 10
PGEC1/AN3/CVREFIN/CVREFOUT/C2INB/C1IND/RP1/CN5/RB1 5
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1 3
PGEC3/SOSCO/T1CK/CN0/RA4 12
PGED1/AN2/C2INA/C1INC/CTCMP/RP0/CN4/RB0 4
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0 2
PGED3/SOSCI/RP4/CN1/RB4 11
PWM1H1/RTCC/RP14/CN12/RB14
25
PWM1H2/RP12/CN14/RB12
23
PWM1L1/RP15/CN11/RB15
26
PWM1L2/RP13/CN13/RB13
24
SCK1/INT0/RP7/CN23/RB7
16
TCK/SCL1/SDO1/RP8/CN22/RB8
17
TDI/PWM1H3/RP10/CN16/RB10
21
TDO/SDA1/SDI1/RP9/CN21/RB9
18
TMS/PWM1L3/RP11/CN15/RB11
22
VCAP
20
VDD 13
VSS 8
VSS_1
19
VDD33
OPEN1
MCU bias
C112
1n
OPEN4
MISO
C17 1u
0
CSn1
C15
1u
VDD33
OPEN5
MX232_1
HEADER 8X2
2
4
6
8
10
12
14
16 1
3
5
7
9
11
13
15
0
MOSI
MIC12
MICROPHONE
VDD33
PGEC1
C19
1u
SCLK
C102
1n
GND
SPI1
HEADER 5X2
2
4
6
8
10
1
3
5
7
9
ADC_IN
R1
10k
MCLR
R4
470
VDD33
GND
RST1
SWITCH
R92
47k
GND
OPEN5
C72
10u
OPEN4
U42
LM120H-5.0/TO3
3 2
1
IN OUT
G
N
D
MISO
C2
0.01u
GDO0
OPEN6
PWM_OUT
C16 1u
J33
HEADER 3
1
2
3
GND
0
RX_COM
R72
220k
Audio Output
MCLR
Filter Cap 1
0.1u
RX
C18
1u
0
TX_COM
OPEN0
Unused pins connector
VDD33 R202
R
AUDIO1
COAX
1
3
2
PGEC1
VDD33
R82
100
Audio Input
0
ADC_IN
Y22
CRYSTAL
TX
R62
10k
OPEN0
RF board connector
0
GDO2
C1 0.1u
TX
Audio Input En
1 2
CSn2
R52
1k
GND
Clock generator
GDO0
POWER12
HEADER 2
1
2
MOSI
0
SCLK
UART1
HEADER 2
1
2
PGED1
OPEN1
Q12
BC547
Voltage regulator
PWM_OUT
RX
PROGRAM12
HEADER 5
1
2
3
4
5
0
OPEN6
C42
220u
VDD33
Programming connector
C62 1u
CSn1
a backup solution, but it may not need to be implemented as the MCU can use internal oscillator for
better power saving. Full schematic, layout, and implemented prototype of reduced function node are
shown in Figure 20.


Figure 20 - Reduced function node
MCLR
HEX4
R8
100
GND
Audio output
HEX2
HEX3
C3
0.1u
HEX1
HEX0
VDD33
U1
Ty pe
AN4/C3INC/C2INC/RP2/CN6/RB2 6
AN5/C3IND/C2IND/RP3/CN7/RB3 7
AVDD
28 AVSS
27
FLTA1*/ASCL1/RP6/CN24/RB6
15
FLTB1*/ASDA1/RP5/CN27/RB5 14
MCLR* 1
OSCI/CLKI/CN30/RA2 9
OSCO/CLKO/CN29/RA3 10
PGEC1/AN3/CVREFIN/CVREFOUT/C2INB/C1IND/RP1/CN5/RB1 5
PGEC2/AN1/C3INA/C1INB/CTED2/CN3/RA1 3
PGEC3/SOSCO/T1CK/CN0/RA4 12
PGED1/AN2/C2INA/C1INC/CTCMP/RP0/CN4/RB0 4
PGED2/AN0/C3INB/C1INA/CTED1/CN2/RA0 2
PGED3/SOSCI/RP4/CN1/RB4 11
PWM1H1/RTCC/RP14/CN12/RB14
25
PWM1H2/RP12/CN14/RB12
23
PWM1L1/RP15/CN11/RB15
26
PWM1L2/RP13/CN13/RB13
24
SCK1/INT0/RP7/CN23/RB7
16
TCK/SCL1/SDO1/RP8/CN22/RB8
17
TDI/PWM1H3/RP10/CN16/RB10
21
TDO/SDA1/SDI1/RP9/CN21/RB9
18
TMS/PWM1L3/RP11/CN15/RB11
22
VCAP
20
VDD 13
VSS 8
VSS_1
19
OPEN1
HEX0
0
BT1
1
2
CSn
POWER1
HEADER 2
1
2
0
GND
General purpose
buttons
R5
1k
VDD33
U4
LM120H-5.0/TO3
3 2
1
IN OUT
G
N
D
0
C10
1n
HEX5
GDO0
RLED0 220
VDD33
BUTTON1
0
RLED3 220
HEX3
Y2
CRYSTAL
HEX1
RLED5 220
GND
Audio input
RLED6 220
0
HEX6
CSn
C4
220u
MCU bias
HEX6
OPEN1
RLED1 220
R2 10k
Voltage regulator
0
PROGRAM1
HEADER 5
1
2
3
4
5
MISO
RST1
SWITCH
MCLR
RLED4 220
BT2
1
2
Program
connector
MOSI
7-segments LED display
HEX5
C2
0.01u
GDO0
MISO
Q1
BC547
VDD33
VDD33
MOSI
VDD33
R7
220k
BUTTON1
Filter Cap 1
0.1u
ADC_IN
C11
1n
Clock generator
C5
10u
RF board connector
0
PGED1
BUTTON2
OPEN0
Audio En
1 2
R20
R
PGEC1
VDD33
A
B
C
D
E
F
G
D
P
D4
LDS-AA1R
3
7
6
4
2
1
9
10
5
8
0
HEX4
R1
10k
VDD33
SPI1
HEADER 5X2
2
4
6
8
10
1
3
5
7
9
PGED1
ADC_IN
AUDIO1
COAX
1
3
2
0
GDO2
GDO2
RLED2 220
OPEN0
SCLK
MIC1
MICROPHONE
GND
GND
R9
47k
SCLK
VDD33
C1 0.1u
HEX2
PGEC1
PWM_OUT
C7
10u
R3 10k
PWM_OUT
R6
10k
R4
470
BUTTON2
C6 1u
2. Software implementation
Software implemented in this project is targeted to the MCU dsPIC33FJ16MC102 from Microchip.
The development tool is MPLAB version 8.9, in combined with MPLAB C30 library and compiler
version 3.
Source code folders are organized based on node type, which is resulted in following hierarchy.

Figure 21 - Source code organization
Each sub folder contains a main.c file which specifies the functionality for each type of node. The
DAQ node is a special type of node configured to monitor the network transmission, which is used in
development phase. It is always stay in receive mode, try to capture all packet transmitted in air, and
transfer back to computer via UART link. The share folder contain the header files that are shared for
all type of node, contains the settings for radio hardware, basic configurations of MCU, and shared
functions. The Master node is a full function node, which establish and manage network. The Slave
node is the reduced function node, which join network and interact with users. The following sections
will explain the choice of software, the most important features and functions implemented in different
source files within the project, arranged based on their targets, the MCU and the radio hardware.
2.1 Software selection
The MCU selected is the dsPIC33FJ16MC102 and the PICKIT3 debugger-programmer are all provided
by Microchip, therefore choosing Microchip development software will simplify the procedure,
improve compatibility, and utilize the most of the supports. MPLAB, a free development tool provide
along with the PICKIT programmer, is selected for those advantages. To reduce the development time
and escape from unnecessary complexity assembly programming, the MPLAB C30 library and
compiler is used.
The system to be implemented is a network; therefore, one of the most important parts of the software
is the routing scheme. Initially, SimpliciTI protocol [33] provided by TI is selected as it is lightweight,
easy to use and suitable for the project. However, later on the protocol is found legally requested to be
used with TIs MCU only, and then another protocol must be used. There are other open source
protocols that are offered for free such as DASH7 [34], however it requires so much hardware
resources that this project cannot afford. Therefore, a new protocol must be built to adapt to situation.
More than that, as the targeted application is voice communication, the conversion between analog and
digital as well as the compression algorithm will also be an important part of software design. The
MCU provide 1.1Msps ADC, which is more than enough to sample any audible sound. However, as the
bandwidth of the LR-WPAN is very limited, only speech transfer is allowed. In addition, because the
processing power of the MCU is also limited, the compression technique must be simple and
efficiency. In this project, the A-law logarithmic encoding and decoding method [22] will be used to
compress 12-bit samples into 8-bit and decompress it back, with the formula provided in Figure 22.
1
1
( ) 0
1 ln( )
( )
1 ln( )
1
( ) 1
1 ln( )
(1 ln( ))
1
( )
1 ln( )
( )
exp( (1 ln( )) 1)
1
( ) 1
1 ln( )
( 87.7)
A x
sign x x
A
A
F x
A x
sign x x
A
A
y A
sign y y
A A
F y
y A
sign y y
A A
with A

s <

=

+

s s

+
<

=

+

s <

=

Figure 22 - A-law Encoding formula [22]
The signal will be sampled at 8kHz frequency, therefore the audio bit rate is 64 kbps. As mentioned
previously, the bandwidth allocated for each node is around 67kbps, which is more than enough to
transfer speech around the network. This technique of companding (COMpressing and exPANDING)
signal is very similar to the speech compression method used in GSM network, which will warrantee
for an understandable voice quality. If there is demand for large number of user, lossy compression
algorithm such as ADPCM will be used to map 8-bit sample resulted from a-law encoding into 4-bit
series, which in turn reduce the bit rate by half to 32kbps. This simple mapping is totally possible to be
implemented on the selected MCU. All software implementation will be coded in C and be complied
using MPLAB C30 compiler provided freely on Microchip website. This C compiler also has library
for speech processing which will be an advantage for the development of this project.
2.2 MCU control
There are many modules and features embedded inside the dsPIC33FJ16MC102 MCU. This part will
try to build the code to employ only the modules and features that are needed for the project. They
include Interrupt services, UART control, SPI control, Clock configuration, Timer configuration, I/O
ports configuration, Input change interruption, and a small miscellanea of various notices. Almost
function explained in this section, if not otherwise noticed, will belong to the header file mcu.h. The
code for this section is built base on devices datasheet [25], with the support library MPLAB C30
provided by Microchip.
Interrupt services
There are two methods to monitor the hardware events, by polling and by interruption. Polling is the
process to continuously monitor the state of the hardware module until some changes of interest
happen. As almost any MCU run on single thread processor, it cannot do any other work while polling
for a certain event to come about. This is a waste of time and may lead to data lost as MCU do not have
enough time to process other services. Interruption is the solution to this problem.
Interruption is basically a method that lets hardware monitor it by itself, and announce the processor
only when problem has already occurred. This routine gives time for MCU to work on processing task,
while provides a strict monitoring on various inputs and hardware modules to invoke the necessary
actions when some changes of interest occur. By that way, MCU can do more tasks with less time, and
power consumption is reduced.

Figure 23 - Interrupt service routine
Figure 23 explains procedure of interrupt. The MCU use most of its time performs tasks in its main
process. When interrupt occurs, it jumps to the interrupt handler (red arrow) and complete the task
predefined in the interrupt routine, then jumps back to the main process (green arrow) and continue
normal operation. Take advantage of this, application for MCU in this project will be built on event
based structure, similar to a simple operation system.

Figure 24 - Event based application structure
Figure 24 shows the structure of our application. Each interrupt routine will generate an event (a flag)
to notify the main process about the existence of some changes that need to take action. In the
meantime, the main process, which is basically a loop, will scan all flags defined in the application to
find an active event. If a flag (event) is found active, the code (task) associated with that flag will be
executed. When the task is completed, the event flag is cleared, and the main process continue to loop
around to find other events. In short, the hardware sets event by interrupt routine, while the software
processes all events one by one via an event loop.
The UART receive interrupt is taken as an example. The following interrupt function sets the UART
received event via flag uart_rx_flag = 1.

Then in the main process, the endless loop will scan all event flags and perform RfSendPacket() if
uart_rx_flag is set. The event flag is cleared right after that to show that the task was done.

There are 7 levels of interrupt priority that can be assigned to each interrupt routine, depend on its
importance to the target application. The higher priority interrupts will be processed in prior to the
lower ones.
There are many registers that are included in interrupt setting, some of them are SR, INTCONTx, IFSx,
IECx (x = 0, 1, 2 ). By default, these registers are set upon MCU reset to disable all interruptions.
Then to enable interruption for each specific module in the MCU, parts of these registers are modified
accordingly. Setting for involved modules will be further explained in later sections of this report.
UART control
There is one UART module in the selected MCU dsPIC33FJ16MC102, which named UART1. To
configure for this module, 3 registers U1MODE, U1BGR, U1STA can be modified. U1MODE and
register includes settings for parity, stop bit, handshake, bit polarity, clock generator, idle state, and
option to enable/disable the module. U1STA register provides options to configure the hardware pin
that used by the module, and holds various information on the state of module under operation. U1BGR
register contains setting for baud rate of the UART link. Its value is calculated as:

Where

is the instruction clock frequency, which is equal to half of oscillator frequency

F
OSC
. For the demo purpose, the internal fast RC oscillator of 7.37MHz is used, then for a desired baud
rate of 19200, the value of U1BGR is computed equal to 11. This value will include a small error of
about 0.2%, but its effect can be easily removed by include a small delay between each byte
transmitted.
With the selected MCU, input and output of many modules can be mapped (linked) to different pins to
peripherals outside the chip. In this project, the UART transmitting output is mapped to pin 26 by
setting value of RPOR7 register equal 0x0300. The receiving input is mapped to pin 25 by setting value
of RPINR18 register equal 14. There are other RPORx and RPINRx registers (x = 0, 1, 2 ) to map
input and output of UART module as well as other modules to the different pins on the chip depend on
the design target.
UART data is transmitted and received via 2 register U1TXREG and U1RXREG, respectively.
U1RXREG is written by hardware when data is received. U1TXREG is written by software when
MCU want to transmit data. Experiment shows that continuously write new data to the transmit buffer
may cause bit error and byte drop for transmission with large number of bytes. The status bit TMRT of
U1STA register can be used to check whether the transmission of previous byte had been completed
before a new byte should be written to the transmit buffer.
In addition, to setup the UART module for interrupt service, the value of registers IFS0, IEC0, and
IPC2, can be modified. Settings include enabling interrupt, clear interrupt request, and set interrupt
priority.
Altogether, the settings for UART is packed in function InitUART1() that can be found in the source
code.
SPI control
dsPIC33FJ16MC102 MCU has one dedicated SPI module named SPI1. Control registers for this
module consist of SP1CON1 and SPI1STAT. There are many settings that can be configured through
these two registers; however the two settings that need to be careful is clock setting and module enable
bit.
In SPI protocol, the clock for transmission is provided by master device. In this case, the MCU is the
master, and the RF board is the slave. There is an upper limit of the clock frequency of the SPI for the
RF chip CC1101, with highest all-safe value is 6.5MHz. In MCU, the clock source for SPI module is
the instruction clock F
CY
. This clock will be divided based on the setting of SP1CON1 register. At F
CY

setting for demo purpose of this project is less than 4MHz, it will not cause trouble. If higher clock
frequency is used, the clock division must be considered.
In addition, the SPI1CON1 register must be written before enabling the SPI module, otherwise the
SPI1CON1 may not be updated. A good option is to write SPI1CON1 before writing to SPI1STAT.
Interruption for SPI module is not necessary for this project, as the MCU is always a master device. In
every SPI transfer, master always start the transfer, and data is exchanged between master device and
slave device. MCU control when the transfer start, thus interruption is not needed. There is only one
problem is that the SPI module of MCU does not support the CSn connection, which is the one to
announce a slave device that it is selected for data transfer. For single master and single slave scheme
in this project, the SPI can still work without CSn link. However, CSn link will help to reduce the noise
to the RF chip as when MCU does not want to transfer data, CSn is pulled high (deactivated), RF chip
is announced to ignore the voltage variation (glitches) that may appear on the SPI connections. CSn is
defined as pin 15 in header file SPI_config.h. Then, all settings for the SPI module can be update using
function InitSPI().
Data transfer in SPI interface is an exchange, which means data is sent and received at the same time.
The MCU start transfer process by writing data into SPI1BUF register, wait until transferring
completed, and read the received data also in SPI1BUF register. Status bits in SPI1STAT register can
be polled to know when the transfer had been completed.
Clock control
There are 4 clock sources that can be used to operate the MCU, they include two external clock sources
and two internal clock sources, and each pair has high speed and low speed options. By default, the
MCU will use the fast internal clock source after reset, and only switch to external clock source if it is
programmed to do so. For the demo purpose of this project, the fast RC oscillator is always used to
save energy. This selection is done by calling the following compiler directive:

Then, when the system is initialized in main process, the OSCTUN and OSCCON registers are
modified to adjust the clock tuning and set up the clock switching options. In this project, only fast
internal RC oscillator is used, and then no switch is needed. All of these settings are included in
function InitClock().
Timer control
The MCU support 3 timers, Timer1, Timer2, and Timer3. Timer1 is a 16-bit timer that can be used as
either a timer, a synchronous counter or an asynchronous counter. Timer2 and Timer3 can be
configured as two independent 16-bit timers or can be combined into one 32-bits timer. Each of these
timers can use different clock sources to run their counter, in combine with scaler to adjust clock
division. In this project, Timer1 and Timer2 are used as two 16-bit timers to set time for MCU. Timer1
is used for routing purpose, which will be explained later. Timer2 is used at a stopwatch to stop the
pending task when needed.
Each timer has a counting register TMRx and a compare value register PRx (x = 1, 2, 3). After enable,
value of TMRx will increase one by one toward value of PRx with each clock period. When value in
TMRx equals to preset value in PRx, interrupt occurs. By setting values of TMRx and PRx, we can
adjust the time to get interrupt event. Each timer also has a TxCON register holds settings for clock
source, clock division, and timer enable. Interruption setting for timers can be found in IPCx, IFSx,
IECx (x = 0, 1, 2 ). These settings are all included in 2 functions InitTimer1() and InitTimer2().
I/O port control
Basically, the MCU has two big I/O ports, port A and port B that all together manage 21 pins of the
device. Each port can be configuration as either input or output by modifying the corresponding TRISA
and TRISB registers. Each individual pin also associated with different functions and modules
supported by the MCU. When specific module is enabled, normally the pin will be controlled by that
module. If the MCU want to use a certain pin as normal input/output, all functions and modules
associated with that pin must be disable.
In this project, setting on pin 15 and pin 7 should be noticed. Pin 15 is selected as CSn signal for SPI
interface, but this pin is shared with the fault input of the PWM module. By default, this pin will be
under control of PWM module upon reset, no matter whether PWM is enabled or not. Therefore this
function must be disabled to help the CSn working. In the other hand, pin 7 is selected for the GDO0
input, taken from RF chip (will be explained later), which must be configured as digital input. This pin
controlled by ADC module by default, and is configured as analog input. Thus it must be set to digital
mode. Desired setting for pin 15 and pin 7 can be achieved by following code.

Input change interruption
To monitor event outside the chip, the MCU support one type of interruption called Input Change
Notification. This interrupt observe a specific input pin for any change in digital state. If there is a
change, interruption flag is raised. In this project, this interrupt is very important as it can help RF
board notify the MCU when certain events happen, such as a packet is received. It is important as when
the MCU does not have to poll the RF board for that information, it has more time to do other tasks.
The RF board also gain benefit from this as it is free from the noise that may occur when MCU try to
talk to it via the SPI interface.
Settings for Input Change Notification interrupt (CN interrupt) are accessible via registers CNENx,
CNPUx, IPCx, IFSx, IECx (x = 1, 2, 3 ). The desired settings for this project are included in function
InitCN7(). However, as any change in the specified pin will cause interrupt; this function should only
be called when all other settings had been settled. Otherwise, this interruption may cause serious delay
to application start up as there are possibly many glitches may occur during hardware setting update
and this interruption keeps being raised repeatedly.
Miscellanea
There are few notices should be taken when writing code for the dsPIC33FJ16MC102 MCU. These
include the code protection and the watchdog timer reset. By default, hardware does not allow writing
to program memory and reading data from memory during execution of application. The debugger will
not work with that setting. Furthermore, by the watchdog timer is turn on by default will reset the chip
regularly when the watchdog time elapsed (about 10s). This will cause corruption if the node is
working in network. To eliminate these two problems, the following compiler directive must be
included.

2.3 Radio control
Radio control includes two main parts, the hardware configuration and the network management.
Hardware configuration is the collection of step to make radio hardware working to transmit and
receive data via wireless channel. Network management is the process to establish and maintain the
connection between nodes to form a network where each of its members can talk to the others.
Hardware control
This part is built based on the CC1101 datasheet [20] and the user guide [35] of the purchased RF
board. The user guide provides a simple program written for MCU 8051 that (may) allow the RF board
to transmit and receive data via wireless, but it did not cover the features to allow the RF board work as
a network node such as ability to judge the radio condition. This part of the project will be dedicated to
write a complete configuration structure for radio control.
RF chip and MCU talk together via SPI interface. Correctly transfer data over this channel is a crucial
task that must be carried out precisely in order to build a working radio network. The MCU uses one
unique register SPI1BUF both to hold transmitting data and receiving data in every SPI transfer. Then,
status bits from SPI1STAT register must be polled to know when to write data to SPI1BUF for
transmission (when previous transmission completed) and when to read that same register for received
data (when data is fully received). There are other options to perform this task such as using delay, but
this is the only way that can guarantee correct data transfer. The following function can fulfill all of
those requirements (included in mcu.h).

There are many register in the RF chip CC1101 that need to be configure correctly before it can work
as a radio transceiver. The best way to determine values for those registers is to use the SmartRF Studio
[36], provided by TI. However, this program only suggests settings for basic transmitting and receiving
operation, the setting for advanced feature such as Channel Assessment, signal whitening and so on,
must be set manually.
The most important setting that allows device to work in a network is the Clear Channel Assessment.
This setting allows the ratio to determine when the wireless channel is clear (no other device in the
vicinity is transmitting) so that it can start transmit packet without affecting the other transmission and
minimize the probability of transmission error. The RF chip support three options for this setting,
assessment based on RSSI (signal to noise ratio), assessment based on status of the radio hardware
(whether the hardware is receiving packet or not), and assessment based on both of them. In assessment
base on RSSI method, the radio hardware will try to capture whatever signal in air and compute its
signal to noise ratio. If the ratio calculated is less than the pre-defined target value, then channel is
claimed to be clear. Assessment using hardware status on the other hand will try to demodulate
whatever signal it can capture, and if it can demodulate the signal successfully, it marks the channel
state as not clear. The RSSI method is very susceptible to noise, and it may work or may not work
depend on the surrounding environment. However, it is a more power-friendly way to assess the
channel compare to the assessment using hardware status, as in RSSI method the radio hardware does
not need to demodulate the packet to read RSSI value. Thus in this project, the assessment using both
determinations will be employed. The RSSI assessment is kept as a footprint for reference purpose
only, and to minimize its effect on assessment result, the target RSSI is set at high level (7dB above
target nominal gain). Those settings are achieved by writing value of AGCCTRL2, AGCCTRL1, and
MCSM1 register as 0xA7, 0x07, and 0x38, respectively.
The data whitening is enabled to reduce bit error rate. The variable packet length (number of byte to be
transmitted in 1 packet) is selected for flexible transmission. CRC checksum data is allowed to be
appended to the end of received packet to qualify the received data. No address checking at hardware
level is allowed as it may fail the Clear Channel Assessment by hardware. Those 4 settings is set by
writing 0x45 to register PKTCTRL0.
The GDO0 pin, which had been mentioned previously, is an important signal that the RF chip can use
to notify the MCU about the status of radio transmission. In this project, the value of 0x06 is written to
IOCFG0 register. With this setting, the RF chip will set GDO0 pin when radio transmitting/receiving is
started and clear that pin when transmitting/receiving is completed. This is compulsory to help MCU
run application on event mode, as MCU can transmit and receive data without having to poll the RF
chip for status of transmission.
Then the final step of radio control is to send and receive data over wireless channel.
Receiving data via wireless
The most important requirement for a device in a wireless network is that it must be able to determine
when the channel is free before starting transmission. If this assessment is failed, then there will be a
high possibility of more than one device try to transmit radio signal at the same time. That means
collision will occur and all transmitted data will be lost. To satisfy that condition, all nodes in this
project will be configured in the scheme of listen before talk, means that nodes will be in receiving
mode most of the time except when it needs to transmit data. By using this setting, the node always
gets information about current state of the channel. Therefore, the node knows exactly when it is
allowed to start new transmission.
Control of the RF chip can be done using SPI strobe commands. These commands are predefined 8-bit
values that can be sent to the RF chip through SPI interface to request the RF chip preform a certain
task, such as change to receive mode, reset the chip, and so on. To set RF chip always stay in receiving
mode, the command SpiStrobe (CC1101_SRX) is called at the beginning of the program, and after
every other commands that may change the state of the radio hardware. When the RF chip is in
receiving mode, it will try to capture whatever packet it can get over the air, and store received data to
the internal buffer (named CC1101_RXFIFO) if the demodulation process is succeed. The RF chip will
announce the MCU about the packet received via GDO0 signal, as explained before. The MCU will
acknowledge this message via an Input Change Notification interruption routine at the GDO0 input pin
(pin 7). If the interrupt is caused by a falling edge of GDO0 signal (reached end of packet), a procedure
will be called to check data in receive buffer, then valid data from internal buffer of RF chip will be
transferred into MCU via SPI channel and that buffer will be flushed (notice that the internal buffer of
RF chip can only be flushed when the chip is in idle state). That procedure is packed in function
RfReceivePacket_v3( ), and is explained in following flow chart.

Figure 25 - Receive RF packet upon GDO0 falling edge interrupt
Transmit data using wireless
Transmit data in a wireless network is a bit more complicated at the transmitter need to make sure that
there is no other device is trying to transmit at the same time. This is essentially important as if there
are more than one device try to transmit at the same time, all of them will fail to transfer the packet to
destination. This can be done using Clear Channel Assessment feature mentioned in previous part of
this report. Procedure to transmit data is presented in following flow chart.

Figure 26 - Transmit radio using "listen before talk" scheme
One notice should be made is that the RF chip needs to be in the receive mode at least 500us in order to
provide a valid RSSI value. However in this project, because the node is set to be in receive state most
of the time, this notice can be safely ignored. Another notice is that the chip may not turn to the
transmit mode if the CCA fail, regardless transmit command strobe (STX) had been sent. If it does not
turn into transmit state, the transmit procedure may stuck in waiting for the GDO0 signal. Therefore, a
timer is used to set the time for transmit process, if it run out of time, the process will be terminated.
Sometime, when CCA failed, the GDO0 signal may still be set and cleared as normal because the radio
hardware is still in the receive mode and had received some packet from other node. To make sure the
transmission had been succeed, the TXFIFO buffer must be double checked to be empty (all data had
been sent out) at the end of the procedure. If the TXFIFO is not empty then, the transmission is failed;
it should be recalled by application. And more importantly, the radio hardware may had received
something that need to be processed, a receive procedure needs to be called as well.
Network management
In wireless communication, there may be more than one network that can share the same operation
space and frequency channel, therefore each network need a network name to define itself. The PAN
ID is used for this purpose. More than that, within each network, each device must have a unique name
to be differentiated from the other, which is called the network address. Then for each message
between devices in network, there will be the case that the sender want to transfer message to only one
receiver, and the receiver also need to know where does the message come from. Therefore both source
and destination network addresses must be included inside each message. In addition, each message
may be used for a certain purpose, thus it needs to be distinguished from the other. A message type
should be included in the message at well. After that, the message data should take place. Finally, the
message qualifying information (RSSI and CRC checksum) may be appended in the end of the
message for various purposes. The packet structure for each message is then interpreted in following
figure.

Figure 27 - Packet structure for wireless transmission
To provide flexibility for message transfer over wireless channel, the variable packet length is set up
for CC1101 chip. Although the chip CC1101 does support packet length larger than 64 bytes, it is not
suitable to the scenario of this project, where packet is received via interruption. Thus maximum packet
size should be fixed at 64 bytes. However, the first byte of the message is always the packet length
(added by hardware at transmitter) and the last two bytes are always the RSSI and CRC - LQI (added
by hardware at both ends), thus the maximum packet size visible to the MCU is reduced to 61 bytes.
The network address of each node is not controlled by radio hardware but be managed by the MCU
application. Thus a scheme is needed to provide address to each device such that no duplication exists
and all addresses are manageable. At the beginning phase of the network formation, the master node
will assign itself the address 0x00, and create a list of network addresses that will be assigned to the
later joined slave nodes, starting from 0x01. From then, the master device will periodically send out the
attendant message to a broadcast address 0xFF to announce its existent and maintain connection with
its slaves. When each new slave device want to join the network, it must first listen to this type of
attendance message to know the PAN_ID, then it will sent a joining request message based on that
PAN_ID to the master node at address 0x00. The master node upon reception of this request will check
whether is there any address is free in its list and then send back the address information to the device
which had generated the request. If master found that there is no address available, it will send a not
allow message to the requested device.
In another aspect, because number of addresses created by master node is limited, they should be used
in an effective way. The attendant message that the master node send out periodically is used for this
purpose. Each time the master send out this message, it increases the counter associated with each
address in the list by one. The slaves that joined the network, when listen to this message, must send
response messages to confirm their existence. Back to the masters side, if it receives the response
message from a particular slave, the counter corresponding with that slave will be reset to zero. In
contrast, if it finds out that a certain counter holds value large than threshold (currently set at 5), it
means that the associated device had not responded to the attendant message for many continuous
periods. That corresponding slave is said to be disconnected, and that address can be reused to assign
for other device. On the slave side, if it did not receive the attendant message from master device for a
similar number of continuous periods, it will command itself to be disconnected, and a self-reset is
performed.
VI. Testing & Results
1. Test cases
Control board test
Modules that are used most regularly of the control board are tested to be able to work properly.
Voltage regulator is tested on bread board and output voltage is measured to be stable at 3.3V. When
implement the control board, the voltage regulator is soldered first, then the voltages at various points
on the board are double checked before other modules are installed.
A USB-to-RS232 cable is used to connect MCU with computer. UART module is then tested using a
control program named Terminal. UART module is shown to be able to transmit and receive data
flawlessly on mentioned cable at 9600 and 19200 baud rate. UART driver written for the MCU is also
tested to work in interruption mode, which means the MCU does not have to poll the UART module to
receive data.
LEDs are connected to I/O ports on the MCU to test the ability to generate correct digital output. Then
input pins of interest are tested with input change interruption. Each of them is shorted to VDD and
then GND to check whether they can detect the change in input value. The test had shown that I/O
ports are working.
The SPI module is first tested using oscilloscope, which shown correct output signal. Later on, it is
tested along with the RF board for correct data transmission.
RF board test
RF board is connected to control board. Various setting registers are written into the RF chip, and then
the chip is set into transmit mode and continuously transmit an increasing 8bit number. The antenna of
the RF board is monitored with a spectrum analyzer, and result is shown in Figure 28. It shown that
power of frequency component at target region (434MHz) is much higher than the other regions, which
mean radio transmit is succeed.

Figure 28 - Spectrum analysis of RF transmission
Another node include a RF board connected with a control board is then configured to be in receive
mode and try to capture transmitted message and transfer back to computer via UART. A series of
increasing number received on UART link shown that receive mode is working. And thus it means that
the SPI interface is also working properly.
Event based structure test
Two nodes were used in this experiment. Various events, including UART interrupt, Input Change
interrupt, and Timer interrupt, are setup in the firmware of each node. Each interrupt will return an
event flag. The event loop in main process had been test to be able to handle these events serially, and
sent report to computer via UART. Thus, event structure is working.

Listen-before-talk test
This feature is very important for the node to work in wireless network environment. Three nodes are
used in this test. One node is configured to be the packet sniffer, which is always in receive mode and
try to capture whatever messages are transmitted in air. The second node is configured to transmit fixed
data (all zeros) continuously, as fast as possible to stress the bandwidth. Then the third node is
configured to transmit data periodically, upon the interrupt of a timer. The result shown that the third
node still be able to transmit data. In Figure 29 is the log file provided by the first node, which shown
that the third node is still able to transmit data regularly over time (marked by red circles), despite that
the bandwidth is almost conquered by the second node.

Figure 29 - Listen_before_talk test
Sometime delay occurs, as the third node has to wait for the second node finish transmission, but not
failure appeared in the test. Thus the listen-before-talk is working.








VII. Timeline
1. Work Breakdown Structure (WSB)
The Work Breakdown Structure is presented in Figure 30. The project is divided into hardware part and
software part.

Figure 30 - WBS Diagram
Hardware part takes role to design schematic, PCB and implement it into complete devices. The
hardware development is divided into 2 small task, design control board and RF board. The hardware
development for RF board was reserved with higher priority; some prototype boards had been made
and initial tests shown good results. However, due to the transition from Vietnam to Australia, the
process had to be stopped. The similar commercial RF boards were bought as replacement. The
development of control board is less complicated, thus can be transferred into Australia. The change in
RF board (from designed one to purchased one) had led to the change in design of control board, and
this cause a little more time spent in hardware development.
As the hardware cannot be tested without software, the other half of the WBS had been conducted
along with the first half. Software development is divided into 2 small parts, routing and processing.
Routing part is developed first at it is needed to test the operation of hardware in the network operation.
This part is divided into 3 small tasks, twos target 2 different kinds of node in the network (master and
slave), and one other used for development phase (DAQ). Most of project time had been spent in this
part, but unfortunately the problem is far beyond the scope that the project can handle. As no available
protocol can be used, a new customized protocol must be made. However, writing a network protocol
is a too complicated task that even company such as TI or Microchip with groups of staff still need
time to develop and improve. Therefore, the target is reduced to writing a simple routine that can
connect devices together in listen-before-talk scheme (explained before).
The processing part, which was planned to develop a data compression algorithm at slave nodes, is now
leaved as future development.
2. Milestones
There are many issues that occurred during the project that were not predictable at the planning phase.
The initially selected MSP430 controller from TI is not available for purchasing, which lead to the
choice of dsPIC33FJ16MC102 as a replacement. This change then causes the plan to use existing
network protocol fail as related to legal agreements. Thus a custom protocol has to be built from
scratch, which is a complex task far beyond the scope of the project. The software target has to be
reduced to build a simple network management scheme. In addition, the implementation of RF board is
also a big problem as related electronic parts are too small to be implement by hand, thus 2 out 3
implemented boards were failed for the first trial. Then the implementation of RF board had to be stop
due to the transition from Vietnam to Melbourne. As new RF boards are purchased for replacement, the
design of control board has to be changed to adapt to the new RF board. This causes more delay to the
project development.
However, compare to general target, there are important achievements. The control board is designed,
implemented, and tested to work well with purchased RF boards. Together, each node comprises of
control board and RF board can work well as a network node, which was able to send and receive
wireless messages on demand. Drivers for hardware modules had been implemented, which is the most
important foundation to develop application on the built system. The radio hardware had been
successfully configured to work in listen before talk scheme, which is critically important in wireless
network communication. An Event based structure had also been established to build firmware for
each network node, which brings OS (operation system) like features to the programs on such simple
MCU like the dsPIC33F.
VIII. Budget

Price / unit Quantity Total prices
Note
($) ($)
Equipment
MCU 2.5 5 12.5
Real Expense $115
RF Transceiver 2.5 5 12.5
RF Boards 8 5 40
Passive Devices, PCB
toolbox
40 1 50
Function Generator 5000 1 5000 supported by RMIT
Oscilloscope 5000 1 5000 supported by RMIT
License
MPLAB 0 1 0
Window 7 200 1 200 supported by RMIT
Microsoft Office 2010 120 1 120 supported by RMIT
Labor Cost Researcher 5 364 1820
Additional
Cost
Internet N/A N/A 60 supported by RMIT
Power N/A N/A 24 supported by RMIT
Water N/A N/A 6 supported by RMIT
Total 12345
Table 1 - Expensed budget
Table 1 is the summary of expenses for the project. The total cost calculated is $12345, which includes
all stuffs involved in the project. However, majority of equipment had been supported by RMIT, and
had been depreciated after long time of use. Therefore, the cost is just for reference purposes. The real
payable cost only accounts of the electronic components that were used to build the system, such as
MCU, transceiver, PCB board, added up to $115. This cost is computed using retail price for electronic
parts, because only a few items are bought to build the prototypes. In real life, massive purchasing will
reduce the cost further. In approximation, each node will cost no more than $5, and can be even much
lower.
The labor cost and approximation of facilities cost such as internet, water, power, are also included as a
reference. The project had elapsed about 182 days, with approximate 2 hours working per day. As the
nominal cost of $5 per hour, total labor cost is about $1800. To develop the whole network, this cost is
definitely worthy.
IX. Conclusion and Future Development
Many problems had happened during conduction of project that changes the development direction.
Although major part of the project had still been completed, there was obvious issue with planning
phase that lead to this situation. Planning is a very important step that needs to be carried out
accurately. Worst case analysis need to be performed to prepare for the bad problems that may happen.
Generally, the hardware design and implementation is almost finished, which had been tested to work
properly. The built software is able to control hardware for important functions, providing an important
abstracted layer to develop higher level applications. The expense for the project is within manageable
budget. In average, the cost for each node is affordable for most application, worthy for the benefits it
may bring back.
In the future, the network management topology should be improve and tested more carefully. The
analog signal capturing and processing should be built to extend the application range of the network.
The control board prototype should be improved to reduce noise and physical size. In the meantime, if
the RF board can be self-fabricated, the price for each node can be reduced further.



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