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Application Note 140

October 2013
Basic Concepts of Linear Regulator and Switcing
!ode "ower Supplies
#enr$ %& 'ang
ABSTRACT
(is article e)plains te basic concepts of linear regulators
and switcing *ode power supplies +S!"S,& -t is ai*ed at
s$ste* engineers wo *a$ not be .er$ fa*iliar wit power
suppl$ designs and selection& (e basic operating
principles of linear regulators and S!"S are e)plained and
te ad.antages and disad.antages of eac solution are
discussed& (e buc/ step0down con.erter is used as an
e)a*ple to furter e)plain te design considerations of a
switcing regulator&
INTRODUCTION
(oda$1s designs re2uire an increasing nu*ber of power rails
and suppl$ solutions in electronics s$ste*s3 wit loads
ranging fro* a few *A for standb$ supplies to o.er 100A for
AS-C .oltage regulators& -t is i*portant to coose te
appropriate solution for te targeted application and to *eet
specified perfor*ance re2uire*ents3 suc as ig efficienc$3
tigt printed circuit board +"CB, space3 accurate output
regulation3 fast transient response3 low solution cost3 etc&
"ower *anage*ent design is beco*ing a *ore fre2uent and
callenging tas/ for s$ste* designers3 *an$ of wo* *a$
not a.e strong power bac/grounds&
A power con.erter generates output .oltage and current
for te load fro* a gi.en input power source& -t needs to
*eet te load .oltage or current regulation re2uire*ent
during stead$0state and transient conditions& -t also *ust
protect te load and s$ste* in case of a co*ponent
failure& 4epending on te specific application3 a designer
can coose eiter a linear regulator +LR, or a switcing
*ode power suppl$ +S!"S, solution& (o *a/e te best
coice of a solution3 it is essential for designers to be
fa*iliar wit te *erits3 drawbac/s and design concerns of
eac approac&
(is article focuses on
nonisolated power
suppl$ applica0tions
and pro.ides an
introduction to teir
operation and design
basics&
LINEAR
REGULATORS
How a Linear
Regulator Works
Let1s start wit a si*ple
e)a*ple& -n an e*bedded
s$ste*3 a 125 bus rail is
a.ailable fro* te front0end
power suppl$& On te
s$ste* board3 a 3&35
.oltage is needed to power
an operational a*plifier +op
a*p,& (e si*plest
approac to generate te
3&35 is to use a resistor
di.ider fro* te 125 bus3 as
sown in 6igure 1& 4oes it
wor/ well7 (e answer is
usuall$ no& (e op a*p1s
5
CC
pin current *a$ .ar$
under different operating
conditions& -f a fi)ed resistor
di.ider is used3 te -C 5
CC
.oltage .aries wit load&
Besides3 te 125 bus input
*a$ not be well regulated&
(ere *a$ be *an$ oter
loads in te sa*e s$ste*
saring te 125 rail&
Because of te bus
i*pedance3 te 125 bus
.oltage .ar0ies wit te bus
loading conditions& As a
result3 a resistor
125
4C
B8S
R1
3&35
5
CC
R2
5
9

AN140 601
Figure ! Resistor Di"i#er
Generates $!$%
DC
&ro' (%
Bus In)ut
L3 L(3 L(C3 L(!3 Linear (ecnolog$3
L(spice3 :!odule3 "ol$"ase and te
Linear logo are registered trade*ar/s
and L(powerCA4 is a trade*ar/ of
Linear (ecnolog$ Corporation& All oter
trade*ar/s are te propert$ of teir
respecti.e owners&
an140fa
AN140-1
Application Note 140
di.ider
cannot
pro.ide a
regulated
3&35 to
te op
a*p to
ensure its
proper
operation&
(erefore3
a
dedicated
.olt0age
regulation
loop is
needed&
As sown
in 6igure
23 te
feedbac/
loop
needs to
ad;ust te
top
resistor
R1 .alue
to
d$na*icall
$ regulate
te 3&35
on 5
CC
&
125
5

AN140 602
Figu
re (!
Fee
#*a
+k
Loo
)
A#,ust
s
Series
Resist
or R
%alue
to
Regula
te $!$%
(is /ind of
.ariable
resistor can
be
i*ple*ented
wit a linear
regulator3 as
sown in
6igure 3& A
linear
regulator
operates a
bipolar or
field effect
power
transistor
+6<(, in its
linear *ode&
So te
transistor
wor/s as a
.ariable
resistor in
series wit
te output
load& (o
establis te
feedbac/
loop3
conceptuall$3
an error
a*plifier
senses te
4C output
.oltage .ia a
sa*pling
resistor
networ/ R
A
and R
B
3 ten
co*pares te
feedbac/
.oltage 5
6B
wit a
reference
.oltage 5
R<6
&
(e error
a*plifier
output
.oltage dri.es
te base of
te series
power
transistor .ia
a current
a*plifier&
=en eiter
te input
5
B8S
.oltage
decreases or
te load
current
increases3 te
5
CC
output
.oltage goes
down& (e
feedbac/
.oltage 5
6B
decreases as
well& As a
result3 te
feedbac/
error a*plifier
and current
a*plifier
generate
*ore current
into te base
of te
transistor >1&
(is reduces
te .oltage
drop 5
C<
and ence
brings bac/
te 5
CC
output
.oltage3 so
tat 5
6B
e2uals 5
R<6
&
On te oter
and3 if te
5
CC
output
.oltage goes
up3 in a
si*ilar wa$3
te negati.e
feedbac/
circuit
increases
5
C<
L-N<AR R<?8LA(OR
C8RR<N(
A!"L-6-<R
<RROR
A!"L-6-<R
Figur
e $! A
Linea
r
Regul
ator
I')le
'ents
a
%aria
*le
Resis
tor to
Regul
ate
Out)u
t
%oltag
e
to ensure
te
accurate
regulation
of te
3&35
output& -n
su**ar$3
an$
.ariation
of 5
O
is
absorbed
b$ te
linear
regulator
transistor1
s 5
C<
.oltage& So
te output
.oltage 5
CC
is alwa$s
constant and
well
regulated&
W-. Use
Linear
Regulator
s/
(e linear
regulator as
been widel$
used b$
industr$ for a
.er$ long
ti*e& -t was
te basis for
te power
suppl$
industr$ until
switcing
*ode power
supplies
beca*e
pre.alent
after te
1@A0s& <.en
toda$3 linear
regulators
are still
widel$ used
in a wide
range of
applications&
-n addition to
teir
si*plicit$ of
use3 linear
regulators
a.e oter
perfor*ance
ad.antages&
"ower
*anage*ent
sup0pliers
a.e
de.eloped
*an$
integrated
linear
regulators& A
t$pical
integrated
linear
regulator
needs onl$
5
-N
3 5
O8(
3
6B and
optional ?N4
pins& 6igure 4
sows a
t$pical 30pin
linear
regulator3 te
L(10B33
wic was
de.eloped
*ore tan 20
$ears ago b$
Linear
(ecnolog$& -t
onl$ needs
an input
capacitor3
output
capacitor and
two feedbac/
resistors to
set te output
.oltage&
Al*ost an$
electrical
engineer can
design a
suppl$ wit
tese si*ple
linear
regulators&
an140fa
AN140-2
Application Note 140
5
-N
C A&D5
ER<>8-R<4 6OR S(AB-L-(F
F
i
g
u
r
e

0
!

I
n
t
e
g
r
a
t
e
#

L
i
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e
a
r

R
e
g
u
l
a
t
o
r

E
1
a
'
)
l
e
2
3!
4
A
Li
n
ea
r
R
e
g
ul
at
or
wi
t-
O
nl
.
T
-r
ee
5i
n
s
One
Draw*a+
k 6 A
Linear
Regulato
r Can
Burn a
Lot o&
5ower
A *a;or
drawbac/ of
using linear
regulators
can be te
e)cessi.e
power
dissipation of
its series
transistor >1
operating in
a linear
*ode& As
e)plained
pre.iousl$3 a
lin0ear
regulator
transistor is
conceptuall$
a .ariable
resistor&
Since all te
load current
*ust pass
troug te
series
transistor3 its
power
dissipation is
"
Loss
G +5
-N
H 5
O
, -
O
& -n
tis case3 te
efficienc$ of
a linear
regulator can
be 2uic/l$
esti*ated b$I
G
"
O8("8(
LR " J"
O8("8( LOSS
So in te
6igure 1
e)a*ple3
wen te
input is 125
and output is
3&353 te
linear
regulator
efficienc$ is
;ust 2K&DL& -n
tis case3
K2&DL of te
input power is
;ust wasted
and
generates
eat in te
regulator&
(is *eans
tat te
transis0tor
*ust a.e te
ter*al
capabilit$ to
andle its
powerM eat
dissipation at
worst case at
*a)i*u* 5
-N
and full load&
So te siNe of
te linear
regulator and
its eat sin/
*a$ be large3
especiall$
wen 5
O
is
*uc less
tan 5
-N
&
6igure D
sows tat
te
*a)i*u*
efficienc$
of te
linear
regulator is
proportion
al to te
5
O
M5
-N
ratio&
On te
oter
and3 te
linear
regulator
can be
.er$
efficient if
5
O
is close
to 5
-N
&
#owe.er3
te linear
regulator
+LR, as
anoter
li*itation3
wic is
te
*ini*u*
.oltage
differ0ence
between
5
-N
and
5
O
& (e
transistor
in te LR
*ust be
operated in
its linear
*ode& So
it re2uires
a certain
*ini*u*
.oltage
drop
across te
collector to
e*itter of a
bipolar
transistor
or drain to
source of a
6<(& =en
5
O
is too
close to 5
-N
3
te LR *a$
be unable to
regulate
output
.oltage
an$*ore& (e
linear
regulators
tat can
wor/ wit
low
eadroo*
+5
-N
H 5
O
,
are called
low
dropout
regulators
+L4Os,&
-t is also
clear tat a
linear
regulator or
an L4O can
onl$ pro.ide
step0down
4CM4C
con.ersion&
-n
applications
tat re2uire
5
O
.oltage
to be iger
tan 5
-N
.oltage3 or
need
negati.e 5
O
.oltage fro*
a positi.e
5
-N
.oltage3
linear
regulators
ob.iousl$ do
not wor/&
100
B0
A0
<
6
6
-
C
-
<
N
C
F
40
F
i
g
u
r
e

4
!

7
a
1
i
'
u
'

L
i
n
e
a
r

R
e
g
u
l
a
t
o
r

E
&
&
i
+
i
e
n
+
.

"
s
8

%
O
9
%
I
N

R
a
t
i
o
Linear
Regulator
wit-
Current
S-aring
&or Hig-
5ower :;<
6or
application
s tat
re2uire
*ore
power3 te
regulator
*ust be
*ounted
separatel$
on a eat
sin/ to
dissipate
te eat& -n
all0surface0
*ount
s$ste*s3 tis
is not an
option3 so te
li*itation of
power
dissipation
+1= for
e)a*ple,
li*its te
output
current&
8nfortunatel$3
it is not eas$
to directl$
parallel linear
regulators to
spread te
generated
eat&
1&25 (O 3A5
F
i
g
u
r
e
=
!
S
i
n
g
l
e
R
e
si
s
t
o
r
S
e
tt
i
n
g
L
D
O
L
T
$
>
;
>
w
it
-
a
5
r
e
+i
si
o
n
C
u
rr
e
n
t
S
o
u
r
+
e
R
e
&
e
r
e
n
+
e
an140fa
AN14 0-3
Application Note 140
Replacing
te .oltage
reference
sown in
6igure 3
wit a
precision
current
source3
allows te
linear
regulator
to be
directl$
paralleled
to spread
te current
load and
tus
spread
dissipated
eat
a*ong te
-Cs& (is
*a/es it
pos0sible
to use
linear
regulators
in ig
output
current3 all0
surface0
*ount
application
s3 were
onl$ a
li*ited
a*ount of
eat can
be
dissipated
in an$
single spot
on a
board&
(e
L(30B0 is
te first
ad;ustable
linear
regulator tat
can be used
in parallel for
iger
current& As
sown in
6igure A3 it
as a
precision
Nero (C
10:A internal
current
source
connected to
te
nonin.erting
input of te
operational
a*plifier&
=it an
e)ternal
single
.oltage
setting
resistor
R
S<(
3 te
linear
regulator
output
.oltage can
be ad;usted
fro* 05 to
+5
-N
H
5
4RO"O8(
,&
6igure K
sows ow
eas$ it is to
parallel
L(30B0s for
current
saring&
Si*pl$ tie
te S<( pins
of te
L(30B0s
togeter3 te
two
regulators
sare te
sa*e
reference
.oltage&
Because te
operational
a*plifiers
are precisel$
tri**ed3 te
offset .oltage
between te
ad;ust*ent
pin and te
output is less
tan 2*5& -n
tis case3
onl$ 10*O
ballast
resistance3
wic can be
te su* of a
s*all
e)ternal
resistor and
"CB trace
resistance3 is
needed to
balance te
load current
wit better
tan B0L
e2ualiNed
saring&
Need e.en
*ore power7
<.en
paralleling D
to 10 de.ices
is
reasonable&
5
-N
L(30B0
5
CON(ROL
J
H
10* O8(
S<(
5
-N
5
-N
L(30B0
4&D5 (O 305
5
CON(ROL
1:6
J
H
10*
5
O8(
O8(
3&35
S<(
2A
100:6
1AD/
Fig
ure
3!
5ar
alle
ling
o&
Tw
o
LT$
>;>
Lin
ear
Re
gul
ato
rs
&or
Hig
-er
Out
)ut
Cur
ren
t
A))li+ations
W-ere
Linear
Regulators
Are
5re&era*le
(ere are
*an$
application
s in wic
linear
regulators
or L4Os
pro.ide
superior
solutions
to
switcing
supplies3
includingI
1. Si')le9l
ow +ost
solution
s& Linear
regulator
or L4O
solutions
are
si*ple
and
eas$ to
use3
especiall
$ for low
power
applicati
ons wit
low
output
current
were
ter*al
stress is
not
critical&
No
e)ternal
power
inductor
is
re2uired&
2. Low
noise9low
ri))le
a))li+atio
ns& 6or
noise0
sensiti.e
application
s3 suc as
co**unic
ation and
radio
de.ices3
*ini*iNing
te suppl$
noise is
.er$
critical&
Linear
regulators
a.e .er$
low output
.oltage
ripple
because
tere are
no
ele*ents
switcing
on and off
fre2uentl$
and linear
regulators
can a.e
.er$ ig
bandwidt&
So tere is
little <!-
proble*&
So*e
special
L4Os3
suc as
Linear
(ecnolog
$1s L(1KA1
L4O
fa*il$3
a.e as
low as
20P5
R!S
noise
.oltage on
te output&
-t is al*ost
i*possi
ble for
an
S!"S
to
acie.e
tis low
noise
le.el&
An
S!"S
usuall$
as *5
of
output
ripple
e.en
wit
.er$ low
<SR
capacit
ors&
3. Fast
transie
nt
a))li+
ations&
(e
linear
regulat
or
feed0
bac/
loop is
usuall$
internal
3 so no
e)tern
al
co*pe
nsa0
tion is
re2uire
d&
($pical
l$3
linear
regulat
ors
a.e
wider
control
loop
bandwidt
and
faster
transient
response
tan tat
of S!"S&
4. Low
#ro)out
a))li+atio
ns& 6or
application
s were
output
.oltage is
close to
te input
.oltage3
L4Os *a$
be *ore
efficient
tan an
S!"S&
(ere are
.er$ low
dropout
L4Os
+5L4O,
suc as
Linear1s
L(C1B443
L(3020
and
L(C302D
wit fro*
20*5 to
@0*5
dropout
.oltage
and up to
1D0*A
current&
(e
*ini*u*
input
.oltage
can be as
low as
0&@5&
Because
tere is no
AC switc0
ing loss in
an LR3 te
ligt load
efficienc$
of an LR
or an L4O
is si*ilar
to its full
load
efficienc$&
An S!"S
usuall$
as lower
ligt load
efficienc$
because of
its AC
switcing
losses& -n
batter$
powered
application
s in wic
ligt load
efficienc$
is also
critical3 an
L4O can
pro.ide a
better
solution
tan an
S!"S&
-n su**ar$3
designers
use linear
regulators or
L4Os
because
te$ are
si*ple3 low
noise3 low
cost3 eas$ to
use and
pro.ide fast
transient
response& -f
5
O
is close
to 5
-N
3 an
L4O *a$ be
*ore
efficient tan
an S!"S&
an140fa
AN14 0-4
Application Note 140
SWITCH
ING
7ODE
5OWER
SU55L?
BASICS
W-.
Use a
Swit+-i
ng
7o#e
Su))l./
A 2uic/
answer is
ig
efficienc$&
-n an
S!"S3 te
tran0sistors
are
operated in
switcing
*ode
instead of
linear
*ode& (is
*eans tat
wen te
transistor
is on and
conducting
current3
te .oltage
drop
across its
power pat
is *ini*al&
=en te
transistor
is off and
bloc/ing
ig
.oltage3
tere is
al*ost no
current
troug its
power
pat& So
te
se*icondu
ctor
transistor is
li/e an ideal
switc& (e
power loss in
te transistor
is terefore
*ini*iNed&
#ig
efficienc$3 low
power
dissipation
and ig
power densit$
+s*all siNe,
are te *ain
reasons for
designers to
use S!"S
instead of
linear
regulators or
L4Os3
especiall$ in
ig current
applications&
6or e)a*ple3
nowada$s a
125
-N
3
3&35
O8(
switcing
*ode
s$ncronous
buc/ step0
down suppl$
can usuall$
acie.e
Q@0L
efficienc$ .s
less tan
2K&DL fro* a
linear
regulator&
(is *eans a
power loss or
siNe reduction
of at least
eigt ti*es&
T-e
7o
st
5o)
ular
Swi
t+-i
ng
Su)
)l.
@
t-e
Bu+
k
Co
n"e
rter
6igure B
sows te
si*plest and
*ost popular
switcing
regulator3 te
buc/ 4CM4C
con.erter& -t
as two
operating
*odes3
depending on
if te
transistor >1
is turned on
or off& (o
si*plif$ te
discussion3
all te power
de.ices are
assu*ed to
be ideal&
=en switc
+transistor,
>1 is turned
on3 te
switcing
node .oltage
5
S=
G 5
-N
and inductor
L current is
being
carged up
b$ +5
-N
H
5
O
,& 6igure
B+a, sows
te
e2ui.alent
circuit in
tis
inductor
carging
*ode&
=en
switc >1
is turned
off3
inductor
current
goes
troug te
freeweeling
diode 413 as
sown in
6igure B+b,&
(e switcing
node .oltage
5
S=
G 05
and inductor
L current is
discarged
b$ te 5
O
load& Since
te ideal
inductor
cannot a.e
4C .oltage in
te stead$
state3 te
a.erage
output
.oltage 5
O
can be gi.en
asI
5
G A5?R5 SG
(
ON
T5
O+4C, S=
(
S
-N
+
+
5
-N

+
+
5
-N
A&
-N
4
8
C
(
O
R
C
#
A
R
?-
N
?
!
O
4
<
+
+
5
-N
AN140 60B
B
&
-
N
4
8
C
(
O
R

4
-
S
C
#
A
R
?
-
N
?

!
O
4
<
Fig
ure
;!
Bu+
k
Con
"ert
er
O)e
rati
ng
7o#
es
an#
T.)i
+al
Wa"
e&or
's
an140fa
AN140-5
Application Note 140
were
(
ON
is
te on0
ti*e
inter.al
witin
te
switcing
period
(
S
& -f te
ratio of
(
ON
M(
S
is
defined
as dut$
c$cle 43
te
output
.oltage
5
O
isI
5
O+4C,
=en te
filter
inductor
L and
output
capacitor
C
O
.alues
are
sufficientl
$ ig3
te
output
.oltage 5
O
is a 4C
.oltage
wit onl$
*5
ripple& -n
tis case3
for a 125
input
buc/
suppl$3
conceptu
all$3 a
2K&DL
dut$
c$cle
pro.ides
a 3&35
output
.oltage&
Oter tan
te abo.e
a.eraging
approac3
tere is
anoter
wa$ to
deri.e te
dut$ c$cle
e2uation&
(e ideal
inductor
cannot a.e
4C .oltage
in stead$
state& So it
*ust
*aintain
inductor .olt0
second
balance
witin a
switcing
period&
According to
te inductor
.oltage
wa.efor* in
6igure B3
.olt0second
balance
re2uiresI
+5
-N
H 5
O
, T 4 T (
#ence3 5
O
<2uation +D, is
te sa*e as
e2uation +3,&
(e sa*e
.olt0second
balance
approac can
be used for
oter 4CM4C
topologies to
deri.e te dut$
c$cle .s 5
-N
and 5
O
e2uations&
5ower
Losses in
a Bu+k
Con"erter
DC
Con#u+tio
n Losses
=it ideal
co*ponents
+Nero .oltage
drop in te
ON state and
Nero
switcing
loss,3 an
ideal buc/
con.erter is
100L
efficient& -n
realit$3 power
dissipation is
alwa$s
associated
wit e.er$
power
co*ponent&
(ere are
two t$pes of
losses in an
S!"SI 4C
conduction
losses and
AC switcing
losses&
(e
conduction
losses of a
buc/
con.erter
pri*aril$
result fro*
.oltage drops
across
transistor >13
diode 41 and
inductor L
wen te$
conduct
current& (o
si*plif$
te
discussion
3 te AC
ripple of
inductor
current is
neglected
in te
following
conductio
n loss
calculation
& -f a
!OS6<(
is used as
te power
transistor3
te
conductio
n loss of
te
!OS6<(
e2uals -
O
2
R
4S+ON,
43 were
R
4S+ON,
is
te on0
resistance
of
!OS6<(
>1& (e
conduction
power
loss of te
diode
e2uals -
O

5
4
+1 H
4,3 were
5
4
is te
forward
.oltage
drop of te
diode 41&
(e
conduction
loss of te
inductor
e2uals -
O
2
R
4CR
3
were R
4CR
is
te copper
resistance of
te inductor
winding&
(erefore3 te
conduction
loss of te
buc/
con.erter is
appro)i*atel
$I
"
CONULOSS
T R
4CR
6or e)a*ple3
a 125 input3
3&35M10A
!A9

output buc/
suppl$
can use
following
co*ponentsI
!OS6<(
R
4S+ON,
G
10*O3
inductor R
4CR
G 2 *O3 diode
forward
.oltage 5
4
G
0&D5&
(erefore3
te
conduction
loss at full
load isI
"
CONULO
S
G 10
2
T
10 T 10
H3

T 0&2KD J
10 T 0&D T
+1 H
0&2KD, J
10
2
T 2 T
10
H3
+=,
G
0&2KD=
J 3&A2=
J 0&2=
G
4&0@D=
+K,
Considerin
g onl$
conduction
loss3 te
con.erter
efficienc$
isI

B8CVUCON
G
"
O8("8(
" J"
O8("8( CONULOSS
G
3&35 T10A
G BB&@AL 33=J4&0@D= +B,
(e abo.e
anal$sis
sows tat
te
freeweeling
diode
consu*es
3&A2= power
loss3 wic is
*uc iger
tan te
conduction
losses of te
!OS6<( >1
and te
inductor L& (o
furter
i*pro.e
efficienc$3
diode 41 can
be replaced
wit a
!OS6<( >23
as sown in
6igure @& (is
con.erter is
referred to as
a
s$ncronous
buc/
con.erter&
>21s gate
re2uires
signals
co*ple*enta
r$ to te >1
gate3 i&e&3 >2
-
C+-N,
+
5
-N
AN140 60@
48(
F
CF
CL<
Figure
A!
S
.
n
+
-r
onous
Bu+k
Con"er
ter an#
Its
Transi
stor
Gate
Signal
s
an140fa
AN140-6
Application Note 140
is onl$ on wen >1 is off& (e conduction loss of te >1 in te s$ncronous buc/ con.erter& (e carging and
s$ncronous buc/ con.erter isI T R T +1H 4, discarging of te top 6<( >11s parasitic capacitor C
?4
"
CONULOSS
G -
O
2
T R T 4 J -
2
wit carge >
?4
deter*ine *ost of te >1 switcing
4S1+ON, O 4S2+ON,
ti*e and related losses& -n te s$ncronous buc/3 te
J -
O
2
R
4CR +@, botto* 6<( >2 switcing loss is s*all3 because >2 is
-f a 10*O R
4S+ON,
!OS6<( is used for >2 as well3 te alwa$s turned on after its bod$ diode conducts and is
conduction loss and efficienc$ of te s$ncronous buc/ turned off before its bod$ diode conducts3 wile te
con.erter areI .oltage drop across te bod$ diode is low& #owe.er3
"
CONULOS G 10
2
T 0&01 T 0&2KD J 10
2
T
0&01 T te bod$ diode re.erse reco.er$ carge of >2 can
+1 H 0&2KD, J 10
2
T 2 T 10
H3
+=, G 0&2KD= J 0&K2D= J also increase te switcing loss of te top 6<( >1 and
0&2= G 1&2= +10,
can generate switcing .oltage ringing and <!- noise&
<2uation +12, sows tat te control 6<( >1 switcing

B8CVUCON
G
"
O8("8(
loss is proportional to te con.erter switcing fre2uenc$
f
S
& (e accurate calculation of te energ$ losses <
ON
"
O8("8(
J"
CONULOSS
and <
O66
for >1 is not si*ple but can be found fro*
3&35 T10A
!OS6<( .endors1 application notes&
G
G @A&4DL
33=J1&2= +11,
"
S=U>1
G +<
ON
J <
O66
, T f
S
+12,
(e abo.e e)a*ple sows tat te s$ncronous buc/ is
2& In#u+tor +ore loss 5
SWBCORE
& A real inductor also
*ore efficient tan a con.entional buc/ con.erter3 especiall$
as AC loss tat is a function of switcing fre2uenc$&
for low output .oltage applications were te dut$ c$cle
-nductor AC loss is pri*aril$ fro* te *agnetic core
is s*all and te conduction ti*e of te diode 41 is long&
loss& -n a ig fre2uenc$ S!"S3 te core *aterial *a$
AC Swit+-ing Losses
be powdered iron or ferrite& -n general3 powdered iron
cores saturate softl$ but a.e ig core loss3 wile fer0
-n addition to te 4C conduction losses3 tere are oter rite *aterial saturates *ore sarpl$ but as less core
ACMswitcing related power losses due to te nonideal loss& 6errites are cera*ic ferro*agnetic *aterials tat
power co*ponentsI a.e a cr$stalline structure consisting of *i)tures of
1& 7OSFET swit+-ing losses& A real transistor re2uires
iron o)ide wit eiter *anganese or Ninc o)ide& Core
losses are due *ainl$ to *agnetic $steresis loss& (e
ti*e to be turned on or off& So tere are .oltage and
core or inductor *anufacturer usuall$ pro.ide te core
current o.erlaps during te turn0on and turn0off tran0
loss data for power suppl$ designers to esti*ate te
sients3 wic generate AC switcing losses& 6igure 10
AC inductor loss&
sows te t$pical switcing wa.efor*s of te !OS6<(
W(ON
>1
>
?4
5
4S
<
ON
Figure >! T.)i+al
Swit+-ing
Wa"e&
or'
an#
Losse
s in
t-e
To)
FET
C in
t-e
Bu+k
Con"e
rter
3. Ot-e
r AC
relat
e#
losse
s&
Oter
AC
relate
d
losse
s
includ
e te
gate
dri.er
loss "
S=U?A(<
3
wic e2uals
5
4R5
T >
?
T f
S
3
and te dead ti*e
+wen bot top
6<( >1 and
botto* 6<( >2
are off, bod$ diode
conduction loss3
wic is e2ual to
+W(
ON
J W(
O66
, T
5
4+>2,
T f
S
&
-n su**ar$3 te
switcing0
related loss
includesI
"
S=ULOSS
G"
>1US=
J"
COR<US=
J"
4R5
J"
4<A4(-!<
+13,

(e calculation of
switcing related
losses is usuall$
not eas$& (e
switc
ing
relat
ed
losse
s are
prop
ortio
nal
to
switc
ing
fre2u
enc$
f
S
& -n
te
125
-
N
3
3&35
O
M10
A
!A
9
s$nc
ronou
s
buc/
con.
erter3
te
AC
loss
caus
es
about
2L to
DL
efficie
nc$
loss
wit
200/
#N H
D00/
#N
switc
0
an140fa
AN 140-7
Application Note 140
ing
fre2uen
c$& So
te
o.erall
efficienc
$ is
about
@3L at
full load3
*uc
better
tan
tat of
an LR
or L4O
suppl$&
(e
eat or
siNe
reductio
n can
be close
to 10)&
Design
Consi#e
raTION
S o& t-e
Swit+-i
ng
5ower
Co')o
nents
Swit+-i
ng
FreDuen
+.
O)ti'iE
ation
-n general3
iger
switcing
fre2uenc$
*eans
s*aller
siNe output
filter
co*ponents
L and C
O
& As
a result3 te
siNe and cost
of te power
suppl$ can be
reduced&
#iger
bandwidt
can also
i*pro.e load
transient
response&
#owe.er3
iger
switcing
fre2uenc$
also *eans
iger AC0
related power
loss3 wic
re2uires
larger board
space or a
eat sin/ to
li*it te
ter*al
stress&
Currentl$3 for
C10A output
current
applications3
*ost step0
down sup0
plies operate
in te range
of 100/#N to
1!#N X
2!#N& 6or Y
10A load
current3 te
switcing
fre2uenc$
can be up to
se.eral !#N&
(e opti*u*
fre2uenc$ for
eac design
is a result of
careful trade0
offs in siNe3
cost3
efficienc$ and
oter
perfor*ance
para*eters&
Out)ut
In#u+tor
Sele+tion
-n a
s$ncrono
us buc/
con.erter3
te
inductor
pea/0to0
pea/ ripple
current can
be
calculated
asI
W-
L+"0",
G
+5
-N
H 5
O
,T5
O
M 5
-N
+14,
L Tf
S
=it a gi.en
switcing
fre2uenc$3 a
low
inductance
gi.es large
ripple current
and results in
large output
ripple .olt0
age& Large
ripple current
also
increases
!OS6<(
R!S current
and
conduction
losses& On
te oter
and3 ig
inductance
*eans large
inductor siNe
and possible
ig inductor
4CR and
conduction
losses& -n
general3
10L X
A0L pea/0
to0pea/
ripple
current is
cosen
o.er te
*a)i*u*
4C current
ratio wen
selecting
an
inductor&
(e
inductor
.endors
usuall$
specif$ te
4CR3 R!S
+eating,
current
and
saturation
current
ratings& -t
is
i*portant
to design
te
*a)i*u*
4C current
and pea/
current of
te
inductor
witin te
.endor1s
*a)i*u*
ratings&
5ower
7OSFE
T
Sele+tio
n
=en
selecting a
!OS6<(
for a buc/
con.erter3
first *a/e
sure its
*a)i*u*
54S rating is
iger tan
te suppl$
5
-N+!A9,
wit
sufficient
*argin&
#owe.er3 do
not select a
6<( wit an
e)cessi.el$
ig .oltage
rating& 6or
e)a*ple3
for a
1A5
-N+!A9,
suppl$3 a 2D5
or 305 rated
6<( is a good
fit& A A05
rated 6<(
can be
e)cessi.e3
because te
6<(
on0
resistance
usuall$
increases
wit rated
.oltage&
Ne)t3
te 6<(1s on0
resistance
R
4S+ON,
and
gate carge
>
?
+or >?4,
are two *ost
critical
para*eters&
(ere is
usuall$ a
trade0off
between te
gate carge
>? and on0
resistance
R
4S+ON,
& -n
general3 a
6<( wit
s*all silicon
die siNe as
low >
?
but
ig on0
resistance
R
4S+ON,
3
wile a 6<(
wit a large
silicon die
as low
R
4S+ON,
but
large >
?
& -n a
buc/
con.erter3 te
top !OS6<(
>1 ta/es
bot
conduction
loss
and AC
switcing
loss& A low
>? 6<( is
usuall$
needed for
>13
especiall$
in
application
s wit low
output
.oltage
and s*all
dut$ c$cle&
(e lower
side
s$ncrono
us 6<( >2
as s*all
AC loss
because it
is usuall$
turned on
or off wen
its 5
4S
.oltage is
near Nero&
-n tis
case3 low
R
4S+ON,
is
*ore
i*portant
tan >?
for
s$ncrono
us 6<(
>2& =en
a
single
6<(
cannot
andle
te total
power3
se.eral
!OS6<
(s can
be used
in
parallel&
In)ut
an#
Out)ut
Ca)a+it
or
Sele+tio
n
6irst3 te
capacito
rs
sould
be
selected
wit
sufficient
.oltage
derating&
(e input
capacitor of
a buc/
con.erter
as
pulsating
switcing
current wit
large ripple&
(erefore3
te input
capacitor
sould be
selected
wit
sufficient
R!S ripple
current
rating to
ensure its
lifeti*e&
Alu*inu*
electrol$tic
capacitors
and low
<SR
cera*ic
capacitors
are usuall$
used in
parallel at
te input&
(e output
capacitor
deter*ines
not onl$ te
output .olt0
age ripple3
but also te
load transient
perfor*ance&
(e output
.oltage ripple
can be
calculated b$
<2uation
+1D,& 6or ig
perfor*ance
applications3
bot te <SR
and total
capacitance
are i*portant
to *ini*iNe
output ripple
.olt0age and
to opti*iNe
load transient
response&
8suall$3 low
<SR
tantalu*3 low
<SR pol$*er
capacitors
and
*ultila$er
cera*ic
capacitors
+!LCC, are
good coices&
W5 Z W-
L+"0",
T <SRJ
1
+1D,
B Tf TC O8(
S O8(
Close t-e
Fee#*a+k
Regulatio
n Loo)
(ere is
anoter
i*portant
design stage
for a
switcing
*ode suppl$
[closing te
regulation
loop wit a
negati.e
feedbac/
control
sce*e& (is
is usuall$ a
*uc *ore
callenging
tas/ tan
using an LR
or L4O& -t
re2uires good
an140fa
AN14 0-8
Application Note 140
understanding of loop bea.ior and co*pensation design
=ere3S
'U<SR
G 2\f
'U<SR
G
1
3 to opti*iNe d$na*ic perfor*ance wit a stable loop&
<SR TC
O
S'all Signal 7o#el o& t-e Bu+k Con"erter
As e)plained abo.e3 a switcing con.erter canges its
operation *ode as a function of te switc ON or O66 state&
-t is a discrete and nonlinear s$ste*& (o anal$Ne te feedbac/
loop wit te linear control *etod3 linear s*all signal
*odeling is needed R1S& Because of te output L0C filter3 te
linear s*all signal transfer function of dut$ c$cle 4 to output
5
O
is actuall$ a second0order s$ste* wit two poles and one
Nero3 as sown in <2uation +1A,& (ere are double poles
located at te resonant fre2uenc$ of te output inductor and
capacitor& (ere is a Nero deter*ined b$ te output
capacitance and te capacitor <SR&
S
5 5
-N
T 1J S U
<SR
? +s,G
O
G
'
+1A,
45
4 1J
S
J
S2
T>
2
O O
1

O
G 2\f
=O
G
T
O
%oltage 7o#e Control
"s Current 7o#e
Control
(e output .oltage can be
regulated b$ a closed loop
s$ste* sown in 6igure 11&
6or e)a*ple3 wen te
output .oltage increases3
te feedbac/ .oltage 5
6B
increases and te output of
te negati.e feedbac/
error a*plifier decreases&
So te dut$ c$cle
decreases& As a result3 te
output .oltage is pulled
bac/ to *a/e 5
6B
G 5
R<6
&
(e co*pensation networ/
of te error op a*p can be
a t$pe -3 t$pe -- or t$pe ---
feedbac/ a*plifier networ/
R4S& (ere is onl$ one
control loop to regulate te
output& (is sce*e is
referred to as .oltage
*ode control& Linear
(ecnolog$1s L(C3KKD and
L(C3BA1 are t$pical
.oltage *ode buc/
controllers&
L
+
4
<SR
5
O
"=!
+
R
5
-N CO
R2
LOA4

4
RA!"

+
CO!"ARA(OR
5R<6
5C
4T(
4 G RA!"
S
(
S
/
T
5
C
A
N
1
6<<4BACV CON(ROL
Figure !
Blo+k
Diagra' o& a
%oltage 7o#eF
Controlle#
Bu+k
C
o
n
"erter
AN140-9
Application Note 140
6igure 12
sows a
D5 to 2A5
input3
1&25M1DA
output s$n0
cronous
buc/
suppl$
using te
L(C3KKD
.oltage
*ode buc/
controller&
4ue to te
L(C3KKD1s
leading0
edge "=!
*odulation
arcitectur
e and .er$
low +30ns,
*ini*u*
on0ti*e3
te suppl$
operates
well for
application
s tat
con.erts a
ig
.oltage
auto*oti.e
or
industrial
power
suppl$
down to
te 1&25
low .oltage
re2uired b$
toda$1s
*icroproce
ssors and
progra**
able logic
cips& R@S
#ig
power
application
s re2uire
*ultipase
buc/
con.erters
wit current
saring& =it
.oltage *ode
control3 an
additional
current
saring loop
is re2uired to
balance
current
a*ong
parallel buc/
cannels& A
t$pical
current
saring
*etod for
.oltage *ode
control is te
*aster0sla.e
*etod& (e
L(C3BA1 is
suc a
"ol$"ase
]
.oltage *ode
controller& -ts
.er$ low3
^1&2D*53
current sense
offset *a/es
current
saring
between
paralleled
pases .er$
accurate to
balance te
ter*al
stress& R10S
Current
*ode control
uses two
feedbac/
loopsI an
outer .oltage
loop si*ilar
to te control
loop of
.oltage
*ode0
controlled
con.erters3
and an inner
current loop
tat feeds
bac/ te
current
signal into
te control
loop& 6igure
13 sows te
conceptual
bloc/
diagra* of a
pea/ current
*ode control
buc/
con.erter
tat directl$
senses te
output
inductor
current& =it
current *ode
control3 te
inductor
current is
deter*ined
b$ te error
op a*p
output
.oltage& (e
inductor
beco*es a
current
source&
(erefore3
te transfer
function fro*
op a*p
output3 5
C
3
to suppl$
output
.oltage
5
O
beco*es
a single
pole
s$ste*&
(is
*a/es loop
co*pensatio
n *uc
easier& (e
control loop
co*pensatio
n as less
dependenc$
on te output
capacitor
<SR Nero3 so
it is possible
to use all
cera*ic
output
capacitors&
R
A
R
10/ 10/
CO8(I SANFO 2RD("44K0!D
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an140fa
AN140-10
Application Note 140
(ere are
*an$ oter
benefits
fro*
current
*ode
control& As
sown in
6igure 133
since te
pea/
inductor
current is
li*ited b$
te op a*p
5
C
in a
c$cle0b$0
c$cle
fasion3
te current
*ode0
controlled
s$ste*
pro.ides a
*ore
accurate
and faster
current
li*it under
o.erload
conditions&
(e in0
rus
inductor
current is
well
controlled
during
start0up3
too& Also3
te
inductor
current
does not
cange
2uic/l$
wen te
input
.oltage
canges3
so te
suppl$ as
good line
transient
perfor*ance&
=en
*ultiple
con.erters
are
paralleled3
wit current
*ode control3
it is also .er$
eas$ to sare
current
a*ong
supplies3
wic is
i*portant for
reliable ig
current
applications
using
"ol$"ase
buc/
con.erters& -n
general3 a
current
*ode0
controlled
con.erter is
*ore reliable
tan a
.oltage
*ode0
controlled
con.erter&
(e current
*ode control
sce*e
solution
needs to
sense te
current
precisel$& (e
current
sensing
signal is usu0
all$ a s*all
signal at a
le.el of tens
of *illi.olts
tat is
sensiti.e to
switcing
noise&
(erefore3
proper and
careful "CB
la$out is
needed& (e
current loop
can be closed
b$ sensing
te inductor
current
troug a
sensing
resistor3 te
inductor 4CR
.oltage drop3
or te
!OS6<(
conduction
.oltage drop&
($pical
current *ode
controllers
include
Linear
(ecnolog$1s
L(C3BD1A
and
L(C3BDD&
Constant
FreDuen+
. "s
Constant
OnFTi'e
Control
($pical
.oltage
*ode and
current
*ode
sce*es
in te
5oltage
!ode
Control .s
Current
!ode
Control
section
a.e
constant
switcing
fre2uenc$
generated
b$
controller
internal
cloc/s&
(ese
constant
switcing
fre2uenc$
con0trollers
can be
easil$
s$ncroniN
ed3 an
i*portant
feature for
ig current3
"ol$"ase
buc/
controllers&
#owe.er3 if
te load step0
up transient
occurs ;ust
after te
control 6<(
>1 gate is
turned off3 te
con.erter
*ust wait te
entire >1 off0
ti*e until te
ne)t c$cle to
respond to
te transient&
-n
applications
wit s*all
dut$ c$cles3
te worst
case dela$ is
close to one
switcing
c$cle&
-n suc low
dut$ c$cle
applications3
constant on0
ti*e .al0le$
current *ode
control as
sorter
latenc$ to
respond to
load step0up
transients& -n
stead$ state
operation3
te switcing
fre2uenc$ of
constant on0
ti*e buc/
con.erters is
nearl$ fi)ed&
-n te e.ent
of a
transient3 te
switcing
fre2uenc$
can .ar$
2uic/l$ to
speed up te
transient
response& As
a result3 te
suppl$ as
i*pro.ed
transient
perfor*ance
and output
capacitance
and its
related cost
can be
reduced&
#owe.er3
wit constant
on0ti*e
control3 te
switcing fre0
2uenc$ *a$
.ar$ wit line
or load& (e
L(C3B33 is a
.alle$
+

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AN140 613
Figu
re
$!
Blo+
k
Dia
gr
a
' o& a
Current
7o#
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Con
troll
e#
Bu+
k
Con
"ert
er
an140fa
AN 140-11
Application Note 140
current
*ode buc/
controller
wit a
*ore
sopisticat
ed
controlled0
on0ti*e
arcitectur
e[a
.ariant of
te
constant
on0ti*e
control
arcitectur
e wit te
distinction
tat te
on0ti*e is
controlled
so tat te
switcing
fre2uenc$
re*ains
constant
o.er
stead$
stage
conditions
under line
and load&
=it tis
arcitectur
e3 te
L(C3B33
controller
as 20ns
*ini*u*
on0ti*e
and allows
step0down
appli0
cations
fro* up to
3B5
-N
to
0&A5
O
& (e
controller can
be
s$ncroniNed
to an e)ternal
cloc/ in te
200/#N to
2!#N
fre2uenc$
range& 6igure
14 sows a
t$pical
L(C3B33
suppl$ wit
4&D5 to 145
input and
1&D5M20A
output& R11S
6igure 1D
sows tat
te suppl$
can respond
2uic/l$ to
sudden3 ig
slew rate load
transients&
4uring te
load step0up
transient3 te
switcing
fre2uenc$
increases to
pro.ide faster
transient
response&
4uring te
load step0
down
transient3 te
dut$0c$cle
drops to Nero&
(erefore
onl$ te
output
inductor li*its
te current
slew rate& -n
addition to
te L(C3B333
for *ultiple
outputs or
"ol$"ase
applica0
C
-(#1 220p6 B? !B
R
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R
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Ti'e Current
7o#e Su))l.
Using t-e
LTC$;$$
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LOA4
20AM4-5
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-
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Figure 4!
LTC$;$$
Su))l. O&&ers
Fast
Res)onse
Duri
ng
Ra)i
#
Loa
#
Ste)
Tran
sien
ts
an140fa
AN140-12
Application Note 140
tions3
te
L(C3B3
B and
L(C3B3
@
controlle
rs
pro.ide
fast
transient
3
*ultipa
se
solutions
&
Loo)
Ban#wi
#t- an#
Sta*ilit.
A well
designed
S!"S is
2uiet3 bot
electricall$
and acous0
ticall$& (is
is not te
case wit
an
underco*p
ensated
s$ste*3
wic
tends to be
unstable&
($pical
s$*pto*s
of an
underco*p
ensated
power
suppl$
includeI
audible
noise fro*
te
*agnetic
co*ponents
or cera*ic
capacitors3
;itter in te
switcing
wa.efor*s3
oscillation of
output
.oltage3 and
so on& An
o.erco*pens
ated s$ste*
can be .er$
stable and
2uiet3 but at
te cost of a
slow transient
response&
Suc a
s$ste* as a
loop
crosso.er
fre2uenc$ at
.er$ low
fre2uencies3
t$picall$
below 10/#N&
Slow
transient
response
designs
re2uire
e)cessi.e
output
capacitance
to *eet
transient
regulation
re2uire*ents3
increasing
te o.erall
suppl$ cost
and siNe& An
opti*u* loop
co*pensa0
tion design is
stable and
2uiet3 but is
not
o.erco*pen0
sated3 so it
also as a
fast response
to *ini*iNe
output
capacitance&
(ere are
nu*erous
articles tat
discuss ow
to opti*iNe
loop
co*pensatio
n networ/s
for bot
.oltage
*ode0
controlled
and current
*ode0
controlled
S!"S R204S&
S*all signal
*odeling and
loop
co*pensatio
n design can
be difficult for
ine)perience
d power
suppl$
designers&
Linear
(ecnolog$1s
L(powerCA4
_ design tool
andles
te
co*plicate
d
e2uations
and
*a/es
loop
co*pensa
0tion a
*uc
si*pler
tas/ RAS&
(e
L(spice
]
si*ulation
tool
integrates
all of
Linear
(ecnolog
$1s part
*odels
and
pro.ides
additional
ti*e
do*ain
si*ulation
s to
opti*iNe
te
design&
#owe.er3
benc
testM.erific
ation of
loop
stabil0it$
and
transient
perfor*an
ce is
usuall$
necessar$ in
te protot$pe
stage&
-n general3
te
perfor*ance
of te closed
.oltage
regulation
loop is
e.aluated b$
two i*portant
.aluesI te
loop band0
widt and te
loop stabilit$
*argin& (e
loop
bandwidt is
2uantified b$
te crosso.er
fre2uenc$ f
C
3
at wic te
loop gain (+s,
e2uals one
+0dB,& (e
loop stabilit$
*argin is
t$picall$
2uantified b$
te pase
*argin or
gain *argin&
(e loop
pase *argin

*
is defined
as te
difference
between te
o.erall (+s,
pase dela$
and H1B0` at
te crosso.er
fre2uenc$&
(e gain
*argin is
defined b$
te difference
between (+s,
gain and 0dB
at te
fre2uenc$
were o.erall
(+s, pase
e2uals H1B0`&
6or a buc/
con0.erter3
t$picall$ 4D
degree pase
*argin and
10dB gain
*argin is
considered
sufficient&
6igure 1A
sows a
t$pical Bode
plot of loop
gain for a
current *ode
L(C3B2@
125
-N
to
15
O
MA0A 30
pase buc/
con.erter& -n
tis e)a*ple3
te crosso.er
fre2uenc$ is
4D/#N and
te pase
*argin is A4
degrees& (e
gain *argin
is close to
20dB&
F
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g
u
r
e

=
!

L
T
)owerC
AD
Design
Tool
5ro"i#e
s an
Eas.
Wa. to
O)ti'iE
e t-e
Loo)
Co')en
sation
a
n
#

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a
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e
n
t

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e

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$
F5-ase8
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LTC$;(
A Bu+k
Con"ert
er
E1a')l
eH!
an140fa
AN140-13
Application Note 140
5
o
l
.
5
-
a
s
e

B
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+
k

C
o
n
"
e
r
t
e
r

&
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r

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n
t

A
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)
l
i
+
a
t
i
o
n
s
As data
processing
s$ste*s
beco*e
faster and
larger3 teir
processor
and *e*or$
units
de*and
*ore current
at e.er
decreasing
.oltages& At
tese ig
currents3 te
de*ands on
power
supplies are
*ultiplied& -n
recent $ears3
"ol$"ase
+*ultipase,
s$ncronous
buc/
con.erters
a.e been
widel$ used
for ig
current3 low
.oltage
power suppl$
solutions3
due to teir
ig
efficienc$
and e.en
ter*al
distribution&
Besides3 wit
interlea.ed
*ultiple buc/
con.erter
pases3 te
ripple current
on bot input
and output
sides can be
significantl$
reduced3
resulting in
reduction of
input and
output
capacitors
and related
board space
and cost&
-n "ol$"ase
buc/
con.erters3
precise
current
sensing and
saring
beco*e
e)tre*el$
i*portant&
?ood current
saring
ensures
e.en ter*al
distribution
and ig
s$ste*
reliabil0it$&
Because of
teir inerent
current
saring
capabilit$ in
stead$ state
and during
transients3
current
*ode0
controlled
buc/s are
usuall$
preferred&
Linear
(ecnolog$1s
L(C3BDA
and
L(C3B2@
are t$pical
"ol$"ase
buc/
controllers
wit
precise
current
sensing
and
saring&
!ultiple
controllers
can be
connected
in a dais$
cain
fasion for
203 303 403
A0 and 120
pase
s$ste*s
wit
output
current
fro* 20A
to o.er
200A&
Ot-er
ReDuire'ent
s o& a Hig-
5er&or'an+e
Controller
!an$ oter
i*portant
features are
re2uired of a
ig
perfor*ance
buc/
controller&
Soft0start is
usuall$
needed to
control te
inrus
current
during start0
up&
O.ercurrent
li*it and
sort0circuit
latcoff can
protect te
suppl$ wen
te output is
o.erloaded
or sorted&
O.er.oltage
protec0tion
safeguards
te
e)pensi.e
load de.ices
in te
s$ste*& (o
*ini*iNe
s$ste* <!-
noise3
so*eti*es
te controller
*ust be
s$ncroniNed
to an
e)ternal
cloc/ signal&
6or low
.oltage3 ig
current
applications3
re*ote
differential
.olt0age
sensing
co*pensates
for te "CB
resistance
.oltage drop
and
accuratel$
regulates
output
.oltage at
te re*ote
load& -n a
co*plicated
s$ste* wit
*an$ output
.oltage rails3
se2uencing
and trac/ing
a*ong
different
.oltage rails
is also
necessar$&
5CB
La.out
Co*ponent
selection and
sce*atic
design is onl$
alf of te
suppl$ design
process&
"roper "CB
la$out of a
switcing
suppl$ design
is alwa$s
critical& -n
fact3 its
i*portance
can not be
o.erstated&
?ood la$out
design
opti*iNes
suppl$
efficienc$3
alle.iates
ter*al
stress3 and
*ost
i*portantl$
3 *ini*iNes
noise and
interaction
s a*ong
traces and
co*ponents&
(o acie.e
tis3 it is
i*portant for
te designer
to understand
te current
conduction
S=3 S=2
D/
Fig
ure
3!
A $F5-ase8
Single %
O

Hig-
Current
Bu+k
Con"erter
Using t-e
LTC$;(A
an140fa
AN140-14
Application Note 140
pats
and
signal
flows in
te
switcing
power
suppl$& -t
usuall$
re2uires
significan
t effort to
gain te
necessar
$
e)perienc
e& See
Linear
(ecnolo
g$
Applicatio
n Note
13A for
detailed
discussio
ns& RKS
Sele+ti
on o&
%ariou
s
Solutio
ns 6
Dis+ret
e8
7onoli
t-i+
an#
Integra
te#
Su))li
es
At te
integration
le.el3
s$ste*
engineers
can decide
weter to
coose a
discrete3
*onolitic or
full$
integrated
power
*odule
solution&
6igure 1B
sows
e)a*ples of
dis0crete and
power
*odule
solutions for
t$pical point0
of0load
suppl$
applications&
(e discrete
solution uses
a controller
-C3 e)ternal
!OS6<(s
and passi.e
co*ponents
to build te
power suppl$
on te
s$ste*
board& A
*a;or reason
to coose a
discrete
solution is
low
co*ponent
bill of
*aterials
+BO!, cost&
#owe.er3 tis
re2uires good
power suppl$
design s/ills
and relati.el$
long
de.elop*ent
ti*e& A
*onolitic
solution uses
an -C wit
integrated
power
!OS6<(s to
furter
reduce te
solution siNe
and
co*ponent
count& -t
re2uires
si*ilar design
s/ills and
ti*e& A full$
integrated
power
*odule
solution can
significantl$
reduce
design effort3
de.elop*ent
ti*e3 solution
siNe and
design ris/3
but usuall$
wit a iger
co*ponent
BO! cost&
GaH
G*H
Figure ;!
E1a')les
o& GaH a
Dis+rete
(%IN to
$!$%9>A
LTC$33;
Su))l.I
G*H a Full.
Integrate#
=%IN8
Dual $A
or Single
(=A
LT70=(>
J7o#ule
K

Ste)F
Down
Regulator
Ot-er Basi+
Nonisolate
# DC9DC
S75S
To)ologies
(is
application
note uses
buc/
con.erters as
a si*ple e)0
a*ple to
de*onstrate
te design
consideration
s of S!"S&
#owe.er3
tere are at
least fi.e
oter basic
nonisolated
con.erter
topologies
+boost3
buc/Mboost3
Cu/3 S<"-C
and 'eta
con.erters,
and at least
fi.e basic
isolated
con.erter
topologies
+fl$bac/3
forward3
pus0pull3
alf0bridge
and full0
bridge, wic
are not
co.ered in
tis
application
note& <ac
topolog$ as
uni2ue
properties
tat *a/e it
suited for
specific
applications&
6igure 1@
sows
si*plified
sce*atics
for te oter
nonisolated
S!"S
topologies&
(ere are
oter
nonisolated
S!"S
topologies
wic are
co*binations
of te basic
topologies&
6or e)a*ple3
BOOST
CON%ERTER
L
Figure A!
Ot-er Basi+
Nonisolate
# DC9DC
Con"erter
To)ologies
an140fa
-nfor*atio
n
furnised
b$ Linear
(ecnolo
g$
Corporatio
n is
belie.ed to
be
accurate
and
reliable&
#owe.er3 no
responsibilit$
is assu*ed
for its use&
Linear
(ecnolog$
Corporation *a/es no
representa0
AN140-
15tion tat te
interconnection of its
circuits as described
erein will not infringe
on e)isting patent
rigts&
Application Note 140
6igure 20
sows a
ig
efficienc$3
40switc
s$ncronou
s
buc/Mboost
con.erter
based on
te
L(C3KB@
current
*ode
controller& -t
can operate
wit input
.oltages
below3
e2ual3 or
abo.e te
output
.oltage& 6or
e)a*ple3
te input
can be in
te range
of D5 to
3A53 and
te output
can be a
regulated
125& (is
topolog$ is
a
co*binatio
n of a
s$ncronou
s buc/
con.erter
and a
s$ncronou
s boost
con.erter3
saring a
single
inductor&
=en 5
-N
Q
5
O8(
3
switces A
and B
operate as
an acti.e
s$ncronou
s buc/
con.erter3
wile te
switc C is
alwa$s off and
switc 4 is
alwa$s on&
=en 5
-N
Y
5
O8(
3
switces C
and 4 operate
as an acti.e
s$ncronous
boost
con.erter3
wile switc A
is alwa$s on
and switc B
is alwa$s off&
=en 5
-N
is
close to 5
O8(
3
all four
switces
operate
acti.el$& As a
result3 tis
con.erter can
be .er$
efficient3 wit
up to @BL
efficienc$ for a
t$pical 125
output
application&
R12S (e
L(BK0D
controller
furter
e)tends te
input .oltage
range up to
B05& (o
si*plif$ te
design and
increase
power densit$3
te
L(!4A0DM4A0
KM4A0@ furter
integrate a
co*plicated
buc/Mboost
con.erter into
a ig densit$3
eas$0to0use
power
*odule& R13S
(e$ can be
easil$
paralleled wit
load saring
for ig power
applications&
40S=-(C#
B8CV0
BOOS(
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S"AC<
REFER
ENCES
[1] 5&
5orperian
3
Si*plifie
d
Anal$sis
of "=!
Con.erte
rs 8sing
te
!odel of
te "=!
SwitcI
"arts -
and --3a
IEEE
Transacti
ons on
Aerospa
ce and
Electroni
c
Systems3
!ar&
1@@03
5ol& 2A3
No&2&
[2] R&B&
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transient response& On te oter and3 S!"S operate te
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efficient tan linear regulators& #owe.er3 te design and
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Linear Technology Corporation
LT 1113 REV A PRINTED IN USA
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