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Source: Patterson and Hennessy, Computer Organization and Design: The Hardware/Software Interface, 3 rd ed.
0000: AND
0001: OR
0010: add
addition, lw, sw
0110: sub
00: lw, sw
01: sub
10: use function field
subtraction, branching
0111: slt
(1110: NOR)
RegDst
R-format: 000000
lw: 100011
Source: Patterson and Hennessy, Computer Organization and Design: The Hardware/Software Interface, 3rd ed.
MemtoReg
beq: 000100
ALUSrc
sw: 101011
Source: Patterson and Hennessy, Computer Organization and Design: The Hardware/Software Interface, 3rd ed.
Datapath: beq
Datapath: jump
Note:
The output
of the AND
gate should go
to the first MUX
in the top right
corner, not the
second.
Source: Patterson and Hennessy, Computer Organization and Design: The Hardware/Software Interface, 3rd ed.
Source: Patterson and Hennessy, Computer Organization and Design: The Hardware/Software Interface, 3rd ed.
Jump instruction
Target address
10
not practical!
longest instruction dictates clock cycle time
11