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Abstract: When no transformer is used in a gridconnected photovoltaic (PV) system, a galvanic connection
between the grid and the PV array exists. In these
conditions, dangerous leakage currents (common-mode
currents) can appear through the stray capacitance between
the PV array and the ground. In order to avoid these leakage
currents, different inverter topologies that generate no
varying common-mode voltages, such as the half-bridge and
the bipolar pulse width modulation (PWM) full-bridge
topologies, have been proposed. There is a new highefficiency topology that generates no varying common-mode
voltage and requires the same low-input voltage as the
bipolar PWM full bridge. The proposed topology has been
verified in a 5-kW prototype with satisfactory results.
This paper deals with a high-reliability single-phase
transformerless grid-connected inverter that utilizes
superjunction MOSFETs to achieve high efficiency for
photovoltaic applications. Effectiveness of proposed
technique is investigated through computer simulation by
using MATLAB/SIMULNK software.
I.
INTRODUCTION
PV CELL
i I S e kT 1
D. PV MODELING
A PV array consists of several photovoltaic cells in
series and parallel connections. Series connections are
responsible for increasing the voltage of the module
whereas the parallel connection is responsible for increasing
the current in the array. Typically a solar cell can be modelled
by a current source and an inverted diode connected in parallel
to it. It has its own series and parallel resistance. Series
resistance is due to hindrance in the path of flow of electrons
from n to p junction and parallel resistance is due to the
leakage current.
and
and
are
PN
SEMICONDUCTOR
GATE
BIPOLAR
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VS
D. DUAL-PARALLELED-BUCK INVERTER
TOPOLOGY
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Figure 6.1: Switch gating signals: in (a) grid cycle and (b)
PWM cycle
The drainsource voltage waveforms of the switches S1,
S3, and S5 in the grid cycle and in the PWM cycle are shown
in Fig. 6.2(a) and (b), respectively. The voltage stresses of S1,
S3, and S5 are well clamped to the dc bus voltage, 380 V,
without any voltage overstress. It can be seen from Fig. 6.2(b)
that the switches S1 and S3 almost evenly share the dc-link
voltage when they switch OFF simultaneously, effectively
minimizing the ground loop leakage current.
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REFERENCES
[1] J. S. Lai, Power conditioning circuit topologies, IEEE
Ind. Electron. Mag., vol. 3, no. 2, pp. 2434, Jun. 2009.
[2] S. B. Kjaer, J. K. Pedersen, and F. Blaabjerg, A review of
single-phase grid-connected inverters for photovoltaic
modules, IEEE Trans. Ind.Appl., vol. 41, no. 5, pp.
12921306, Sep./Oct. 2005.
[3] M. Calais, J. Myrzik, T. Spooner, and V. G. Agelidis,
Inverters for single-phase grid connected photovoltaic
systemsAn overview, in Proc. IEEE Annu. Power
Electron. Spec. Conf., 2002, vol. 2, pp. 19952000.
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