ELT - 41816

Nano-Devices, Circuits and Model

5cu

BSc

L=24h, Tue 10-12/TC171; E=36h/TH103

Course Contents
(preliminary)
ELT-41816 Nano-Devices, Circuits and Models (Nano-DCM), 5 cr
BSc, Period 1-2, L = 24 h, E = 36 h
#

Topic

Material

1 Selected topics on semiconductor physics, review

[1] ch. 1.1

2 PN junction, diode

[1] ch. 1.2

3 Semiconductor fabrication review

[1] ch. 2, 3

4 MOS/BJT IC technology components

[1] ch. 3, 5, 6;

5 IC BJT operation and IC Model

[2] ch. 1.3, 1.4; [1] ch. 8.1

7 IC MOS transistor operation and IC Model

[2] ch. 1.5, 1.6; [1] ch. 11.1

9 Integrated single BJT/MOS transistor amplifiers

[2] ch. 3.2, 3.3

10 Multiple transistor amplifiers, cascode

[2] ch. 3.4

11 IC differential pair

[2] ch. 3.5

12 IC current mirrors

[2] ch. 4.2

13 IC amplifiers with active load

[2] ch. 4.3

14 IC output stages

[2] Select from ch. 5

15 Frequency response, single stage amplifiers, cascode

[2] ch. 7.2, 7.3

16 Feedback

[2] ch. 8.1-8.6

References:
1.Hastings A., The Art of Analog Layout, 2nd edition, 2006.
2. Gray, Hurst, Lewis, Meyer, Analysis and Design of Analog IC, 5th edition, 2010.

TUT, DEC, RFIC-Lab; Prof. Nikolay T.Tchamov, nikolay@cs.tut.fi

Slide 1/7

ELT - 41816

Nano-Devices, Circuits and Model

5cu

BSc

L=24h, Tue 10-12/TC171; E=36h/TH103

Multiple-Transistor Amplifier Stages

CC-CE Cascade

The composite transistor representation of

the CC-CE and CC-CC connections.

CC-CC Cascade

Small-signal equivalent circuit for the CCCE and CC-CC connected transistors.

TUT, DEC, RFIC-Lab; Prof. Nikolay T.Tchamov, nikolay@cs.tut.fi

Slide 2/7

ELT - 41816

Nano-Devices, Circuits and Model

5cu

BSc

L=24h, Tue 10-12/TC171; E=36h/TH103

Two Port Representation CC-CE

Example

Small signal Equivalent

The Darlington configuration.

TUT, DEC, RFIC-Lab; Prof. Nikolay T.Tchamov, nikolay@cs.tut.fi

Slide 3/7

ELT - 41816

Nano-Devices, Circuits and Model

5cu

BSc

L=24h, Tue 10-12/TC171; E=36h/TH103

The Cascode Configuration

The Bipolar Cascode

The MOS Cascode

Increase the output resistance.

High frequency operation.
High voltage gain.

CE-CB Amplifier

CS-CG Amplifier

Rb is zero, but
insert at high
frequency.

More than one cascode can be used to

increase the output resistance furthur.

Small-signal equivalent circuit

Small-signal equivalent circuit NOTE: Neglect capacitances at low frequency operation.

TUT, DEC, RFIC-Lab; Prof. Nikolay T.Tchamov, nikolay@cs.tut.fi

Slide 4/7

ELT - 41816

Nano-Devices, Circuits and Model

5cu

BSc

L=24h, Tue 10-12/TC171; E=36h/TH103

Active Cascode

1. The power-supply voltage and signal-swing

requirements limit the number of levels of
cascoding that can be applied.
2. One way to increase the output resistance of the
MOS cascode circuit without increasing the
number of levels of cascoding is to use the
active-cascode circuit
Active cascode amplifier using
MOSFETs.
The Gate-Source voltage of M2

This result can also be derived by substituting gm2 (a + 1) for gm2

Small-signal equivalent circuit

TUT, DEC, RFIC-Lab; Prof. Nikolay T.Tchamov, nikolay@cs.tut.fi

Slide 5/7

ELT - 41816

Nano-Devices, Circuits and Model

5cu

BSc

L=24h, Tue 10-12/TC171; E=36h/TH103

The Super Source Follower

Equation 3.84 shows that the output resistance of
a source follower is approximately 1/(gm +gmb).

One way to reduce the output resistance is to

increase the transconductance by increasing the W/L
ratio of the source follower and its dc bias current.
This approach requires a proportionate increase in
the area and power dissipation to reduce Ro.
super source follower

I1 > I2 is required for proper operation

Small-signal equivalent circuit

TUT, DEC, RFIC-Lab; Prof. Nikolay T.Tchamov, nikolay@cs.tut.fi

Slide 6/7

ELT - 41816

Nano-Devices, Circuits and Model

5cu

BSc

L=24h, Tue 10-12/TC171; E=36h/TH103

Conclusion
1.

To improve the effective current gain and input

resistance of a single bipolar transistor, CC-CE and CCCC can be used.

2.

The cascode configuration increases output resistance

and voltage gain.

3.

Active cascode can be used to increase the output

resistance of the MOS cascode circuit without
increasing the number of levels of cascoding.

4.

The super source follower configuration is used to

minimize the area and power dissipation required to
reach a given output resistance.

TUT, DEC, RFIC-Lab; Prof. Nikolay T.Tchamov, nikolay@cs.tut.fi

Slide 7/7