Department of Electrical and Electronics Engineering

Reg. No. :
MANIPAL INSTITUTE OF TECHNOLOGY, MANIPAL
(A Constituent Institute of Manipal University, Manipal)
THIRD SEMESTER B.E. DEGREE MAKEUP EXAMINATION
(REVISED CREDIT SYSTEM)

08 January 2011

ANALOG ELECTRONIC CIRCUITS (ELE 209)

Time: 3 hours
Note

Max. Marks: 50

: Answer any FIVE full questions. Refer Table-1 for h-parameters.

1A
1B
1C

Write a note on construction and applications of schottky diode.

(02)
Plot the Vi, V0 with respect to time and transfer characteristics, for the circuit shown in Fig 1(B).
(03)
For the zener diode voltage regulator shown in fig 1(C) determine VL, VR, IZ ,PZ, power dissipation
in R=1K series resistance and the safe maximum input voltage that can be applied.
(05)

2A

Determine the current source current I to obtain an output voltage V0=2V in the circuit shown in
Fig 2A. Assume all the diodes are identical and =1,VT=26mV and Is=
A
(02)
Determine IBQ, ICQ, VCEQ, VCQ for the amplifier shown in fig 2(B) .Assume VBE=0.7V.
(04)
Plot the output voltage in the circuit shown in the Fig 2C for vi=10sin . Assume all diodes are
ideal diodes.
(04)

2B
2C

3A
3B
3C
4A
4B
4C

Calculate the DC component and ripple in the output signal across RL in the circuit shown in
Fig 3A. Assume V1dc=150V, V1RMS=15V and f=50HZ.
(03)
With the help of neat sketch explain the different current components of a BJT.
(03)
Using approximate h parameter circuit determine the current gain AI, Voltage gain AV and input
resistance Ri of voltage follower circuit shown in Fig 3C.
(04)
Determine VGS1, V1 and V
identical with Vt=1V,

for the MOSFET amplifier shown in Fig 4A. Both the MOSFET are
=2mA/V2. Neglect the channel length modulation effect.

(03)
With the help of neat circuit diagram explain the working of MOSFET based current mirror circuit. (03)
Draw the equivalent small signal circuit of the MOSFET amplifier shown in Fig 4C. Hence
determine the input resistance, output resistance and voltage gain. Assume
=0.25mA/V2,
Vt=1.5V and neglect channel length modulation effect.

5A
5B
5C

6A
6B
6C

(04)

With the help of neat circuit diagram explain the CMOS inverter
(02)
With the help of neat sketch derive an expression for conversion efficiency and maximum
efficiency of Class B Push pull amplifier.
(03)
A power amplifier of class A type with transformer coupling delivers a maximum of 20W to 4 ohm
load resistance. The Q point is adjusted for symmetrical clipping assuming fixed bias and VCC=20V.
Find i.) Turns ratio of transformer ii.) Slopes of AC and DC load line
iii.) Quiescent points
iv.) efficiency
(05)
Determine the VCE, output voltage output power and Zener Diode current for the circuit shown in
Fig 6A given = 100,VBE=0.7V.
(03)
From the fundamental derive an expression for the lower cut-off frequency of the amplifier due to
coupling capacitors.
(04)
Design a adujstable voltage regulato using LM317 regulator to get output voltage between 10 and
18V. Assume R1=1K,Vref=1.25V and Iadj=100 . Hence draw the circuit diagram.
(03)

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Department of Electrical and Electronics Engineering

V= 8 V
Vi

R=1K

C=1 0 F

I
10V

D1
10m s

V0

1K

D2

20m s

20V

R L= 3K

VZ = 10V

D1

2K

P ZM = 80mW
-10V

V0

D2

F ig 1 (C )

F ig 1 ( B)

D3

F ig Q 2 A

15V

4.5K

V1
120K

VL

R 1=5 0 0

Vi

500

B r idge
R e c t if ie r

50 F

R L=5K

=72

C 2= 1 5

10 F

F ull wa v e

A C in p u t

V0
10 F

10 F

C 1= 1 5

85K

F ig 3 A

F ig 2 ( B)

I= 1m A
12V

+ 15V

56K

1G

VGS 1

5K

c=

V1

ID = 2 m A

R L= 10K

c=
v0
36K

V2
1K

+
5V
_

1mA

vi

6.6K

V0

vi

F ig 4 C

5V
+

F ig . 3 C

F ig . 4 A .

Vi = 1 5 V
2 k

2 k

8V

h- parameters
hi
hr
hf
h0

CE
1.1K
2.510-4
50
24mho

CB
1.1K
1
-51
25mho

CC
21.6 ohms
2.910-4
-0.98
0.49mho

Fig 6A

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