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Agenda
Introduction to ARM Ltd
ARM Architecture/Programmers Model
Data Path and Pipelines
System Design
Development Tools
ARM Ltd
Also develop technologies to assist with the designin of the ARM architecture
Software tools, boards, debug hardware
Application software
Bus architectures
Peripherals, etc
ARMs Activities
Connected Community
Development Tools
Software IP
Processors
memory
SoC
Intelligent toys
Utility
Meters
IR Fire
Detector
Exercise
Machines
Tele-parking
Intelligent
Vending
Battery
Solar Cells
Sensors, timers
Cortex-M0 +16KB RAM 65nm
UWB Radio antenna
10 kB Storage memory
~3fW/bit
12Ah Li-ion Battery
University of Michigan
1km3
10
$1000
Home
Mobile
Mobile Computing
Embedded
Consumer
Enterprise
PC
Server
HPC
10
Agenda
Introduction to ARM Ltd
ARM Architecture/Programmers Model
Data Path and Pipelines
System Design
Development Tools
11
x1-4
ARM11 MPCore
ARM1176JZ(F)-S
ARM1136J(F)-S
ARMv5
ARM968E-S
ARM926EJ-S
ARM7EJ-S
ARM946E-S
ARMv4
ARM922T
SC100
ARM7TDMI(S)
12
ARM1156T2(F)-S
x1-4
Cortex-A15
...2.5GHz
x1-4
Cortex-A9
Cortex-A8
x1-4
Cortex-A5
1-2
R Heron
Cortex-R4
Cortex-M4
Cortex-M3
SC300
Cortex-M1
Cortex-M0
12k gates...
13
Relative Performance*
2500
2000
1500
1000
500
0
Max Freq (MHz)
Min Power (mW/MHz)
CortexM0
CortexM3
ARM7
ARM926
ARM1026
ARM1136
ARM1176
Cortex-A8
Cortex-A9
Dual-core
50
150
184
470
540
610
750
1100
2000
0.012
0.06
0.35
0.235
0.36
0.335
0.568
0.43
0.5
Cortex family
Cortex-A8
Cortex-R4
Cortex-M3
15
Architecture v7A
MMU
AXI
VFP & NEON support
Architecture v7R
MPU (optional)
AXI
Dual Issue
Architecture v7M
MPU (optional)
AHB Lite & APB
20000
15000
ARM
Thumb
10000
5000
0
32-bit
16-bit
16-bit with
32-bit stack
17
18
Processor Modes
19
r0
r1
r2
r3
r4
r5
r6
r7
r8
r9
r10
r11
r12
r13 (sp)
r14 (lr)
r15 (pc)
cpsr
spsr
20
FIQ
IRQ
SVC
Undef
Abort
r8
r8
r9
r10
r11
r12
r13 (sp)
r14 (lr)
r9
r10
r11
r12
r13 (sp)
r14 (lr)
r13 (sp)
r14 (lr)
r13 (sp)
r14 (lr)
r13 (sp)
r14 (lr)
r13 (sp)
r14 (lr)
spsr
spsr
spsr
spsr
spsr
Exception Handling
When an exception occurs, the ARM:
Copies CPSR into SPSR_<mode>
Sets appropriate CPSR bits
0x1C
Change to ARM state
0x18
Change
to
exception
mode
0x14
Disable interrupts (if appropriate)
0x10
Stores the return address in LR_<mode> 0x0C
0x08
Sets PC to vector address
0x04
To return, exception handler needs to: 0x00
Restore CPSR from SPSR_<mode>
Restore PC from LR_<mode>
This can only be done in ARM state.
21
FIQ
IRQ
(Reserved)
Data Abort
Prefetch Abort
Software Interrupt
Undefined Instruction
Reset
Vector Table
Vector table can be at
0xFFFF0000 on ARM720T
and on ARM9/10 family devices
28 27
N Z C V Q
24
23
16 15
22
I F T
mode
c
T Bit
Architecture xT only
T = 0: Processor in ARM state
T = 1: Processor in Thumb state
Mode bits
Fully programmable in C
Stack-based exception model
r0
r1
r2
r3
r4
r5
r6
r7
r8
r9
r10
r11
r12
sp
lr
r15 (pc)
xPSR
23
Process
sp
ARM instructions can be made to execute conditionally by postfixing them with the
appropriate condition code field.
This improves code density and performance by reducing the number of
forward branch instructions.
CMP
r3,#0
CMP
r3,#0
BEQ
skip
ADDNE r0,r1,r2
ADD
r0,r1,r2
skip
By default, data processing instructions do not affect the condition code flags but
the flags can be optionally set by using S. CMP does not need S.
loop
24
Change of Flow
MOV
Bcc
BL
BLX
25
PC, Rm
Branch instructions
Branch :
Branch with Link :
31
28 27
Cond
B{<cond>} label
BL{<cond>} subroutine_label
25 24 23
1 0 1 L
Offset
Link bit
0 = Branch
1 = Branch with link
Condition field
The processor core shifts the offset field left by 2 positions, sign-extends it
and adds it to the PC
32 Mbyte range
How to perform longer branches?
26
ADD
AND
CMP
MOV
ADC
ORR
CMN
MVN
SUB
EOR
TST
SBC
BIC
TEQ
RSB
RSC
Operand
2
Barrel
Shifter
Immediate value
ALU
Result
28
LDR
STR
LDRB
LDRH
STRB Byte
STRH Halfword
LDRSB
LDRSH
Agenda
Introduction to ARM Ltd
ARM Architecture/Programmers Model
Data Path and Pipelines
System Design
Development Tools
30
A[31:0]
Address
Incrementer
Address Register
Incrementer
P
C
PC Update
Register Bank
A
L
Decode Stage
A
Instruction
Decompression
Multiplier
B
Barrel
Shifter
32 Bit ALU
and
Read Data
Register
Control
Logic
Write Data
Register
DBE
31
Instruction
Decoder
BIGEND
MCLK
nWAIT
nRW
MAS[1:0]
ISYNC
nIRQ
nFIQ
nRESET
ABORT
nTRANS
nMREQ
SEQ
LOCK
nM[4:0]
nOPC
nCPI
CPA
CPB
D[31:0]
ARM7TDMI
Instruction
Fetch
ThumbARM
decompress
FETCH
ARM decode
Reg
Read
Shift
Reg
Write
ALU
Reg Select
DECODE
EXECUTE
ARM9TDMI
32
Instruction
Fetch
ARM or Thumb
Inst Decode
Reg
Reg
Decode
Read
FETCH
DECODE
Shift + ALU
EXECUTE
Memory
Access
Reg
Write
MEMORY
WRITE
FETCH
ARM or
Thumb
Instruction
Decode
ISSUE
Reg Read
DECODE
Shift + ALU
Memory
Access
Multiply
Multiply
Add
EXECUTE
MEMORY
ARM11
Fetch
1
33
Fetch
2
Decode
Issue
Shift
ALU
Saturate
MAC
1
MAC
2
MAC
3
Address
Data
Cache
1
Data
Cache
2
Write
back
Reg
Write
WRITE
34
Agenda
Introduction to ARM Ltd
ARM Architecture/Programmers Model
Data Path and Pipelines
System Design
Development Tools
35
AHB
UART
Timer
APB
Bridge
Keypad
High-bandwidth
on-chip RAM
DMA
Bus Master
High Performance
Pipelined
Burst Support
Multiple Bus Masters
36
APB
PIO
Low Power
Non-pipelined
Simple Interface
AHB Structure
Arbiter
Master
#1
HADDR
HWDATA
HADDR
HWDATA
HRDATA
Slave
#1
HRDATA
Address/Control
Master
#2
Slave
#2
Write Data
Read Data
Slave
#3
Master
#3
Slave
#4
Decoder
37
Clock
Verilog
Reset
IRQs
Mali 200
Mali GP2
IDLEs
AXI Fabric
38
APB
AXI
MMU
Mali 200
ARM1176JZF
D
Int
nRst
PL390
GIC
Sys
Ctrl
L230
Mali
MMU
M
CLCD
PL111
S
SDRAMC
PL340
DDR
PHY
APB
Designed and optimised for AMBA: provides easier integration with ARM cores and fabric IP
Unified Memory Architecture
39
High Speed
(SC9 / SC10)
Low Power
Low Area
ECO Kits
(SC7 / SC8)
Power Management Kits
ECO Kits
180nm
40
130nm
90nm
65nm
45nm
32nm
Process
28nm Geometry
Agenda
Introduction to ARM Ltd
ARM Architecture/Programmers Model
Data Path and Pipelines
System Design
Development Tools
41
Debugger (+ optional
trace tools)
EmbeddedICE Logic
Provides breakpoints and processor/system
access
JTAG interface (ICE)
Converts debugger commands to JTAG
signals
Embedded trace Macrocell (ETM)
Compresses real-time instruction and data
access trace
Contains ICE features (trigger & filter logic)
Trace port analyzer (TPA)
Captures trace in a deep buffer
42
Trace Port
JTAG port
TAP
controller
ETM
EmbeddedICE
Logic
ARM
core
Compiler, Keil CARM Compiler, or GNU compiler), ARM linker, Keil uVision
Debugger and Keil uVision IDE
Keil uVision Debugger accurately simulates on-chip peripherals (I2C, CAN,
UART, SPI, Interrupts, I/O Ports, A/D and D/A converters, PWM, etc.)
Evaluation Limitations
16K byte object code + 16K data limitation
Some linker restrictions such as base addresses for code/constants
GNU tools provided are not restricted in any way
http://www.keil.com/demo/
43
44
45
University Resources
http://www.arm.com/support/university/
University@arm.com
46
TI Panda Board
OMAP4430 Processor
1 GHz Dual-core ARM
Cortex-A9 (NEON+VFP)
C64x+ DSP
PowerVR SGX 3D GPU
1080p Video Support
POP Memory
1 GB LPDDR2 RAM
USB Powered
< 4W max consumption
(OMAP small % of that)
Many adapter options
(Car, wall, battery, solar, ..)
47
distribution
Linux applications
48
Fin
49
Symbian OS v9.2
Operating System supporting ARM
processor-based mobile devices,
developed using ARM RealView
Compilation Tools
ST WLAN Solution
Ultra-low power 802.11b/g WLAN
chip with ARM9 processor-based
MAC
Beagle Board
51
Open access to
hardware
documentation
Opportunity
to tinker and
learn
52
Personally
affordable
Wikis, blogs,
promotion of
community
activity
Freedom to
innovate
Addressing
open source
community
needs
Instant access to
>10 million lines
of code
Free
software
53
Peripheral I/O
DVI-D video out
SD/MMC+
S-Video out
USB 2.0 HS OTG
I2C, I2S, SPI,
MMC/SD
JTAG
Stereo in/out
Alternate power
RS-232 serial
USB Powered
2W maximum consumption
OMAP is small % of that
Many adapter options
Car, wall, battery, solar,
And more
Other Features
4 LEDs
USR0
USR1
PMU_STAT
PWR
2 buttons
USER
RESET
4 boot sources
SD/MMC
NAND flash
USB
Serial
54
Peripheral I/O
DVI-D video out
SD/MMC+
S-Video out
USB HS OTG
I2C, I2S, SPI,
MMC/SD
JTAG
Stereo in/out
Alternate power
RS-232 serial
distribution
Linux applications
55