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Contents of Chapter 4:
4.1 Introduction
4.2 Timing accuracy
4.3 Full flash converters
4.4 Sub-ranging and two-step
converters
4.5 Folding and interpolation
4.6 Time interleaved converters
4.7 Successive approximation
converter
4.8 Pipeline converters
4.9 Other architectures
7. mars 2011
Intro to SC-circuits
12.3 Switched Capacitor Amplifiers
12.3.1 Unity
Unity-Gain
Gain Sampler / Buffer
12.3.2 Noninverting amplifier
12.4 Switched
Switched-Capacitor
Capacitor Integrator
Examples, incl. Oversampling
converters.
Report Writing
7. mars 2011
Folding
g and interpolation
p
Switched Capacitor
p
Circuits
Properties of SC circuits
P
Popular
l due
d tto accurate
t frequency
f
response, good
d linearity
li
it
and dynamic range
Easily analyzed with z-transform
z transform
Typically require aliasing and smoothing filters
Accuracy
A
i obtained
is
bt i d since
i
filt coefficients
filter
ffi i t are determined
d t
i d
from capacitance ratios, and relative matching is good in
CMOS
The overall frequency response remains a function of the
clock,, and the frequency
q
y mayy be set veryy p
precisely
y through
g
the use of a crystal oscillator
SC-techniques mayy be used to realize other signal
g
processing blocks like for example gain stages, voltagecontrolled oscillators and modulators
metal
metal
poly1
thin oxide
C p1
poly2
Cp2
thick
hi k oxide
id
C1
bottom pplate
C p1
C p2
(substrate - ac ground)
cross-section view
equivalent circuit
Symbol
n-channel
v
transmission
gate
p-channel
h
l
SC Resistor Equivalent
1
(1/2)
eq
V1
V1
V2
V2
eq
T
--= -C
Qx = Cx Vx
C1 is first charged to V1 and then charged to V2 during one clock cycle
Q1 = C1 V 1 V2
The average current is then given by the change in charge during one cycle
Iavg
C 1 V1 V2
-----------------------------=
T
SC Resistor Equivalent
q
1
(2/2)
eq
V1
V2
V1
V2
eq
T
-----=C
I eq
V1 V 2
= ------------------Req
The resistor equivalence is valid when fs is much larger than the signal
frequency. In the case of higher signal frequencies, z-domain analysis is
T
1
required :
R eq = ----- = ---------C1
C1 fs
1
-------------------------------3--- = 2M
Req = ---------------------12
5 10 100 10
An inverting integrator
v (nT)
c2
2
C
v (t)
c
cx
v (t )
v (t )
ci
co
v (t)
c1
v (n) = v (nT)
i
ci
v (n) = v (nT)
o
co
First-Order Filters
Vin(s)
Vout(s)
Unity-Gain Sampler/Buffer
Sample:
S
l S1 and
d S2 are on, S3 off.
ff For
F a high
hi h gain
i opamp, VB=V
Vout0
0 and
d
the voltage accross C1 equal to Vin.
Amplify:
p y S3 on,, S1 and S2 are off.A to g
ground. Since VA changes
g from Vin
to 0, Vout changes to Vin0C1/C2.
The SC implementation samples the input, setting the output to zero and
provides amplification of the input in the next period, while ignoring the input
voltage. The circuit configuration changes from one phase to another, raising
stability concerns.
When Vout have settled, the current through C2 approaches zero, while R2
continously loads the amplifier.
Suppose Vin=0
S
0 and
d S1 injects
i j t q1
1 onto
t
P .Cx is the total capacitance from X to
ground. The total charge at X cannot
change after S2 turned off (no dc path
in or out). The same holds true after CH
is placed around the opamp. The
output voltage is not influenced by
charge injection due to S1.
After the feedback circuit has settled, the
charge on CH equals V0CH, unaffected
by S3 (S3 introducing no error).
Noninverting amplifier ; final output having same polarity as Vin0 and the
possibility of gain > 1.
q = WLCOX Veffff =
WLCOX (VGS VTH)
Litterature
31