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8

1
CK
APPD

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.


2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

M42B MLB NO_LDO SCHEMATIC

REV

ZONE

ECN

ENG
APPD

DESCRIPTION OF CHANGE
DATE

07

355269 ENGINEERING RELEASED

DATE

12/10/04 ?

3/22/2007
D

D
(.csa)

Page
TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

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TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

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3
4
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7
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2
3
4
5
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14
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22
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25
26
27
28
29
30
31
33
34
38
39
41
42
44
45
49
51
52
53
54
58
59
60
61

Contents

Date

DRI

Table of Contents
SYSTEM BLOCK DIAGRAM
Power Block Diagram
CONFIGURATION OPTIONS
FUNC TEST 1 OF 2
SIGNAL ALIAS /RESET
CPU 1 OF 2-FSB
CPU 2 OF 2-PWR/GND
CPU DECAPS & VID<>
CPU MISC1-TEMP SENSOR
CPU ITP700FLEX DEBUG
NB CPU Interface
NB PEG / Video Interfaces
NB Misc Interfaces
NB DDR2 Interfaces
NB Power 1
NB Power 2
NB Grounds
NB (GM) Decoupling
NB Config Straps

RX
RX
MK
RX
RX
RX
RX
MK
MK
ES
RX
MK
DK
RX
LT
DK
DK
DK
DK
DK
RX
RX
RX
RX
RX
SB Misc
RX
M42 SMBUS CONNECTIONS
ES
DDR2 SO-DIMM Connector A
LT
DDR2 SO-DIMM Connector B
LT
Memory Active Termination
LT
Memory Vtt Supply
LT
CLOCKS
DK
CLOCK TERMINATION
DK
PATA CONNECTOR
ES
SATA CONNECTOR
ES
ES
ETHERNET CONTROLLER
ETHERNET CONNECTOR
ES
FIREWIRE CONTROLLER
ES
FIREWIRE PORT
ES
CONNECTOR MISC
ES
IR CONTROLLER
ES
ES
ES
MK
BLUETOOTH INTERFACE
SMC
MK
SMC SUPPORT
LD
MK
LPC+ Debug Connector
CPU Current & Voltage Sense ES

Sync

(.csa)

Page
TABLE_TABLEOFCONTENTS_HEAD

N/A

N/A

TABLE_TABLEOFCONTENTS_ITEM

5/23/05

MASTER

TABLE_TABLEOFCONTENTS_ITEM

06/30/2005

POWER

TABLE_TABLEOFCONTENTS_ITEM

07/18/2005

SMC

TABLE_TABLEOFCONTENTS_ITEM

07/25/2005

TP

TABLE_TABLEOFCONTENTS_ITEM

08/19/2005

ENET

TABLE_TABLEOFCONTENTS_ITEM

05/03/2005

MASTER

TABLE_TABLEOFCONTENTS_ITEM

05/03/2005

MASTER

TABLE_TABLEOFCONTENTS_ITEM

08/19/2005

SMC

TABLE_TABLEOFCONTENTS_ITEM

08/19/2005

ENET

TABLE_TABLEOFCONTENTS_ITEM

5/23/05

MASTER

TABLE_TABLEOFCONTENTS_ITEM

07/25/2005

NB

TABLE_TABLEOFCONTENTS_ITEM

07/25/2005

NB

TABLE_TABLEOFCONTENTS_ITEM

08/15/2005

NB

TABLE_TABLEOFCONTENTS_ITEM

07/25/2005

NB

TABLE_TABLEOFCONTENTS_ITEM

07/25/2005

NB

TABLE_TABLEOFCONTENTS_ITEM

07/25/2005

NB

TABLE_TABLEOFCONTENTS_ITEM

07/25/2005

NB

TABLE_TABLEOFCONTENTS_ITEM

06/22/2005

NB

TABLE_TABLEOFCONTENTS_ITEM

06/28/2005

NB

TABLE_TABLEOFCONTENTS_ITEM

08/05/2005

SB

TABLE_TABLEOFCONTENTS_ITEM

11/16/2005

ENET

TABLE_TABLEOFCONTENTS_ITEM

11/28/2005

ENET

TABLE_TABLEOFCONTENTS_ITEM

08/05/2005

SB

TABLE_TABLEOFCONTENTS_ITEM

06/28/2005

SB

TABLE_TABLEOFCONTENTS_ITEM

07/26/2005

NB

TABLE_TABLEOFCONTENTS_ITEM

08/30/2005

ENET

TABLE_TABLEOFCONTENTS_ITEM

06/20/2005

MEMORY

TABLE_TABLEOFCONTENTS_ITEM

06/20/2005

MEMORY

TABLE_TABLEOFCONTENTS_ITEM

06/20/2005

MEMORY

TABLE_TABLEOFCONTENTS_ITEM

(MASTER)

(MASTER)

62

49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79

63
65
66
67
68
72
73
74
75
76
77
78
79
80
81
82
83
94
95
98
99
100
101
102
103
104
105
106
107
108

SCHEM,M42B,MLB NO_LDO

SCH

820-1889

PCBF,M42,MLB NO_LDO

PCB

11/10/2005

ENET
08/23/2005

SMC
07/18/2005

SMC
08/05/2006

M42AUDIO
08/05/2006

M42AUDIO
08/05/2006

M42AUDIO
08/05/2006

M42AUDIO
07/13/2005

POWER
07/13/2005

POWER
12/06/2005

ENET
07/13/2005

POWER
07/13/2005

POWER
08/30/2005

ENET

11/16/2005

ENET
07/13/2005

POWER
08/19/2005

SMC
06/06/2005

GRAPHIC
06/06/2005

GRAPHIC
05/21/05

EUGENE

06/06/2005

11/01/2005

ENET
11/14/2005

ENET
12/06/2005

ENET
11/14/2005

ENET
08/30/2005

ENET
11/16/2005

ENET
11/16/2005

ENET
11/09/2005

ENET
11/01/2005

ENET
08/19/2005

ENET
08/29/2005

ENET
08/18/2005

EE DRIS:

SMC
08/23/2005

SMC
06/30/2005

RX-RAYMOND XU
DK-DINESH KUMAR
RC-RAY CHANG
MK-MARC KLINGELHOFER
LT-LAWRENCE TAN
LD-LINDA DUNN

NB
08/30/2005

ENET

BOM OPTION
TABLE_5_ITEM

051-7374

5/23/05

MASTER

CLOCK

TABLE_5_HEAD

REFERENCE DESIGNATOR(S)

11/09/2005

06/03/2005

Schematic / PCB #s
DESCRIPTION

RX
ES
MK
RX
DK
DK
DK
DK
MK
MK
MK
MK
MK
MK
MK
MK
MK
ES
DK
DK

Sync
ENET

CLOCK

A
QTY

Contents

TEMPERATURE SENSE
SPI BOOTROM
Fan
SMS
TPM
AUDIO: CODEC
AUDI0: SPEAKER AMP
AUDIO: JACK
AUDIO: JACK TRANSLATORS
IMVP6 CPU VCore Regulator
5V / 3.3V Power Supply
2.5V/1.2V Regulator
1.8V Supply
1.5V / 1.05V Power Supply
S3/S0 FETS, G3H SUPPLY
Power Conn / Alias
DC-In & Battery Connectors
PBUS Supply/Battery Charger
INVERTER,LVDS,TMDS
EXTERNAL TMDS
MINI-DVI CONNECTOR
Cross Reference Page
Cross Reference Page
Cross Reference Page
Cross Reference Page
Cross Reference Page
Cross Reference Page
Cross Reference Page
Cross Reference Page
Cross Reference Page
Cross Reference Page

Date

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

PART#

DRI

DIMENSIONS ARE IN MILLIMETERS

Apple Computer Inc.

METRIC

XX

X.XX
DRAFTER

NOTICE OF PROPRIETARY PROPERTY

DESIGN CK

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

X.XXX
ENG APPD

MFG APPD

QA APPD

DESIGNER

RELEASE

SCALE

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

ANGLES

TITLE

DO NOT SCALE DRAWING


TABLE_5_ITEM

SCHEM,MLB NO_LDO,M42B
NONE
SIZE

THIRD ANGLE PROJECTION

MATERIAL/FINISH
NOTED AS
APPLICABLE

DRAWING NUMBER

REV.

051-7374
SHT

A
OF

79

INVERTER
CONNECTOR

P.67

CPU
THERMAL
SENSOR
P.10

LCD Panel

P.67

CLOCKING
Config
AND SPECTRUM

PROCESSOR
479 BGA

J2800

P.32-33
P.7-9

MINI DVI &


CRT CONNECTOR

DDR2 SDRAM DIMM A

P.69

SO-DIMM Connector

FSB
P.28
ETHERNET
CONNECTOR

LVDS
TV+CRT

P.37

TMDS

FW CONNECTOR

CHIPSET-NB
SDVO

TMDS

1466UFCBGA

P.68

P.39

ENET

FW

HDD
Connector
P.35

REGULATOR

P.31

P.12-20

FW CONTROLLER

P.38
5V

DDR2 VTT

SO-DIMM Connector

P.29

P.36

P.42

DDR2 SDRAM DIMM B


CH.B

ENET CONTROLLER

USB 2.0
CONNECTOR

J2900

CH.A

DMIX4

USB

PCIEX1

TO WIRELESS
CARD

PCIEX1

SATA
PCI

CHIPSET-SB

P.43

USB
IR_RX_OUT
ODD
Connector
P.34

USB

IR CONTROLLER
P.41

PATA

609 BGA

BLUETOOTH
CONNECTOR

P.44

66MHZ
16BITS

SB MISC.

INTERNAL KB
TP CONNECTOR
P.40
AUDIO

USB

P.21-26
P.26

SPI
LPC 33MHZ

AZALIA

POWER SUPPLY

P.54-57

SPI FLASH
BOOTROM
P.50

SMC

TPM

P.53

LPC
DEBUG
CONNECTOR

P.58~P.66

P.47

SMBUS
SMS

P.27

CONNECTOR TO

P.52
FAN
CONNECTOR

SYSTEM BLOCK DIAGRAM

BATTERIES
& Charger

SYNC_MASTER=MASTER

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

SMBUS

P.45

P.64

P.51

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

SHT
NONE

REV.

051-7374

SCALE

SYNC_DATE=5/23/05

NOTICE OF PROPRIETARY PROPERTY

A
OF

79

M42A POWER SYSTEM ARCHITECTURE


02
3.425V G3HOT
LT3470
U8090
(PAGE 62)

PBUSB_VSENSE

7A FUSE
PPVBAT_S5_CHGR_REG

ENABLES

AC
ADAPTER
IN

U8370

VIN

PP3V42_G3H_REG

02
VIN

BATTERY CHARGER

DCIN

VOUT

Q6150

PBUS CONVERTER/

01
6A FUSE

V
PPBUSA_G3H

ISL6255

16

1V5S0_RUNSS
(S0)

16

1V05S0_RUNSS
(S0)

U8300

1.5V
ENA1

ENA2

SMC_BATT_ISENSE

SMC_DCIN_ISENSE

PP1V5_S0
(6A MAX CURRENT)

VOUT1

PP1V05_S0
(8A MAX CURRENT)

VOUT2

PGOOD

02

1V51V05S0_PGOOD

U6100
01
VIN

BATTERY

Q8000

PGD_IN

VOUT

PP5V_S3
IMVP_VR_ON
(S0)

P5VS3_EN_L_RC
(S3)
Q8005

SMC_CPU_VSENSE
6-1

22

ICH

PPVCORE_CPU_S0

U2603
VR_PWRGD_CK410

(36A MAX CURRENT)

PWRBTN*

VRMPWRGD

27

23

VR_PWRGD_CK410_L

CLKEN#

PLT_RST_L

PLTRST*

25

U2601

24
VR_PWRGOOD_DELAY

ISL6262 PGOOD
U7500
(PAGE 57)

17

PWRGD

CY28445-5
U3301
(PAGE 33)

VR_ON

21

3S2P / 3S3P

CK410_PD_VTT_PRGD_L

18

SMC_CPU_ISENSE

BATT_POS_F

12

17

CPUVCORE

13

17
CLOCK

1.05V

LTC3728
U7900
(PAGE 61)

U8375

(PAGE 65)

SMC_RST_L

03

ENABLE

U8310

04

SMC PWRGD
MC33465N_30ATR
U5900
(PAGE 45)

CHGR_EN
(S5)

RSMRST*

PM_SB_PWROK
CPU_PWRGD
PWROK

CPUPWRGD(GPIO49)

26

PP5V_S0

PPBUSB_G3H

2
SMC

06

07

Q8059

Q8060

SMC_PM_G2_ENABLE
P60

(S5)

07

VIN

5VS5_RUNSS
(S5)

ENA2

3V3S5_RUNSS
(S5)

ENA1

Q8059
P25

LOGIC

Q8031

PP5VS3_EN_L_RC

(S3)

PP3V3_S0_NB_TVDAC
17-1

PWRGOOD

RESET*

8
VIN

PP3V3_S3

AUDIO 4.5V

PP3V3_S0_AUDIO

17

13

ENA

(S0)

P3V3S3_EN_L_RC
(S3)

VIN
ENA

2.5V

17-1

MCH
PWROK

VOUT

14
10
U8080

SLP_S3_L

17

(S0)

PP3V3_S0

VIN
ENA

P3V3S0_EN_RC
Q8061

Q8062

1V5S0_RUNSS
(S0)

(S0)

16

1V05S0_RUNSS
(S0)

PP2V5_S0

V1(3.3V)

Q8030

R=10k
P5VS0_EN_RC
c=0.1uf (S0)

P1V2S0_EN

LTC2908
U8070
(PAGE 62)

16
VIN

MCH DPLL 1.5V

16

VOUT1

PP1V5_S0_DPLL

18_1

TPS73115
U1900
(PAGE 19)

16

P1V8S0_EN_L_RC
R=100k
c=0.01uf (S0)

16
PM_SLP_S4_L ENA
(S3)

1.8V

PP1V8_S3_REG

PP1V8_S0

VOUT

17

(8A MAX CURRENT)

ISL6269
U7800
(PAGE 60)

P1V8S0_EN_L_RC16
(S0)

PGOOD

PP5V_S0_MEMVTTENA

0.9V

PP0V9_S0

VOUT

SLP_S4_L(P94)
SLP_S3_L(P93)

99ms
200ms
7ms

U5800
(PAGE 44)

STEP
01-04
01,05-09
10-13
14-18
17,19-24
25-27

NO AC/BATTERY
BATTERY ONLY
ACIN WITH/WITHOUT BATTERY
BATTERY ONLY,PRESS PWR BUTTON

18

L(S5
L(S5
H(S5
H(S5

Power Block Diagram

OFF)
OFF)
ON)
ON)

SYNC_MASTER=POWER

VOUT

SYNC_DATE=06/30/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

13

VIN

1.2V

IMVP_VR_ON
S0PWRGD_OK
VR_PWRGOOD_DELAY

SLP_S3_L

SLP_S5_L(P95)

STEP 06 (S5 POWER STATUS)TRUTH TABLE

BD3535FVM
U3100
(PAGE 31)

ENA

SLP_S4_L

SIGNAL DELAY TIME

VIN

17

SLP_S5_L

PWR/RST STATUS
G3H POWER ON
S5 POWER ON
S3 POWER ON
S0 SYSTEM POWER ON
S0 CPU POWER ON
PLATFORM,CPU RESET

Q8025

12

VIN

SMC_RST_L

: 08-1

POWER ON SEQUENCE LIST

DELAY

Q8031

RST*

VADJ2(0.9V)

PP2V5_S0_NB_DISP_PLL

ENA

B
PM_PWRBTN_L

VADJ1(1.2V)

08
PP3V3_S5

DELAY

R=100k
P3V3S0_EN_RC
c=0.1uf (S0)

S0PWRGD_OK
RST*

ADAPTER IN

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT

PP1V2_S3_ENET

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

MAX8516
U7720
(PAGE 59)

Q8063
PP1V2_S0

SIZE

17
APPLE COMPUTER INC.

DRAWING NUMBER

16

P1V2_S0_EN

SHT
NONE

REV.

051-7374

SCALE

21

PLT_RST*
P17(BTN_OUT)

BATTERY ONLY: 05

V1(1.8V)

IMVP_VR_ON

RSMRST_IN(P13)
PWR_BUTTON(P90)

19

V1(5V)
V1(2.5V)

16

99ms DLY

IMVP_VR_ON(P16)

SMC_ONOFF_L

VOUT

18

DELAY

Q8030

2.5V
MAX8887
U7701

Q8061
SOFT
START

PWRGD(P12)

RSMRST_PWRGD

(0.3A MAX CURRENT)

(PAGE 59)

PPBUS_S5_FWPWRSW

RSMRST_OUT(P15) PM_RSMRST_L

ALL_SYS_PWRGD

09

B
SOFT
START

SMC

19

15
16

HCPURST*

(0.3A MAX CURRENT)

(S3)
Q8015

28
FSB_CPURST_L

PP2V5_S3

MAX8887
U7700
(PAGE 59)

SLP_S4_L

PP4V5_AUDIO_ANALOG

VOUT

TPS79501
VR6800
(PAGE 68)

12

RSMRST_PWRGD

12

TV 3.3VVOUT

MM157
U1901
(PAGE 19)

08

PP5V_S5

11

SLP_S5_L

SLP_S3_L

(4A MAX
CURRENT)

ENA

Q8010

5V3V3S5_PGOOD

DELAY

SLP_S4_L

VOUT1

12

R=100k PP3V3S3_EN_L_RC
c=0.01uf (S3)

ICH

3.3V

CPU

VIN

P5VS0_EN_RC
(S0)

16

PGOOD

DELAY

R=10k
c=2.2nf

VOUT2

LTC3728
U7600
(PAGE 58)

CHGR_EN

U5800
(PAGE 44)

5V

PP5V_S5_REG
(5A MAX CURRENT)
PP3V3_S5_REG

A
OF

79

PAGE_BORDER=TRUE

Page Notes

BOM OPTION

Power aliases required by this page:


(NONE)

BOMOPTION

3
M42A GOOD
ST MICRO
630-7795
EVT

M42A BETTER
ST MICRO
630-7796
EVT

M42A BEST
KIONIX
630-7799
EVT

M42A GOOD
KIONIX
630-7798
EVT

M42A BETTER
KIONIX
630-7736
EVT

M42A BEST
ST MICRO
630-7797
EVT

1V51V05S0_CONT

Signal aliases required by this page:

>

>

>

>>

>>

>>

>

>

>

>

> >

> >

> >

> >

> >

> >

> > >

> > >

> > > >

> > >

> > >

>

> >

> > > >

>

> >

>

>>

>

1V51V05S0_SKIP

BOM options provided by this page:

>

(NONE)

5V3V3S3_CONT

(NONE)

5V3V3S3_SKIP
ACCEL_KIONIX

ACCEL_ST
INVERTER_BUF

INVERTER_UNBUF
ITP
LEMENU
MEMVTT_EN_PU
NBCFG_DMI_REVERSE

BOARD STACK-UP AND CONSTRUCTION

NBCFG_DMI_X2
NBCFG_DYN_ODT_DISABLE
NBCFG_PEG_REVERSE

MLB STACKUP
LAYER

Speed)
Speed)

CONFORMAL_COAT

0.018

L1

0.047

SIGNAL(TOP)

L1-L2

> >

> >

> > >

>

>

>

>

>

>

>

>

>

>

>

> >

> >

> > >

FET_STL8NH3LL

---

0.014

0.1

GOOD-KIONIX

0.156

LEMENU

359S0109

IC,SLG8LP436,CLOCK GEN,68PIN QFN

U3301

LEMENU

L10

TABLE_5_ITEM

SIGNAL

0.1

0.014

BETTER-KIONIX
BEST-ST
TPM

L10-L11

TABLE_5_ITEM

PVT-DIMM

M42A_PGM

341S2133

IC,SMC,176P BGA,HS8/2116

U5800

M42A_PGM

L12

TABLE_5_ITEM

SIGNAL(BOTTOM)

>

M42A_PGM

U4102

>

U6301

IC,EEPROM,SERIAL IIC,8KBIT,SO8

>

IC, 16MBIT 8-PIN SPI SERIAL FLASH,SOIC8

>

341S1797

>

341S2131

>

L11-L12

TABLE_5_ITEM

>

POST-RAMP-DIMM35

BOM OPTION

>

0.1

0.014

>

GROUND

>

L11

0.076

TABLE_5_HEAD

REFERENCE DESIGNATOR(S)

>

LEMENU

U4101

B
>

U4400

IC,88E8053,GIGABIT ENET XCVR,64P QFN, NO

BEST-KIONIX

>

0.014

>

IC,FW32306,1394A LINK,BGA,129P

GOOD-ST
BETTER-ST

TABLE_5_ITEM

DESCRIPTION

> > >

BOM OPTION

338S0270

QTY

>

REFERENCE DESIGNATOR(S)

338S0268

PART#

>

DESCRIPTION

STANDOFF
FET_FDN6296

0.076
SIGNAL

L9-L10

TABLE_5_HEAD

QTY

GROUND

L8-L9

BEST

L9
PART#

>

L8

BETTER

U0700

IC,MEROM,CPU 2.16GHZ,479 PGA

> > >

---

0.031

>

337S3391

NORMAL
FANCY

0.07

L7-L8

TABLE_5_ITEM

ONEWIRE_ALWAYSON

3V3_IND_3MM

---

0.031

0.076

POWER

> >

U0700

IC,MEROM,CPU 2.0GHZ,479 PGA

---

>

ONEWIRE_PWRCTL

0.014

GOOD
TABLE_5_ITEM

337S3389

ONEWIRE_PU_PROT
ONEWIRE_PU_ACOK

0.07
POWER

>

BOM OPTION

0.079

0.014

3V3_IND_2MM8

L5-L6

>

GND

>

U0700

ONEWIRE_PULLUP_OLD

0.076

L5

ONEWIRE_PULLUP

>

REFERENCE DESIGNATOR(S)

IC,MEROM,CPU L2 1.83GHZ,479 PGA

M42A_PGM

0.079

0.014

> >

DESCRIPTION

0.014

> >

L4-L5

TABLE_5_ITEM

GOOD

>

QTY

BETTER

>

SIGNAL

TABLE_5_HEAD

PART#

---

0.156

L6-L7

337S3450

USB_E_OC_PU

BEST

L3-L4

L7

USB_D_OC_PU

0.1

0.076
SIGNAL

L6

USB_C_OC_PU

>

L3

NO_REBOOT_MODE

>

GROUND

NBCFG_VCC_1V5

>

L2

L4

NBCFG_SDVO_AND_PCIE

TRACE WIDTH
(MM)

0.07

L2-L3

Speed)
Speed)

THICKNESS
(MM)

>

SIGNAL
GROUND
SIGNAL(High
SIGNAL(High
GROUND
POWER
POWER
GROUND
SIGNAL(High
SIGNAL(High
GROUND
SIGNAL

> >

Top
2
3
4
5
6
7
8
9
10
11
BOTTOM

0.07
0.047

0.1
M42

TABLE_5_ITEM

341S1890

U5100

IC,PSOC+W/USB,56P,MLF,CY8C24794

M42A_PGM

TOTAL

341S2132 FOR M42B LOCKED BOOTROM

1.276

>

M42A

TABLE_5_ITEM

>

CONFORMAL_COAT

0.018

---

TABLE_5_HEAD

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

CRITICAL

BOM OPTION
TABLE_5_ITEM

826-4393

LBL,P/N LABEL,PCB,28MMX6MM

EEE:YCT

CRITICAL

BEST-KIONIX

826-4393

LBL,P/N LABEL,PCB,28MMX6MM

EEE:YCS

CRITICAL

BETTER-KIONIX

826-4393

LBL,P/N LABEL,PCB,28MMX6MM

EEE:YCR

CRITICAL

GOOD-KIONIX

CONFIGURATION OPTIONS

TABLE_5_ITEM

TABLE_5_ITEM

SYNC_MASTER=SMC

SYNC_DATE=07/18/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

79

Functional Test Points


Power Supply NO_TESTs

Fan Connectors

NO_TEST
IMVP6_RBIAS
IMVP6_COMP

I93
I94
I95
I96

I101
I102
I103
I104
I106
I105
I107

TRUE
TRUE
TRUE
TRUE
TRUE

5VS5_RUNSS
1V5S0_RUNSS
1V8S3_COMP
1V8S3_FSET
3V3S5_COMP
3V3S5_FSET
1V05S0_COMP
1V05S0_FSET
P3V42G3H_FB

58A4 58B7

I12
I15

59B4 63C7

I16
62B5 63B7

I157
61B6

I158
61C6

I159

I19
I18
I17

I113
I115
I114
I116
I117
I118
I119
I120
I121
I122
I123
I124

I125
I183
I184
I185
I186
I187
I188
I189
I190
I191
I192
I193
I194
I195
I196
I197
I198

CK410_CPU0_N
32C4 33D5
CK410_CPU0_P
32C4 33D5
CK410_CPU1_N
32C4 33D5
CK410_CPU1_P
32C4 33D5
CK410_CPU2_ITP_SRC10_N 32C4 33D5
CK410_CPU2_ITP_SRC10_P 32C4 33D5
CK410_DOT96_27M_N
32A4 33B5
CK410_DOT96_27M_P
32A4 33B5
CK410_LVDS_N
32B4 33A5
CK410_LVDS_P
32B4 33A5
CK410_PCI4_CLK_SPN
CK410_PCIF1_CLK
32B6 33D8
CK410_SRC1_N_SPN
6B3
CK410_SRC1_P_SPN
6B3
CK410_SRC2_N
32B4 33C5
CK410_SRC2_P
32B4 33C5
CK410_SRC3_N_SPN
6B3
CK410_SRC3_P_SPN
6B3
CK410_SRC4_N
32B4 33B5
CK410_SRC4_P
32B4 33B5
CK410_SRC5_N
32B4 33C5
CK410_SRC5_P
32B4 33C5
CK410_SRC6_N
32B4 33C5
CK410_SRC6_P
32B4 33D5
CK410_SRC7_N_SPN
6B3
CK410_SRC7_P_SPN
6B3
CK410_SRC8_N
32A4 33C5
CK410_SRC8_P
32A4 33C5
CK410_SRC_CLKREQ1_L_SPN 6B3
CK410_SRC_CLKREQ3_L_SPN 6B3
CK410_SRC_CLKREQ8_L
32A4 33A5

I71
I72
I73
I74
I75
I76
I77
I78
I79
I80
I81
I82
I83
I84
I85
I86
I87
I88
I89
I91
I90

I92

I182

NO_TEST

I201

I202
I203
I204
I205
I206
I207
I208

FW_B_TPA_N_SPN
FW_B_TPA_P_SPN
FW_B_TPBIAS_SPN
FW_B_TPB_N_SPN
FW_B_TPB_P_SPN
FW_C_TPA_N_SPN
FW_C_TPA_P_SPN
FW_C_TPBIAS_SPN
FW_C_TPB_N_SPN
FW_C_TPB_P_SPN

6D1

I155

6D1

I153
6D1

I154
6D1

I156

I212
I213
I214
I215

6D1

I160
6D1

I162
I163
I164

LVDS_B_CLK_N_SPN
LVDS_B_CLK_P_SPN
LVDS_B_DATA_N0_SPN
LVDS_B_DATA_N1_SPN
LVDS_B_DATA_N2_SPN
LVDS_B_DATA_P1_SPN
LVDS_B_DATA_P2_SPN

6D5

I169

6D5

I166

6D5

I167

6D5

I168

6D5

I170

6D5

I174

6D5

I171

I173

ETHERNET NO_TESTS

I175
I176

NO_TEST

I179

I217

I218

TRUE
TRUE
TRUE

I180

I11

TRUE
TRUE

=PP3V42_G3H_LPCPLUS
=PP5V_S0_LPCPLUS

TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE

LPC_AD<0>
LPC_AD<1>
LPC_FRAME_L
PM_CLKRUN_L
BOOT_LPC_SPI_L
SMC_TMS
DEBUG_RST_L
SMC_TRST_L
SMC_TDO
SMC_MD1
SMC_TX_L
FWH_INIT_L
PCI_CLK_PORT80_LPC
LPC_AD<2>
LPC_AD<3>
INT_SERIRQ
PM_SUS_STAT_L
SMC_TDI
SMC_TCK
SMC_RST_L
SMC_NMI
SMC_RX_L
SV_SET_UP

I10
47C6 64D1

I21

TRUE

I22
21D4 45D8 47C6 53C6

I24
21D4 45D8 47C6 53C6

I23
21C5 45C8 47C6 53C6

I25
23C8 38A5 45D5 47C6
53C6
22B3 45C8 47C6

I45

45B5 46C6 47C6


26B1 47C6

I29

45C1 47C6

I32

45C5 46C6 47B6

I31

45C2 47B6

I33

45C8 46B2 46D6 47B6

I36

6B2 21C4 47C5

I38

21D4 45D8 47C5 53C6


21D4 45D8 47C5 53C6

I44
23C8 45C8 47C5 53C6

I47
23C5 45D5 46D3 47C5
53C6

I46

45C5 46C6 47C5

TRUE

SMBUS_SMC_MLB_SDA

64B2
64B2

ACZ_SDATAIN<0>
ACZ_SDATAOUT
ACZ_BITCLK
ACZ_RST_L
ACZ_SYNC

TRUE
TRUE
TRUE
TRUE
TRUE

21C7 54D7
21C7 54D7
21C7 54D7
21C7 54C7 57C3
21C7 54D7

Battery FUNC_TEST
SMC_BATT_ISET
TRUE
SMC_BATT_CHG_EN
TRUE
SMC_BC_ACOK
TRUE
SMC_PS_ON
TRUE
SMC_BATT_TRICKLE_EN_L
TRUE
SYS_ONEWIRE
TRUE

45B5 66B7
45D8 46B6 66A4
45C5 46B6 65C3
65C7 66A5
39C6 45D5 46B3
65C3
45D8 46B6 66A3
45B8 46D6 65C8

I48

USB FUNC_TEST
TP_USBP_E
TRUE
TP_USBN_E
TRUE
TP_USBP_F
TRUE
TP_USBN_F
TRUE

6C2
6C2

45C5 46C6 47C5


45C3 46D7 47C5
45C1 47B5

DC-JACK FUNC_TEST

45C8 46B2 46D6 47B5


23B6 23C3 47B5

I57

ACIN_ENABLE_GATE

TRUE

65C3

Battery charger FUNC_TEST

62B1 64D8

PPVBAT_G3H_CHGR_OUT

TRUE

66B5 66C2

INVERTER CONNECTOR FUNC_TEST


I60
I59

SMBUS_SMC_MLB_SCL

Audio FUNC_TEST
PP5V_S0_AUDIO_PWR
TRUE
PP5V_S0_AUDIO
TRUE
GND_AUDIO_PWR
TRUE
GND_AUDIO_CODEC
TRUE

33D6 47C5

SMBus FUNC_TEST
TRUE

65A6

47C6 64D3

I58

=PP1V05_S0_REG

65A6

27C5

I61
I63

PPBUS_ALL_INV_CONN
INV_GND
PP5V_INV_F
INV_BKLIGHT_PWM_L

TRUE
TRUE
TRUE
TRUE

67D3
67D2
67D3
67D2

27B5

TRUE

PPFW_SWITCH

39D4

ENET_MDI_TRAN_P<2>
ENET_MDI_TRAN_N<2>
ENET_MDI_TRAN_P<3>

TRUE

SYS_LED_ANODE

35C5 46A3

TRUE
TRUE
TRUE

SMC_LID
SMC_MANUAL_RST_L
SMC_CPU_VSENSE

40C4 45B5 46C6 65A8


46D8
45D5 48B1

Power Supply FUNC_TEST

6D1

I172

I216

I177

45B8 51C4

6D1

I165

I211

I2

45B8 51B4

65B6
65A6

SMC FUNC_TEST

6D1

NO_TEST
I210

I4

51C4 64A6

45C5 46C6 65A2

6D1

LVDS NO_TESTS
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE

51C3

SMC_BS_ALRT_L
SMBUS_BATT_SCL_F
SMBUS_BATT_SDA_F
BATT_IN
BATT_POS
BATT_NEG

TRUE
TRUE
TRUE
TRUE
TRUE
TRUE

SLEEP LED FUNC_TEST

I161

I209

I3

FIREWIRE FUNC_TEST
I152

TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE

51B3

FUNC_TEST

FIREWARE NO_TESTS
I200

I1

Other Func Test Points

I151

I199

51C4 64D3

I9

NO_TEST
I112

FUNC_TEST
=PP5V_S0_FAN_RT
FAN_RT_PWM
FAN_RT_TACH
=PP3V3_S0_FAN_RT
SMC_FAN_1_CTL
SMC_FAN_1_TACH

FUNC_TEST

CLOCK NO_TESTS
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE

TRUE
TRUE
TRUE
TRUE
TRUE
TRUE

LPC+ Debug Connector


63D2

I20

I111

Battery Digital Connector

FUNC_TEST
58A4 58B7

37B5

I178

37B5

I181

TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE

ALL_SYS_PWRGD
PPVCORE_CPU_S0
PP1V05_S0
PP1V5_S0
PP1V8_S0
PP2V5_S0
PP3V3_S0
PP5V_S0
PP1V2_S3
PP1V8_S3
PP2V5_S3
PP3V3_S3
PP5V_S3
PP3V3_S5
PP5V_S5
PP3V42_G3H
PPBUSA_G3H
PPBUSB_G3H
PP18V5_G3H
PP0V9_S0

26A5 45D8 63B1


64D7
64D7
64C7
64C7
64B7
64B7
64D4
64C4
64C4
64C4
64B4
64B4
64A4
64A4
64D1

64C1
64C1

FUNC TEST 1 OF 2

64D7

37B5

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

NO_TEST
I219
I220

TRUE
TRUE

SMC_FAN_3_TACH
ALS_LEFT

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


45B8 46C3

II NOT TO REPRODUCE OR COPY IT


45A8 46C3

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART


SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

79

(EMI PAD FOR INVERTER GONNECTOR)


SPKR-MIC-CLIP-M42

67C2

ZS0620

INVT_CHGND

NC

1 EMI-SPRING

ZS0621

LVDS ALIASES

SM

NB CFG ALIASES

CLIP-SM-M42

FIREWIRE ALIASES

NO-CONNECT UNUSED LVDS INTERFACE PORTS


NO-CONNECT UNUSED CFG INTERFACE PORTS
13C5

CHASSIS GND

13C5

BATTERY,AUDIO,DIP DIMM CONNECTOR CHASSIS GND


GND_CHASSIS_IO

13C5
13C5

OMIT

6C7

Z0606

13C5

5R2P3-7SQB

=GND_BATT_CHGND
56B8 =GND_CHASSIS_AUDIO_JACK
=GND_CHASSIS_AUDIO_SPKRCONN
57A6 =GND_CHASSIS_AUDIO_MIC
=GND_CHASSIS_AUDIO_SHIELD1
=GND_CHASSIS_AUDIO_SHIELD2
=GND_CHASSIS_AUDIO_SHIELD3
28A5 =GND_CHASSIS_DIPDIMM_LEFT

13C5

65A6

13C5
13C5

LVDS_B_CLK_N
LVDS_B_CLK_P
LVDS_B_DATA_N<0>
LVDS_B_DATA_N<1>
LVDS_B_DATA_N<2>
LVDS_B_DATA_P<0>
LVDS_B_DATA_P<1>
LVDS_B_DATA_P<2>

LVDS_B_CLK_N_SPN
LVDS_B_CLK_P_SPN
LVDS_B_DATA_N0_SPN
LVDS_B_DATA_N1_SPN
LVDS_B_DATA_N2_SPN
LVDS_B_DATA_P0_SPN
LVDS_B_DATA_P1_SPN
LVDS_B_DATA_P2_SPN

5A7
MAKE_BASE=TRUE
5A7
MAKE_BASE=TRUE
5A7
MAKE_BASE=TRUE
5A7
MAKE_BASE=TRUE
5A7
MAKE_BASE=TRUE
MAKE_BASE=TRUE
5A7
MAKE_BASE=TRUE
5A7
MAKE_BASE=TRUE

14C6

NB_CFG<3>

TP_NB_CFG3

14C6

NB_CFG<4>

TP_NB_CFG4

14C6

NB_CFG<6>

TP_NB_CFG6

14C6

NB_CFG<8>

TP_NB_CFG8

14C6

NB_CFG<10>

TP_NB_CFG10

14C6

NB_CFG<11>

TP_NB_CFG11

14C6

NB_CFG<12>

TP_NB_CFG12

14C6

NB_CFG<13>

TP_NB_CFG13

14C6

NB_CFG<14>

TP_NB_CFG14

14C6

NB_CFG<15>

TP_NB_CFG15

14C6

NB_CFG<17>

TP_NB_CFG17

NO-CONNECT UNUSED FIREWIRE INTERFACE PORTS

FW_B_TPBIAS
FW_B_TPA_P
38B3 FW_B_TPA_N
38B3 FW_B_TPB_P
38B3 FW_B_TPB_N
38B3 FW_C_TPBIAS
38B3 FW_C_TPA_P
38B3 FW_C_TPA_N
38B3 FW_C_TPB_P
38B3 FW_C_TPB_N

MAKE_BASE=TRUE

38B3

MAKE_BASE=TRUE

38B3

MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE

FW_B_TPBIAS_SPN
FW_B_TPA_P_SPN
FW_B_TPA_N_SPN
FW_B_TPB_P_SPN
FW_B_TPB_N_SPN
FW_C_TPBIAS_SPN
FW_C_TPA_P_SPN
FW_C_TPA_N_SPN
FW_C_TPB_P_SPN
FW_C_TPB_N_SPN

39C6

SATA,LVDS CONNECTOR CHASSIS GND

13D3
13D3

GND_CHASSIS_SATA

OMIT

35C8

Z0607

VOLTAGE=0V
MAKE_BASE=TRUE

6P5R2P6-5P5B
1

13D3
13D3
13D3
13D3

C0607

0.1UF

=GND_CHASSIS_LVDS

C0608

13D3

0.01uF

13D3

10%
16V
2 CERM
402

10%
16V
2 X5R
402

13D3
13C3
13C3

DCIN CONNECTOR CHASSIS GND

13C3

OMIT

GND_CHASSIS_DCIN

Z0602

VOLTAGE=0V
MAKE_BASE=TRUE
65C8

5R2P3-7SQB

=GND_DCIN_CHGND

13C3
13C3
13C3

13C3
37A4

69C3 69A4

=GND_CHASSIS_RJ45

=GND_CHASSIS_TMDS_UPPER

C0630

13C3

0.1UF

13C3

10%
16V
2 X5R
402

13C3
13C3
13C3
13C3

I/O CONNECTOR CHASSIS GND

OMIT

GND_CHASSIS_IO

13C3

5P0R2P3-7BLB

13C3

42C4 42C2 42A4 42A2

=GND_CHASSIS_FW_DOWN
=GND_CHASSIS_USB

C0610

13C3
13C3

C0611

0.1UF

0.01uF

13C3

10%
16V
402

10%
16V
2 X5R
402

13C3

Z0608

6D7

VOLTAGE=0V
MAKE_BASE=TRUE
39A1

13C3

2 CERM

13C3
13B3

DIP DIMM CONNECTOR CHASSIS GND

OMIT

GND_CHASSIS_CENTER
29A5 28D5

VOLTAGE=0V
MAKE_BASE=TRUE

=GND_CHASSIS_DIPDIMM_CENTER

C0616

13B3

5R2P3-7SQB

13B3
13B3

C0617

13B3

0.01uF

13B3

10%
16V
2 CERM
402

10%
16V
2 X5R
402

13B3

Z0610
1

0.1UF

13B3
13B3
13B3
13B3

DIP DIMM CONNECTOR CHASSIS GND

OMIT

29D4

13B3

5R2P3-7SQB

VOLTAGE=0V
MAKE_BASE=TRUE

=GND_CHASSIS_DIPDIMM_RIGHT

13B3

Z0609

GND_CHASSIS_RIGHT

13B3

13B3

C0614

0.1UF

C0615

13B3

0.01uF

13B3

10%
16V
402

10%
16V
2 X5R
402

2 CERM

OMIT

Z0601

5R2P3-7SQB
GND_CHASSIS_CPU 1

MAKE_BASE=TRUE

PCI_EXPRESS GRAPHICS ALIASES

=FWPWR_PWRON

NC_FWPWR_PWRON
NO_TEST=TRUE
MAKE_BASE=TRUE

NO-CONNECT UNUSED SDVO INTERFACE PORTS

67B2 67A2

5B7
MAKE_BASE=TRUE
5B7
MAKE_BASE=TRUE
5B7
MAKE_BASE=TRUE
5B7
MAKE_BASE=TRUE
5B7
MAKE_BASE=TRUE
5B7
MAKE_BASE=TRUE
5B7
MAKE_BASE=TRUE
5B7
MAKE_BASE=TRUE
5B7
MAKE_BASE=TRUE
5B7
MAKE_BASE=TRUE

13B3
13B3
13B3

OMIT

Z0611

13A3

5R2P3-7B
GND_CHASSIS_FANSCREW 1

13A3
13A3
13A3

PEG_D2R_N<0>
PEG_D2R_N<2>
PEG_D2R_N<3>
PEG_D2R_N<4>
PEG_D2R_N<5>
PEG_D2R_N<6>
PEG_D2R_N<7>
PEG_D2R_N<8>
PEG_D2R_N<9>
PEG_D2R_N<10>
PEG_D2R_N<11>
PEG_D2R_N<12>
PEG_D2R_N<13>
PEG_D2R_N<14>
PEG_D2R_N<15>
PEG_D2R_P<0>
PEG_D2R_P<2>
PEG_D2R_P<3>
PEG_D2R_P<4>
PEG_D2R_P<5>
PEG_D2R_P<6>
PEG_D2R_P<7>
PEG_D2R_P<8>
PEG_D2R_P<9>
PEG_D2R_P<10>
PEG_D2R_P<11>
PEG_D2R_P<12>
PEG_D2R_P<13>
PEG_D2R_P<14>
PEG_D2R_P<15>
PEG_R2D_C_N<4>
PEG_R2D_C_N<5>
PEG_R2D_C_N<6>
PEG_R2D_C_N<7>
PEG_R2D_C_N<8>
PEG_R2D_C_N<9>
PEG_R2D_C_N<10>
PEG_R2D_C_N<11>
PEG_R2D_C_N<12>
PEG_R2D_C_N<13>
PEG_R2D_C_N<14>
PEG_R2D_C_N<15>
PEG_R2D_C_P<4>
PEG_R2D_C_P<5>
PEG_R2D_C_P<6>
PEG_R2D_C_P<7>
PEG_R2D_C_P<8>
PEG_R2D_C_P<9>
PEG_R2D_C_P<10>
PEG_R2D_C_P<11>
PEG_R2D_C_P<12>
PEG_R2D_C_P<13>
PEG_R2D_C_P<14>
PEG_R2D_C_P<15>

SATA ALIASES

PEG_D2R_N0_SPN
PEG_D2R_N2_SPN
PEG_D2R_N3_SPN
PEG_D2R_N4_SPN
PEG_D2R_N5_SPN
PEG_D2R_N6_SPN
PEG_D2R_N7_SPN
PEG_D2R_N8_SPN
PEG_D2R_N9_SPN
PEG_D2R_N10_SPN
PEG_D2R_N11_SPN
PEG_D2R_N12_SPN
PEG_D2R_N13_SPN
PEG_D2R_N14_SPN
PEG_D2R_N15_SPN
PEG_D2R_P0_SPN
PEG_D2R_P2_SPN
PEG_D2R_P3_SPN
PEG_D2R_P4_SPN
PEG_D2R_P5_SPN
PEG_D2R_P6_SPN
PEG_D2R_P7_SPN
PEG_D2R_P8_SPN
PEG_D2R_P9_SPN
PEG_D2R_P10_SPN
PEG_D2R_P11_SPN
PEG_D2R_P12_SPN
PEG_D2R_P13_SPN
PEG_D2R_P14_SPN
PEG_D2R_P15_SPN
PEG_R2D_C_N4_SPN
PEG_R2D_C_N5_SPN
PEG_R2D_C_N6_SPN
PEG_R2D_C_N7_SPN
PEG_R2D_C_N8_SPN
PEG_R2D_C_N9_SPN
PEG_R2D_C_N10_SPN
PEG_R2D_C_N11_SPN
PEG_R2D_C_N12_SPN
PEG_R2D_C_N13_SPN
PEG_R2D_C_N14_SPN
PEG_R2D_C_N15_SPN
PEG_R2D_C_P4_SPN
PEG_R2D_C_P5_SPN
PEG_R2D_C_P6_SPN
PEG_R2D_C_P7_SPN
PEG_R2D_C_P8_SPN
PEG_R2D_C_P9_SPN
PEG_R2D_C_P10_SPN
PEG_R2D_C_P11_SPN
PEG_R2D_C_P12_SPN
PEG_R2D_C_P13_SPN
PEG_R2D_C_P14_SPN
PEG_R2D_C_P15_SPN

MAKE_BASE=TRUE

NO-CONNECT UNUSED SATA INTERFACE PORTS

MAKE_BASE=TRUE
MAKE_BASE=TRUE
21B6

SATA_A_D2R_N

SATA_A_D2R_N_SPN

21B6

SATA_A_D2R_P

SATA_A_D2R_P_SPN

21B6

SATA_A_R2D_C_N

SATA_A_R2D_C_N_SPN

MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
21B6

SATA_A_R2D_C_P

USB PORT A = External USB2.0 Port

MAKE_BASE=TRUE
MAKE_BASE=TRUE

42C5 =USB2_EXTA_P

USB2_EXTA_P

MAKE_BASE=TRUE

42C5 =USB2_EXTA_N

USB2_EXTA_N

MAKE_BASE=TRUE

42C8 =EXTAUSB_OC_L

EXTAUSB_OC_L

USB_A_P

22C2

USB_A_N

22C2

USB_A_OC_L

22C4 22D8

MAKE_BASE=TRUE

SATA_A_R2D_C_P_SPN

MAKE_BASE=TRUE

MAKE_BASE=TRUE

MAKE_BASE=TRUE

USB PORT B = Trackpad(Geyser)

MAKE_BASE=TRUE
MAKE_BASE=TRUE

PCI_EXP ALIASES

MAKE_BASE=TRUE

40C7 =USB2_GEYSER_P

USB2_GEYSER_P

40C7 =USB2_GEYSER_N

USB2_GEYSER_N

MAKE_BASE=TRUE

MAKE_BASE=TRUE
22D4

PCIE_C_D2R_N

PCIE_C_D2R_N_SPN

22D4

PCIE_C_D2R_P

PCIE_C_D2R_P_SPN

22D4

PCIE_C_R2D_C_N

PCIE_C_R2D_C_N_SPN

22D4

PCIE_C_R2D_C_P

PCIE_C_R2D_C_P_SPN

22D4

PCIE_D_D2R_N

PCIE_D_D2R_N_SPN

22D4

PCIE_D_D2R_P

PCIE_D_D2R_P_SPN

MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
22D4

PCIE_D_R2D_C_N

PCIE_D_R2D_C_N_SPN

22D4

PCIE_D_R2D_C_P

PCIE_D_R2D_C_P_SPN

22C4

PCIE_E_D2R_N

PCIE_E_D2R_N_SPN

MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
22C4

PCIE_E_D2R_P

PCIE_E_D2R_P_SPN

22C4

PCIE_E_R2D_C_N

PCIE_E_R2D_C_N_SPN

22C4

PCIE_E_R2D_C_P

PCIE_E_R2D_C_P_SPN

22C4

PCIE_F_D2R_N

PCIE_F_D2R_N_SPN

22C4

PCIE_F_D2R_P

PCIE_F_D2R_P_SPN

MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
22C4

PCIE_F_R2D_C_N

PCIE_F_R2D_C_N_SPN

22C4

PCIE_F_R2D_C_P

PCIE_F_R2D_C_P_SPN

MAKE_BASE=TRUE

22C2

USB_B_N

22C2

USB PORT C = External USB2.0 Port B

NO-CONNECT UNUSED PCI_EXP INTERFACE PORTS

MAKE_BASE=TRUE

USB_B_P

MAKE_BASE=TRUE

MAKE_BASE=TRUE

42B5 =USB2_EXTB_P

USB2_EXTB_P

42B5 =USB2_EXTB_N

USB2_EXTB_N

USB_C_P

22C2

USB_C_N

22C2

USB_C_OC_L

22C4 22D8

USB_D_P

22C2

USB_D_N

22C2

5C1 TP_USBP_E
MAKE_BASE=TRUE

USB_E_P

22C2

5C1 TP_USBN_E
MAKE_BASE=TRUE

USB_E_N

MAKE_BASE=TRUE
MAKE_BASE=TRUE

MAKE_BASE=TRUE
42C8 =EXTBUSB_OC_L

EXTBUSB_OC_L

MAKE_BASE=TRUE

MAKE_BASE=TRUE

MAKE_BASE=TRUE

USB PORT D = CAMERA

MAKE_BASE=TRUE
MAKE_BASE=TRUE

67B4 =USB2_CAMERA_P

USB2_CAMERA_P

67A4 =USB2_CAMERA_N

USB2_CAMERA_N

MAKE_BASE=TRUE

MAKE_BASE=TRUE

MAKE_BASE=TRUE

USB PORT "E" = Unused

MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE

41C6 =USB2_IR_P

MAKE_BASE=TRUE

41C6 =USB2_IR_N

USB_IR_P

USB_F_P
22C2

USB_IR_N

MAKE_BASE=TRUE

USB_F_N
22C2

MAKE_BASE=TRUE

MAKE_BASE=TRUE

USB PORT "G" = BLUETOOTH

MAKE_BASE=TRUE
MAKE_BASE=TRUE

MAKE_BASE=TRUE

22C2

USB PORT "F" = IR CONTROLLER

MAKE_BASE=TRUE

44C6 =USB2_BT_P

USB_BT_P

44C6 =USB2_BT_N

USB_BT_N

MAKE_BASE=TRUE

USB_G_P

22C2

USB_G_N

22C2

MAKE_BASE=TRUE

MAKE_BASE=TRUE

USB PORT "H" = PCI-E Mini Card

MAKE_BASE=TRUE

CLOCK ALIASES

MAKE_BASE=TRUE

43B4 =USB2_AIRPORT_P

USB2_AIRPORT_P

43B4 =USB2_AIRPORT_N

USB2_AIRPORT_N

USB_H_P

22C2

USB_H_N

22C2

MAKE_BASE=TRUE

MAKE_BASE=TRUE

MAKE_BASE=TRUE

NO-CONNECT UNUSED CLOCK INTERFACE PORTS


MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE

32B4

CK410_SRC1_N

CK410_SRC1_N_SPN

MAKE_BASE=TRUE

32B4

CK410_SRC1_P

CK410_SRC1_P_SPN

MAKE_BASE=TRUE

32B4

CK410_SRC3_N

MAKE_BASE=TRUE

32B4

CK410_SRC3_P

MAKE_BASE=TRUE

32B4

CK410_SRC7_N

MAKE_BASE=TRUE

32B4

CK410_SRC7_P

MAKE_BASE=TRUE

32B4

CK410_SRC_CLKREQ1_L

MAKE_BASE=TRUE

32B4

CK410_SRC_CLKREQ3_L

5C7
MAKE_BASE=TRUE
5C7
MAKE_BASE=TRUE
CK410_SRC3_N_SPN
5C7
MAKE_BASE=TRUE
CK410_SRC3_P_SPN
5C7
MAKE_BASE=TRUE
CK410_SRC7_N_SPN
5C7
MAKE_BASE=TRUE
CK410_SRC7_P_SPN
5C7
MAKE_BASE=TRUE
CK410_SRC_CLKREQ1_L_SPN
5B7
MAKE_BASE=TRUE
CK410_SRC_CLKREQ3_L_SPN
5B7
MAKE_BASE=TRUE

ANALOG SWITCH GPIO


69A6

=SB_GPIO22

SB_GPIO22

TP_SB_GPIO22

22B6

MAKE_BASE=TRUE

45B8 14B7

PM_EXTTS_L<0>

DIMM_OVERTEMP_L

28C4 29C4

MAKE_BASE=TRUE

47C5 21C4 5C2

MAKE_BASE=TRUE

FWH_INIT_L

SMC_CPU_INIT_3_3_L

45D5

MAKE_BASE=TRUE

MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE

SB ALIASES

MAKE_BASE=TRUE

NO-CONNECT UNUSED CLOCK INTERFACE PORTS

MAKE_BASE=TRUE
MAKE_BASE=TRUE
23C3

SUS_CLK_SB

SUS_CLK_SB_SPN

MAKE_BASE=TRUE

MAKE_BASE=TRUE

MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE

C0612
0.1UF

10%
16V
2 X5R
402

C0613

10%
16V
402

10%
16V
2 X5R
402

0.01uF

C0618
0.1UF

2 CERM

C0619
0.01uF
10%

2 16V
CERM
69A3

=GND_CHASSIS_TMDS_DOWN

39A1

=GND_CHASSIS_FW_UPPER

VOLTAGE=0V
MAKE_BASE=TRUE

I393

OMIT

DIGITAL GND SCREW HOLE

OMIT

NO-CONNECT UNUSED ADDRESS INTERFACE PORTS


28C4
28C4

Z0603

Z0604

29C4

STDOFF-4.5OD3.95H-1.1-3.7-TH1

STDOFF-4.5OD3.95H-1.1-3.7-TH1

29C4

NB_RIGHT_DOWN_SCREW

CPU_THERMAL_SCREW_UP

MEM_A_A<15>
MEM_A_A<14>
MEM_B_A<15>
MEM_B_A<14>

MAKE_BASE=TRUE
MAKE_BASE=TRUE

Ethernet ALIASES

5%
1/16W
MF-LF
2 402

MAKE_BASE=TRUE

MAKE_BASE=TRUE

R0610

MEM_A_A15_SPN
MEM_A_A14_SPN
MEM_B_A15_SPN
MEM_B_A14_SPN

R0612

SO-DIMM ALIASES

GND_CHASSIS_IO1

402

36C8

5%
1/16W
MF-LF
2 402

36C8

ENET_CTRL12
ENET_CTRL25

ENET_CTRL12_SPN
ENET_CTRL25_SPN

SIGNAL ALIAS /RESET

MAKE_BASE=TRUE
MAKE_BASE=TRUE

SYNC_MASTER=ENET

SYNC_DATE=08/19/2005

NOTICE OF PROPRIETARY PROPERTY

OMIT

OMIT

Z0605

Z0621

STDOFF-4.5OD3.95H-1.1-3.7-TH1

STDOFF-4.5OD3.95H-1.1-3.7-TH1

CPU_THERMAL_SCREW_DOWN
1

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

BOM OPTION

Z0603,Z0604,Z0605,Z0621

STANDOFF

Z0612

STANDOFF

TABLE_5_ITEM

860-0722

THERMAL STANDOFF

860-0723

STANDOFF WIRELESS

CPU_THERMAL_SCREW_RIGHT 1

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

R0621

TABLE_5_ITEM

OMIT

5%
1/16W
MF-LF
2 402

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT

TABLE_5_ITEM

R0611

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

TABLE_5_HEAD

5%
1/16W
MF-LF
2 402

OMIT

Z0612

Z0613

STDOFF-4.2OD2.15H-1.2-TH

STDOFF-4.2OD2.15H-1.2-TH

NC

NC

860-0749

STANDOFF W/THRU HOLES,WIRELESS

Z0613

STANDOFF
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

79

OMIT

U0700

12D4

IO

12D4

IO

12D4

IO

12D4

IO

12D4

IO

12C4

IO

12C4

IO

12B4
12B4

IO

12A4

IO

12A4

IO

12A4

IO

12C4

IO

12C4

IO

12C4

IO

12C4

IO

12C4

IO

12C4
12C4
12C4
12C4
12C4
12C4
12C4
12C4
12C4

IO

12C4
12C4

21C4
21C2
21C4

21C4
21C4

IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IN
OUT
IN
IN
IN

21C4

IN

21C4

IN

J1 A9*
N3 A10*
P5 A11*
P2 A12*
L1 A13*
P4 A14*
P1 A15*
R1 A16*
L2 ADSTB0*

FSB_REQ_L<0>
FSB_REQ_L<1>
FSB_REQ_L<2>
FSB_REQ_L<3>
FSB_REQ_L<4>

DEFER*
DRDY*

H5

12B4

DBSY*

E1

FSB_DEFER_L
12B4 FSB_DRDY_L
12B4 FSB_DBSY_L

BR0*

F1

12C4

INIT*

D20
B3

FSB_IERR_L
21C4 CPU_INIT_L

IN

LOCK*

H4

12B4

FSB_LOCK_L

IO

RESET*
RS0*

B1

12C4 11B5

IN

F3
F4

12A4

IN

12A4

IN

IERR*

RS1*
RS2*

K3 REQ0*
H2 REQ1*
K2 REQ2*
J3 REQ3*

F21

G2

HIT*

G6
E4

HITM*

FSB_CPURST_L
FSB_RS_L<0>
FSB_RS_L<1>
12A4 FSB_RS_L<2>
12A4 FSB_TRDY_L

G3

TRDY*

FSB_BREQ0_L

FSB_HIT_L
12B4 FSB_HITM_L
12B4

T5 A25*
T3 A26*
W3 A27*
W5 A28*
Y4 A29*
W2 A30*
Y1 A31*
V4 ADSTB1*

CPU_A20M_L
CPU_FERR_L
CPU_IGNNE_L

A6 A20M*
A5 FERR*
C4 IGNNE*

CPU_STPCLK_L
CPU_INTR
CPU_NMI
CPU_SMI_L

D5 STPCLK*
C6 LINT0
B4 LINT1
A3 SMI*

TP_CPU_A32_L
TP_CPU_A33_L
TP_CPU_A34_L
TP_CPU_A35_L
TP_CPU_A36_L
TP_CPU_A37_L
TP_CPU_A38_L
TP_CPU_A39_L
TP_CPU_APM0_L
TP_CPU_APM1_L

AA1 RSVD1
AA4 RSVD2
AB2 RSVD3
AA3 RSVD4
M4 RSVD5
N5 RSVD6
T2 RSVD7
V3 RSVD8
B2 RSVD9
C3 RSVD10

TP_CPU_HFPLL

B25 RSVD11

54.9

1%
1/16W
MF-LF
2 402

IO
IO
IO
IO

PLACE TESTPOINT ON
FSB_IERR_L WITH A GND
0.1" AWAY

IN

=PP1V05_S0_CPU

IN

7B5 7B6 7D5 8C7 9C8 11B3 11C5 64D6

IO
IO

Y2 A17*
U5 A18*
R3 A19*
W6 A20*
U4 A21*
Y5 A22*
U2 A23*
R4 A24*

R0702

IO

R0703

L5 REQ4*

FSB_A_L<17>
FSB_A_L<18>
FSB_A_L<19>
FSB_A_L<20>
FSB_A_L<21>
FSB_A_L<22>
FSB_A_L<23>
FSB_A_L<24>
FSB_A_L<25>
FSB_A_L<26>
FSB_A_L<27>
FSB_A_L<28>
FSB_A_L<29>
FSB_A_L<30>
FSB_A_L<31>
FSB_ADSTB_L<1>

7B5 7B6 7D5 8C7 9C8 11B3 11C5 64D6

BPM0*
BPM1*
BPM2*
BPM3*
PRDY*
PREQ*
TCK
TDI
TDO
TMS
TRST*
DBR*

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

THERMDA

D21
A24

THERMDC

A25

PROCHOT*

THERMTRIP*

BCLK0
BCLK1

RSVD12

RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20

C7

XDP_BPM_L<0>
11B2 XDP_BPM_L<1>
11B2 XDP_BPM_L<2>
11B3 XDP_BPM_L<3>
11B2 XDP_BPM_L<4>
11B2 XDP_BPM_L<5>
11B3 11B2 7A8 XDP_TCK
11B3 7B8 XDP_TDI
11B5 XDP_TDO
11B2 7B8 XDP_TMS
11B3 XDP_TRST_L
26C6 11B4 XDP_DBRESET_L
11B2

CPU_PROCHOT_L
10B6 CPU_THERMD_P
10B6 CPU_THERMD_N

IO
IO
IO

54.9

OMIT

1%
1/16W
MF-LF
2 402

U0700

IO
IO
IO
IN
IN
OUT
IN
IN

R0704

46B3 21C2 14B6

PM_THRMTRIP_L

5%
1/16W
MF-LF
2 402

OUT

FSB_CLK_CPU_P
33C2 FSB_CLK_CPU_N

OUT
OUT

CPU_PROCHOT_L TO SMC
AND CPU VR TO INFORM
CPU IS HOT

OUT

33D3 33C2

IN

A21

33D3

IN

PM_THRMTRIP#
SHOULD CONNECT TO
ICH7-M AND GMCH
WITHOUT T-ING (NO
STUB)

TP_CPU_EXTBREF

T22

TP_CPU_SPARE0
TP_CPU_SPARE1
TP_CPU_SPARE2
TP_CPU_SPARE3
TP_CPU_SPARE4
TP_CPU_SPARE5
TP_CPU_SPARE6
TP_CPU_SPARE7

D2
F6
D3
C1
AF1
D22
C23
C24

SPARE[7-0],HFPLL:
ROUTE TO TP VIA AND
PLACE GND VIA W/IN 1000 MILS

64D6 11C5 11B3 9C8 8C7 7D5 7B6

=PP1V05_S0_CPU
1

R0705
1K

=PP1V05_S0_CPU

1%
1/16W
MF-LF
2 402

7B5 7D5 8C7 9C8 11B3 11C5 64D6

R0720
11B2 7C6

XDP_TMS

54.9 2

XDP_TDI

12D6

IO

12D6

IO

2.0K

1%
1/16W
MF-LF
2 402
33C6

R0721

OUT

33B6

OUT

33B6

54.9 2

OUT

IO

12D6

IO

12D6

IO

12D6

IO

12D6

IO

12D6

IO

12D6

IO
IO

12D6

IO

12C6

IO

12C6

IO

12C6

IO

12B4

IO

12B4

IO

12B4

IO

12C6

IO

12C6

IO

12C6

IO

12C6

IO

12C6

IO

12C6

IO

12C6

IO

12C6

IO

12C6

IO

12C6

IO

12C6

IO

12C6

IO

12C6

IO

12C6

IO

12C6

IO

12C6

IO

12B4

IO

12B4

IO

12B4

IO

FSB_D_L<0>
FSB_D_L<1>
FSB_D_L<2>
FSB_D_L<3>
FSB_D_L<4>
FSB_D_L<5>
FSB_D_L<6>
FSB_D_L<7>
FSB_D_L<8>
FSB_D_L<9>
FSB_D_L<10>
FSB_D_L<11>
FSB_D_L<12>
FSB_D_L<13>
FSB_D_L<14>
FSB_D_L<15>
FSB_DSTBN_L<0>
FSB_DSTBP_L<0>
FSB_DINV_L<0>

E22 D0*
F24 D1*
E26 D2*

FSB_D_L<16>
FSB_D_L<17>
FSB_D_L<18>
FSB_D_L<19>
FSB_D_L<20>
FSB_D_L<21>
FSB_D_L<22>
FSB_D_L<23>
FSB_D_L<24>
FSB_D_L<25>
FSB_D_L<26>
FSB_D_L<27>
FSB_D_L<28>
FSB_D_L<29>
FSB_D_L<30>
FSB_D_L<31>
FSB_DSTBN_L<1>
FSB_DSTBP_L<1>
FSB_DINV_L<1>

N22 D16*
K25 D17*
P26 D18*
R23 D19*

CPU_GTLREF

R0706

1%
402

11B3 7C6

IO

12D6

OUT

A22

IO

12D6

12D6

68

58C8 46C2 46B5

12D6

E25 D6*
E23 D7*
K24 D8*
G24 D9*
J24 D10*
J23 D11*
H26 D12*
F26 D13*
K22 D14*
H25 D15*
H23 DSTBN0*

D34*
D35*
D36*
D37*
D38*

L25 D20*
L22 D21*
L23 D22*
M23 D23*
P25 D24*
P22 D25*
P23 D26*
T24 D27*
R24 D28*

D25 TEST2

CPU_BSEL<0>
CPU_BSEL<1>
CPU_BSEL<2>

B22 BSEL0
B23 BSEL1
C21 BSEL2

D42*
D43*
D44*
D45*
D46*

DINV2*
D48*
D49*
D50*
D51*
D52*
D53*
D54*
D55*
D56*
D57*
D58*
D59*
D60*
D61*
D62*
D63*
DSTBN3*
DSTBP3*
DINV3*

M26 DINV1*

CPU_TEST2

D40*
D41*

D47*

L26 D29*
T25 D30*
N24 D31*
M24 DSTBN1*
N25 DSTBP1*

C26 TEST1

D39*

DSTBN2*
DSTBP2*

G22 DSTBP0*
J26 DINV0*

CPU_TEST1

1%
402

D32*
D33*

BGA
(2 OF 4)

H22 D3*
F23 D4*
G25 D5*

AD26 GTLREF
A2 NC

LAYOUT NOTE: 0.5" MAX LENGTH

YONAH
CPU

DATA GRP2

IO

IO

DATA GRP3

IO

12D4

IO

12C4

DATA GRP0

IO

12D4

=PP1V05_S0_CPU

12C4

E2
G5

BPRI*

BGA

FSB_ADS_L
FSB_BNR_L
12C4 FSB_BPRI_L

H1

ADS*
BNR*

DATA GRP1

12D4

(1 OF 4)

CONTROL

IO

K5 A6*
M1 A7*
N2 A8*

XDP/ITP SIGNALS

IO

12D4

THERM

IO

12D4

YONAH
CPU

HCLK

12D4

J4 A3*
L4 A4*
M3 A5*

ADDR GROUP0

IO

FSB_A_L<3>
FSB_A_L<4>
FSB_A_L<5>
FSB_A_L<6>
FSB_A_L<7>
FSB_A_L<8>
FSB_A_L<9>
FSB_A_L<10>
FSB_A_L<11>
FSB_A_L<12>
FSB_A_L<13>
FSB_A_L<14>
FSB_A_L<15>
FSB_A_L<16>
FSB_ADSTB_L<0>

ADDR GROUP1

IO

12D4

RESERVED

12D4

MISC

R0722
11B3 11B2 7C6

XDP_TCK

54.9 2

402
1

R0712

1%
402

51

5%
1/16W
MF-LF
2 402

IO

12C6

IO

V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
W24
Y25
V23
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
AD23
AE24
AC20

COMP1

U26
U1

DPSLP*
DPWR*
PWRGOOD
SLP*
PSI*

R0730

IO

12C6

R26

DPRSTP*

NOSTUFF

12C6

AB24
V24

COMP0
COMP2
COMP3

FSB_D_L<32>
FSB_D_L<33>
FSB_D_L<34>
12C6 FSB_D_L<35>
12C6 FSB_D_L<36>
12C6 FSB_D_L<37>
12C6 FSB_D_L<38>
12B6 FSB_D_L<39>
12B6 FSB_D_L<40>
12B6 FSB_D_L<41>
12B6 FSB_D_L<42>
12B6 FSB_D_L<43>
12B6 FSB_D_L<44>
12B6 FSB_D_L<45>
12B6 FSB_D_L<46>
12B6 FSB_D_L<47>
12B4 FSB_DSTBN_L<2>
12B4 FSB_DSTBP_L<2>
12B4 FSB_DINV_L<2>

AA23

FSB_D_L<48>
12B6 FSB_D_L<49>
12B6 FSB_D_L<50>
12B6 FSB_D_L<51>
12B6 FSB_D_L<52>
12B6 FSB_D_L<53>
12B6 FSB_D_L<54>
12B6 FSB_D_L<55>
12B6 FSB_D_L<56>
12B6 FSB_D_L<57>
12B6 FSB_D_L<58>
12B6 FSB_D_L<59>
12B6 FSB_D_L<60>
12B6 FSB_D_L<61>
12B6 FSB_D_L<62>
12B6 FSB_D_L<63>
12B4 FSB_DSTBN_L<3>
12B4 FSB_DSTBP_L<3>
12B4 FSB_DINV_L<3>
12B6

D24
D6
D7
AE6

IO
IO
IO
IO
IO
IO
IO

IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO

LAYOUT NOTE:
COMP0,2 CONNECT WITH
TRACE LENGTH SHORTER
COMP1,3 CONNECT WITH
TRACE LENGTH SHORTER

IO
IO
IO
IO

CPU_DPRSTP_L
21C4 CPU_DPSLP_L
12B4 FSB_DPWR_L
21C4 CPU_PWRGD
12A4 FSB_SLPCPU_L
58C7 CPU_PSI_L

58C7 21C4

ZO=27.4OHM, MAKE
THAN 0.5".
ZO=55OHM, MAKE
THAN 0.5".

IO
IO

R0716

IO

IO
IO

27.4 2
402

R0717

IO

IO

54.9 2
1%

IO

402

R0718

IO

CPU_COMP<0>
CPU_COMP<1>
CPU_COMP<2>
CPU_COMP<3>

V1
E5
B5

IO

27.4 2

R0719
1

54.9 2
1%
402

IN
IN
IN
IN
IN
IN

NOSTUFF
1

R0707
1K

5%
1/16W
MF-LF
2 402

CHANGE THE PULLS RESISTOR VALUE PER NAPA PLATFORM DG REV 0.9

CPU 1 OF 2-FSB
WE THROUGH THE ITP700FLEX CONNECTOR CONNECT TO PDB XDP BUFFER BOARD--ECM*50
SO THE TDI PULL UP THROUGH 54.9 OHM,TMS PULL UP THROUGH 54.9 OHM
TCK PULL DOWN THROUGH 54.9 OHM(FOLLOW UP XDP DESIGN REFERENCE)

SYNC_MASTER=MASTER

SYNC_DATE=05/03/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

79

OMIT
A4 VSS_1
A8 VSS_2
A11 VSS_3

=PPVCORE_S0_CPU
OMIT
A7 VCC_1
A9 VCC_2
A10 VCC_3

A12 VCC_4
A13 VCC_5
A15 VCC_6

BGA
(3 OF 4)

VCC_71 AC9
VCC_72 AC12
VCC_73 AC13
VCC_74 AC15
VCC_75 AC17
VCC_76 AC18

B7 VCC_10
B9 VCC_11
B10 VCC_12

VCC_77 AD7
VCC_78 AD9
VCC_79 AD10

B12 VCC_13
B14 VCC_14
B15 VCC_15

VCC_80 AD12
VCC_81 AD14

C9 VCC_19
C10 VCC_20
C12 VCC_21
C13 VCC_22
C15 VCC_23
C17 VCC_24
C18 VCC_25
D9 VCC_26
D10 VCC_27
D12 VCC_28
D14 VCC_29

VCC_82 AD15
VCC_83 AD17
VCC_84 AD18
VCC_85 AE9
VCC_86 AE10
VCC_87 AE12
VCC_88 AE13
VCC_89 AE15
VCC_90 AE17
VCC_91 AE18
VCC_92 AE20
VCC_93 AF9
VCC_94 AF10
VCC_95 AF12
VCC_96 AF14
VCC_97 AF15
VCC_98 AF17

D15 VCC_30
D17 VCC_31
D18 VCC_32
E7 VCC_33

VCC_99 AF18
VCC_100 AF20

E9 VCC_34
E10 VCC_35
E12 VCC_36

VCCP_1 V6
VCCP_2 G21

E13 VCC_37
E15 VCC_38
E17 VCC_39

VCCP_3 J6
VCCP_4 K6
VCCP_5 M6

E18 VCC_40
E20 VCC_41
F7 VCC_42

VCCP_6 J21
VCCP_7 K21
VCCP_8 M21

F9 VCC_43
F10 VCC_44
F12 VCC_45

VCCP_9 N21
VCCP_10 N6
VCCP_11 R21

F14 VCC_46
F15 VCC_47
F17 VCC_48

VCCP_12 R6
VCCP_13 T21

F18 VCC_49
F20 VCC_50
AA7 VCC_51
AA9 VCC_52
AA10 VCC_53
AA12 VCC_54
AA13 VCC_55

YONAH
CPU

VCC_68 AB20
VCC_69 AB7
VCC_70 AC7

A17 VCC_7
A18 VCC_8
A20 VCC_9

B17 VCC_16
B18 VCC_17
B20 VCC_18

U0700

AA15 VCC_56
AA17 VCC_57
AA18 VCC_58
AA20 VCC_59
AB9 VCC_60
AC10 VCC_61

A14 VSS_4
A16 VSS_5
A19 VSS_6
A23 VSS_7
A26 VSS_8

8B5 9B8 48A5 48B3 64D6

(CPU CORE POWER)

=PP1V05_S0_CPU

7B5 7B6 7D5 9C8 11B3 11C5 64D6

(CPU IO POWER 1.05V)

VCCP_14 T6
VCCP_15 V21
VCCP_16 W21

VCCA=1.5 ONLY
VCCA B26

=PP1V5_S0_CPU

9D8 64C6

(CPU INTERNAL PLL POWER 1.5V)


VID0 AD6
VID1 AF5
VID2 AE5
VID3 AF4
VID4 AE3
VID5 AF2
VID6 AE2

CPU_VID<0>
CPU_VID<1>
CPU_VID<2>
CPU_VID<3>
CPU_VID<4>
CPU_VID<5>
CPU_VID<6>

OUT

9C3

OUT

9C3

OUT

9C3

OUT

9C3

OUT

9C3

OUT

9D3

OUT

9D3

VID FOR CPU POWER SUPPLY


IF NO USE, NEED PULL-UP OR
PULL-DOWN

8D7 9B8 48A5 48B3 64D6

R0802
100

1%
1/16W
MF-LF

AB10 VCC_62
AB12 VCC_63
AB14 VCC_64
AB15 VCC_65
AB17 VCC_66
AB18 VCC_67

=PPVCORE_S0_CPU

2 402

VCCSENSE AF7

CPU_VCCSENSE_P

OUT

58A4 58A5

VSSSENSE AE7

CPU_VCCSENSE_N

OUT

58A4 58A5

R0803

LAYOUT NOTE: CONNECT R0803


TO TP_VSSSENSE WITH NO
STUB.

100

1%
1/16W
MF-LF
2 402

LAYOUT NOTE:
CPU_VCCSENSE_P/CPU_VCCSENSE_N USE
ZO=27.4 OHM DIFFERNTIAL TRACE ROUTING.

LAYOUT NOTE:
PROVIDE A TEST POINT (WITH NO STUB)
TO CONNECT A DIFFERENCTIAL PROBE
BETWEEN VCCSENSE AND VSSSENSE AT THE
LOCATION WHERE THE TWO 54.9 OHM
RESISTORS TERMINATE THE 55 OHM
TRANSMISSION LINE

LAYOUT NOTE:
VCCSENSE AND VSSSENSE LINES
SHOULD BE OF EQUAL LENGTH

U0700 VSS_82
VSS_83
YONAH
CPU
BGA
(4 OF 4)

P6

P21
VSS_84 P24
VSS_85 R2
VSS_86 R5
VSS_87 R22
VSS_88 R25
VSS_89 T1

B6 VSS_9
B8 VSS_10
B11 VSS_11
B13 VSS_12
B16 VSS_13
B19 VSS_14

VSS_90 T4
VSS_91 T23
VSS_92 T26

B21 VSS_15
B24 VSS_16
C5 VSS_17
C8 VSS_18
C11 VSS_19

VSS_96 U24
VSS_97 V2
VSS_98 V5
VSS_99 V22
VSS_100 V25

C14 VSS_20
C16 VSS_21
C19 VSS_22

VSS_101 W1
VSS_102 W4
VSS_103 W23

C2 VSS_23
C22 VSS_24
C25 VSS_25
D1 VSS_26
D4 VSS_27

VSS_104 W26
VSS_105 Y3
VSS_106 Y6

D8 VSS_28
D11 VSS_29
D13 VSS_30

VSS_109 AA2
VSS_110 AA5
VSS_111 AA8

D16 VSS_31
D19 VSS_32
D23 VSS_33

VSS_112 AA11
VSS_113 AA14
VSS_114 AA16

D26 VSS_34
E3 VSS_35
E6 VSS_36

VSS_115 AA19
VSS_116 AA22
VSS_117 AA25

E8 VSS_37
E11 VSS_38
E14 VSS_39
E16 VSS_40
E19 VSS_41

VSS_118 AB1
VSS_119 AB4

E21 VSS_42
E24 VSS_43
F5 VSS_44

VSS_123 AB16
VSS_124 AB19
VSS_125 AB23

F8 VSS_45
F11 VSS_46
F13 VSS_47
F16 VSS_48
F19 VSS_49

VSS_126 AB26
VSS_127 AC3
VSS_128 AC6

F2 VSS_50
F22 VSS_51
F25 VSS_52

VSS_131 AC14
VSS_132 AC16
VSS_133 AC19

G4 VSS_53
G1 VSS_54
G23 VSS_55

VSS_134 AC21
VSS_135 AC24
VSS_136 AD2

G26 VSS_56
H3 VSS_57
H6 VSS_58

VSS_137 AD5
VSS_138 AD8
VSS_139 AD11

H21 VSS_59
H24 VSS_60
J2 VSS_61
J5 VSS_62
J22 VSS_63

VSS_140 AD13
VSS_141 AD16

J25 VSS_64
K1 VSS_65
K4 VSS_66

VSS_145 AE1
VSS_146 AE4
VSS_147 AE8

K23 VSS_67
K26 VSS_68
L3 VSS_69

VSS_148 AE11
VSS_149 AE14
VSS_150 AE16

L6 VSS_70
L21 VSS_71
L24 VSS_72
M2 VSS_73
M5 VSS_74

VSS_151 AE19
VSS_152 AE23

M22 VSS_75
M25 VSS_76
N1 VSS_77

VSS_156 AF8
VSS_157 AF11
VSS_158 AF13

N4 VSS_78
N23 VSS_79
N26 VSS_80
P3 VSS_81

VSS_159 AF16
VSS_160 AF19
VSS_161 AF21

VSS_93 U3
VSS_94 U6
VSS_95 U21

VSS_107 Y21
VSS_108 Y24

VSS_120 AB8
VSS_121 AB11
VSS_122 AB13

VSS_129 AC8
VSS_130 AC11

VSS_142 AD19
VSS_143 AD22
VSS_144 AD25

VSS_153 AE26
VSS_154 AF3
VSS_155 AF6

VSS_162 AF24

CPU 2 OF 2-PWR/GND

SYNC_MASTER=MASTER

SYNC_DATE=05/03/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

79

CPU CORE VID<> SETTINGS


VCCA DECOUPLING

(CPU INTERNAL PLL POWER 1.5V)


64C6 8B7

=PP1V5_S0_CPU

C0950 1

0.01uF

C0951
10UF

20%
2 6.3V
X5R
603

10%
16V
CERM 2
402

8B7

IN

CPU_VID<6>

8B7

IN

CPU_VID<5>

8B7

IN

CPU_VID<4>

8B7

IN

CPU_VID<3>

8B7

IN

CPU_VID<2>

8B7

IN

CPU_VID<1>

8B7

IN

CPU_VID<0>

R0921
1
5% 1/16W
R0922
1
5% 1/16W
R0923
1
5% 1/16W
R0924
1
5% 1/16W
R0925
1
5% 1/16W
R0926
1
5% 1/16W
R0927
1
5% 1/16W

2
0
MF-LF402
2
0
MF-LF402
2
0
MF-LF402
2
0
MF-LF402
2
0
MF-LF402
2
0
MF-LF402
2
0
MF-LF402

58C7 58A4

CPU_VID_R<6>

OUT

58C7 58A4

CPU_VID_R<5>

OUT

58C7 58A4

CPU_VID_R<4>

OUT

58C7 58A4

CPU_VID_R<3>

OUT

58C7 58A4

CPU_VID_R<2>

OUT

58C7 58A4

CPU_VID_R<1>

OUT

58C7 58A4

CPU_VID_R<0>

OUT

TABLE_ALT_HEAD

PART NUMBER

ALTERNATE FOR
PART NUMBER

BOM OPTION

138S0603

138S0602

REF DES

COMMENTS:

R0921~R0927 FOR CPU VOLTAGE MANUAL SETTING

TABLE_ALT_ITEM

ALL

USE SAMSUNG AND MURATA ONLY


TABLE_ALT_ITEM

138S0606

138S0602

ALL

USE TAIYO

VCCP CORE DECOUPLING

THIS 470UF FOR CPU,GMCH FSB BUS 1.05V

(CPU IO POWER 1.05V)


=PP1V05_S0_CPU
1
PLACE NEAR THE NORTH BRIDGE
0.1UF
ON BOTTOM SIDE
20%
2 10V
CERM
402
64D6 11C5 11B3 8C7 7D5 7B6 7B5

C0926

C0934
0.1UF

20%
2 10V
CERM
402

CRITICAL

1 C0936 1 C0937 1 C0938


C0935
0.1UF
0.1UF
0.1UF
0.1UF

20%
2 10V
CERM
402

20%
2 10V
CERM
402

20%
2 10V
CERM
402

C0940
470UF

20%
2 10V
CERM
402

20%
2 2.5V
TANT
D2T

VCC (CPU
CORE
DECOUPLING
CORE POWER)
64D6 48B3 48A5 8D7 8B5

CRITICAL

=PPVCORE_S0_CPU
1

PLACE NEAR THE CPU


ON BOTTOM SIDE

CRITICAL

CRITICAL

C0923
C0911
C0910
C0908
22UF
22UF
22UF
22UF
1

20%
6.3V
2 CERM-X5R
805

20%
6.3V
2 CERM-X5R
805

20%
6.3V
2 CERM-X5R
805

20%
6.3V
2 CERM-X5R
805

CRITICAL

CRITICAL

CRITICAL

CRITICAL

(10 PCS ON NORTH SIDE


10 PCS ON SOUTH SIDE)

CRITICAL

1 C0918 1 C0913 1 C0912


C0924
22UF
22UF
22UF
22UF

20%
2 6.3V
CERM-X5R
805

20%
2 6.3V
CERM-X5R
805

20%
2 6.3V
CERM-X5R
805

20%
2 6.3V
CERM-X5R
805

CRITICAL

C0901
22UF

20%
6.3V
2 CERM-X5R
805

CRITICAL

C0904
22UF

20%
2 6.3V
CERM-X5R
805

C0928
22UF

20%
6.3V
2 CERM-X5R
805

CRITICAL

CRITICAL

C0930
22UF

20%
2 6.3V
CERM-X5R
805

CRITICAL

20%
6.3V
2 CERM-X5R
805

20%
6.3V
2 CERM-X5R
805

20%
6.3V
2 CERM-X5R
805

CRITICAL

CRITICAL

CRITICAL

CRITICAL

1 C0931 1 C0939 1 C0920


C0902
22UF
22UF
22UF
22UF

20%
2 6.3V
CERM-X5R
805

20%
2 6.3V
CERM-X5R
805

20%
2 6.3V
CERM-X5R
805

MIN
VCCHFM 1.1625
VCCLFM TBD

SINGLE CORE
SV CPU

VCCHFM 1.1625
VCCLFM

DUAL CORE
LV CPU

VCCHFM
VCCLFM

1.0

ULV CPU

VCCHFM
VCCLFM

TBD

TYP

MAX
1.30
TBD

CRITICAL

C0900
C0909
C0907
C0929
22UF
22UF
22UF
22UF
1

20%
6.3V
2 CERM-X5R
805

CRITICAL

CRITICAL

DUAL CORE
SV CPU

1.30
TBD
1.1625
TBD

20%
2 6.3V
CERM-X5R
805

IF WE USE LOW ESL CAP,THEN WE CAN USE 20 PCS 22UF CAP

TBD
TBD

UNIT: V

# ALL PROCESSOR DEFAULT VCORE FOR INITIAL POWER UP IS 1.2V


# TWO PROCESSORS AT THE SAME FREQUENCY MAY HAVE DIFFERENT SETTING
WITH THE VID RANGE(VCORE VOLTAGE)!
# REFER TO YONAH PROCESSOR EMTS REV 1.0
CPU DECAPS & VID<>
# VCCHFM: VCORE AT HIGHEST FREQUENCY MODE
# VCCLFM: VCORE AT LOWEST FREQUENCY MODE

NOTICE OF PROPRIETARY PROPERTY

(2 PCS ON NORTH SIDE


2 PCS ON SOUTH SIDE)

NOSTUFF
CRITICAL
1

CRITICAL
1

C0941

470UF-8MOHM

20%
3 2 2.5V
POLY
D2T

CRITICAL
1

C0942

470UF-8MOHM

20%
2 2.5V
POLY
D2T

CRITICAL
1

C0943

470UF-8MOHM

20%
2 2.5V
POLY
D2T

CRITICAL
1

C0944

470UF-8MOHM

20%
2 2.5V
POLY
D2T

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

C0946

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

470UF-8MOHM

II NOT TO REPRODUCE OR COPY IT

20%
2 2.5V
POLY
D2T

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART


SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

79

CPU ZONE THERMAL SENSOR


64A6 49D3 49B3 =PP3V3_S0_THRM_SNR

C
LAYOUT NOTE:

LAYOUT NOTE:

ADD GND GUARD TRACE

ROUTE CPU_THERMD_P AND

FOR CPU_THERMD_P AND

CPU_THERMD_N ON SAME

CPU_THERMD_N

LAYER.

1
1

0.1UF
2

PLACEHOLDER ADT7461A

10 MIL TRACE

C1002

10 MIL SPACING

CRITICAL

10%
16V
X5R
402

R1005

R1006

10K

10K

5%
1/16W
MF-LF
2 402

5%
1/16W
MF-LF
2 402

VDD
ALERT*/
THM2*

R1001
OUT

7C6

CPU_THERMD_P

499
1

THRM_CPU_DX_P
THRM_CPU_DX_N

2
1%
1/16W
MF-LF
402

D+
D-

U1001

THM*

THRM_ALERT_L

THRM_ALERT

ADT7461
MSOP

(TO CPU INTERNAL THERMAL DIODE)

C1001

SCLK
SDATA

27C3

27B3

SMB_THRM_CLK
SMB_THRM_DATA

IO
IO

0.001uF

R1002
IN

7C6

CPU_THERMD_N

499

10%
50V
CERM
402

GND
5

1%
1/16W
MF-LF
402

PLACE U1001 NEAR THE U1200

CPU MISC1-TEMP SENSOR

SYNC_MASTER=ENET

SYNC_DATE=08/19/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

10

79

CPU ITP700FLEX DEBUG SUPPORT


C

64D6 11B3 9C8 8C7 7D5 7B6 7B5

=PP1V05_S0_CPU
ITP

CRITICAL

R1101 1R1103
54.9

1%
1/16W
MF-LF
2 402

J1102

54.9

F-ST-5047

1%
1/16W
MF-LF
2 402
ITP

SM1
7C6 7B8
7C6

R1102
7C6

IN

XDP_TDO

ITP

R1100
12C4 7D6

IN

FSB_CPURST_L

11B2 7C6 7A8

22.6 2
1%
1/16W
MF-LF
402

33D3 33D2

(FROM CK410M HOST 133/167MHZ)


33D3 33D2

7C6

IN
IN

IO

XDP_TRST_L

XDP_TCK
ITP_TDO

(TCK)

10

11

12

13

14

ITPRESET_L

15

16

XDP_BPM_L<3>

17

18

19

20

21

22

23

24

CPU_XDP_CLK_N
CPU_XDP_CLK_P

9C8 8C7 7D5 7B6 7B5


64D6 11C5

25

26

27

28

29

30

7C6 7B8

XDP_TMS

OUT

NC
NC

XDP_TCK

(FBO)

7C6

XDP_BPM_L<5>

7C6

XDP_BPM_L<4>

OUT
IO

IO

7C6

XDP_BPM_L<2>

IO

7C6

XDP_BPM_L<1>

IO

7C6

XDP_BPM_L<0>

IO

ITP

R1104

240

C1100

0.1UF

5%
1/16W
MF-LF
2 402

OUT

OUT

XDP_TDI

=PP1V05_S0_CPU

=PP3V3_S5_SB_PM

OUT

22.6 2
1%
1/16W
MF-LF
402

64A3 26C5 23D1

OUT

10%
2 16V
X5R
402
26C6 7C6

516S0416

XDP_DBRESET_L

(AND WITH RESET BUTTON)

(DBA#)

INDICATE THAT ITP IS USING TAP I/F, NC IN 945GM CHIPSET SYSTEM.

(DEBUG PORT ACTIVE)


(DBR#) TO ICH7M SYS_RST*, AND WITH SYSTEM RESET LOGIC
(DEBUG PORT RESET)

R1106

ITP TCK SIGNAL LAYOUT NOTE:


ROUTE THE TCK SIGNAL FROM ITP700FLEX CONNECTORS TCK PIN TO CPUS
TCK PIN AND THEN FORK BACK FROM CPU TCK PIN AND ROUTE BACK TO ITP700FLEX
CONNECTORS FBO PIN.

680
5%
1/16W
MF-LF
2 402

CPU ITP700FLEX DEBUG


SYNC_MASTER=MASTER

SYNC_DATE=5/23/05

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

11

79

7C4

IO

7C4

IO

7C4

IO

7C4

IO

7C4

IO

7C4

IO

7C4

IO

7C4

IO

7C4

IO

7C4

IO

7C4

IO

7C4

IO

7C4

IO

7C4

IO

7C4

IO

7C4

IO

7C4

IO

7B4

IO

7B4

IO

7B4

IO

7B4

IO

7B4

IO

7B4

IO

7B4

IO

7B4

IO

7B4

IO

IO

7B4

IO

7B4

IO

7C3

IO

7C3

IO

7C3

IO

7C3

IO

7C3

IO

7C3

IO
IO

7C3

IO

IO

7C3

IO

7C3

IO

7C3

1%
1/16W
MF-LF
402

R1221

24.9
1%
1/16W
MF-LF
402

IO
IO
IO

7B3

IO

7B3

IO

R1225

7B3

IO

221

7B3

IO

7B3

IO

7B3

IO

1%
1/16W
MF-LF
402

R1226

100

IO

7C3

7B3

IO

7C3

7C3

54.9

IO

7C3

7C3

IO

7C3

7C3

R1220 1

IO

7B4

7C3

64D6 33C8 33C7 33B8 19D7 12C2 12A7

IO

7B4

7B4

=PP1V05_S0_FSB_NB

IO

7C4

1%
1/16W
MF-LF
402

IO

7B3

IO

7B3

IO

7B3

IO

7B3

IO

C1226

7B3

IO

0.1uF

7B3

IO

10%
16V
X5R
402

7B3

IO

FSB_D_L<0>
FSB_D_L<1>
FSB_D_L<2>
FSB_D_L<3>
FSB_D_L<4>
FSB_D_L<5>
FSB_D_L<6>
FSB_D_L<7>
FSB_D_L<8>
FSB_D_L<9>
FSB_D_L<10>
FSB_D_L<11>
FSB_D_L<12>
FSB_D_L<13>
FSB_D_L<14>
FSB_D_L<15>
FSB_D_L<16>
FSB_D_L<17>
FSB_D_L<18>
FSB_D_L<19>
FSB_D_L<20>
FSB_D_L<21>
FSB_D_L<22>
FSB_D_L<23>
FSB_D_L<24>
FSB_D_L<25>
FSB_D_L<26>
FSB_D_L<27>
FSB_D_L<28>
FSB_D_L<29>
FSB_D_L<30>
FSB_D_L<31>
FSB_D_L<32>
FSB_D_L<33>
FSB_D_L<34>
FSB_D_L<35>
FSB_D_L<36>
FSB_D_L<37>
FSB_D_L<38>
FSB_D_L<39>
FSB_D_L<40>
FSB_D_L<41>
FSB_D_L<42>
FSB_D_L<43>
FSB_D_L<44>
FSB_D_L<45>
FSB_D_L<46>
FSB_D_L<47>
FSB_D_L<48>
FSB_D_L<49>
FSB_D_L<50>
FSB_D_L<51>
FSB_D_L<52>
FSB_D_L<53>
FSB_D_L<54>
FSB_D_L<55>
FSB_D_L<56>
FSB_D_L<57>
FSB_D_L<58>
FSB_D_L<59>
FSB_D_L<60>
FSB_D_L<61>
FSB_D_L<62>
FSB_D_L<63>

F1
J1
H1
J6
H3
K2
G1
G2
K9
K1
K7
J8
H4
J3
K11
G4
T10
W11
T3
U7
U9
U11
T11
W9
T1
T8
T4
W7
U5
T9
W6
T5
AB7
AA9
W4
W3
Y3
Y7
W5
Y10
AB8
W2
AA4
AA7
AA2
AA6
AA10
Y8
AA1
AB4
AC9
AB11
AC11
AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5
AD10
AD4
AC8

NB_FSB_XRCOMP
NB_FSB_XSCOMP
NB_FSB_XSWING

64D6 33C8 33C7 33B8 19D7 12C2 12B7

E1
E2
E4

NB_FSB_YRCOMP
NB_FSB_YSCOMP
NB_FSB_YSWING

=PP1V05_S0_FSB_NB

R1230

54.9
1%
1/16W
MF-LF
402

R1235
221

33D3 33D2

IN

33D3 33C2

IN

Y1
U1
W1

FSB_CLK_NB_P
FSB_CLK_NB_N

AG2
AG1

HD0*
HD1*
HD2*
HD3*
HD4*
HD5*
HD6*
HD7*
HD8*
HD9*
HD10*
HD11*
HD12*
HD13*
HD14*
HD15*
HD16*
HD17*
HD18*
HD19*
HD20*
HD21*
HD22*
HD23*
HD24*
HD25*
HD26*
HD27*
HD28*
HD29*
HD30*
HD31*
HD32*
HD33*
HD34*
HD35*
HD36*
HD37*
HD38*
HD39*
HD40*
HD41*
HD42*
HD43*
HD44*
HD45*
HD46*
HD47*
HD48*
HD49*
HD50*
HD51*
HD52*
HD53*
HD54*
HD55*
HD56*
HD57*
HD58*
HD59*
HD60*
HD61*
HD62*
HD63*
HXRCOMP
HXSCOMP
HXSWING
HYRCOMP
HYSCOMP
HYSWING
HCLKIN
HCLKIN*

LEMENU

U1200
945GM
NB
BGA

(1 OF 10)

HA3*
HA4*
HA5*
HA6*
HA7*
HA8*
HA9*
HA10*
HA11*
HA12*
HA13*
HA14*
HA15*
HA16*
HA17*
HA18*
HA19*
HA20*
HA21*
HA22*
HA23*
HA24*
HA25*
HA26*
HA27*
HA28*
HA29*
HA30*
HA31*

FSB_A_L<3>
FSB_A_L<4>
7D8 FSB_A_L<5>
7D8 FSB_A_L<6>
7D8 FSB_A_L<7>
7D8 FSB_A_L<8>
7D8 FSB_A_L<9>
7D8 FSB_A_L<10>
7D8 FSB_A_L<11>
7D8 FSB_A_L<12>
7D8 FSB_A_L<13>
7D8 FSB_A_L<14>
7D8 FSB_A_L<15>
7D8 FSB_A_L<16>
7C8 FSB_A_L<17>
7C8 FSB_A_L<18>
7C8 FSB_A_L<19>
7C8 FSB_A_L<20>
7C8 FSB_A_L<21>
7C8 FSB_A_L<22>
7C8 FSB_A_L<23>
7C8 FSB_A_L<24>
7C8 FSB_A_L<25>
7C8 FSB_A_L<26>
7C8 FSB_A_L<27>
7C8 FSB_A_L<28>
7C8 FSB_A_L<29>
7C8 FSB_A_L<30>
7C8 FSB_A_L<31>

H9

7D8

IO

C9

7D8

IO

E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14

FSB_ADS_L
FSB_ADSTB_L<0>
FSB_ADSTB_L<1>
NB_FSB_VREF
FSB_BNR_L
FSB_BPRI_L
FSB_BREQ0_L
FSB_CPURST_L
FSB_DBSY_L
FSB_DEFER_L
FSB_DPWR_L
FSB_DRDY_L

IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO

=PP1V05_S0_FSB_NB

IO

7D6

B9

7D8

C13

7C8

HDINV0*
HDINV1*
HDINV2*
HDINV3*

J7

7C4
7B4

IO

U3

7C3

IO

AB10

FSB_DINV_L<0>
FSB_DINV_L<1>
FSB_DINV_L<2>
7B3 FSB_DINV_L<3>

IO

W8

HDSTBN0*
HDSTBN1*
HDSTBN2*
HDSTBN3*

K4

7C4

AC4

FSB_DSTBN_L<0>
7B4 FSB_DSTBN_L<1>
7C3 FSB_DSTBN_L<2>
7B3 FSB_DSTBN_L<3>

HDSTBP0*
HDSTBP1*
HDSTBP2*
HDTSBP3*

K3

7C4

AC5

FSB_DSTBP_L<0>
7B4 FSB_DSTBP_L<1>
7C3 FSB_DSTBP_L<2>
7B3 FSB_DSTBP_L<3>

HHIT*
HHITM*
HLOCK*

D3

7D6

B3

FSB_HIT_L
7D6 FSB_HITM_L
7D6 FSB_LOCK_L

HREQ0*
HREQ1*
HREQ2*
HREQ3*
HREQ4*

D8

7D8

A8

FSB_REQ_L<0>
7D8 FSB_REQ_L<1>
7D8 FSB_REQ_L<2>
7D8 FSB_REQ_L<3>
7D8 FSB_REQ_L<4>

HRS0*
HRS1*
HRS2*

B4

7D6

D6

FSB_RS_L<0>
7D6 FSB_RS_L<1>
7D6 FSB_RS_L<2>

HSLPCPU*
HTRDY*

E3

7A3

F6

7D6

C7 7D6
B7
A7 7D6
C3

7D6

J9 7B3
H8 7D6

R1210
100

E8

C6 7D6

12A7 12B7 19D7 33B8 33C7 33C8 64D6

IO

HADS*
HADSTB0*
HADSTB1*
HAVREF
HBNR*
HBPRI*
HBREQ0*
HCPURST*
HDBSY*
HDEFER*
HDPWR*
HDRDY*
HDVREF

J13

IO

HOST

IO
IO
2

1%
1/16W
MF-LF
402

IO

IO
1

OUT
IO
OUT
IO

C1211

10%
16V
X5R
402

R1211
200

0.1uF
2
2

1%
1/16W
MF-LF
402

OUT
IO
IO

K13

T7
Y5

T6
AA5

D4

G8
B8
F8

E6

E7

FSB_SLPCPU_L
7D6 FSB_TRDY_L

IO
IO
IO
IO
IO

IO
IO
IO
IO

IO
IO
IO

IO
IO
IO
IO
IO

OUT
OUT
OUT

OUT
OUT

1%
1/16W
MF-LF
402

NB CPU Interface

SYNC_MASTER=NB

R1231

24.9
1%
1/16W
MF-LF
402

R1236

100

1%
1/16W
MF-LF
402

SYNC_DATE=07/25/2005

NOTICE OF PROPRIETARY PROPERTY

C1236

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

0.1uF
2

10%
16V
X5R
402

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

12

79

=PP1V5_S0_NB_PCIE
1

U1200

67A7

OUT
OUT

67B6

IO

67B6

IO

67A6

67B7

IO

OUT

67A7

IN

67A7

IN

67B2
67B2
6D6
6D6

67B2
67B2

OUT
OUT
OUT
OUT
OUT
OUT

67B2

OUT

67B2

OUT

67B2

OUT

67B2

OUT

6D6

OUT

6D6
6D6

6D6

OUT

6D6
6D6

OUT
OUT
OUT
OUT
OUT

TV-Out Signal Usage:


69B8

Composite: DACA only


S-Video:
DACB & DACC only
Component: DACA, DACB & DACC

69A8
69A8

69C8

Unused DAC outputs must remain powered, but can omit


filtering components. Unused DAC outputs should
connect to GND through 75-ohm resistors.

69B8
69A8
69A8

OUT
OUT
OUT
OUT
OUT
OUT
OUT

LVDS_BKLTCTL
LVDS_BKLTEN
LVDS_CLKCTLA
LVDS_CLKCTLB
LVDS_DDC_CLK
LVDS_DDC_DATA
LVDS_IBG
TP_LVDS_VBG
LVDS_VDDEN
LVDS_VREFH
LVDS_VREFL
LVDS_A_CLK_N
LVDS_A_CLK_P
LVDS_B_CLK_N
LVDS_B_CLK_P

EXP_A_COMPI

D40

BGA

EXP_A_COMPO

D38

EXP_A_RXN0
EXP_A_RXN1

F34

L_CLKCTLB
L_DDC_CLK
L_DDC_DATA

EXP_A_RXN2

H34

EXP_A_RXN3
EXP_A_RXN4

J38

EXP_A_RXN5
EXP_A_RXN6

M38

EXP_A_RXN7

P38

EXP_A_RXN8
EXP_A_RXN9

R34

L_BKLTCTL

J30
H30

L_BKLTEN
L_CLKCTLA

H29
G26
G25
B38
C35
F32
C33
C32

L_VDDEN
L_VREFH
L_VREFL

LA_CLK

EXP_A_RXN10

V34

E27

LB_CLK*
LB_CLK

EXP_A_RXN11
EXP_A_RXN12

W38

EXP_A_RXN13

AA38

EXP_A_RXN14
EXP_A_RXN15

AB34

E26

B35
A37

LA_DATA1*
LA_DATA2*

LVDS_A_DATA_P<0>
LVDS_A_DATA_P<1>
LVDS_A_DATA_P<2>

B37

LA_DATA0

B34

LA_DATA1

A36

LA_DATA2

LVDS_B_DATA_N<0>
LVDS_B_DATA_N<1>
LVDS_B_DATA_N<2>

G30
D30

LB_DATA0*
LB_DATA1*

F29

LB_DATA2*

69B8
69A8
69A8
69A8

CRT Disable
69A8

Tie R/R#/G/G#/B/B# and IREF to VCC Core rail, tie


HSYNC and VSYNC to GND. Tie VCCA_CRTDAC to VCC Core
rail, and tie VSSA_CRTDAC and VCC_SYNC to GND.

OUT
OUT
OUT
OUT
OUT
OUT

69D7

IO

69D7

IO

69C3

OUT

69C8
69C3

OUT
OUT

CRT_BLUE
CRT_BLUE_L
CRT_GREEN
CRT_GREEN_L
CRT_RED
CRT_RED_L
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC_R
CRT_IREF
CRT_VSYNC_R

T38

Y34

AC38

EXP_A_RXP1
EXP_A_RXP2

F38

EXP_A_RXP3

H38

EXP_A_RXP4
EXP_A_RXP5

J34

EXP_A_RXP6

M34

EXP_A_RXP7
EXP_A_RXP8

N38

EXP_A_RXP9
EXP_A_RXP10

R38

EXP_A_RXP11

V38

EXP_A_RXP12
EXP_A_RXP13

W34

EXP_A_RXP14

AA34

EXP_A_RXP15

AB38

PEG_D2R_P<0>
68B6 PEG_D2R_P<1>
6C6 PEG_D2R_P<2>
6C6 PEG_D2R_P<3>
6C6 PEG_D2R_P<4>
6C6 PEG_D2R_P<5>
6C6 PEG_D2R_P<6>
6C6 PEG_D2R_P<7>
6C6 PEG_D2R_P<8>
6C6 PEG_D2R_P<9>
6C6 PEG_D2R_P<10>
6C6 PEG_D2R_P<11>
6C6 PEG_D2R_P<12>
6C6 PEG_D2R_P<13>
6B6 PEG_D2R_P<14>
6B6 PEG_D2R_P<15>

EXP_A_TXN0
EXP_A_TXN1

F36

68C6

EXP_A_TXN2

H36

EXP_A_TXN3
EXP_A_TXN4

J40

EXP_A_TXN5
EXP_A_TXN6

M40

EXP_A_TXN7

P40

EXP_A_TXN8
EXP_A_TXN9

R36

EXP_A_TXN10

V36

EXP_A_TXN11
EXP_A_TXN12

W40

C25

CRT_DDC_CLK
CRT_DDC_DATA

G23

HSYNC

EXP_A_TXN13

AA40

J22

CRT_IREF
CRT_VSYNC

EXP_A_TXN14
EXP_A_TXN15

AB36

D29
F28

LB_DATA0
LB_DATA1
LB_DATA2

C18

TV_DACA_OUT
TV_DACB_OUT

A19

TV_DACC_OUT

A16

J20

TV_IREF

B16
B18

TV_IRTNA
TV_IRTNB

B19

TV_IRTNC

E23

CRT_BLUE

D23

CRT_BLUE*

C22

CRT_GREEN
CRT_GREEN*

B22
A21
B21
C26

H23

CRT_RED
CRT_RED*

G34

L38

P34

T34

Y38

IN
IN
IN

IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN

6C6

IN
IN
IN

IN
IN
IN
IN

IN
IN
IN
IN
IN
IN
IN

EXP_A_TXP0

D36

EXP_A_TXP1
EXP_A_TXP2

F40

EXP_A_TXP3

H40

EXP_A_TXP4
EXP_A_TXP5

J36

EXP_A_TXP6

M36

EXP_A_TXP7
EXP_A_TXP8

N40

EXP_A_TXP9
EXP_A_TXP10

R40
T36

EXP_A_TXP11

V40

EXP_A_TXP12
EXP_A_TXP13

W36

EXP_A_TXP14

AA36

EXP_A_TXP15

AB40

T40

Y36

G36

L40

P36

Y40

IN

68C6

N36

SDVO_TVCLKIN
SDVO_INT
SDVO_FLDSTALL

IN

AC40

L36

SDVO_TVCLKIN#
SDVO_INT#
SDVO_FLDSTALL#

IN

PEG_R2D_C_N<0>
68C6 PEG_R2D_C_N<1>
68B6 PEG_R2D_C_N<2>
68B6 PEG_R2D_C_N<3>
6B6 PEG_R2D_C_N<4>
6B6 PEG_R2D_C_N<5>
6B6 PEG_R2D_C_N<6>
6B6 PEG_R2D_C_N<7>
6B6 PEG_R2D_C_N<8>
6B6 PEG_R2D_C_N<9>
6B6 PEG_R2D_C_N<10>
6B6 PEG_R2D_C_N<11>
6B6 PEG_R2D_C_N<12>
6B6 PEG_R2D_C_N<13>
6B6 PEG_R2D_C_N<14>
6B6 PEG_R2D_C_N<15>

G40

1%
1/16W
MF-LF
402

SDVO Alternate Function


PEG_D2R_N<0>
68B6 PEG_D2R_N<1>
6D6 PEG_D2R_N<2>
6C6 PEG_D2R_N<3>
6C6 PEG_D2R_N<4>
6C6 PEG_D2R_N<5>
6C6 PEG_D2R_N<6>
6C6 PEG_D2R_N<7>
6C6 PEG_D2R_N<8>
6C6 PEG_D2R_N<9>
6C6 PEG_D2R_N<10>
6C6 PEG_D2R_N<11>
6C6 PEG_D2R_N<12>
6C6 PEG_D2R_N<13>
6C6 PEG_D2R_N<14>
6C6 PEG_D2R_N<15>
6D6

D34

F30

R1310

PEG_COMP

EXP_A_RXP0

VGA

69B8

N34

A32

TV-Out Disable
Tie DACx_OUT, IRTNx, and IREF to 1.5V power rail.
Tie VCCD_TVDAC, VCCD_QTVDAC, VCCA_TVDACx, and
VCCA_TVBG to 1.5V power rail. Tie VSSA_TVBG to GND.

L34

LA_CLK*

LA_DATA0*

TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC

G38

A33

C37

TV_DACA_OUT
TV_DACB_OUT
TV_DACC_OUT

(3 OF 10)

L_IBG
L_VBG

LVDS_A_DATA_N<0>
LVDS_A_DATA_N<1>
LVDS_A_DATA_N<2>

LVDS_B_DATA_P<0>
LVDS_B_DATA_P<1>
LVDS_B_DATA_P<2>

945GM
NB

D32

PCI-EXPRESS GRAPHICS

67A7

OUT

LVDS

67D7

TV

67C6

Can leave all signals NC if LVDS is not implemented


Tie VCC_TXLVDS and VCCA_LVDS to GND. If SDVO is used
VCCD_LVDS must remain powered with proper decoupling.
Otherwise, tie VCCD_LVDS to GND also.

19D7 64C6

24.9

LEMENU

LVDS Disable

PEG_R2D_C_P<0>
68C6 PEG_R2D_C_P<1>
68B6 PEG_R2D_C_P<2>
68B6 PEG_R2D_C_P<3>
6B6 PEG_R2D_C_P<4>
6B6 PEG_R2D_C_P<5>
6B6 PEG_R2D_C_P<6>
6B6 PEG_R2D_C_P<7>
6B6 PEG_R2D_C_P<8>
6B6 PEG_R2D_C_P<9>
6B6 PEG_R2D_C_P<10>
6B6 PEG_R2D_C_P<11>
6B6 PEG_R2D_C_P<12>
6B6 PEG_R2D_C_P<13>
6B6 PEG_R2D_C_P<14>
6B6 PEG_R2D_C_P<15>

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

SDVOB_RED#
SDVOB_GREEN#
SDVOB_BLUE#
SDVOB_CLKN
SDVOC_RED#
SDVOC_GREEN#
SDVOC_BLUE#
SDVOC_CLKN

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

SDVOB_RED
SDVOB_GREEN
SDVOB_BLUE
SDVOB_CLKP
SDVOC_RED
SDVOC_GREEN
SDVOC_BLUE
SDVOC_CLKP

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

NB PEG / Video Interfaces

SYNC_MASTER=NB

SYNC_DATE=07/25/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

13

79

R1440 1

10K

LEMENU

5%
1/16W
MF-LF
402

(D_PLLMON1#)
(D_PLLMON1)
(H_EDRDY#)
(H_PCREQ#)
(H_PLLMON1#)
(H_PLLMON1)
(H_PROCHOT#)
(TESTIN#)
(TV_DCONSEL0)
(TV_DCONSEL1)
(VSS_MCHDETECT)
(LA_DATAN3)
(LA_DATAP3)
(LB_DATAN3)
(LB_DATAP3)

NC
NC
NC
NC
NC
NC

IN

33B7 IN
33B7

IN

6D4

IN

6D4

IN

20C7

IN

6D4

IN

20C7

IN

6D4

IN

20B7

IN

6D4

IN

6D4

IN

6D4 IN

=PP3V3_S0_NB
NOSTUFF1

R1420 1

R1421

58D8 23C3

IN

IN

10K

10K

5%
1/16W
MF-LF
402 2

5%
1/16W
MF-LF
402 2

PM_EXTTS_L<0>

IN

IN

6D4

IN

6D4

IN

20C5

IN

6D4

IN

20B5

IN

20B5

IN

20A5

IN

23C5

OUT

R1422
1

PM_DPRSLPVR

R1430
26C1

6D4

NB_RST_IN_L

100

5%
1/16W
MF-LF
402

46B3 21C2 7C6


58C7 26B5

OUT
IN

5%
1/16W
MF-LF
402

68A6
68A6

IO
IO

22A6

OUT

32B4

OUT

945GM
NB

SM_CK0

AY35

R32

RSVD2
RSVD3

BGA

SM_CK1
SM_CK2

AR1

(2 OF 10)

SM_CK3

AW40

MEM_CLK_P<0>
28A4 MEM_CLK_P<1>
29A4 MEM_CLK_P<2>
29D4 MEM_CLK_P<3>

SM_CK0*
SM_CK1*

AW35

28D4

SM_CK2*

AY7

SM_CK3*

AY40

RSVD4
RSVD5

AF11

RSVD6

H7

RSVD7
RSVD8

F7

J19
K30

RSVD9

A41

RSVD10
RSVD11

TP_NB_XOR_LVDS_A35
TP_NB_XOR_LVDS_A34
TP_NB_XOR_LVDS_D28
TP_NB_XOR_LVDS_D27

A35

RSVD12

A34

RSVD13
RSVD14

D27

RSVD15

NB_BSEL<0>
NB_BSEL<1>
NB_BSEL<2>
NB_CFG<3>
NB_CFG<4>
NB_CFG<5>
NB_CFG<6>
NB_CFG<7>
NB_CFG<8>
NB_CFG<9>
NB_CFG<10>
NB_CFG<11>
NB_CFG<12>
NB_CFG<13>
NB_CFG<14>
NB_CFG<15>
NB_CFG<16>
NB_CFG<17>
NB_CFG<18>
NB_CFG<19>
NB_CFG<20>

K16
K18

CFG0
CFG1

J18

CFG2

F18

CFG3
CFG4

PM_BMBUSY_L

J29

D28

E15
F15

CFG5

E18
D19

CFG6
CFG7

D16

CFG8

G16

CFG9
CFG10

E16

PM_DPRSLPVR_R
PM_THRMTRIP_L
VR_PWRGOOD_DELAY
NB_RST_IN_L_R

IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPD
IPD
IPD

G15

CFG11
CFG12

K15

CFG13

C15
H16

CFG14
CFG15

G18

CFG16

H15
J25

CFG17
CFG18

K27

CFG19

J26

CFG20

G28

PM_BM_BUSY*

F25

PM_EXTTS0*

H26

PM_EXTTS1*
PW_THRMTRIP*

D15

G6

28D4

AW7

MEM_CLK_N<0>
28A4 MEM_CLK_N<1>
29A4 MEM_CLK_N<2>
29D4 MEM_CLK_N<3>

AT1

SM_CKE0
SM_CKE1

AU20

SM_CKE2

BA29

SM_CKE3

AY29

30D6
28C6
30D6
28C4

MEM_CKE<0>
MEM_CKE<1>
30D6
29C6 MEM_CKE<2>
30D6
29C4 MEM_CKE<3>

AT20

SM_CS0*
SM_CS1*

AW13

SM_CS2*
SM_CS3*

AY21

SMOCDCOMP0

AL20

SMOCDCOMP1

AF10

30D6
28B4
30D6
28B6

MEM_CS_L<0>
MEM_CS_L<1>
30D6
29B4 MEM_CS_L<2>
30D6
29B6 MEM_CS_L<3>

AW12

AW21

BA13

SM_ODT1
SM_ODT2

BA12
AY20

30D6
29B4

SM_ODT3

AU21

SMVREF0

AK1

SMVREF1

AK41

MEM_ODT<0>
MEM_ODT<1>
MEM_ODT<2>
30D6
29B6 MEM_ODT<3>

DMI_RXN0

AE35

22D2

DMI_RXN1
DMI_RXN2

AF39

DMI_RXN3

AH39

DMI_S2N_N<0>
22D2 DMI_S2N_N<1>
22D2 DMI_S2N_N<2>
22D2 DMI_S2N_N<3>

33C4
33C2
33C2
33B3

AG33
A27
A26

D_REFSSCLKIN*
D_REFSSCLKIN

C40

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

1
OUT

R1410

OUT

80.6

OUT
OUT

AG35

IN

C1415

IN

0.1uF

IN

IN

RSTIN*

DMI_RXP1
DMI_RXP2

AE39

IN

DMI_RXP3

AG39

DMI_TXN0

AE37

22D2

DMI_TXN1
DMI_TXN2

AF41

DMI_TXN3

AH41

DMI_N2S_N<0>
22D2 DMI_N2S_N<1>
22D2 DMI_N2S_N<2>
22D2 DMI_N2S_N<3>
22D2

CLK_REQ*

D1

NC0

AG37

C41

NC1

C1

DMI_TXP0
DMI_TXP1

AC37

BA41

NC2
NC3

BA40

NC4

DMI_TXP2

AF37

BA39

DMI_TXP3

BA3

NC5
NC6

AG41

BA2

NC7

BA1

NC8
NC9

B41

AY41

NC10
NC11

AY1

NC12

AW41
AW1

NC13
NC14

A40

NC15

A4
A39

NC16
NC17

A3

NC18

B2

DMI_N2S_P<0>
22D2 DMI_N2S_P<1>
22D2 DMI_N2S_P<2>
22D2 DMI_N2S_P<3>

AE41

C1416
0.1uF
20%
10V
CERM
402

IN

R1411
80.6

1%
1/16W
MF-LF
2 402

IN

AH34

H32

IN

IN

DMI_S2N_P<0>
DMI_S2N_P<1>
22D2 DMI_S2N_P<2>
22D2 DMI_S2N_P<3>

ICH_SYNC*

MEM_VREF_NB_0
MEM_VREF_NB_1

IN

22D2

K28

IN

22D2

H27

1%
1/16W
MF-LF
402

IN

AC35

SDVO_CTRLCLK
SDVO_CTRLDATA

16B6 19D7 28D2 29D2 61C2 64C6

IN

DMI_RXP0

AF35

20%
10V
CERM
402

IN

PWROK

H28

19C6

AF33

D_REFCLKIN

OUT

19C7

33C4
33B2

D41

G_CLKIN
D_REFCLKIN*

OUT

MEM_RCOMP_L
MEM_RCOMP

AT9

NB_CLK100M_GCLKIN_N
NB_CLK100M_GCLKIN_P
NB_CLK_DREFCLKIN_N
33C2
33B3 NB_CLK_DREFCLKIN_P
33C2
33A4 NB_CLK_DREFSSCLKIN_N
33C2
33A3 NB_CLK_DREFSSCLKIN_P

G_CLKIN*

OUT

=PP1V8_S3_MEM_NB

SM_ODT0

AV9

OUT

NC
NC
30D6
28B4
30D6
28B6

SMRCOMP*
SMRCOMP

OUT

AH33

SDVO_CTRLCLK
SDVO_CTRLDATA
NB_SB_SYNC_L
CLK_NB_OE_L
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

RSVD1

AG11

NC

33C7

T32

F3

TP_NB_XOR_FSB2_H7
TP_NB_TESTIN_L
NB_TV_DCONSEL0
NB_TV_DCONSEL1

U1200

RSVD

DDR MUXING

CFG

45B8 6B2

R1441

CLK

5%
1/16W
MF-LF
402

PM

10K

64A6 20B4 20A4 19C7 14D6

=PP3V3_S0_NB

MISC
DMI

64A6 20B4 20A4 19C7 14C7

IN
IN
OUT
OUT
OUT
OUT

OUT
OUT
OUT
OUT

NC

NB Misc Interfaces

SYNC_MASTER=NB

SYNC_DATE=08/15/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

14

79

LEMENU

IO

28D6

IO

28D4

IO

28D4

IO

28D6
28D6
28D6
28D6
28D4

IO
IO
IO
IO
IO

28D4

IO

28D6

IO

28D4

IO

28D4

IO

28C4
28C6
28C4
28C6
28C6
28C4
28C6
28C4
28D6

IO
IO
IO
IO
IO
IO
IO
IO
IO

28C6

IO

28C4

IO

28C6

IO

28C4
28D4
28C4

IO
IO
IO

28C6

IO

28B6

IO

28B4

IO

28B4

IO

28B4
28B4
28B6
28B6
28B6

IO
IO
IO
IO
IO

28B4

IO

28B6

IO

28A4
28A6

IO

IO
IO

28B6

IO

28B4

IO

28A4

IO

28A6

IO

28A6

IO

28A6

IO

28A4

IO

28A4

IO

28A6

IO

28A4

IO

28A4

IO

28A6

IO

28A6

IO

28A6

IO

28A6

IO

28A4

IO

28A4

IO

28A4

IO

28A4
28A6

IO
IO

AJ35
AJ34
AM31

SA_DQ0
SA_DQ1
SA_DQ2

AJ36

SA_DQ3
SA_DQ4

AK35

SA_DQ5

AM33

AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23

BGA

30C6
28B6

AV14

30C6
28B4

BA20

MEM_A_BS<0>
MEM_A_BS<1>
30C6
28C6 MEM_A_BS<2>

AY13

30B6
28B6

SA_CAS*

SA_DM2

AL26
AN22

SA_DQ8

SA_DM3
SA_DM4

AM14

SA_DQ9
SA_DQ10

SA_DM5

AL9
AR3

SA_DQ11

SA_DM6
SA_DM7

SA_DQ12
SA_DQ13

AH4

SA_DQS0

AK33

SA_DQ14
SA_DQ15

SA_DQS1

AT33
AN28

SA_DQ16

SA_DQS2
SA_DQS3
SA_DQS4

AN12

SA_DQS5
SA_DQS6

AN8

SA_DQS7

AG5

SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24

AN20

SA_DQ27

AP24

SA_DQ28
SA_DQ29

AP20

SA_DQ30

SA_DQS0*
SA_DQS1*
SA_DQS2*
SA_DQS3*

AK32
AU33
AN27
AM21

SA_DQS4*

AM12

SA_DQS5*
SA_DQS6*

AL8

SA_DQS7*

AH5

AN3

AY16

SA_MA1

AU14

SA_MA2
SA_MA3

AW16

SA_MA4
SA_MA5

BA17

SA_DQ36
SA_DQ37

SA_MA6

AV17
AU17

SA_DQ38

SA_MA7
SA_MA8
SA_MA9

AT16

AK9

SA_DQ39
SA_DQ40
SA_DQ41

SA_MA10
SA_MA11

AU13

AN7

SA_MA12

AV20

SA_MA13

AV12

AR12

SA_DQ31
SA_DQ32

AR14

SA_DQ33

AP13

SA_DQ34
SA_DQ35

AP12
AT13
AT12
AL14
AL12

AK8
AK7

SA_DQ42
SA_DQ43

AP9

SA_DQ44

AN9

SA_DQ45
SA_DQ46

AT5

SA_RAS*
SA_RCVENIN*

AW17

AT17

30B6
28B4

AW14
AK23

29D6

IO

OUT
OUT
OUT
OUT
OUT
OUT

IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO

MEM_A_A<0>
30C6
28B6 MEM_A_A<1>
30C6
28B4 MEM_A_A<2>
30C6
28B6 MEM_A_A<3>
30C6
28B4 MEM_A_A<4>
30C6
28B6 MEM_A_A<5>
30C6
28C4 MEM_A_A<6>
30C6
28C4 MEM_A_A<7>
30C6
28C6 MEM_A_A<8>
30C6
28C6 MEM_A_A<9>
30C6
28B6 MEM_A_A<10>
30C6
28C4 MEM_A_A<11>
30C6
28C6 MEM_A_A<12>
30C6
28B4 MEM_A_A<13>

AU16

OUT

OUT

30C6
28B4

BA16

IO

OUT

MEM_A_DQS_P<0>
28D6 MEM_A_DQS_P<1>
28C4 MEM_A_DQS_P<2>
28C6 MEM_A_DQS_P<3>
28B6 MEM_A_DQS_P<4>
28B4 MEM_A_DQS_P<5>
28A4 MEM_A_DQS_P<6>
28A6 MEM_A_DQS_P<7>
28D6 MEM_A_DQS_N<0>
28D6 MEM_A_DQS_N<1>
28C4 MEM_A_DQS_N<2>
28C6 MEM_A_DQS_N<3>
28B6 MEM_A_DQS_N<4>
28B4 MEM_A_DQS_N<5>
28A4 MEM_A_DQS_N<6>
28A6 MEM_A_DQS_N<7>

AP3

29D4

OUT

28D6

AM22

SA_MA0

AT21

MEM_A_CAS_L
28D4 MEM_A_DM<0>
28D4 MEM_A_DM<1>
28C6 MEM_A_DM<2>
28C4 MEM_A_DM<3>
28B4 MEM_A_DM<4>
28B6 MEM_A_DM<5>
28A6 MEM_A_DM<6>
28A4 MEM_A_DM<7>

AM35

OUT

OUT

(4 OF 10)

SA_DQ6
SA_DQ7

AP21

AL23

SA_BS1
SA_BS2

AU12

AJ33

SA_DQ25
SA_DQ26

AL22

SA_BS0

SA_DM0
SA_DM1

SA_DQ17
SA_DQ18

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

MEM_A_RAS_L

OUT

NC
NC

29D6

IO

29D6

IO

29D4

IO

29D6

IO

29D4
29D4
29D6
29D4
29D6
29D4

IO
IO
IO
IO
IO
IO

29D6

IO

29D6

IO

29D4

IO

29D4

IO

29C4
29C6
29C6
29C4
29C6
29C4
29C6
29C4
29C4

IO
IO
IO
IO
IO
IO
IO
IO
IO

29C4

IO

29C4

IO

29C6

IO

29C4

IO

29C6

IO

29C6

IO

29C6

IO

29A6

IO

29A4

IO

29A6

IO

29A4
29A4
29A6
29A6
29A4

IO
IO
IO
IO
IO

29A4

IO

29A6

IO

29A4
29A6

IO
IO

29A6

IO

29A6

IO

29A4

IO

29A4

IO

29B4

IO

29A6

IO

AY2

SA_DQ47
SA_DQ48

AW2

SA_DQ49

AP1

29B6

IO

AN2

SA_DQ50
SA_DQ51

29A4

IO

AV2

SA_DQ52

29A6

IO

AT3

29B4

IO

AN1

SA_DQ53
SA_DQ54

29A4

IO

AL2

SA_DQ55

29B6

IO

AG7

SA_DQ56
SA_DQ57

29B4

IO

29B6

IO

SA_DQ58
SA_DQ59

29B6

IO

AF6

29B4

IO

AG9

SA_DQ60

29B6

IO

AH6

SA_DQ61
SA_DQ62

29B4

IO

AF4
AF8

SA_DQ63

29B4

AL5

AF9
AG4

U1200

945GM
NB

SA_RCVENOUT*

AK24

SA_WE*

AY14

30B6
28B6

MEM_A_WE_L

OUT

29B6

IO
IO

MEM_B_DQ<0>
MEM_B_DQ<1>
MEM_B_DQ<2>
MEM_B_DQ<3>
MEM_B_DQ<4>
MEM_B_DQ<5>
MEM_B_DQ<6>
MEM_B_DQ<7>
MEM_B_DQ<8>
MEM_B_DQ<9>
MEM_B_DQ<10>
MEM_B_DQ<11>
MEM_B_DQ<12>
MEM_B_DQ<13>
MEM_B_DQ<14>
MEM_B_DQ<15>
MEM_B_DQ<16>
MEM_B_DQ<17>
MEM_B_DQ<18>
MEM_B_DQ<19>
MEM_B_DQ<20>
MEM_B_DQ<21>
MEM_B_DQ<22>
MEM_B_DQ<23>
MEM_B_DQ<24>
MEM_B_DQ<25>
MEM_B_DQ<26>
MEM_B_DQ<27>
MEM_B_DQ<28>
MEM_B_DQ<29>
MEM_B_DQ<30>
MEM_B_DQ<31>
MEM_B_DQ<32>
MEM_B_DQ<33>
MEM_B_DQ<34>
MEM_B_DQ<35>
MEM_B_DQ<36>
MEM_B_DQ<37>
MEM_B_DQ<38>
MEM_B_DQ<39>
MEM_B_DQ<40>
MEM_B_DQ<41>
MEM_B_DQ<42>
MEM_B_DQ<43>
MEM_B_DQ<44>
MEM_B_DQ<45>
MEM_B_DQ<46>
MEM_B_DQ<47>
MEM_B_DQ<48>
MEM_B_DQ<49>
MEM_B_DQ<50>
MEM_B_DQ<51>
MEM_B_DQ<52>
MEM_B_DQ<53>
MEM_B_DQ<54>
MEM_B_DQ<55>
MEM_B_DQ<56>
MEM_B_DQ<57>
MEM_B_DQ<58>
MEM_B_DQ<59>
MEM_B_DQ<60>
MEM_B_DQ<61>
MEM_B_DQ<62>
MEM_B_DQ<63>

AY28

30A6
29B6
30A6
29B4
30A6
29C6

SB_CAS*

AR24

30A6
29B6

SB_DM0
SB_DM1

AK36

SB_DQ6
SB_DQ7

SB_DM2

AT36
BA31

SB_DQ8

SB_DM3
SB_DM4

SB_DQ9
SB_DQ10

SB_DM5

AH8
BA5

SB_DQ11

SB_DM6
SB_DM7

AK39

SB_DQ0

AJ37

SB_DQ1
SB_DQ2

AP39

AJ38

SB_DQ3
SB_DQ4

AK38

SB_DQ5

AR41

AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40

945GM
NB
BGA

SB_BS0

AT24

SB_BS1
SB_BS2

AV23

MEM_B_BS<0>
MEM_B_BS<1>
MEM_B_BS<2>

OUT
OUT
OUT

(5 OF 10)

AN4

MEM_B_CAS_L
29D4 MEM_B_DM<0>
29D4 MEM_B_DM<1>
29C4 MEM_B_DM<2>
29C6 MEM_B_DM<3>
29A4 MEM_B_DM<4>
29A6 MEM_B_DM<5>
29A6 MEM_B_DM<6>
29B4 MEM_B_DM<7>

SB_DQS0

AM39

29D6

SB_DQ14
SB_DQ15

SB_DQS1

AT39
AU35

SB_DQ16

SB_DQS2
SB_DQS3
SB_DQS4

AR16

SB_DQS5
SB_DQS6

AR10

SB_DQS7

AN5

SB_DQ12
SB_DQ13

AR38

AL17

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

SB_DQS0*
SB_DQS1*

AM40

SB_DQS2*
SB_DQS3*

AT35

SB_DQS4*

AP16

SB_DQS5*
SB_DQS6*

AT10

SB_DQS7*

AP5

MEM_B_DQS_P<0>
29D6 MEM_B_DQS_P<1>
29C6 MEM_B_DQS_P<2>
29C4 MEM_B_DQS_P<3>
29A6 MEM_B_DQS_P<4>
29A4 MEM_B_DQS_P<5>
29A4 MEM_B_DQS_P<6>
29B6 MEM_B_DQS_P<7>
29D6 MEM_B_DQS_N<0>
29D6 MEM_B_DQS_N<1>
29C6 MEM_B_DQS_N<2>
29C4 MEM_B_DQS_N<3>
29A6 MEM_B_DQS_N<4>
29A4 MEM_B_DQS_N<5>
29B4 MEM_B_DQS_N<6>
29B6 MEM_B_DQS_N<7>

SB_MA0

AY23

30B5
29B4

SB_MA1

AW24

SB_MA2
SB_MA3

AY24

SB_MA4
SB_MA5

AT27

SB_DQ36
SB_DQ37

SB_MA6

AU27
AV28

SB_DQ38

SB_MA7
SB_MA8
SB_MA9

AW27

AJ11

SB_DQ39
SB_DQ40
SB_DQ41

SB_MA10
SB_MA11

AV24

AH10

SB_MA12

AY27

SB_MA13

AR23

MEM_B_A<0>
30B5
29B6 MEM_B_A<1>
30B5
29B4 MEM_B_A<2>
30B5
29B6 MEM_B_A<3>
30B5
29B4 MEM_B_A<4>
30B5
29B6 MEM_B_A<5>
30B5
29C4 MEM_B_A<6>
30B5
29C4 MEM_B_A<7>
30B5
29C6 MEM_B_A<8>
30B5
29C6 MEM_B_A<9>
30B5
29B6 MEM_B_A<10>
30A5
29C4 MEM_B_A<11>
30A5
29C6 MEM_B_A<12>
30A5
29B4 MEM_B_A<13>

SB_RAS*
SB_RCVENIN*

AU23

30A6
29B4

MEM_B_RAS_L
TP_SB_RCVENIN_L

SB_RCVENOUT*

AK18

SB_WE*

AR27

30A6
29B6

MEM_B_WE_L

AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33

SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24

AT31

SB_DQ25
SB_DQ26

AU29

SB_DQ27

BA33

AW31

SB_DQ28
SB_DQ29

AV29

SB_DQ30

AU31

AW29
AM19

SB_DQ31
SB_DQ32

AL19

SB_DQ33

AP14

SB_DQ34
SB_DQ35

AN14
AN17
AM16
AP15
AL15

AJ9
AN10

SB_DQ42
SB_DQ43

AK13

SB_DQ44

AH11

SB_DQ45
SB_DQ46

AK10

BA10

SB_DQ47
SB_DQ48

AW10

SB_DQ49

BA4
AW4

SB_DQ50
SB_DQ51

AY10

SB_DQ52

AY9
AW5

SB_DQ53
SB_DQ54

AY5

SB_DQ55

AV4

SB_DQ56
SB_DQ57

AJ8

AR5

AK3

SB_DQ58
SB_DQ59

AT4

SB_DQ60

AK5
AJ5

SB_DQ61
SB_DQ62

AJ3

SB_DQ63

AK4

DDR SYSTEM MEMORY B

28D6

28D6

IO

MEM_A_DQ<0>
MEM_A_DQ<1>
MEM_A_DQ<2>
MEM_A_DQ<3>
MEM_A_DQ<4>
MEM_A_DQ<5>
MEM_A_DQ<6>
MEM_A_DQ<7>
MEM_A_DQ<8>
MEM_A_DQ<9>
MEM_A_DQ<10>
MEM_A_DQ<11>
MEM_A_DQ<12>
MEM_A_DQ<13>
MEM_A_DQ<14>
MEM_A_DQ<15>
MEM_A_DQ<16>
MEM_A_DQ<17>
MEM_A_DQ<18>
MEM_A_DQ<19>
MEM_A_DQ<20>
MEM_A_DQ<21>
MEM_A_DQ<22>
MEM_A_DQ<23>
MEM_A_DQ<24>
MEM_A_DQ<25>
MEM_A_DQ<26>
MEM_A_DQ<27>
MEM_A_DQ<28>
MEM_A_DQ<29>
MEM_A_DQ<30>
MEM_A_DQ<31>
MEM_A_DQ<32>
MEM_A_DQ<33>
MEM_A_DQ<34>
MEM_A_DQ<35>
MEM_A_DQ<36>
MEM_A_DQ<37>
MEM_A_DQ<38>
MEM_A_DQ<39>
MEM_A_DQ<40>
MEM_A_DQ<41>
MEM_A_DQ<42>
MEM_A_DQ<43>
MEM_A_DQ<44>
MEM_A_DQ<45>
MEM_A_DQ<46>
MEM_A_DQ<47>
MEM_A_DQ<48>
MEM_A_DQ<49>
MEM_A_DQ<50>
MEM_A_DQ<51>
MEM_A_DQ<52>
MEM_A_DQ<53>
MEM_A_DQ<54>
MEM_A_DQ<55>
MEM_A_DQ<56>
MEM_A_DQ<57>
MEM_A_DQ<58>
MEM_A_DQ<59>
MEM_A_DQ<60>
MEM_A_DQ<61>
MEM_A_DQ<62>
MEM_A_DQ<63>

DDR SYSTEM MEMORY A

28D4

IO

LEMENU

U1200
28D4

AR29

AR7

AU39

AP29

AT7

AR28

AT28

AV27

BA27

AK16

IO
IO
IO
IO
IO
IO
IO
IO
IO

IO
IO
IO
IO
IO
IO
IO

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

OUT

NC

OUT

NB DDR2 Interfaces

SYNC_MASTER=NB

SYNC_DATE=07/25/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

15

79

NCTF balls are Not Critical To Function

=PPVCORE_S0_NB
AD27
AC27
AB27
AA27

VCC_NCTF4

W27
V27

VCC_NCTF5
VCC_NCTF6

U27

VCC_NCTF7

T27

VCC_NCTF8
VCC_NCTF9

AD26

VCC_NCTF10

AC26

VCC_NCTF11
VCC_NCTF12

AB26
AA26

L16

N16

M16

VCC_109
VCC_110

M17

VCC_SM61

VCC_SM62
VCC_SM63

VCC_SM64

VCC_SM65
VCC_SM66

VCC_SM67
VCC_SM68

VCC_SM69

VCC_SM70
VCC_SM71

VCC_SM72

VCC_SM73
VCC_SM74

VCC_SM75

VCC_SM76
VCC_SM77

VCC_SM78
VCC_SM79

VCC_SM80

VCC_SM81
VCC_SM82

VCC_SM83

VCC_SM84
VCC_SM85

VCC_SM86

VCC_SM87
VCC_SM88

VCC_SM89
VCC_SM90

VCC_SM91

VCC_SM92
VCC_SM93

VCC_SM94

VCC_SM95
VCC_SM96

VCC_SM97

VCC_SM98
VCC_SM99

VCC_SM100
VCC_SM101

VCC_SM102

VCC_SM103
VCC_SM104

VCC_SM105

VCC_SM106
VCC_SM107

AU19

AT19

AP19

AK19

AJ18

AH17

AJ16

BA15

AY15

AV15

AU15

AR15

AJ14

AJ13

AK12

AJ12

AG12

AK11

AY8

AV8

AT8

AP8

BA6

AW6

AV6

AR6

AN6

AL6

AJ6

AV1

AJ1

VCC_SM59
VCC_SM60
AW19

AK6

VCC_SM58
AY19

10%
6.3V
CERM-X5R
402

AP6

VCC_SM56
VCC_SM57
AK20

=PP1V8_S3_MEM_NB

AT6

VCC_SM54
VCC_SM55
AJ22

AY6

VCC_SM53
AK22

AR8

VCC_SM51
VCC_SM52
AR22

AW8

VCC_SM50
AT22

BA8

VCC_SM48
VCC_SM49
AV22

AH12

VCC_SM47
AW22

AH13

VCC_SM45
VCC_SM46
BA22

AJ15

VCC_SM43
VCC_SM44
BA23

AT15

VCC_SM42
AH24

AW15

VCC_SM40
VCC_SM41
AH25

AH16

VCC_SM39
AJ25

AJ17

VCC_SM37
VCC_SM38
AJ26

AJ19

VCC_SM36
AR26

10%
6.3V
CERM-X5R
402

AR19

VCC_SM34
VCC_SM35
AU26

0.47UF

10%
6.3V
CERM-X5R
402

AV19

VCC_SM32
VCC_SM33
AW26

0.47UF

BA19

VCC_SM31
AY26

C1613

AK21

VCC_SM29
VCC_SM30
AH27

28D2 19D7 14C2


64C6 61C2 29D2

AP22

VCC_SM28
AJ27

AU22

VCC_SM26
VCC_SM27
AJ28

AY22

VCC_SM25
AH29

C1615
0.47UF

C1614

AJ23

VCC_SM23
VCC_SM24
AK29

AJ24

VCC_SM21
VCC_SM22
AM29

AH26

VCC_SM20
AM30

AT26

VCC_SM18
VCC_SM19
AP30

AV26

VCC_SM17
AR30

BA26

VCC_SM15
VCC_SM16
AU30

AH28

VCC_SM14
AV30

AJ29

VCC_SM12
VCC_SM13
AY30

AL29

VCC_SM10
VCC_SM11
AR34

AN30

VCC_SM9
AT34

AT30

VCC_SM7
VCC_SM8
AV34

AW30

VCC_SM6
AW34

BA30

VCC_SM4
VCC_SM5

AU34

VCC_SM3

BA34

AY34

VCC_108

P17

L18

N17

VCC_106
VCC_107

VCC_105

N18

L19

M18

VCC_103
VCC_104

VCC_102

N19

Y19

AA19

AB19

M19

VCC_100
VCC_101

VCC_98
VCC_99

VCC_97

M20

N20

L20

VCC_95
VCC_96

VCC_94

W20

Y20

P20

VCC_92
VCC_93

VCC_91

AC20

L21

M21

N21

AB20

VCC_89
VCC_90

VCC_87
VCC_88

VCC_86

AA21

AC21

W21

VCC_84
VCC_85

VCC_83

M22

N22

L22

VCC_81
VCC_82

VCC_80

W22

P22

VCC_78
VCC_79

AB22

AC22

L23

M23

N23

Y22

VCC_76
VCC_77

VCC_75

VCC_73
VCC_74

VCC_72

Y23

AA23

P23

VCC_70
VCC_71

VCC_69

M24

AB23

VCC_67
VCC_68

P24

L25

M25

N25

L26

N26

P26

L27

N24

VCC_65
VCC_66

VCC_64

VCC_62
VCC_63

VCC_61

VCC_59
VCC_60

VCC_58

N27

M27

VCC_56
VCC_57

L28

M28

P27

VCC_54
VCC_55

VCC_53

P28

R28

T28

U28

V28

N28

VCC_51
VCC_52

VCC_50

VCC_48
VCC_49

VCC_47

AA28

Y28

VCC_45
VCC_46

L29

M29

AB28

VCC_43
VCC_44

VCC_42

R29

U29

P29

VCC_40
VCC_41

VCC_39

W29

Y29

AA29

L30

V29

VCC_37
VCC_38

VCC_36

VCC_34
VCC_35

N30

P30

M30

VCC_32
VCC_33

VCC_31

T30

U30

R30

VCC_29
VCC_30

VCC_28

W30

Y30

AA30

M31

V30

VCC_26
VCC_27

VCC_25

VCC_23
VCC_24

P31

R31

N31

VCC_21
VCC_22

VCC_20

V31

W31

T31

VCC_18
VCC_19

VCC_17

J32

L32

AA31

VCC_15
VCC_16

VCC_14

M32

P32

V32

N32

VCC_12
VCC_13

VCC_11

VCC_10

Y32

W32

VCC_8
VCC_9

AA32

L33

J33

VCC_6
VCC_7

VCC_5

(6 OF 10)

P33

N33

VCC_3
VCC_4

W33

AU40

AM41

VCC_SM1
VCC_SM2

BGA

VCC_2

AA33

VCC_0
VCC_1
VCC_SM0

NB_VCCSM_LF2
NB_VCCSM_LF1

Layout Note:
Place near pin BA23

10uF
20%
6.3V
X5R
603

C1621

C1610

C1612

10uF

0.47UF

0.47UF

0.47UF

20%
6.3V
X5R
603

10%
6.3V
CERM-X5R
402

10%
6.3V
CERM-X5R
402

10%
6.3V
CERM-X5R
402

Layout Note:
Place in cavity
(Need to better define cavity)

VSS_NCTF7

AE20

VSS_NCTF8
VSS_NCTF9

AE19

VSS_NCTF10

AC17

VSS_NCTF11
VSS_NCTF12

Y17

AE18

U17

AG27

VCC_NCTF18

R26

VCCAUX_NCTF1
VCCAUX_NCTF2

AF27

T26

VCCAUX_NCTF3

AF26

AD25

VCC_NCTF19
VCC_NCTF20
VCC_NCTF21

AB25

VCCAUX_NCTF4
VCCAUX_NCTF5

AG25

AC25

VCC_NCTF22
VCC_NCTF23

VCCAUX_NCTF6
VCCAUX_NCTF7

AG24

VCCAUX_NCTF8

AG23

W25

VCC_NCTF24
VCC_NCTF25
VCC_NCTF26

U25

VCCAUX_NCTF9
VCCAUX_NCTF10

AF23

V25

VCCAUX_NCTF11

AF22

T25

VCC_NCTF27
VCC_NCTF28
VCC_NCTF29

AD24

VCCAUX_NCTF12
VCCAUX_NCTF13

AG21

R25

VCCAUX_NCTF14

AG20

AC24

VCC_NCTF30
VCC_NCTF31
VCC_NCTF32

AA24

VCCAUX_NCTF15
VCCAUX_NCTF16

AF20

AB24

VCC_NCTF33
VCC_NCTF34

VCCAUX_NCTF17
VCCAUX_NCTF18

AF19

VCCAUX_NCTF19

AG18

V24

VCC_NCTF35
VCC_NCTF36
VCC_NCTF37

T24

VCCAUX_NCTF20
VCCAUX_NCTF21

AF18

U24

VCCAUX_NCTF22

AG17

R24

VCC_NCTF38
VCC_NCTF39
VCC_NCTF40

V23

VCCAUX_NCTF23
VCCAUX_NCTF24

AF17

AD23

VCCAUX_NCTF25

AD17

U23

VCC_NCTF41
VCC_NCTF42
VCC_NCTF43

R23

VCCAUX_NCTF26
VCCAUX_NCTF27

AB17

T23

VCC_NCTF44
VCC_NCTF45

VCCAUX_NCTF28
VCCAUX_NCTF29

W17

VCC_NCTF46
VCC_NCTF47

VCCAUX_NCTF30

T17
R17

T22

VCC_NCTF48

R22

VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33

AF16

AD21

VCC_NCTF49
VCC_NCTF50
VCC_NCTF51

U21

VCCAUX_NCTF34
VCCAUX_NCTF35

AE16

V21

VCCAUX_NCTF36

AC16

T21

VCC_NCTF52
VCC_NCTF53
VCC_NCTF54

AD20

VCCAUX_NCTF37
VCCAUX_NCTF38

AB16

R21

VCC_NCTF55
VCC_NCTF56

VCCAUX_NCTF39
VCCAUX_NCTF40

Y16

VCC_NCTF57
VCC_NCTF58

VCCAUX_NCTF41

V16
U16

R20

VCC_NCTF59

AD19

VCCAUX_NCTF42
VCCAUX_NCTF43

VCC_NCTF60
VCC_NCTF61

VCCAUX_NCTF44

R16

U19

VCC_NCTF62

T19

VCCAUX_NCTF45
VCCAUX_NCTF46

AG15

VCCAUX_NCTF47

AE15

AD18

VCC_NCTF63
VCC_NCTF64
VCC_NCTF65

AB18

VCCAUX_NCTF48
VCCAUX_NCTF49

AD15

AC18

VCC_NCTF66
VCC_NCTF67

VCCAUX_NCTF50
VCCAUX_NCTF51

AB15

VCC_NCTF68
VCC_NCTF69

VCCAUX_NCTF52

Y15
W15

V18

VCC_NCTF70

U18

VCCAUX_NCTF53
VCCAUX_NCTF54

VCC_NCTF71
VCC_NCTF72

VCCAUX_NCTF55

U15

VCCAUX_NCTF56
VCCAUX_NCTF57

T15

U20
T20

V19

AA18
Y18
W18

T18

AE21

VCCAUX_NCTF0

V20

AE22

AE24

VCC_NCTF16
VCC_NCTF17

V22

Layout Note:
Place near pin BA15

AE23

VSS_NCTF5
VSS_NCTF6

VCC_NCTF15

AD22

C1611

VSS_NCTF4

U26

U22

C1620

AE25

AE26

V26

W24

NB_VCCSM_LF4
NB_VCCSM_LF5

(7 OF 10)

AE27

VSS_NCTF2
VSS_NCTF3

W26

Y24

AT41

945GM
NB

LEMENU

AU41

U1200

VCC

BGA

VSS_NCTF0
VSS_NCTF1

Y26

Y25

1.05V or 1.5V

945GM
NB

VCC_NCTF13
VCC_NCTF14

AA25
16D3 19C8 19D7 64D6

U1200

VCC_NCTF2
VCC_NCTF3

Y27

R27

=PPVCORE_S0_NB

VCC_NCTF0
VCC_NCTF1

NCTF

64D6 19D7 19C8 16C8

These connections can break without


impacting part performance.
LEMENU

=PP1V5_S0_NB_VCCAUX

17B6 19B6
19D7 64C6

AG26

AF25

AF24

AG22

AF21

AG19

R19

R18

AE17

AA17

V17

AG16

AD16

AA16

W16

T16

AF15

AC15

AA15

V15

R15

NB Power 1

SYNC_MASTER=NB

SYNC_DATE=07/25/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

16

79

LEMENU
64B6 19D7 19B6

=PP2V5_S0_NB_VCCSYNC

H22

VCCSYNC

64B6 19D7 19B8

=PP2V5_S0_NB_VCC_TXLVDS

C30

VCC_TXLVDS0
VCC_TXLVDS1

B30
A30

VCC_TXLVDS2

VTT0

AC14

945GM
NB

VTT1
VTT2

AB14

BGA

VTT3
VTT4

V14

VTT5

R14

VCC3G1
VCC3G2

VTT6
VTT7

P14

V41

VCC3G3

VTT8

M14

R41

VCC3G4
VCC3G5

VTT9
VTT10

L14

VTT11

AC13

VTT12
VTT13

AB13

VTT14
VTT15

Y13

N41
L41

19A2

PP1V5_S0_NB_VCCA_3GPLL
=PP2V5_S0_NB_VCCA_3GBG
GND_NB_VSSA_3GBG

19D1

PP2V5_S0_NB_VCCA_CRTDAC

19A2
64B6 19D7 19B7

AC33
G41

VCCA_3GPLL
VCCA_3GBG

AD13

AA13

VSSA_3GBG

F21

VCCA_CRTDAC0
VCCA_CRTDAC1

VTT16

V13
U13

W13

GND_NB_VSSA_CRTDAC

G21

VSSA_CRTDAC

VTT17
VTT18

PP1V5_S0_NB_VCCA_DPLLA
PP1V5_S0_NB_VCCA_DPLLB
PP1V5_S0_NB_VCCA_HPLL

B26

VCCA_DPLLA

VTT19

R13

C39

VCCA_DPLLB
VCCA_HPLL

VTT20
VTT21

N13

VCCA_LVDS

VTT22

L13

A38
B39

VSSA_LVDS

VTT23
VTT24

AB12

19D1

=PP2V5_S0_NB_VCCA_LVDS
GND_NB_VSSA_LVDS

19C4

PP1V5_S0_NB_VCCA_MPLL

AF2

VCCA_MPLL

Y12

PP3V3_S0_NB_VCCA_TVBG
GND_NB_VSSA_TVBG

H20

VTT25
VTT26

VCCA_TVBG
VSSA_TVBG

VTT27

V12

VCCA_TVDACC0

VTT28
VTT29

U12

PP3V3_S0_NB_VCCA_TVDACC

E20
F20

VCCA_TVDACC1

VTT30

R12

C20

VCCA_TVDACB0
VCCA_TVDACB1

VTT31
VTT32

P12

E19

VCCA_TVDACA0

VTT33

M12

F19

VCCA_TVDACA1

L12

AH1

VCCD_HMPLL0

VTT34
VTT35

P11

19C1

19D4
19D4
19C4

64B6 19D1 19C7

19B1
19A1

19B1

19B1

AF1

G20

PP3V3_S0_NB_VCCA_TVDACB

D20
19C1

64C6 19D7

64C6 19D7 19B8

PP3V3_S0_NB_VCCA_TVDACA

=PP1V5_S0_NB_VCCD_HMPLL

=PP1V5_S0_NB_VCCD_LVDS

19A5

64B6 19C7 19B7

19A5

64C6 19D7 19B6 16D1

=PP3V3_S0_NB_VCC_HV

PP1V5_S0_NB_VCCD_QTVDAC
=PP1V5_S0_NB_VCCAUX

W12

T12

N12

VCCD_LVDS0

VTT38

M11

B28

VCCD_LVDS1
VCCD_LVDS2

VTT39
VTT40

R10

VTT41

N10
M10

VCCD_TVDAC

R11

VCCD_HMPLL1

N11

P10

A23

VCC_HV0

VTT42
VTT43

B23

VCC_HV1

VTT44

N9

B25

VCC_HV2

M9

H19

VCCD_QTVDAC

VTT45
VTT46

P8

P9

R8

AK31

VCCAUX0

VTT47
VTT48

AF31

VCCAUX1

VTT49

M8

AE31

VCCAUX2
VCCAUX3

VTT50
VTT51

P7

AC31
AL30

VCCAUX4

VTT52

M7

AK30

VTT53
VTT54

R6

AJ30

VCCAUX5
VCCAUX6

AH30

VCCAUX7

VTT55

M6

AG30

VCCAUX8
VCCAUX9

VTT56
VTT57

A6

VCCAUX10
VCCAUX11

VTT58
VTT59

P5

C1713

N5

0.47UF

AC30

VCCAUX12

VTT60

M5

AG29

VTT61
VTT62

P4

AF29

VCCAUX13
VCCAUX14

10%
6.3V
CERM-X5R
402

AE29

VCCAUX15

VTT63

M4

AD29

VTT64
VTT65

R3

AC29

VCCAUX16
VCCAUX17

AG28

VCCAUX18

VTT66

N3

AF28

VCCAUX19
VCCAUX20

VTT67
VTT68

M3

VCCAUX21
VCCAUX22

VTT69
VTT70

P2

AJ21
AH21

VCCAUX23

VTT71

D2

AJ20

VCCAUX24
VCCAUX25

VTT72
VTT73

AB1

AH20
AH19

VCCAUX26

VTT74

P1

C1711

P19

VCCAUX27
VCCAUX28

VTT75
VTT76

N1

0.47UF

P16

M1

AH15

VCCAUX29

10%
6.3V
CERM-X5R
402

P15

VCCAUX30
VCCAUX31

AE30
AD30

AE28
AH22

AH14
AG14

AA12

A28

AF30

M13

VTT36
VTT37

D21

PP1V5_S0_NB_VCCD_TVDAC

T13

AH2

C28

AF14

VCCAUX32
VCCAUX33

AE14

VCCAUX34

Y14
AF13

VCCAUX35
VCCAUX36

AE13

VCCAUX37

AF12
AE12

VCCAUX38
VCCAUX39

AD12

VCCAUX40

19B5 19D7 64C6

N14

H41

E21

VCC3G6

T14

VCC3G0

AB41
Y41

W14

AJ41

POWER

PP1V5_S0_NB_VCC3G

=PP1V05_S0_NB_VTT

U1200

(8 OF 10)
19B2

N8

N7

P6

NB_VTTLF_CAP3

R5
1

N4

P3

R2

M2

NB_VTTLF_CAP2
NB_VTTLF_CAP1

R1
1

C1712
0.22UF
20%
6.3V
X5R
402

NB Power 2
SYNC_MASTER=NB

SYNC_DATE=07/25/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

17

79

LEMENU
AC41
AA41
W41

VSS_3

P41

VSS_4
VSS_5

AK34

VSS_98
VSS_99

AG34

AC34

VSS_103
VSS_104

AW33

F41

VSS_6
VSS_7

AV40

VSS_8

VSS_105

AR33

VSS_106
VSS_107

AE33

AN40

VSS_9
VSS_10

AK40

VSS_11

VSS_108

Y33

VSS_109
VSS_110

V33

AH40

VSS_12
VSS_13

AG40

VSS_14

VSS_111

R33

AF40

VSS_15
VSS_16

VSS_112
VSS_113

M33

VSS_17
VSS_18

VSS_114
VSS_115

G33

VSS_19

VSS_116

D33

VSS_117
VSS_118

B33

AR39

VSS_20
VSS_21

AN39

VSS_22

VSS_119

AG32

VSS_120
VSS_121

AF32

AC39

VSS_23
VSS_24

AB39

VSS_25

VSS_122

AC32

VSS_26
VSS_27

VSS_123
VSS_124

AB32

VSS_28
VSS_29

VSS_125
VSS_126

B32

VSS_30

VSS_127

AV31

VSS_31
VSS_32

VSS_128
VSS_129

AN31

VSS_33

VSS_130

AG31

VSS_131
VSS_132

AB31

L39

VSS_34
VSS_35

J39

VSS_36

VSS_133

AB30

VSS_37
VSS_38

VSS_134
VSS_135

E30

VSS_136
VSS_137

AN29

D39

VSS_39
VSS_40

AT38

VSS_41

VSS_138

T29

VSS_42
VSS_43

VSS_139
VSS_140

N29

VSS_44

VSS_141

G29

VSS_142
VSS_143

E29

AE38

VSS_45
VSS_46

C38

VSS_47

VSS_144

B29

VSS_48
VSS_49

VSS_145
VSS_146

A29

VSS_50
VSS_51

VSS_147
VSS_148

AW28

AE40
B40
AY39
AW39
AV39

AJ39

AA39
Y39
W39
V39
T39
R39
P39
N39
M39

H39
G39
F39

AM38
AH38
AG38
AF38

AK37
AH37
AB37
AA37

NB
BGA

(9 OF 10)

VSS

VSS_163

B27

VSS_164
VSS_165

AN26

VSS_69

VSS_166

K26

VSS_70
VSS_71

VSS_167
VSS_168

F26

VSS_72
VSS_73

VSS_169
VSS_170

AK25

AN21

VSS_200

VSS_293

A9

AL21

VSS_201
VSS_202

VSS_294
VSS_295

AG8

AB21
Y21

VSS_203

VSS_296

AA8

P21

VSS_204
VSS_205

VSS_297
VSS_298

U8

VSS_299
VSS_300

C8

H21

VSS_206
VSS_207

C21

VSS_208

VSS_301

AV7

AW20

VSS_209
VSS_210

VSS_302
VSS_303

AP7

AR20
AM20

VSS_211

VSS_304

AJ7

AA20

VSS_212
VSS_213

VSS_305
VSS_306

AH7

K20
B20

VSS_214

VSS_307

AC7

A20

VSS_215
VSS_216

VSS_308
VSS_309

R7

VSS_217
VSS_218

VSS_310
VSS_311

D7

VSS_172
VSS_173

H25

VSS_77

VSS_174

D25

AR35

VSS_78
VSS_79

VSS_175
VSS_176

A25

VSS_80

VSS_177

AU24

VSS_81
VSS_82

VSS_178
VSS_179

AL24

BA7

AL7

AF7

AG6

VSS_222

VSS_315

U6

P18

VSS_223
VSS_224

VSS_316
VSS_317

N6

H18
D18

VSS_225

VSS_318

H6

A18

VSS_226
VSS_227

VSS_319
VSS_320

B6

VSS_321
VSS_322

AF5

AP17

VSS_228
VSS_229

AM17

VSS_230

VSS_323

AY4

AK17

VSS_324
VSS_325

AR4

AV16

VSS_231
VSS_232

AN16

VSS_233

VSS_326

AL4

AL16

VSS_234
VSS_235

VSS_327
VSS_328

AJ4

J16
F16

VSS_236

VSS_329

U4

C16

VSS_237
VSS_238

VSS_330
VSS_331

R4

VSS_332
VSS_333

F4

AK15

VSS_239
VSS_240

N15

VSS_241

VSS_334

AY3

M15

VSS_335
VSS_336

AW3

L15

VSS_242
VSS_243

B15

VSS_244

VSS_337

AL3

Y6

K6

AV5

AD5

AP4

Y4

J4

C4

BA14

VSS_245
VSS_246

VSS_338
VSS_339

AT14

VSS_247

VSS_340

AF3

AK14

VSS_248
VSS_249

VSS_341
VSS_342

AD3

VSS_343
VSS_344

AA3

U14

VSS_250
VSS_251

K14

VSS_252

VSS_345

AT2

H14

VSS_346
VSS_347

AR2

E14

VSS_253
VSS_254

AV13

VSS_255

VSS_348

AK2

AR13

VSS_349
VSS_350

AJ2

AN13

VSS_256
VSS_257

AM13

VSS_258

VSS_351

AB2

AL13

VSS_259
VSS_260

VSS_352
VSS_353

Y2

VSS_261
VSS_262

VSS_354
VSS_355

T2

F13
D13

VSS_263

VSS_356

J2

B13

VSS_357
VSS_358

H2

AY12

VSS_264
VSS_265

AC12

VSS_266

VSS_359

C2

K12

VSS_360

AL1

H12

VSS_267
VSS_268

E12

VSS_269

AA11

VSS_270
VSS_271

Y11

VSS_272

AV3

AH3

AD11

G7

AH18

P13

VSS_92
VSS_93

K8

AB6

AW23

VSS_91

AD8

VSS_313
VSS_314

AG13

VSS_89
VSS_90

E9

VSS_312

BA24

VSS_88

Y9

VSS_220
VSS_221

E25

AV35

AH9

VSS_219

P25

BA9

C19

AA14

VSS_75
VSS_76

AC10

G19

D26

B36

VSS

AL10

AD6

AD14

K25

(10 OF 10)

K19

M26

VSS_171

AN34

G9

A15

VSS_74

D35

VSS_291
VSS_292

C27

C36

F35

VSS_198
VSS_199

J27

VSS_67
VSS_68

G35

R9

AR21

AM15

VSS_66

H35

VSS_290

AM27

AW36

J35

VSS_197

AV21

AN15

AY36

L35

BA21

J28

F27

M35

VSS_288
VSS_289

AD28

VSS_161
VSS_162

N35

VSS_195
VSS_196

AB9

A22

AU28

VSS_64
VSS_65

P35

AR9

BA28

F37

VSS_86
VSS_87

VSS_286
VSS_287

AR17

G27

R35

VSS_193
VSS_194

AY17

VSS_160

VSS_85

F22

C29

VSS_63

T35

AW9

K29

G37

V35

VSS_285

AB29

AK27

VSS_83
VSS_84

VSS_192

W19

VSS_158
VSS_159

W35

G22

AT29

VSS_61
VSS_62

Y35

VSS_283
VSS_284

AC19

AP27

AA35

VSS_190
VSS_191

U10

K22

AN19

VSS_156
VSS_157

AB35

W10

AA22

Y31

VSS_59
VSS_60

AH35

VSS_282

AJ31

E28

BA35

VSS_189

AY31

VSS_155

AC36

C23

G32

VSS_58

AE36

VSS_280
VSS_281

J21

W28

AF36

VSS_187
VSS_188

AG10

F23

K21

VSS_153
VSS_154

AG36

AJ10

J23

AE32

VSS_56
VSS_57

AH36

VSS_279

AH32

AC28

AN36

VSS_186

F33

VSS_152

D37

K23

H33

VSS_55

H37

AP10

AV10

VSS_184
VSS_185

D22

AM28

J37

VSS_277
VSS_278

BGA

W23

E22

VSS_150
VSS_151

L37

B11

T33

VSS_53
VSS_54

M37

D11

VSS_275
VSS_276

AB33

W37

N37

945GM
NB

VSS_274

VSS_182
VSS_183

AV33

AP28

P37

J11

VSS_181

AM23

C34

VSS_149

R37

VSS_273

AN23

U1200

AC23

VSS_52

T37

VSS_180

AH23

Y37

V37

AT23
AF34

VSS_101
VSS_102

AJ40

945GM

LEMENU
VSS_97

AE34

AP40

U1200

VSS_100

J41

VSS_1
VSS_2

T41

M41

VSS_0

AG3

AC3

G3

AP2

AD2

U2

N2

F2

NB Grounds
SYNC_MASTER=NB

SYNC_DATE=07/25/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

VSS_94
VSS_95

II NOT TO REPRODUCE OR COPY IT


III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

VSS_96

SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

18

79

1
MCH VCCA_LVDS FILTER

Power Interface

(MCH LVDS ANALOG 2.5V PWR)


=PP2V5_S0_NB_VCCA_LVDS

These are the power signals that leave the NB "block"

=PP1V05_S0_FSB_NB
=PPVCORE_S0_NB
=PP1V05_S0_NB
=PP1V05_S0_NB_VTT

IN
IN
IN
IN

16C8 16D3 19C8 64D6


19D1 64C6

IN
IN

=PP2V5_S0_NB_CRTDAC

IN
IN
IN
IN
IN
IN

MCH VCCA_DPLLA FILTER


CRITICAL

19C6 64C6

U1900

=PP2V5_S0_NB_DISP_PLL

64B6

TPS73115

19A8 64C6

SOT23-5

17C6 64C6

1
3

17C6 19B8 64C6

IN
EN

IN
IN

IN

=PP3V3_S0_NB
=PP3V3_S0_NB_VCC_HV

IN

=PP5V_S0_NB_TVDAC

IN

OUT
NR/FB

C1950

17D6 19B6 64B6

PP1V5_S0_DPLL
TPS73115_NR

GND

C1951

0.01uF
2

R1951

20%
6.3V
X5R
603

17D6 19B8 64B6


17D6 19B7 64B6

64B6 19D7

10

180-OHM-1.5A

16V
NFM18

=PP1V8_S3_MEM

29B2 28D6 28D4 28B2 19C8


64C3 29D6 29D4

=PP1V8_S3_MEM

C1934

PLACE THOSE COMPONENT


CLOSE TO GMCH
1
R1988

1K

1%
1/16W
MF-LF
402

R1989

D1986

MM157

20%
10V
CERM
402

SOT23-5-LF
1 VIN
VOUT 5

PP3V3_S0_NB_TVDAC

3 CONT

MM1573DN_NR

NOISE 4

0603

1%
1/16W
MF-LF
2 402

C1941

1UF

22UF
20%
6.3V
CERM-X5R
805

VOLTAGE=3.3V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=1.0 mm

=PP1V5_S0_NB

NC

C1942

10%
6.3V
2 CERM
402

10%
16V
CERM
402

C1992

L1990

22000pF-1000mA

180-OHM-1.5A

16V
NFM18

C1937

PP3V3_S0_NB_TVDAC_F

MCH VCCA_TVDACC FILTER


(MCH TV OUT CHANNEL A 3.3V PWR)
PP3V3_S0_NB_VCCA_TVDACA

20%
10V
CERM
402

C1990
10uF

GMCH CORE PWR 1.05V BYPASS

20%
6.3V
X5R
603

C1991

17C6

VOLTAGE=3.3V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=1.0 mm

0603

0.1uF

19D7 64C6

1UF

0.01uF
2

PP3V3_S0_NB_TVDAC_FOLLOW

2
1%
1/16W
MF-LF
402

CRITICAL

C1936

SOT-363

10

C1940

BAT54DW

R1990
1

10%
6.3V
2 CERM
402

17C6

VOLTAGE=1.5V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=1.0 mm

R1987

17D6

Layout Note: Route to caps, then GND

U1901
=PP5V_S0_NB_TVDAC

64D3 19C7

PP1V5_S0_NB_VCCA_MPLL

Layout Note:
These 2 caps should be
within 6.35 mm of NB edge

CRITICAL

17C6

GMCH VCCA_MPLL FILTER


(MCH MEMORY PLL 1.5V PWR)

FERR-120-OHM-0.2A

GND_NB_VSSA_CRTDAC

C1935
0.1uF

L1936

14C2

1K

1%
1/16W
MF-LF
402

20%
10V
CERM
402

17D6

VOLTAGE=2.5V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=1.0 mm

0.1uF

GND

VOLTAGE=0.9V
MIN_LINE_WIDTH=0.25 mm
MIN_NECK_WIDTH=0.25 mm

1K

1%
1/16W
MF-LF
402

MEM_VREF_NB_1

14C2

VOLTAGE=0.9V
MIN_LINE_WIDTH=0.25 mm
MIN_NECK_WIDTH=0.25 mm

20%
6.3V
CERM-X5R
805

R1986
1K

MEM_VREF_NB_0

22UF

PP2V5_S0_NB_VCCA_CRTDAC

C1985

Layout Note:
THESE 4 0.1UF CAPS SHOULD
be within 5 mm of NB edge

VOLTAGE=1.5V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=1.0 mm

CRITICAL

MCH VCCA_CRTDAC BYPASS


(MCH CRTDAC ANALOG 2.5V PWR)

0603

20%
10V
CERM
402

PP1V5_S0_NB_VCCA_HPLL

2
0603

PP2V5_S0_NB_CRTDAC_F

19D7 64C6

22000pF-1000mA

GMCH VCCA_HPLL FILTER


(HOST PLL 1.5V PWR)

L1934
FERR-120-OHM-0.2A

=PP1V5_S0_NB_PLL

NC

C1986
2

=PP1V05_S0_NB

L1985

0.1uF

17C6 19B7 64B6

VOLTAGE=2.5V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=1.0 mm

19C4 64D3

SOT-363

PP2V5_S0_NB_CRTDAC_FOLLOW

1%
1/16W
MF-LF
402

C1954

17C6 19D1 64B6

BAT54DW

R1985

=PP2V5_S0_NB_CRTDAC

VOLTAGE=1.5V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=1.0 mm
1

17C6

D1986

(MCH DISPLAY B PLL 1.5V PWR)


PP1V5_S0_NB_VCCA_DPLLB
17C6

10%
16V
CERM
402

GND_NB_VSSA_LVDS

GMCH VCCA_DPLL_B FILTER

10uF

10%
16V
CERM
402

C1981
0.01uF

Layout Note: Route to caps, then GND

20%
10V
CERM
402

C1952

14C7 14D6 20A4 20B4 64A6

64C3 29D6 29D4 29B2 28D6 28D4 28B2 19C7

C1953

5%
1/16W
MF-LF
402

64C6 19D7

20%
10V
CERM
402

0.1uF

10%
2 6.3V
CERM
402

19D4 64B6

C1980
0.1uF

VOLTAGE=1.5V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=1.0 mm

16D1 17B6 19B6 64C6


14C2 16B6 28D2 29D2 61C2 64C6

(MCH DISPLAY A PLL 1.5V PWR)


PP1V5_S0_NB_VCCA_DPLLA
17C6

5%
1/16W
MF-LF
402

13D2 64C6

=PP2V5_S0_NB_VCCSYNC
=PP2V5_S0_NB_VCC_TXLVDS
=PP2V5_S0_NB_VCCA_3GBG
=PP2V5_S0_NB_VCCA_LVDS

IN

19C1 64C6

1UF

IN

R1950

MCH DISPLAY PLL POWER LDO

17D3 19B5 64C6

=PP1V5_S0_NB
=PP1V5_S0_NB_PCIE
=PP1V5_S0_NB_PLL
=PP1V5_S0_NB_TVDAC
=PP1V5_S0_NB_VCCD_HMPLL
=PP1V5_S0_NB_VCCD_LVDS
=PP1V5_S0_NB_VCCAUX
=PP1V8_S3_MEM_NB

IN

Layout Note:
This 0.1uF cap should
be within 5 mm of NB edge

12A7 12B7 12C2 33B8 33C7 33C8 64D6

17C6 19C7
64B6

0.1uF
20%
10V
CERM
402

THIS 470UF FOR GMCH CORE 1.05V


19D7 16D3 16C8
64D6

=PPVCORE_S0_NB
CRITICAL
1

C1900

470UF

20%
3 2 2.5V
TANT
D2T

10uF

20%
6.3V
X5R
603

20%
6.3V
X5R
603

C1904

C1903

10uF

1UF

10%
2 6.3V
CERM
402

C1905

=PP1V5_S0_NB_VCCD_LVDS

64B6 19C7 17C6

C1906

0.22uF

0.22uF

20%
6.3V
X5R
402

20%
6.3V
X5R
402

20%
6.3V
X5R
402

C1994

C1907

0.22uF

22000pF-1000mA
16V
NFM18

=PP3V3_S0_NB_VCC_HV

MCH VCCSYNC BYPASS


(MCH H/V SYNC 2.5V PWR)
17D6 =PP2V5_S0_NB_VCCSYNC

64C6 19D7 17D3

20%
10V
CERM
402

MCH VTT BYPASS


(MCH FSB 1.05V PWR) (SHARE C0940 470UF)

=PP1V05_S0_NB_VTT

Layout Note:
These 8 caps should be
within 6.35 mm of NB edge

64B6

C1910

C1911

C1914

C1915

C1917

10uF

0.1uF

10uF

0.1uF

0.1uF

20%
6.3V
X5R
603

20%
10V
CERM
402

20%
6.3V
X5R
603

20%
10V
CERM
402

20%
10V
CERM
402

(MCH LVDS DATA/CLK TX 2.5V PWR)


64B6 19D7 17D6 =PP2V5_S0_NB_VCC_TXLVDS

C1966
2.2uF

20%
6.3V
CERM
603

20%
6.3V
CERM1
603

C1912

C1913

64C6 19D7 17B6 16D1

C1967
C1996

0.22uF
2

20%
6.3V
X5R
402

22000pF-1000mA
16V
NFM18

Layout Note:
Place on the edge

C1995

C1916

0.1uF

0.1uF

20%
10V
CERM
402

20%
10V
CERM
402

20%
10V
CERM
402

20%
10V
CERM
402

91NH, 20%, 20MOHM, 1.5A (1210 TYP)


CRITICAL

C1918

0.1uF

20%
6.3V
CERM
603

=PP1V5_S0_NB_3G
1

PP1V5_S0_NB_VCC3G

C1921
22000pF-1000mA
16V
NFM18
1

C1920

Layout Note:
Place L and C
close to MCH

GMCH VCCD_TVDAC FILTER


(MCH TVDAC DEDICATED PWR 1.5V)
PP1V5_S0_NB_VCCD_TVDAC

L1922

22000pF-1000mA
16V
NFM18
1

10uF

20%
6.3V
X5R
603

20%
6.3V
X5R
603

Layout Note:
10uF caps should
be close to MCH
on opposite side.

C1997

0.1uF
20%
10V
CERM
402

64C6

=PP1V5_S0_NB_3GPLL

R1975

PP1V5_S0_NB_3GPLL_F
VOLTAGE=1.5V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=1.0 mm

17B6

VOLTAGE=1.5V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=1.0 mm

Layout Note:
3GPLL 10uF cap should
be placed in cavity

PP1V5_S0_NB_VCCA_3GPLL

0.51
1

C1975

10uF
20%
6.3V
X5R
603

NB (GM) Decoupling

C1976

SYNC_MASTER=NB

SYNC_DATE=06/22/2005

0.1uF
2

NOTICE OF PROPRIETARY PROPERTY

20%
10V
CERM
402

GND_NB_VSSA_3GBG

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

17D6

Layout Note: Route to caps, then GND

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

APPLE COMPUTER INC.

DRAWING NUMBER

SHT
NONE

REV.

051-7374

SCALE

17C6

17D6

VOLTAGE=1.5V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=1.0 mm

2
1%
1/16W
MF-LF
402

SIZE

17C6

VOLTAGE=3.3V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=1.0 mm

GMCH VCCA_3GPLL FILTER


(3GIO PLL 1.5V PWR)

L1975
1.0UH-220MA-0.12-OHM

0.1uF
20%
10V
CERM
402

C1972

GND_NB_VSSA_TVBG

GMCH VCCD_QTVDAC FILTER


(MCH TVDAC DIGITAL QUIET 1.5V PWR)
PP1V5_S0_NB_VCCD_QTVDAC

0603

C1922

20%
2.5V
POLY
SMB2

1uH, 20%

PP1V5_S0_NB_QTVDAC

10uF

220UF
2

C1971

Layout Note: Route to caps, then GND

Layout Note:
These 4 caps should be
within 6.35 mm of NB edge

C1923
2

C1970

MCH VCCA_TVBG FILTER


(MCH TV DAC BAND GAP 3.3V PWR)
PP3V3_S0_NB_VCCA_TVBG

180-OHM-1.5A
1

CRITICAL

16V
NFM18

VOLTAGE=1.5V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=1.0 mm

0805

22000pF-1000mA

17D6

17C6

0.1uF
20%
10V
CERM
402

VOLTAGE=1.5V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=1.0 mm

2
1210

=PP1V5_S0_NB_TVDAC

17C6

VOLTAGE=3.3V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=1.0 mm

C1998

91nH

945 EDS: 1210?

64C6 19D7

PP3V3_S0_NB_VCCA_TVDACC
3

GMCH VCC3G FILTER


(PCI-E/DMI ANALOG 1.5V PWR)

L1970
64C6

MCH VCCA_TVDACC FILTER


(MCH TV OUT CHANNEL C 3.3V PWR)

0.1uF

=PP1V5_S0_NB_VCCAUX

4.7uF
2

GMCH VCCAUX FILTER


(MCH DDR DLL&IO, FSB HSIO&IO PWR 1.5V)

MCH VCCA_3GBG BYPASS


(MCH PCIE/DMI BAND GAP 2.5V PWR)
=PP2V5_S0_NB_VCCA_3GBG

64B6 19D7 17D6

4.7uF

945 EDS: 5 mOhm, 1nH (1210?)

C1965

Layout Note:
Place in cavity

GMCH VCCTX_LVDS BYPASS

17C6

VOLTAGE=3.3V
MIN_LINE_WIDTH=1.0 mm
MIN_NECK_WIDTH=1.0 mm

0.1uF

19D7

MCH VCCA_TVDACC FILTER


(MCH TV OUT CHANNEL B 3.3V PWR)
PP3V3_S0_NB_VCCA_TVDACB

C1993

MCH VCC_HV BYPASS


(MCH HV BUFFER 3.3V PWR)

GMCH VCCD_LVDS BYPASS


(MCH LVDS DIGITAL 1.5V PWR)
64C6 19D7 17C6

C1902

A
OF

19

79

Internal pull-ups
00
01
10
11

NB_CFG<13:12>
NB_CFG<3>

RESERVED

NB_CFG<4>

RESERVED

=
=
=
=

Partial Clock Gating Disable


XOR Mode Enabled
All-Z Mode Enabled
Normal Operation

NB_CFG<14>

RESERVED

NB_CFG<15>

RESERVED

NB_CFG<5>

14C6

Internal pull-up

NBCFG_DMI_X2
1

NB_CFG<5>

High = DMIx4

DMI x2 Select

Low

R2075
2.2K

= DMIx2
2

5%
1/16W
MF-LF
402

PROBABLY NOT NEEDED


NB_CFG<16>

14C6

Internal pull-up

NB_CFG<6>

RESERVED

FSB Dynamic
ODT

NBCFG_DYN_ODT_DISABLE
1

NB_CFG<16>

R2085

High = Enabled

2.2K

Low

5%
1/16W
MF-LF
402

= Disabled
2

NB_CFG<7>

14C6

Internal pull-up

NO STUFF
1

NB_CFG<7>

High = Mobile CPU

CPU Strap

Low

R2077
2.2K

= RESERVED
2

5%
1/16W
MF-LF
402

NB_CFG<17>

RESERVED

=PP3V3_S0_NB

14C7 14D6 19C7 20A4 20B4 64A6

NBCFG_VCC_1V5
1

NB_CFG<18>
NB_CFG<8>

RESERVED

VCC Select

Low

= 1.05V
2

5%
1/16W
MF-LF
402

NB_CFG<18>

14C6

R2058
2.2K

High = 1.5V

Internal pull-down

NB_CFG<9>

14C6

Internal pull-up

=PP3V3_S0_NB
NBCFG_PEG_REVERSE
1

NB_CFG<9>

High = Normal

2.2K

NB_CFG<19>

High = Reversed

PCIE Graphics
Lane Reversal

Low

5%
1/16W
MF-LF
402

DMI Lane
Reversal

Low

= Reversed
2

14C7 14D6 19C7 20A4 20B4 64A6

NBCFG_DMI_REVERSE
1

R2079

R2059
2.2K

= Normal
2

5%
1/16W
MF-LF
402

NB_CFG<19>

14C6

Internal pull-down

=PP3V3_S0_NB
945 External Design Spec says reserved

NB_CFG<10>

RESERVED

NB_CFG<20>

High = Both active

PCIe Backward
Interop. Mode

Low

14B6

= Only SDVO
or PCIe x1

14C7 14D6 19C7 20B4 64A6

NBCFG_SDVO_AND_PCIE
1

R2060
2.2K

5%
1/16W
MF-LF
402

NB_CFG<20>
Internal pull-down

PROBABLY NOT NEEDED


NB Config Straps

SYNC_MASTER=NB

NB_CFG<11>

RESERVED

SYNC_DATE=06/28/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

20

79

PP3V3_S5_SB_RTC

=PP3V3_S0_SB_GPIO

R2105
402 MF-LF
1/16W 1%

R2194

10K

U2100

SB_SM_INTRUDER_L

TP_SB_XOR_W1
TP_SB_XOR-Y1
TP_SB_XOR-Y2

Y5
INTRUDER*
SB_INTVRMEN W4 INTVRMEN

(INT PU)
(INT PU)
(WEAK INT PD)

54D7 5C1

OUT

54D7 5C1

OUT

57C3 54C7 5C1

OUT

54D7 5D1

IN

ACZ_BITCLK
ACZ_SYNC

R2197

ACZ_RST_L
ACZ_SDATAIN<0>

39

A20GATE
A20M*

LAN_CLK
LAN_RSTSYNC

CPUSPL*
TP1/DPRSTP*
TP2/DPSLP*
FERR*
GPIO49/CPUPWRGD

U7
LAN_TXD0
V6
LAN_TXD1
V7
LAN_TXD2

TP_SB_XOR-U7
TP_SB_XOR-V6
TP_SB_XOR-V7

R2195 1
R2198

V3

LFRAME*

U5
LAN_RXD0
V4
LAN_RXD1
T5
LAN_RXD2

(WEAK INT PU)

5%
1/16W
MF-LF
402

W1
EE_CS
Y1
EE_SHCLK
Y2
EE_DOUT
W3
EE_DIN

U3

TP_SB_XOR-U3
NOTE:
POR IS SMC WILL PUT LAN INTF
INTO RESET STATE TO SAVE PWR.
INTEL CONFIRMS OK TO LEAVE PINS AS NC

SB_ACZ_BITCLK
39 SB_ACZ_SYNC

U1
ACZ_BIT_CLK
R6
ACZ_SYNC

39

R5
ACZ_RST*
T2
ACZ_SDIN0
T3 20K PD
ACZ_SDIN1
T1 20K PD
ACZ_SDIN2

SB_ACZ_RST_L

TP_SB_ACZ_SDIN1
TP_SB_ACZ_SDIN2

LDRQ0*
LDRQ1*/GPIO23

CPU

26D4 IN

NOTE: EE_CS HAS INTERNAL PD, ONLY ENABLED WHEN LAN_RST#=L

RTCRST*

LPC

SB_RTC_RST_L

LAD0
LAD1
LAD2
LAD3

BGA
(1 OF 6)

RTC

IN

AA3

ICH7-M
SB

LAN

26D4

OUT

AB1
RTCX1
AB2
RTCX2

IGNNE*
INIT3_3V*
INIT*
INTR
RCIN*

AC-97/
AZALIA

26C8

SB_RTC_X1
SB_RTC_X2

NMI
SMI*
STPCLK*

20K PD
54D7 5D1

OUT

ACZ_SDATAOUT

R2196

39

SB_ACZ_SDATAOUT

T4

THRMTRIP*

ACZ_SDOUT

6C4

OUT

6C4

OUT

35D4 IN
35C4
35D4
35D4

33B3 33B2

IN

33B3 33B2

IN

OUT
OUT

SATA_C_D2R_N
SATA_C_D2R_P
SATA_C_R2D_C_N
SATA_C_R2D_C_P

AF7
SATA_2RXN
AE7
SATA_2RXP
AG6
SATA_2TXN
AH6
SATA_2TXP

SB_CLK100M_SATA_N
SB_CLK100M_SATA_P

AF1
SATA_CLKN
AE1
SATA_CLKP

SATA_RBIAS_N
SATA_RBIAS_P

AH10
SATARBIASN
AG10
SATARBIASP

IDE_PDIOR_L
IDE_PDIOW_L
IDE_PDDACK_L
IDE_IRQ14
IDE_PDIORDY
IDE_PDDREQ

AF15
AH15
AF16
AH16
AG16
AE15

35D2

IN

35D2

IN

34C3

OUT

34B5

OUT

34B3

NOTE: DDREQ HAS INTERNAL 11.5K PD

IN

AF3
SATA_0RXN
AE3
SATA_0RXP
AG2
SATA_0TXN
AH2
SATA_0TXP

OUT

34B6

IN

34B6

IN

34B6

IN

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15

IDE

IN

SATA_A_D2R_N
SATA_A_D2R_P
SATA_A_R2D_C_N
SATA_A_R2D_C_P

SATA

6C4

IN

AA6
AB5
AC4
Y6 47C5
AC3
AA5
AB3

53C6
47C6
45D8 5D2

53C6
45D8

LPC_AD<0>
LPC_AD<1>
LPC_AD<2>
5C2 LPC_AD<3>

TP_SB_DRQ0_L
TP_SB_GPIO23
53C6
47C6
45C8 5C2

LPC_FRAME_L

AE22
AH28
AG27
AF24
AH25

IO
IO

NOTE: LAD<0-3> HAVE INTERNAL 20K PU

IO
IO

NOTE: LDRQ<0-1># HAVE INTERNAL 20K PU


IO

NOSTUFF
OUT

SB_A20GATE
CPU_A20M_L

7C8

CPU_DPRSTP_L
CPU_DPSLP_L

7B3

=PP1V05_S0_SB_CPU_IO

21D3 23B2 23D5 64B6

NOTE: PULLED UP PER INTEL


OUT

5%
1/16W
MF-LF
402

OUT

R2199
10K

5%
1/16W
MF-LF
2 402

NOTE:

R2110

SPEC SAYS WEAK PU IS REQUIRED

54.9

BUT CAPELL VALLEY USES 56-OHM PU

MF-LF 402
1/16W 1%

CHECK WITH INTEL

7C8

AG22
AG21
AF22
AF25

7B3

CPU_PWRGD

CPU_IGNNE_L
FWH_INIT_L
7D6 CPU_INIT_L
7C8 CPU_INTR

7C8

47C5 6B2 5C2

AG23

7C8

AH22

7C8

7C8 CPU_NMI
CPU_SMI_L

CPU_STPCLK_L

CPU_FERR_L

IN

OUT
OUT
OUT

R2100

OUT

NOTE: KEYBOARD CONTROLLER RESET CPU

OUT

=PP1V05_S0_SB_CPU_IO

NOSTUFF

OUT

CPU_RCIN_L

AH24
AF23

NOTE: R2110=56 IN CV.


CHANGED TO 54.9 FOR
BOM CONSOLIDATION

OUT

AG26
AG24

21C1 24C3 25C4 64D6

2.2K 2
1

TP_CPU_CPUSLP_L
58C7 7B3

=PP3V3_S0_SB_GPIO

R2101

NOTE: RISING-EDGE TRIGGERED AT CPU

MF-LF 402
1/16W 5%

45C8

SMC_RCIN_L

IN

NOTE: R2108=56 IN CV.


CHANGED TO 54.9 FOR
2
BOM CONSOLIDATION

R2108
54.9

OUT

R2107

OUT

AF26

CPU_THERMTRIP_R

24.9 2

MF-LF 402
1/16W 1%
46B3
14B6 7C6

21C1 24C3 25C4 64D6

LAYOUT NOTE: R2108 TO BE


< 2 IN OF R2107 W/O STUB

PM_THRMTRIP_L

IN

MF-LF 402
1/16W 1%

TP_SB_SATALED_L AF18 SATALED*


6C4

LAYOUT NOTE: PLACE R2101 & R2194 WHERE ACCESSIBLE

5%
1/16W
MF-LF
2 402

LEMENU

IN

21C3 23B2 23D5 64B6

NOTE: ENABLE INTERNAL 1.05V SUSPEND REG

332K

26C8

26D3 25A4 24B3

DIOR* (HSTROBE)
DIOW* (STOP)
DDACK*
IDEIRQ
IORDY (DSTROBE)

DA0
DA1
DA2
DCS1*
DCS3*

DDREQ

AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15
AH17
AE17
AF17
AE16
AD16

IDE_PDD<0>
IDE_PDD<1>
IDE_PDD<2>
34C5 IDE_PDD<3>
34C5 IDE_PDD<4>
34C5 IDE_PDD<5>
34C5 IDE_PDD<6>
34C5 IDE_PDD<7>
34C3 IDE_PDD<8>
34C3 IDE_PDD<9>
34C3 IDE_PDD<10>
34C3 IDE_PDD<11>
34C3 IDE_PDD<12>
34C3 IDE_PDD<13>
34C3 IDE_PDD<14>
34C3 IDE_PDD<15>
34C5

IO

34C5

IO

34C5

IO

IDE_PDA<0>
34B5 IDE_PDA<1>
34B3 IDE_PDA<2>
34B5

34B5
34B3

IDE_PDCS1_L
IDE_PDCS3_L

LAYOUT NOTE: R2107 TO BE


< 2 IN OF SB

IO
IO
IO
IO
IO

NOTE: DD<7> HAS INTERNAL 11.5K PD

IO
IO
IO
IO
IO
IO
IO
IO

OUT
OUT
OUT
OUT
OUT

NOTE: ALL IDE PINS HAVE INTERNAL 33-OHM SERIES RS

AC 07

ACZ_BIT_CLK

INTERNAL 20K PD ENABLED WHEN

SB: 1 OF 4

INTEL HIGH DEFINITION AUDIO

NOTICE OF PROPRIETARY PROPERTY

- LSO BIT IN AC97 GLOBAL CONTROL REG = 1; OR

ACZ_RST#

INTERNAL 20K PD ONLY ENABLED IN S3COLD


NONE

- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED

ACZ_SDIN[0-2]

INTERNAL 20K PD

INTERNAL 20K PD

ACZ_SDOUT

INTERNAL 20K PD ENABLED DURING RESET AND WHEN

INTERNAL 20K PD ENABLED WHEN

- LSO BIT IN AC97 GLOBAL CONTROL REG = 1; OR

- LSO BIT IN AC97 GLOBAL CONTROL REG = 1; OR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED

- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED

SIZE

ACZ_SYNC

INTERNAL 20K PD

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

21

79

7
64A3

=PP3V3_S5_SB_USB
LEMENU

R2200

R2250

10K

10K

5%
1/16W
MF-LF
2 402

5%
1/16W
MF-LF
2 402

R2255
10K

5%
1/16W
MF-LF
2 402

USB_E_OC_PU

R2223

R2251
10K

5%
1/16W
MF-LF
2 402

R2226

R2208

10K

10K

10K

5%
1/16W
MF-LF
2 402

5%
1/16W
MF-LF
2 402

5%
1/16W
MF-LF
2 402

U2100
36D5

IN

36D5

IN

36C5
36C5

22C4 6C1
22C4

22C4 6C1
22C4
22C4

USB_A_OC_L
USB_B_OC_L
USB_C_OC_L
USB_D_OC_L
USB_E_OC_L

22C4

SB_GPIO29

22C4

SB_GPIO31

OUT
OUT

43C7

IN

43C7

IN

43B7
43B7

OUT
OUT

6C4

IN

6C4

IN

6C4

OUT

6C4

OUT

6C4 IN
6C4
6C4
36D8 22C4

SB_GPIO30

6C4

64A3

=PP3V3_S5_SB_IO

IN
IN

10K
MF-LF
1/16W
402 5%

50C7 45D5

IO

50C7 45B5

IO

45D5

IO

50C1 45D5

IO

50C1 45D5

IO

6C4

R2206

R2207

10K
MF-LF
1/16W
402 5%

6C4

10K
1

MF-LF
1/16W
402 5%

6C4
6C4

OUT

6C4

NOSTUFF

R2205

OUT

6C4

6C4

IN

6B4

OUT
OUT
IN
IN
OUT
OUT

ICH7-M
SB

PCIE_A_D2R_N
PCIE_A_D2R_P
PCIE_A_R2D_C_N
PCIE_A_R2D_C_P

F26
PERN1
F25
PERP1
E28
PETN1
E27
PETP1

PCIE_B_D2R_N
PCIE_B_D2R_P
PCIE_B_R2D_C_N
PCIE_B_R2D_C_P

H26
PERN2
H25
PERP2
G28
PETN2
G27
PETP2

Y26
DMI1RXN
Y25
DMI1RXP
W28
DMI1TXN
W27
DMI1TXP

PCIE_C_D2R_N
PCIE_C_D2R_P
PCIE_C_R2D_C_N
PCIE_C_R2D_C_P

K26
PERN3
K25
PERP3
J28
PETN3
J27
PETP3

AB26
DMI2RXN
AB25
DMI2RXP
AA28
DMI2TXN
AA27
DMI2TXP

PCIE_D_D2R_N
PCIE_D_D2R_P
PCIE_D_R2D_C_N
PCIE_D_R2D_C_P

M26
PERN4
M25
PERP4
L28
PETN4
L27
PETP4

PCIE_E_D2R_N
PCIE_E_D2R_P
PCIE_E_R2D_C_N
PCIE_E_R2D_C_P

P26
PERN5
P25
PERP5
N28
PETN5
N27
PETP5

PCIE_F_D2R_N
PCIE_F_D2R_P
PCIE_F_R2D_C_N
PCIE_F_R2D_C_P

T25
PERN6
T24
PERP6
R28
PETN6
R27
PETP6

BGA
(3 OF 6)

P5
SPI_MOSI
P2
SPI_MISO
D3
C4
D5
D4
E5
C3
A2
B3

14B4
14B4

DMI_N2S_N<1>
DMI_N2S_P<1>
14B4 DMI_S2N_N<1>
14B4 DMI_S2N_P<1>
14B4
14B4

DMI_N2S_N<2>
DMI_N2S_P<2>
DMI_S2N_N<2>
14B4 DMI_S2N_P<2>

14B4

AD25
DMI3RXN
AD24
DMI3RXP
AC28
DMI3TXN
AC27
DMI3TXP

IN
IN
OUT
OUT
IN

IN
OUT
OUT
IN

14B4

IN

14B4

OUT

DMI_N2S_N<3>
DMI_N2S_P<3>
14B4 DMI_S2N_N<3>
14B4 DMI_S2N_P<3>
14B4
14B4

33C3 33B2
33C3 33B2

OUT
IN
IN
OUT
OUT

SB_CLK100M_DMI_N
SB_CLK100M_DMI_P

IN

PP1V5_S0_SB_VCC1_5_B

R2203
1

DMI_IRCOMP_R

PD)

PD)

OC0*
OC1*
OC2*
OC3*
OC4*
OC5*/GPIO29
OC6*/GPIO30
OC7*/GPIO31

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P

F1
F2
G4
G3
H1
H2
J4
J3
K1
K2
L4
L5
M1
M2
N4
N3

D2
USBRBIAS*
D1
USBRBIAS

USB_A_N
USB_A_P
USB_B_N
6C1 USB_B_P
6C1 USB_C_N
6C1 USB_C_P
6C1 USB_D_N
6C1 USB_D_P
6C1 USB_E_N
6C1 USB_E_P
6C1 USB_F_N
6C1 USB_F_P
6B1 USB_G_N
6B1 USB_G_P
6B1 USB_H_N
6B1 USB_H_P
6C1

IO

6C1

IO

6C1

IO

EXTERNAL 0

TRACKPAD (Geyser)

IO
IO

EXTERNAL 1

IO
IO

NOTE: USBP[0-7]P/N HAVE INTERNAL 15K PD

CAMERA

IO
IO

EXTERNAL 2

IO
IO

IR

IO
IO

BT

IO
IO

AIRPORT

IO

R2204
USB_RBIAS_PN

22.6 2

E18
C18
A16
F18
E16
A18
E17
A17
A15
C14
E14
D14
B12
C13
G15
G13
E12
C11
D11
A11
A10
F11
F10
E9
D9
B9
A8
A6
C7
B6
E6
D6

38B5

IO

38B5

IO

PCI_AD<0>
PCI_AD<1>
PCI_AD<2>
PCI_AD<3>
PCI_AD<4>
PCI_AD<5>
PCI_AD<6>
PCI_AD<7>
PCI_AD<8>
PCI_AD<9>
PCI_AD<10>
PCI_AD<11>
PCI_AD<12>
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
PCI_AD<16>
PCI_AD<17>
PCI_AD<18>
PCI_AD<19>
PCI_AD<20>
PCI_AD<21>
PCI_AD<22>
PCI_AD<23>
PCI_AD<24>
PCI_AD<25>
PCI_AD<26>
PCI_AD<27>
PCI_AD<28>
PCI_AD<29>
PCI_AD<30>
PCI_AD<31>

38A5 26D3

IO

PCI_FRAME_L F16 FRAME*

26C3

IO

26C3

IO

26C3

IO

IO

38C5

IO

38C5

IO

38C5

IO

38C5

IO

38C5

IO

38C5

IO

38C5

IO

38C5

IO

38C5

IO

38C5

IO

38C5

IO

38B5

IO

38B5

IO

38B5

IO

38B5

IO

38B5

IO

38B5

IO

38B5

IO

38B6

IO

38B5

IO

38B5

IO

38B5

IO

38B5

IO

38B5

IO

38B5

IO

38B5

IO

38B5

IO

38B5

IO

38B5

IO

38A5 26C3

IO

INT_PIRQA_L
INT_PIRQB_L
INT_PIRQC_L
INT_PIRQD_L
TP_SB_XOR-AE5
TP_SB_XOR-AD5
TP_SB_XOR-AG4
TP_SB_XOR-AH4
TP_SB_XOR-AD9

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

A3
PIRQA*
B4
PIRQB*
C5
PIRQC*
B5
PIRQD*
AE5
AD5
AG4
AH4
AD9

RSVD0
RSVD1
RSVD2
RSVD3
RSVD4

U2100
ICH7-M
SB
BGA
(2 OF 6)

PCI

VOLTAGE=0

LAYOUT NOTE:
PLACE R2204 < 1/2 IN FROM SB
25D8 34C8 64B6

NOTE:
GNT[0-3]# HAVE INT 20K PU
ENABLED ONLY WHEN PCIRST#=0
AND PWROK=H

LEMENU
38C5

LAYOUT NOTE:
PLACE R2203 < 1/2 IN FROM SB

24.9 2

1%
1/16W
MF-LF
402

=PP3V3_S0_SB

REQ0*
GNT0*
REQ1*
GNT1*
REQ2*
GNT2*
REQ3*
GNT3*
6B1
REQ4*/GPIO22
GNT4*/GPIO48
GPIO1/REQ5*
GPIO17/GNT5*

38B5
C/BE0*
38B5
C/BE1*
38B5
C/BE2*
38B5
C/BE3*

IRDY*
PAR
PCICLK
DEVSEL*
PERR*
PLOCK*
SERR*
STOP*
TRDY*
PLTRST*
PCIRST*
(INT 20K PU) PME*

D7
E7
C16
D16
C17
D17
E13
F13
A13
A14
C8
D8

B15
C12
D12
C15

1
26C3 PCI_REQ0_L
TP_PCI_GNT0_L
26C3 PCI_REQ1_L
TP_PCI_GNT1_L
26C3 PCI_REQ2_L
TP_PCI_GNT2_L
38A5
26C3 PCI_REQ3_L
38A5 PCI_GNT3_L
TP_SB_GPIO22 IO

10K
5%
1/16W
MF-LF
2 402

OUT
IN
OUT
IN
OUT
IN
IN

NOTE: FWH_WP_L NOT USED

38A5

PCI_PME_FW_L

IN
47C6 45C8 5C2

PCI_C_BE_L<0>
PCI_C_BE_L<1>
PCI_C_BE_L<2>
PCI_C_BE_L<3>

PLT_RST_L
PCI_RST_L
TP_PCI_PME_L
26C3
38A6

NOTE:
NOT PLANNED TO GO TO LPC+ CONN

NOTE: TBL_L NET REMOVED

A7 38A5 26D3 PCI_IRDY_L


E10
38B5 PCI_PAR
A9 33D6 PCI_CLK_SB
A12 38A5
26D3 PCI_DEVSEL_L
C9 38A5 26D3 PCI_PERR_L
E11
26D3 PCI_LOCK_L
38A5
B10
26D3 PCI_SERR_L
38A5
F15
26D3 PCI_STOP_L
38A5
F14
26D3 PCI_TRDY_L
C26
B18
B19

R2299

IN

BOM NOTE:
NO STUFF - DEFAULT
STUFF - A16 SWAP OVERRIDE

IO
IO

IO

OUT

R2211

1K

5%
1/16W
MF-LF
2 402

(STRAPPED TO TOP-BLOCK SWAP MODE


IE SB INVERTS A16 FOR ALL CYCLES
TARGETING FWH BIOS SPACE)

IO

BOOT_LPC_SPI_L

IO
IO
IN

SB BOOT BIOS SELECT

IO
IO
IO

STRAP

GNT5#
R2211

GNT4#
R2210

IO

LPC (DEFAULT)

11

UNSTUFF

IO

PCI

10

UNSTUFF

STUFF

OUT

SPI

01

STUFF

UNSTUFF

IO

UNSTUFF

OUT

NOTE: GNT4#

HAS INT PU; ENABLED ONLY WHEN PCIRST#=0 AND PWROK=H

GNT5# HAS INT PU (NOMINAL=20K, SIMULATION=15K-35K)

SB: 2 OF 4
INT I/F GPIO2/PIRQE*
GPIO3/PIRQF*
GPIO4/PIRQG*
GPIO5/PIRQH*

MISC

RSVD5
RSVD6
NOTE: CHANGE SYMBOL
RSVD7
TO RSVD[1-9]
RSVD8
MCH_SYNC*

G8
F7
F8
G7
AE9
AG8
AH8
F21
AH20

SB_GPIO2
SB_GPIO3
26C3 SB_GPIO4
34C8
26C3 SB_GPIO5
26C3
26C3
23A4

NOTICE OF PROPRIETARY PROPERTY

IO
IO

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

IO

TP_SB_XOR_AE9
TP_SB_XOR_AG8
TP_SB_XOR_AH8
TP_SB_RSVD9 (AKA
14B6 NB_SB_SYNC_L
IN

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

TP3, INTERNAL 20K PU)

DRAWING NUMBER

SHT
NONE

REV.

051-7374

SCALE

IO

APPLE COMPUTER INC.

24D5 25B6

IN

1/16W MF-LF 1% 402

SPI_SI
SPI_SO
USB_A_OC_L
22D8 USB_B_OC_L
22D8 6C1 USB_C_OC_L
22D8 USB_D_OC_L
22D8 USB_E_OC_L
22D8 SB_GPIO29
36D8 22D8 SB_GPIO30
22D8 SB_GPIO31

DMI_N2S_N<0>
DMI_N2S_P<0>
DMI_S2N_N<0>
14B4 DMI_S2N_P<0>
14B4

C25
DMI_ZCOMP
D25
DMI_IRCOMP

R2
SPI_CLK (INT
P6
SPI_CS*
P1
SPI_ARB (INT

IN

V26
DMI0RXN
V25
DMI0RXP
U28
DMI0TXN
U27
DMI0TXP

AE28
DMI_CLKN
AE27
DMI_CLKP

SPI_SCLK
SPI_CE_L
SPI_ARB

22D8 6C1

DMI

5%
1/16W
MF-LF
2 402

USB_D_OC_PU
1

USB

10K

PCI-EXP

R2225

SPI

USB_C_OC_PU
1

A
OF

22

79

NOTE FOR R2323 (DEF=NOSTUFF)


STRAPPING @ PWROK RISING:
SB WILL DISABLE TCO TIMER
SYSTEM REBOOT FEATURE

=PP3V3_S0_SB_GPIO

21C3 21D3 23B2 64B6

=PP3V3_S5_SB

8
1

D
64A3 25C8 23D4 23B7 23A7

=PP3V3_S5_SB

1 NOSTUFF 1 NOSTUFF 1 NO_REBOOT_MODE

R2318

R2395

R2396

R2397

R2327

R2326

R2323

10K

8.2K

10K

8.2K

10K

10K

1K

1/16W
2 402
MF-LF
5%

1/16W
2 402
MF-LF
5%

1/16W
2 402
MF-LF
5%

1/16W
2 402
MF-LF
5%

1/16W
2 402
MF-LF
5%

1/16W
2 MF-LF
402
5%

23A7 23B7 23D8 25C8 64A3

RP2300

=PP3V3_S5_SB_PM

5%
1/16W
SM-LF

1/16W
2 402
MF-LF
5%

U2100

ICH7-M
SB

R2398

R2320

R2317

R2316

1K

10K

10K

10K

1/16W
2 402
MF-LF
5%

1/16W
2 402
MF-LF
5%

1/16W
2 402
MF-LF
5%

1/16W
2 402
MF-LF
5%

27D8

IO

27D8

IO

C22
B22
SMB_LINK_ALERT_L A26
B25
SMLINK<0>
A25
SMLINK<1>

SMB_CLK
SMB_DATA

NOT USED

PM_RI_L
SB_SPKR
45C8 26C5

IN

PM_SUS_STAT_L
PM_SYSRST_L

14B6

IN

PM_BMBUSY_L

53C6 47C5 46D3 45D5 5C2

OUT

SMB_ALERT_L

A28

AB18
B23

NOTE: RESERVED FOR FUTURE


32C4

OUT

32C4

OUT
IN

A21

SB_GPIO26
23A6
23A6

53C6 47C6 45D5 38A5 5C2

IO

IN
IO

45B8 IN

PCIE_WAKE_L
INT_SERIRQ
PM_THRM_L

R2300
45B8

IN
IN

SMC_RUNTIME_SCI_L
SMC_EXTSMI_L

IN

VR_PWRGD_CK410

IO

SB_RUNTIME_SCI_L

TP_SB_GPIO6

SUSCLK

GPIO11/SMBALERT*

GPIO26

PWROK
GPIO16/DPRSLPVR
TP0/BATLOW*

(INT 20K PU) PWRBTN*

LAN_RST*

GPIO32/CLKRUN*

RSMRST*

AC19
GPIO33/AZ_DOCK_EN*
U2
GPIO34/AZ_DOCK_RST*

AD22

33A6
33C7

6B4

C21

2
2

R2302
R2303

100 1

R2305

1/16W
2 402
MF-LF
5%
35D2

SB_CLK14P3M_TIMER
SB_CLK48M_USBCTLR

SUS_CLK_SB

63B8
63A7 45C5
63D6 61B8
60C8 45C5

SATA_C_DET_L

5%
2 1/16W
MF-LF
402

IN

IN
IN

OUT

46D3 45C5

PM_SLP_S3_L
PM_SLP_S4_L
PM_SLP_S5_L

26A6

PM_SB_PWROK

IN

58D8 14B7

PM_DPRSLPVR

OUT

AA4
AC22

100 1
100 1

OUT
OUT
OUT

NOTE: DPRSLPVR HAS INT 20K PD, ENABLED AT BOOT/RESET FOR STRAPPING FCN

C23

PM_PWRBTN_L

IN

PM_LAN_ENABLE

IN

45D8

C19

45D8

Y4

45B8

PM_BATLOW_L

IN

45D8

PM_RSMRST_L

IN

NOTE:
SMC WILL DRIVE 0-1-0 TO KEEP LAN INTF
IN RESET STATE TO SAVE PWR

R2399
DEF=GPI
DEF=GPI

VRMPWRGD

AC21
GPIO6
AC18
GPIO7
E21
GPIO8

C20

B24
SLP_S3*
D23
SLP_S4*
F22
SLP_S5*

F20
WAKE*
AH21
SERIRQ
AF20
THRM*
26A8

45B8

TP_AZ_DOCK_EN_L
TP_AZ_DOCK_RST_L

AC1
CLK14
B2
CLK48

GPIO0/BM_BUSY*

B21
GPIO27
E23
GPIO28
AG18

RESERVED FOR MOBILE


AZALIA DOCKING INTF

43C6 36C6

BIOS_REC
FWH_MFG_MODE

PM_CLKRUN_L

C
53C6 47C5 45C8 5C2

PD)

AC20
GPIO18/STPPCI*
AF21
GPIO20/STPCPU*

PM_STPPCI_L
PM_STPCPU_L

AF19 SB_GPIO21
GPIO21/SATA0GP
AH18 SB_GPIO19
GPIO19/SATA1GP
AH19
GPIO36/SATA2GP
AE19 SB_GPIO37
GPIO37/SATA3GP

RI*

A19
SPKR (INT WEAK
A27
SUS_STAT*
A22
SYS_RST*

8.2K

10K

SATA GPIO

(4 OF 6)
SMBCLK
SMBDATA
LINKALERT*
SMLINK0
SMLINK1

CLKS

SMB

SYS GPIO
PWR MNGT

R2319 R2343

BGA
1

11B5 26C5 64A3

LEMENU

10K

OD

GPIO

DEF=GPI

GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
GPIO35
GPIO38
GPIO39

E20
A20
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20

SMS_INT_L
SMC_SB_NMI
23B3 PATA_PWR_EN_L

46D6 45B5

IN

45D8

IN

NOTE: PATA_DET IS ACTUALLY CABLE TYPE DETECT

100K

5% 1/16W
402 MF-LF

OUT
45D5

SMC_WAKE_SCI_L

IN

SB_GPIO14
OUT
SV_SET_UP 5C2 23B6 47B5
CRB_SV_DET 23B6
TP_SB_GPIO25_DO_NOT_USE
32B4 SB_CLK100M_SATA_OE_L
OUT
TP_SB_GPIO38 IO
23A3 SATA_C_PWR_EN_L
OUT
23A4

NOTE FOR GPIO25:


- HAS INTERNAL 20K PU, ENABLED DURING RSMRST# AND DISABLED WITHIN 100MS AFTER RSMRST# DEASSERTS
- CAN NOT BE LOW FOR 35US AFTER RSMRST# ON BOOT (DMI AC COUPLING MODE STRAP)

=PP3V3_S0_SB_GPIO
64A3 25C8 23D8 23D4 23A7

21C3 21D3 23D5 64B6

=PP3V3_S5_SB

B
1 NOSTUFF

R2306 R2308
10K

10K

1/16W
2 402
MF-LF
5%

1/16W
2 402
MF-LF
5%

SV_SET_UP
CRB_SV_DET

LAYOUT NOTE:

NOTE:
SV_SET_UP IS LINDACARD DETECT
HI = PRESENT
LO = NOT PRESENT

R2390

R2388

10K

10K

5%
1/16W
MF-LF
2 402

5%
1/16W
MF-LF
2 402

5C2 23C3 47B5


23C3

23C3

PATA_PWR_EN_L

23B3

SATA_C_PWR_EN_L

1 NOSTUFF

R2307 R2309

PLACE R2306-14 WHERE PHYSICALLY ACCESSIBLE

10K
1/16W
2 402
MF-LF
5%

NOSTUFF

1/16W
2 402
MF-LF
5%

R2312
26C3 22A6

SB_GPIO3

5%
1/16W
MF-LF
402

64A3 25C8 23D8 23D4 23B7

=PP3V3_S5_SB
1

23C3

R2313

IDE_RESET_L

34C5

R2315
SB_GPIO14

R2310

10K

10K

1/16W
402
2 MF-LF
5%

1/16W
2 402
MF-LF
5%

1 NOSTUFF

1 NOSTUFF

1
1

R2389
15K

SB: 3 OF 4

5%
1/16W
MF-LF
402

FWH_MFG_MODE 23C5
BIOS_REC 23C5

NOTICE OF PROPRIETARY PROPERTY

5%
1/16W
MF-LF
402 2

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

R2314
0
1/16W
2 402
MF-LF
5%

II NOT TO REPRODUCE OR COPY IT


III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

R2311

R2312,R2315 and R2389 close to SB

10K
1/16W
2 402
MF-LF
5%

SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

23

79

LEMENU

LEMENU
A4
A23
N24
P24
R18
U14
V27
AA24
AB27
AD11
B1
D10
F4
G18
J1
L24
M17
N14
N17
N18
N25
N26
P3
P4
P12
P13
P14
P15
P16
P17
P27
P28
R1
R11
R12
R13
R14
R15
R16
R17
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1
AA25
AA26
AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB28
AC2
AC5
AC9
AC11
AD1
AE24
AE25
AF2
AF4
AF8
AF11
AF27
AF28
AG1
AG3
AG7

5
25D7

AD3
AD4
AD7
AD8
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
AE21
B8
B11
B14
B17
B20
B26
B28
C2
C6
C27
D13
D18
D21
D24
E1
E2
E4
E8
E15
F3
F5
F12
F27
F28
G1
G2
G5
G6
G9
G14
G21
G24
G25
G26
H3
H4
H5
H24
H27
H28
J2
J5
J24
J25
J26
K24
K27
K28
L13
L15
L25
L26
M3
M4
M5
M12
M13
M14
M15
M16
M24
M27
M28
N1
N2
N5
N6
N11
N12
N13
N15
N16
AG11
AG14
AG17
AG20
AG25
AH1
AH3
AH7
AH12
AH23
AH27

U2100
ICH7-M
SB
BGA
(6 OF 6)

VSS

25C7

25B6 22C1

PP5V_S5_SB_V5REF_SUS

PP1V5_S0_SB_VCC1_5_B

64B6 25C6 25B8 24B5

=PP3V3_S0_SB_VCC3_3

G10
AD17
F6
AA22
AA23
AB22
AB23
AC23
AC24
AC25
AC26
AD26
AD27
AD28
D26
D27
D28
E24
E25
E26
F23
F24
G22
G23
H22
H23
J22
J23
K22
K23
L22
L23
M22
M23
N22
N23
P22
P23
R22
R23
R24
R25
R26
T22
T23
T26
T27
T28
U22
U23
V22
V23
W22
W23
Y22
Y23
B27

PP1V5_S0_SB_VCCDMIPLL

AG28

=PP1V5_S0_SB_VCC1_5_A_ARX

AB7
AC6
AC7
AD6
AE6
AF5
AF6
AG5
AH5

25A5

64C6 25D6

PP5V_S0_SB_V5REF

64C6 25D6

64B6 25C6 25B8 24B5

64C6 25C6

=PP1V5_S0_SB_VCCSATAPLL
=PP3V3_S0_SB_VCC3_3

=PP1V5_S0_SB_VCC1_5_A_ATX

AD2
AH11
AB10
AB9
AC10
AD10
AE10
AF10
AF9
AG9
AH9

V5REF
V5REF_SUS

U2100
ICH7-M
SB
BGA
(5 OF 6)

CORE
VCC1_05

VCC PAUX
VCCLAN_3_3

VCCA3GP

VCC3_3/VCCHDA
VCCSUS3_3/VCCSUSHDA

VCC1_5_B

V_CPU_IO

IDE
VCC3_3

PCI
VCC3_3

VCCRTC

=PPVCORE_S0_SB

25D3 64D6

NOTE FOR VCCLAN_3_3:


S3 IF INTERNAL LAN IS USED
S0 OR S3 IF NOT

=PP3V3_S0_SB_VCCLAN3_3 25D3

64A6

U6
R7

=PP3V3_S0_SB_3V3_1V5_VCCHDA
=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA

AE23
AE26
AH26

=PP1V05_S0_SB_CPU_IO

AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19

=PP3V3_S0_SB_VCC3_3_IDE

A5
B13
B16
B7
C10
D15
F9
G11
G12
G16
W5

25C4 64A6
64A3

NOTE:
VCCHDA AND VCCSUSHDA CAN BE 1.5V OR 3.3V
DEPENDING ON VIO OF AZALIA INTERFACE
CODEC ICS CONSIDERED SO FAR ARE 3.3V

21C1 25C4 64D6

25B4 64B6

=PP3V3_S0_SB_VCC3_3_PCI 25A4
PP3V3_S5_SB_RTC

64B6

21D6 25A4 26D3

=PP3V3_S5_SB_VCCSUS3_3 24A5

25B6 25D2 64A3

A24
C24
D19
VCCSUS3_3
D22
G19

VCC3_3
VCCDMIPLL

ARX
VCC1_5_A

USB
VCCSUS3_3

VCCSATAPLL

K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7

=PP3V3_S5_SB_VCCSUS3_3_USB

25D2 64A3

VCC3_3
AB17
VCC1_5_A AC17

VCC1_5_A

ATX
VCC1_5_A

T7
F17
G17
=PP1V5_S0_SB_VCC1_5_A

25C2 64C6

AB8
VCC1_5_A AC8
K7

64A3 25D2 25B6 24B3

E3 VCCSUS3_3

64C6 25B6

=PP1V5_S0_SB_VCCUSBPLL

C1

VCCSAUS1_5
CHANGE SYMBOL TO 1.05

AA2
Y7

V5
V1
W2
W7

P7

=PP3V3_S5_SB_VCCSUS3_3

VOLTAGE GENERATED INTERNALLY


SO NO CONNECT HERE

L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

C28
G20

VOLTAGE GENERATED INTERNALLY


SO NO CONNECT HERE

VCCUSBPLL
VCCLAN1_5
CHANGE SYMBOL TO 1.05

USB CORE
VCC1_5_A

A1
H6
H7
J6
J7

SB: 4 OF 4
=PP1V5_S0_SB_VCC1_5_A_USB_CORE

25B2 64C6

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.


0

DRAWING NUMBER

SCALE

REV.

051-7374
SHT
NONE

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

A
OF

24

79

8
64B6 34C8 22B5

64D3

=PP3V3_S0_SB
64C6

=PP5V_S0_SB
2

ICH VCC1_5_A/ARX BYPASS


(ICH LOGIC&IO[ARX] 1.5V PWR)
24B5 =PP1V5_S0_SB_VCC1_5_A_ARX
1

R2502
100
1/16W
MF-LF
402
5%

10%
16V
2 X5R
402

BAT54DW
SOT-363

ICH V5REF BYPASS


(ICH REFERENCE FOR 5V TOLERANCE ON CORE WELL INPUT)
PP5V_S0_SB_V5REF 24D5

D
1

C2511
0.1UF

D2502

C2503

64C6 24B5

PLACEMENT NOTE:
PLACE C2503 < 2.54MM OF PIN AD17 OF SB
ON SECONDARY SIDE OR 3.56MM ON PRIMARY

10%
16V
2 X5R
402

C2502

C2517
0.1UF

D2502
3

10%
6.3V
2 CERM
402

20%
2 2.5V
POLY
CASE-C2

64B6 25B8

ICH V5REF_SUS BYPASS


(ICH REFERENCE FOR 5V TOLERANCE ON RESUME WELL LOGIC)
PP5V_S5_SB_V5REF_SUS 24D5

C2504

C2513
0.1UF

ICH VCC_PAUX/VCCLAN3_3 BYPASS


(ICH LAN I/F BUFFER 3.3V PWR)
=PP3V3_S0_SB_VCCLAN3_3
24D3 64A6
1

PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PIN AH11

0
PLACEMENT NOTE:
PLACE C2504 < 2.54MM OF PIN F6 OF SB
ON SECONDARY SIDE OR 3.56MM ON PRIMARY

0
64C6 24A5

C2514
1UF

64A3 24B3

10%
2 16V
X5R
402

64A6

C2500 1 C2505 1 C2506 1 C2507


0.1UF

220UF

10%
2 16V
X5R
402

20%
2 2.5V
POLY
SMB2

0.1UF

10%
2 16V
X5R
402

0.1UF

C2521
0.1UF

C
ICH VCC1_5A BYPASS
(ICH LOGIC&IO 1.5V PWR)
64C6 24A3

ICH V_CPU_IO BYPASS


(ICH CPU I/O 1.05V PWR)
24C3 21C1 =PP1V05_S0_SB_CPU_IO

1
64A3 25D2 24B3 24A5

=PP3V3_S5_SB_VCCSUS3_3

10%
2 16V
X5R
402

C2520
0.1UF

10%
2 16V
X5R
402

PLACEMENT NOTE:
PLACE C2520 NEAR PIN E3 OF SB

C2522

0.1UF

C2524
4.7UF

20%
2 6.3V
CERM
603

10%
2 16V
X5R
402

ICH USB CORE/VCC1_5_A BYPASS


(ICH USB CORE 1.5V PWR)
0
64C6 24A3

ICH VCCUSBPLL BYPASS


(ICH USB PLL 1.5V PWR)
ICH VCC3_3 BYPASS
(ICH IO BUFFER 3.3V PWR)
=PP3V3_S0_SB_VCC3_3

64C6 24A5

=PP1V5_S0_SB_VCCUSBPLL
1

C2515

10%
16V
2 X5R
402

PLACEMENT NOTE:
PLACE C2509 NEAR PIN B27 OF SB

ICH IDE/VCC3_3 BYPASS


(ICH IDE I/O 3.3V PWR)
=PP3V3_S0_SB_VCC3_3_IDE

PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PINS AA7 ... AG19

0.1UF

10%
2 16V
X5R
402

0.1UF

10%
16V
2 X5R
402

=PP1V5_S0_SB_VCC1_5_A_USB_CORE

0.1UF

C2523
0.1UF

64B6 24C3

C2509

C2510

PLACEMENT NOTE:
PLACE CAPS NEAR PINS
AB8 AND AC8 OF SB

PLACEMENT NOTE:
PLACE C2500 & C2505-07 < 2.54MM OF SB
ON SECONDARY SIDE OR 3.56MM ON PRIMARY
NEAR PINS D28, T28, AD28

=PP1V5_S0_SB_VCC1_5_A

ICH VCCSUS3_3 BYPASS


(ICH SUSPEND 3.3V PWR)

10%
16V
2 X5R
402

10%
16V
2 X5R
402

22C1 24D5

VOLTAGE=1.5V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM

CRITICAL

0.1UF

10%
16V
2 X5R
402

10%
16V
2 X5R
402

PLACEMENT NOTE:
PLACE NEAR PINS AE23, AE26 & AH26 OF SB

PP1V5_S0_SB_VCC1_5_B

C2532

0.1UF

PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PIN AG9

ICH VCCA3GP(VCC1_5_B BYPASS


(ICH IO,LOGIC 1.5V PWR)

C2533

=PP3V3_S5_SB_VCCSUS3_3_USB

PLACEMENT NOTE:
PLACE CAPS NEAR PINS
K3 ... N7 OF SB

SM-3

64B6 25C6 24B5

0.1UF

ICH VCC3_3/VCCHDA BYPASS


(ICH INTEL HDA CORE 3.3V PWR)
24C3 =PP3V3_S0_SB_3V3_1V5_VCCHDA

64D6

=PP1V5_S0_SB

0.1UF

10%
2 16V
X5R
402

C2519

ICH VCC1_5_A/ATX BYPASS


(ICH LOGIC&IO[ATX] 1.5V PWR)
=PP1V5_S0_SB_VCC1_5_A_ATX

10%
6.3V
2 CERM
402

L2500

C2534

0.1UF

ICH USB/VCCSUS3_3 BYPASS


(ICH SUSPEND USB 3.3V PWR)

10%
16V
2 X5R
402

PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PIN U6

100-OHM-EMI

C2531

10%
16V
2 X5R
402

VOLTAGE=5V
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.25MM

0.1UF

PLACEMENT NOTE:
PLACE CAPS NEAR PINS
A24 ... G19 AND P7 OF SB

PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PIN AD2

ICH VCC3_3 BYPASS


(ICH IO BUFFER 3.3V PWR)
24B5 =PP3V3_S0_SB_VCC3_3

SOT-363

10%
16V
2 X5R
402

PLACEHOLDER
FOR 270UF

330UF

PLACEMENT NOTE:
PLACE CAP UNDER SB NEAR PINS V1,
V5, W2, OR W7

BAT54DW

NC

1/16W
MF-LF
402
5%

C2516

=PP3V3_S5_SB_VCCSUS3_3

=PP3V3_S5_SB

R2501

1UF

ICH VCCSATAPLL BYPASS


(ICH SATA PLL 1.5V PWR)
=PP1V5_S0_SB_VCCSATAPLL

10%
2 16V
X5R
402

10

25A8
64C6

=PP5V_S5_SB
2

64A3

C2518
0.1UF

0
64A3 23D8 23D4 23B7 23A7

64A3 25B6 24B3 24A5

24D3 64D6

CRITICAL
1

ICH VCCSUS3_3 BYPASS


(ICH SUSPEND 3.3V PWR)

ICH CORE/VCC1_05 BYPASS


(ICH CORE 1.05V PWR)
=PPVCORE_S0_SB

PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PIN AG5

VOLTAGE=5V
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.25MM

0.1UF

10%
16V
2 X5R
402

PLACEMENT NOTE:
PLACE CAPS AT EDGE OF SB

5
NC

PLACEMENT NOTE:
PLACE C2520 NEAR PIN C1 OF SB

PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PINS A1 ... J7

C2512
0.1UF

10%
16V
2 X5R
402

C2525
0.1UF

10%
16V
2 X5R
402

ICH PCI/VCC3_3 BYPASS


(ICH PCI I/O 3.3V PWR)

64B6 24B3

PLACEMENT NOTE:
DISTRIBUTE IN PCI SECTION OF SB
NEAR PINS A5 ... G16

=PP3V3_S0_SB_VCC3_3_PCI

C2526
0.1UF

10%
16V
2 X5R
402

C2527
0.1UF

C2528
0.1UF

10%
16V
2 X5R
402

10%
16V
2 X5R
402

64C6 25C8

SB: 4 OF 4

=PP1V5_S0_SB

L2507

R2500
1

1/10W 5%
MF-LF 603

ICH VCCDMIPLL BYPASS


(ICH DMI PLL 1.5V PWR)
PP1V5_S0_SB_VCCDMIPLL

0.28-OHM
PP1V5_S0_SB_VCCDMIPLL_F
VOLTAGE=1.5V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM

24B5

VOLTAGE=1.5V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM

1206
1

C2501

0.01UF

ICH VCCRTC BYPASS


(ICH RTC 3.3V PWR)
PP3V3_S5_SB_RTC

20%
2 6.3V
X5R
603

PLACEMENT NOTE:
PLACE CAPS NEAR PIN W5 OF SB

C2530
0.1UF

10%
16V
2 X5R
402

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

C2529

II NOT TO REPRODUCE OR COPY IT

0.1UF

10%
16V
2 X5R
402

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART


SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

SHT
NONE

REV.

051-7374

SCALE

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

C2508
10UF

10%
2 16V
CERM
402

PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON
SECONDARY SIDE OR 3.56MM ON PRIMARY

26D3 24B3 21D6

A
OF

25

79

1
=PP3V3_S0_SB_PCI

64D1

D2600
BAT54DW
SOT-363
1
6

=PP3V42_G3H_SB_RTC

CRITICAL

J2600

R2607

NC

20K

21D6

5%
1/16W
MF-LF
402

IO

38A5 22A6

C2610

IO

38A5 22A6

1UF

IO

38A5 22A6

IO

RP2601
8.2K

SB_RTC_RST_L

5%
1/16W
MF-LF
2 402

21D6

C2605

38A5 22A6

IO

38A5 22A6

IO

38A5 22A6

IO

22A6

IO

SB_SM_INTRUDER_L

5%
22B6

IN

22B6

IN

22B6

IN

38A5 22B6

IN

22A7
22A7
38A5 22A7
22A6
23A4 22A6
22A6

SB RTC Crystal Circuit


0

10M

32.768K

5%
1/16W
MF-LF
402 2
21D6

SM-LF

197S0098

Is this the best part to use?

IO
IO
IO
IO
IO
IO

R2637
R2636
R2638
R2639
R2640
R2642
R2641
R2643

INT_PIRQA_L
INT_PIRQB_L
INT_PIRQC_L
INT_PIRQD_L
SB_GPIO2
SB_GPIO3
SB_GPIO4
SB_GPIO5

8
7
6
5
1/16W
SM-LF
1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2

10K

R2696
11B4 7C6

IN

XDP_DBRESET_L

1K

15pF

OMIT

5%
50V
CERM
402

PM_SYSRST_L

MAKE_BASE=TRUE

Unbuffered

OUT

R2698

This part is never stuffed,


it provides a set of pads
on the board to short or
to solder a reset button.

45C8
23C5

XDP_DBRESET_L_R

5%
1/16W
MF-LF
402

C2609

Platform Reset Connections

100K

5%
1/16W
MF-LF
402 2

22A6

IN

Silk: "SYS RST"

PLT_RST_L

NB_RST_IN_L
100-ohm on NB page

R2687
1

64A6

=PP3V3_S0_RSTBUF

MC74VHC1G08

C2680

PLT_RST_BUF_L

100K

=PP3V3_S0_SB_PM

64B6 26B8

C2607 1

20%
2 10V
CERM
402

MC74VHC1G00
23C5

SC70-5
4

VR_PWRGD_CK410

MC74VHC1G08

U2603

OUT

58C7

VR_PWRGD_CK410_L

MAKE_BASE=TRUE

23C3

PM_SB_PWROK

IN

R26121

SMC_LRESET_L

45C8

TPM_LRESET_L

53B7

ENET_RST_L

36C6

5%
1/16W
MF-LF
402

5%
1/16W
MF-LF
2 402

SC70
4

64B3

U2601 2
3

58C7
14B6

VR_PWRGOOD_DELAY

63B1
45D8 5B2

ALL_SYS_PWRGD

Gated

=PP3V3_S3_RSTGATE

IN

NOSTUFF

NOSTUFF
IN

R2688

Q2680

100K

BSS138

R2622

5%
1/16W
MF-LF
402 2

OUT

100

DEBUG_RST_L
5C2 47C6
Linda Card represents 3 loads

1.8K

10K

32A4

43C4

5%
1/16W
MF-LF
402

R2611

20%
10V
CERM 2
402

0.1UF

R2684

C2611
0.1UF

OUT

=PP3V3_S0_SB_PM

R2683

TPM

5%
1/16W
MF-LF
2 402

20%
2 10V
CERM
402

68B5

AIRPORT_RST_L

5%
1/16W
MF-LF
402

R2680

0.1UF

TMDS_RST_L

R2681

SC70

U2680 4
2

5%
1/16W
MF-LF
402

5%
1/16W
MF-LF
402

Buffered

64B6 26B6

14B7

MAKE_BASE=TRUE

R2685

8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K

IO

5%
1/16W
MF-LF
402 2

5%
50V
CERM
402

SB_RTC_X2

IO

1
2
3
4

PCI_REQ0_L
PCI_REQ1_L
PCI_REQ2_L
PCI_REQ3_L

R26971

CRITICAL

Y2600

34C8 22A6

=PP3V3_S5_SB_PM

15pF

SB_RTC_X1_R

5%
1/16W
MF-LF
402

R26091

64A3 23D1 11B5

C2608

R2610
SB_RTC_X1

8
7
6
5

RP2602
8.2K

OUT

NC

22A7

21D6

1
2
3
4

PCI_SERR_L
PCI_DEVSEL_L
PCI_PERR_L
PCI_LOCK_L

1/16W
SM-LF

518S0188

5%

OUT

10%
2 6.3V
CERM
402

1M

8
7
6
5

1
2
3
4

PCI_FRAME_L
PCI_IRDY_L
PCI_TRDY_L
PCI_STOP_L

1/16W
SM-LF

1UF

38A5 22A7

R2600

R2606

PPVBATT_G3C_RTC

5%

21D6 24B3 25A4

10%
2 6.3V
CERM
402

5%
1/16W
MF-LF
2 402

SYM_1

NC

1K

F-RT-SM
3

88460-0201

NC

SOT-363
4
3

PPVBATT_G3C_RTC_R

PP3V3_S5_SB_RTC

MAKE_BASE=TRUE

D2600
BAT54DW

RTC Battery Connector

PP3V3_G3C_SB_RTC_D

64B6

RP2600
8.2K

5%
1/16W
MF-LF
2 402

SOT23

10K

5%
1/16W
MF-LF
2 402

CK410_PD_VTT_PWRGD_L

R2689
0

5%
1/16W
MF-LF
2 402

R2682

PLT_RST_GATED_L

5%
1/16W
MF-LF
402

G
1
45D8

IN

Initial resistor values are based on CRB,


but may change after characterization.

SMC_RSTGATE_L

SB Misc
SYNC_MASTER=NB

SYNC_DATE=07/26/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

26

79

ICH7-M SMBus Connections

SMC "0" SMBus Connections

SMC "RMT" SMBus Connections


NOTE: SMC RMT bus remains powered and may be active in S3 state

64A6

=PP3V3_S0_SMBUS_SB

64A6

R27001

ICH7-M

2.0K

U2100
(MASTER)

23D5

SMB_CLK

23D5

SMB_DATA

5%
1/16W
MF-LF
402 2

SMBUS_SB_SCL

R2701
2.0K

5%
1/16W
MF-LF
2 402

Clock Chip

SMC

CY28445-5: U3301
(Write: 0xD2 Read: 0xD3)

U5800
(MASTER)

SMB_CK410_CLK

32B6

45C8

SMB_0_CLK

SMB_CK410_DATA

32B6

45C5

SMB_0_DATA

MAKE_BASE=TRUE

SMBUS_SB_SDA
MAKE_BASE=TRUE

=PP3V3_S0_SMBUS_SMC_0

R27501
2.0K

5%
1/16W
MF-LF
402 2

64B3

=PP3V3_S3_SMBUS_SMC_RMT

R27701

SMC

R2751
2.0K

SMBUS_SMC_0_SCL
MAKE_BASE=TRUE

SMBUS_SMC_0_SDA
MAKE_BASE=TRUE

SO-DIMM "A"

SKIN TEMP

J2800
(Write: 0xA0 Read: 0xA1)

MAX6695: U6250

45B5

SMB_RMT_CLK

45B5

SMB_RMT_DATA

R2771
2.0K

5%
1/16W
MF-LF
402 2

5%
1/16W
MF-LF
2 402

SMBUS_SMC_RMT_SCL
MAKE_BASE=TRUE

SMBUS_SMC_RMT_SDA
MAKE_BASE=TRUE

AMBIENT THERMAL

Top-Case SMBus Connections:

ATS/ALS

=I2C_SODIMMA_SCL

28A6

THRM_DIMM1_SMB_CLK

49B4

=SMBUS_ATS_SCL

67A2

=I2C_SODIMMA_SDA

28A6

THRM_DIMM1_SMB_DATA

49B4

=SMBUS_ATS_SDA

67A2

SO-DIMM "B"

SMC "Battery A" SMBus Connections

J2900
(Write: 0xA4 Read: 0xA5)
=I2C_SODIMMB_SCL

29A6

=I2C_SODIMMB_SDA

29A6

64D1

=PP3V42_G3H_SMBUS_SMC_BSA

R27801

SMC
AIRPORT

2.0K

U5800
(MASTER)

5%
1/16W
MF-LF
2 402

SMC "MLB" SMBus Connections

J5300
=SMB_AIRPORT_CLK

64A6

=PP3V3_S0_SMBUS_SMC_MLB

45B5

SMB_BSA_CLK

45B5

SMB_BSA_DATA

Battery

R2781

8.2K

U5800
(MASTER)

8.2K

5%
1/16W
MF-LF
402 2

J8250

5%
1/16W
MF-LF
2 402

SMBUS_SMC_BSA_SCL

=SMBUS_BATT_SCL

65A2

=SMBUS_BATT_SDA

65A2

MAKE_BASE=TRUE

SMBUS_SMC_BSA_SDA
MAKE_BASE=TRUE

43B4

=SMB_AIRPORT_DATA

43B4

R27601

SMC

2.0K

U5800
(MASTER)

GEYSER
J4900
=SMB_GEYSER_CLK

40C4

=SMB_GEYSER_DATA

40C4

5%
1/16W
MF-LF
402 2

45B5

SMB_MLB_CLK

5B2

45B5

SMB_MLB_DATA

5B2

CPU Temp

R2761
2.0K

5%
1/16W
MF-LF
2 402

ADT7461: U1001
(Write: 0x98 Read: 0x99)

SMBUS_SMC_MLB_SCL

SMB_THRM_CLK

10B3

SMB_THRM_DATA

10B3

MAKE_BASE=TRUE

SMBUS_SMC_MLB_SDA
MAKE_BASE=TRUE

SMC "Battery B" SMBus Connections


=PP3V3_S0_SMBUS_SMC_BSB

SMC

Top-Case

U5800
(MASTER)

U6200
(SEE TABLE)
45C5

THRM_DIMM0_SMB_CLK

49C4
45C8

THRM_DIMM0_SMB_DATA

R2782
100K

64A6

R2783
100K

5%
1/16W
MF-LF
2 402

5%
1/16W
MF-LF
2 402

SMB_BSB_CLK
SMB_BSB_DATA

49C4

M42 SMBUS CONNECTIONS


SYNC_MASTER=ENET

SYNC_DATE=08/30/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

27

79

7
64C3 29D6 29D4 29B2 28D4 28B2 19C8 19C7

28D1

MEM_VREF_A

3
1

C2820
2.2UF

20%
4V
2 X5R
402

C2800

15D7 MEM_A_DQ<6>
15D7 MEM_A_DQ<7>

0.1uF

20%
2 10V
CERM
402

7
9

15C5
15C5

11

MEM_A_DQS_N<0>
MEM_A_DQS_P<0>

13
15
17

MEM_A_DQ<3>
15D7 MEM_A_DQ<2>
15D7

19
21

23

MEM_A_DQ<13>
15C7 MEM_A_DQ<8>
15C7

25
27

15C5
15C5

29

MEM_A_DQS_N<1>
MEM_A_DQS_P<1>

31
33
35

MEM_A_DQ<10>
15C7 MEM_A_DQ<9>
15C7

37
39
41
43

MEM_A_DQ<24>
15C7 MEM_A_DQ<25>
15C7

45
47

15C5
15C5

49

MEM_A_DQS_N<3>
MEM_A_DQS_P<3>

51
53
55

MEM_A_DQ<31>
15C7 MEM_A_DQ<27>
15C7

57
59

15C7
15C7

61

MEM_A_DQ<22>
MEM_A_DQ<19>

63
65

15D5

67

MEM_A_DM<2>
NC

69
71

15C7

15C7

73

MEM_A_DQ<20>
MEM_A_DQ<17>

75
77

30D6 14C4

79

MEM_CKE<0>

81

NC
30C6 15D5

83
85

MEM_A_BS<2>

87
30C6
30C6
30C6

89

15B5 MEM_A_A<12>
15B5 MEM_A_A<9>
15B5 MEM_A_A<8>

91
93
95
97

MEM_A_A<5>
15B5 MEM_A_A<3>
15C5 MEM_A_A<1>

30C6 15B5
30C6
30C6

99
101
103
105

MEM_A_A<10>
15D5 MEM_A_BS<0>
15B5 MEM_A_WE_L

30C6 15B5
30C6
30B6

107
109
111

30B6 15D5
30D6 14C4

113

MEM_A_CAS_L
MEM_CS_L<1>

115
117

30D6 14C4

119

MEM_ODT<1>

121
123

MEM_A_DQ<37>
15C7 MEM_A_DQ<32>
15B7

125
127
129

MEM_A_DQS_N<4>
15C5 MEM_A_DQS_P<4>
15C5

131
133
135

MEM_A_DQ<38>
15B7 MEM_A_DQ<39>
15B7

137
139

15B7
15B7

141

MEM_A_DQ<44>
MEM_A_DQ<41>

143
145

15C5

147

MEM_A_DM<5>

149
151

MEM_A_DQ<47>
15B7 MEM_A_DQ<43>
15B7

153
155
157

MEM_A_DQ<63>
15B7 MEM_A_DQ<56>
15A7

159
161

NC

163
165
167

MEM_A_DQS_N<7>
15C5 MEM_A_DQS_P<7>
15C5

169
171
173

MEM_A_DQ<58>
15B7 MEM_A_DQ<57>
15B7

175
177

15B7
15B7

179

MEM_A_DQ<48>
MEM_A_DQ<49>

181
183

15C5

185

MEM_A_DM<6>

187
189

MEM_A_DQ<52>
15B7 MEM_A_DQ<55>
15B7

64A6 29A7 29A3

=PPSPD_S0_MEM
1

C2822
2.2UF

20%
4V
2 X5R
402

191
193

C2821
0.1uF

20%
10V
2 CERM
402

27C6
27D6

=I2C_SODIMMA_SDA
=I2C_SODIMMA_SCL

195
197
199

VREF
VSS1
DQ0
DQ1

201

OMIT
CRITICAL

VSS0

J2801
F-RT-TH2

VSS4
DQS0*
DQS0
VSS6
DQ2
DQ3
VSS8
DQ8

DQ4
DQ5
VSS2
DM0
VSS5
DQ6
DQ7
VSS7
DQ12
DQ13
VSS9

DQ9

DM1

VSS10
DQS1*

VSS11
CK0

DQS1

CK0*

VSS12
DQ10

VSS13
DQ14

DQ11
VSS14

DQ15
VSS15
KEY

VSS16

VSS17

DQ16

DQ20

DQ17
VSS18

DQ21
VSS19

DQS2*

NC0

DQS2
VSS21

DM2
VSS22

DQ18

DQ22

DQ19
VSS23

DQ23
VSS24

DQ24
DQ25

DQ28
DQ29

VSS25

VSS26

DM3
NC1

DQS3*
DQS3

VSS27

VSS28

DQ26
DQ27

DQ30
DQ31

VSS29
CKE0
VDD0

VSS30
NC/CKE1
VDD1

NC2
BA2

NC/A15
NC/A14

VDD2

VDD3

A12
A9

A11
A7

A8

A6

VDD4
A5

VDD5
A4

A3

A2

A1
VDD6

A0
VDD7

A10/AP
BA0

BA1
RAS*

WE*

S0*

VDD8
CAS*

VDD9
ODT0

NC/S1*

NC/A13

VDD10
NC/ODT1

VDD11
NC3

VSS31

VSS32

DQ32
DQ33

DQ36
DQ37

VSS33
DQS4*

VSS34
DM4

DQS4

VSS35

VSS36
DQ34

DQ38
DQ39

DQ35

VSS37

VSS38
DQ40

DQ44
DQ45

DQ41

VSS39

VSS40
DM5

DQS5*
DQS5

VSS41
DQ42

VSS42
DQ46

DQ43

DQ47

VSS43
DQ48

VSS44
DQ52

DQ49

DQ53

VSS45
NC_TEST

VSS46
CK1

VSS47

CK1*

DQS6*
DQS6

VSS48
DM6

VSS49
DQ50

VSS50
DQ54

DQ51

DQ55

VSS51
DQ56

VSS52
DQ60

DQ57

DQ61

VSS53
DM7

VSS54
DQS7*

VSS55

DQS7

DQ58
DQ59

VSS56
DQ62

VSS57
SDA

DQ63
VSS58

SCL

SA0

VDDSPD

SA1

516-0135

=PP1V8_S3_MEM

19C7 19C8 28B2 28D6 29B2 29D4 29D6 64C3

29A5

202

=GND_CHASSIS_DIPDIMM_CENTER 6B8

5
DIP DIMM CONN

=PP1V8_S3_MEM

DDR2-SODIMM-STD

2
4

MEM_A_DQ<5>
MEM_A_DQ<1>

15D7

DDR2 VRef

15D7

8
10

MEM_A_DM<0>

15D5

One 0.1uF per connector

12
14

MEM_A_DQ<0>
MEM_A_DQ<4>

16

15D7
15D7

64C6 61C2 29D2 19D7 16B6 14C2

=PP1V8_S3_MEM_NB

18
20
22

MEM_A_DQ<12>
MEM_A_DQ<14>

15C7

MEM_A_DM<1>

15D5

MEM_CLK_P<0>
MEM_CLK_N<0>

14D4

15C7

R2800
1K

26

1%
1/16W
MF-LF
402

24
2

28
30
32

MEM_VREF_A

34

36

MEM_A_DQ<11>
MEM_A_DQ<15>

38

28D7

VOLTAGE=0.9V
MIN_LINE_WIDTH=0.25 mm
MIN_NECK_WIDTH=0.25 mm

14D4

R2801
1K

15C7

1%
1/16W
MF-LF
2 402

15C7

40
42
44
46

MEM_A_DQ<29>
MEM_A_DQ<28>

15C7

DIMM_OVERTEMP_L
MEM_A_DM<3>

15C5

15C7

48
50
52

Yellow uses 10K divider and TLV2463

6B1 29C4

to drive MCH and DIMM connectors.

54
56

MEM_A_DQ<26>
MEM_A_DQ<30>

58

(See Capell Valley pg 47)

15C7
15C7

60
62

MEM_A_DQ<18>
MEM_A_DQ<23>

64

Page Notes

15C7
15C7

66
68

MEM_A_DQS_N<2>
MEM_A_DQS_P<2>

70

Power aliases required by this page:


- =PP1V8_S3_MEM
- =PPSPD_S0_MEM (2.5V - 3.3V)

15C5
15C5

72
74

MEM_A_DQ<16>
MEM_A_DQ<21>

76

Signal aliases required by this page:


- =I2C_MEM_SCL
- =I2C_MEM_SDA

15C7
15C7

78
80

MEM_CKE<1>

82
84 NC
86 NC

MEM_A_A<15>
MEM_A_A<14>

BOM options provided by this page:


(NONE)

14C4 30D6

6A4
6A4

88
90

MEM_A_A<11>
MEM_A_A<7>
MEM_A_A<6>

92
94

DDR2 Bypass Caps

15B5 30C6
15B5 30C6

(For return current)

15B5 30C6

96
98

MEM_A_A<4>
MEM_A_A<2>
MEM_A_A<0>

100
102

64C3 29D6 29D4 29B2 28D6 28D4 19C8 19C7

=PP1V8_S3_MEM

15B5 30C6
15C5 30C6
15C5 30C6

104

C2809
4.7uF

106

MEM_A_BS<1>
MEM_A_RAS_L
MEM_CS_L<0>

108
110

20%

15D5 30C6

2
15B5 30B6

6.3V
CERM
603

14C4 30D6

112
114

MEM_ODT<0>
MEM_A_A<13>

116

14C4 30D6
15B5 30C6

118
120

NC
2

122
124
126

MEM_A_DQ<36>
MEM_A_DQ<34>

C2810

C2811
0.1uF

0.1uF

20%

20%

20%

10V
CERM
402

C2814

10V
CERM
402

C2815

C2812

0.1uF

C2813
0.1uF
20%

10V

CERM
402

10V
CERM
402

15B7
15B7

128
130

MEM_A_DM<4>

15C5

132
134
136

MEM_A_DQ<35>
MEM_A_DQ<33>

15B7
15C7

C2816

C2817

0.1uF

0.1uF

1uF

1uF

20%

20%

10%

10%

10V
CERM
402

C2830

10V

CERM
402

6.3V

6.3V
2 CERM

CERM
402

402

138
140
142

MEM_A_DQ<40>
MEM_A_DQ<45>

15B7
15B7

15C5

6.3V
2 CERM

144
146
148

1uF
MEM_A_DQS_N<5>
MEM_A_DQS_P<5>

15C5

C2831
1uF

10%
402

C2832
1uF

10%

10%

6.3V
2 CERM

6.3V
2 CERM

402

402

150
152
154

MEM_A_DQ<42>
MEM_A_DQ<46>

15B7
15B7

156
158
160

MEM_A_DQ<60>
MEM_A_DQ<61>

The 4.7uF and 1.0uF caps can be changed to 5x 2.2uF caps,

15A7
15A7

when they get cheaper.

162
164
166

MEM_CLK_P<1>
MEM_CLK_N<1>

14D4
TABLE_5_HEAD

14D4

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

CRITICAL

BOM OPTION

168
TABLE_5_ITEM

170

MEM_A_DM<7>

15C5

516-0149

CONN,200P STD SODIMM OLD REV

J2801

CRITICAL

PVT-DIMM

516-0154

CONN,200P STD SODIMM NEW REV 3.5

J2801

CRITICAL

POST-RAMP-DIMM35

172
174
176

TABLE_5_ITEM

MEM_A_DQ<62>
MEM_A_DQ<59>

15A7

DDR2 SO-DIMM Connector A

15B7

178
180
182

MEM_A_DQ<51>
MEM_A_DQ<53>

SYNC_MASTER=MEMORY

SYNC_DATE=06/20/2005

15B7

NOTICE OF PROPRIETARY PROPERTY

15B7

184
186
188

MEM_A_DQS_N<6>
MEM_A_DQS_P<6>

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

15C5
15C5

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

190
192
194

MEM_A_DQ<50>
MEM_A_DQ<54>

II NOT TO REPRODUCE OR COPY IT


15B7

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART


15B7

196

SIZE

198

200

APPLE COMPUTER INC.

ADDR=0xA0(WR)/0xA1(RD)

DRAWING NUMBER

SCALE

SHT

=GND_CHASSIS_DIPDIMM_LEFT 6D8

NONE

REV.

051-7374

A
OF

28

79

64C3 29D4 29B2 28D6 28D4 28B2 19C8 19C7

29D1

=PP1V8_S3_MEM

MEM_VREF_B

3
1

C2920
2.2UF

20%
4V
2 X5R
402

C2900

MEM_B_DQ<1>
15D4 MEM_B_DQ<5>
15D4

0.1uF

20%
10V
2 CERM
402

7
9

15C2
15C2

11

MEM_B_DQS_N<0>
MEM_B_DQS_P<0>

13
15
17

MEM_B_DQ<2>
15D4 MEM_B_DQ<3>
15D4

19
21

15C4
15C4

23

MEM_B_DQ<12>
MEM_B_DQ<13>

25
27
29

MEM_B_DQS_N<1>
15C2 MEM_B_DQS_P<1>
15C2

31
33
35

MEM_B_DQ<8>
15C4 MEM_B_DQ<10>
15C4

37
39
41
43

MEM_B_DQ<17>
15C4 MEM_B_DQ<20>
15C4

45
47
49

MEM_B_DQS_N<2>
15C2 MEM_B_DQS_P<2>
15C2

51
53

15C4
15C4

55

MEM_B_DQ<22>
MEM_B_DQ<18>

57
59

15C4
15C4

61

MEM_B_DQ<29>
MEM_B_DQ<27>

63
65
67

15C2 MEM_B_DM<3>

NC

69
71

15C4
15C4

73

MEM_B_DQ<30>
MEM_B_DQ<31>

75
77

30D6 14C4

79

MEM_CKE<2>

81

NC
30A6 15D2

83
85

MEM_B_BS<2>

87
89

MEM_B_A<12>
15B2 MEM_B_A<9>
15B2 MEM_B_A<8>

30A5 15B2
30B5
30B5

91
93
95
97

MEM_B_A<5>
MEM_B_A<3>
15C2 MEM_B_A<1>

30B5 15B2

99

30B5 15B2
30B5

101
103
105

MEM_B_A<10>
15D2 MEM_B_BS<0>
15B2 MEM_B_WE_L

30B5 15B2
30A6
30A6

107
109
111
113

MEM_B_CAS_L
14C4 MEM_CS_L<3>

30A6 15D2
30D6

115
117

30D6 14C4

119

MEM_ODT<3>

121
123

15B4 MEM_B_DQ<58>
15A4 MEM_B_DQ<62>

125
127
129

MEM_B_DQS_N<7>
15C2 MEM_B_DQS_P<7>
15C2

131
133
135

MEM_B_DQ<57>
15A4 MEM_B_DQ<60>
15B4

137
139
141

MEM_B_DQ<55>
15B4 MEM_B_DQ<50>
15B4

143
145

15C2

147

MEM_B_DM<6>

149
15B4
15B4

151

MEM_B_DQ<52>
MEM_B_DQ<49>

153
155
157

MEM_B_DQ<32>
15B4 MEM_B_DQ<37>
15C4

159
161

NC

163
165

15C2
15C2

MEM_B_DQS_N<4>
MEM_B_DQS_P<4>

167
169
171

MEM_B_DQ<38>
15B4 MEM_B_DQ<34>
15B4

173
175
177

MEM_B_DQ<45>
15B4 MEM_B_DQ<44>
15B4

179
181
183

15C2

MEM_B_DM<5>

185
187

64A6 29A3 28A7

=PPSPD_S0_MEM

MEM_B_DQ<41>
15B4 MEM_B_DQ<43>
15B4

C2922
2.2UF

20%
4V
2 X5R
402

C2921
0.1uF

20%
10V
2 CERM
402

189
191
193

=I2C_SODIMMB_SDA
27C6 =I2C_SODIMMB_SCL
27C6

195
197
199

VREF
VSS1
DQ0

=GND_CHASSIS_DIPDIMM_RIGHT

J2901
F-RT-TH2

DQS0*
DQS0
VSS6
DQ2
DQ3
VSS8
DQ8
DQ9

VSS0
DQ4
DQ5
VSS2
DM0
VSS5
DQ6
DQ7
VSS7
DQ12
DQ13
VSS9
DM1

VSS10

VSS11

DQS1*
DQS1

CK0
CK0*

VSS12

VSS13

DQ10
DQ11

DQ14
DQ15

VSS14

VSS15
KEY

VSS16
DQ16

VSS17
DQ20

DQ17

DQ21

VSS18
DQS2*

VSS19
NC0

DQS2

DM2

VSS21
DQ18

VSS22
DQ22

DQ19
VSS23

DQ23
VSS24

DQ24

DQ28

DQ25
VSS25

DQ29
VSS26

DM3

DQS3*

NC1
VSS27

DQS3
VSS28

DQ26

DQ30

DQ27
VSS29

DQ31
VSS30

CKE0
VDD0

NC/CKE1
VDD1

NC2

NC/A15

BA2
VDD2

NC/A14
VDD3

A12

A11

A9
A8

A7
A6

VDD4

VDD5

A5
A3

A4
A2

A1
VDD6

A0
VDD7

A10/AP

BA1

BA0
WE*

RAS*
S0*

VDD8

VDD9

CAS*
NC/S1*

ODT0
NC/A13

VDD10

VDD11

NC/ODT1
VSS31

NC3
VSS32

DQ32
DQ33

DQ36
DQ37

VSS33

VSS34

DQS4*
DQS4

DM4
VSS35

VSS36

DQ38

DQ34
DQ35

DQ39
VSS37

VSS38

DQ44

DQ40
DQ41

DQ45
VSS39

VSS40
DM5

DQS5*
DQS5

VSS41

VSS42

DQ42
DQ43

DQ46
DQ47

VSS43

VSS44

DQ48
DQ49

DQ52
DQ53

VSS45

VSS46

NC_TEST
VSS47

CK1
CK1*

DQS6*
DQS6

VSS48
DM6

VSS49

VSS50

DQ50
DQ51

DQ54
DQ55

VSS51

VSS52

DQ56
DQ57

DQ60
DQ61

VSS53

VSS54

DM7
VSS55

DQS7*
DQS7

DQ58
DQ59

VSS56
DQ62

VSS57

DQ63

SDA
SCL

VSS58
SA0

VDDSPD

SA1

6B8

=PP1V8_S3_MEM

MEM_B_DQ<0>
MEM_B_DQ<4>

19C7 19C8 28B2 28D4 28D6 29B2 29D6 64C3

DDR2 VREF (FOR CONNECTOR B)

2
15D4

One 0.1uF per connector

15D4

8
10

MEM_B_DM<0>

15D2
64C6 61C2 28D2 19D7 16B6 14C2

12
14

MEM_B_DQ<6>
MEM_B_DQ<7>

16

=PP1V8_S3_MEM_NB

15D4

15D4

20

MEM_B_DQ<15>
MEM_B_DQ<14>

22

R2901
1K

18

1%
1/16W
MF-LF
2 402

15C4
15C4

24

MEM_VREF_B 29D7

26

MEM_B_DM<1>

15D2

MEM_CLK_P<3>
MEM_CLK_N<3>

14D4

VOLTAGE=0.9V
MIN_LINE_WIDTH=0.25 mm
MIN_NECK_WIDTH=0.25 mm
1

28
30
32

R2902

14D4

1K

34
36

MEM_B_DQ<11>
MEM_B_DQ<9>

38

15C4

1%
1/16W
MF-LF
402

15C4

40
42
44

MEM_B_DQ<21>
MEM_B_DQ<16>

46

15C4

Yellow uses 10K divider and TLV2463

15C4

48

to drive MCH and DIMM connectors.

50

DIMM_OVERTEMP_L
MEM_B_DM<2>

52

6B1 28C4

(See Capell Valley pg 47)

15D2

54
56

MEM_B_DQ<23>
MEM_B_DQ<19>

58

Page Notes

15C4
15C4

60
62

MEM_B_DQ<25>
MEM_B_DQ<24>

64

Power aliases required by this page:


- =PP1V8_S3_MEM
- =PPSPD_S0_MEM (2.5V - 3.3V)

15C4
15C4

66
68

MEM_B_DQS_N<3>
MEM_B_DQS_P<3>

70

Signal aliases required by this page:


- =I2C_MEM_SCL
- =I2C_MEM_SDA

15C2
15C2

72
74

MEM_B_DQ<28>
MEM_B_DQ<26>

76

BOM options provided by this page:


(NONE)

15C4
15C4

78
80

MEM_CKE<3>

NOTE: This page does not supply VREF.


The reference voltage must be provided
by another page.

14C4 30D6

82
84 NC
86 NC

MEM_B_A<15>
MEM_B_A<14>

6A4
6A4

88
90

MEM_B_A<11>
MEM_B_A<7>
MEM_B_A<6>

92
94

DDR2 Bypass Caps

15B2 30A5
15B2 30B5

(For return current)

15B2 30B5

96

64C3 29D6 29D4 28D6 28D4 28B2 19C8 19C7

98

MEM_B_A<4>
MEM_B_A<2>
MEM_B_A<0>

100
102

=PP1V8_S3_MEM

15B2 30B5
15C2 30B5

15C2 30B5

C2909
4.7uF

104

20%

106

MEM_B_BS<1>
MEM_B_RAS_L
MEM_CS_L<2>

108
110

15D2 30A6
15B2 30A6

6.3V
CERM
603

14C4 30D6

112
114

MEM_ODT<2>
MEM_B_A<13>

116

14C4 30D6

15B2 30A5

118
120

NC

122
124

MEM_B_DQ<63>
MEM_B_DQ<59>

126

C2910

C2911
0.1uF

0.1uF

20%

20%

20%

10V
CERM
402

C2914

10V
CERM
402

C2915

C2912

0.1uF

C2913
0.1uF
20%

10V

CERM
402

10V
CERM
402

15A4
15B4

128
130

MEM_B_DM<7>

15C2

0.1uF

132

MEM_B_DQ<61>
MEM_B_DQ<56>

136

15A4
15B4

CERM
402

C2930

10V

CERM
402

C2917
1uF

10%

20%

10V

C2916
1uF

0.1uF

20%

134

10%

6.3V

2 6.3V
CERM

CERM
402

402

138
140

MEM_B_DQ<53>
MEM_B_DQ<48>

142

15B4
15B4

144
146

MEM_B_DQS_N<6>
MEM_B_DQS_P<6>

148

1uF

10%

10%

6.3V
2 CERM

15C2
15C2

C2931

1uF
402

C2932
1uF
10%

6.3V
2 CERM

6.3V
2 CERM

402

402

150
152

MEM_B_DQ<54>
MEM_B_DQ<51>

154

15B4
15B4

The 4.7uF and 1.0uF caps can be changed to 5x 2.2uF caps,

156
158

MEM_B_DQ<33>
MEM_B_DQ<36>

160

when they get cheaper.

15C4
15B4

162

TABLE_5_HEAD

PART#

164
166

MEM_CLK_P<2>
MEM_CLK_N<2>

14D4

170

MEM_B_DM<4>

15C2

MEM_B_DQ<35>
MEM_B_DQ<39>

15B4

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

CRITICAL

BOM OPTION
TABLE_5_ITEM

168

14D4
516-0149

CONN,200P STD SODIMM OLD REV

J2901

CRITICAL

PVT-DIMM

516-0154

CONN,200P STD SODIMM NEW REV 3.5

J2901

CRITICAL

POST-RAMP-DIMM35

TABLE_5_ITEM

172
174
176

DDR2 SO-DIMM Connector B

15B4

178

SYNC_MASTER=MEMORY

180

MEM_B_DQ<40>
MEM_B_DQ<42>

182

15B4

186

15B4

MEM_B_DQS_N<5>
MEM_B_DQS_P<5>

188

15C2

=PPSPD_S0_MEM

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
28A7 29A7 64A6

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

15C2

190
1

192

MEM_B_DQ<46>
MEM_B_DQ<47>

194

15B4

II NOT TO REPRODUCE OR COPY IT

R2900

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

10K
15B4

196
198

200

SYNC_DATE=06/20/2005

NOTICE OF PROPRIETARY PROPERTY

184

202 =GND_CHASSIS_DIPDIMM_CENTER

516-0135

201

OMIT
CRITICAL

DQ1
VSS4

5
DIP DIMM CONN

DDR2-SODIMM-STD

5%
1/16W
MF-LF
402

SIZE

Resistor prevents pwr-gnd short

J2900_SA1

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

6B8
28D5

ADDR=0xA4(WR)/0xA5(RD)

SHT
NONE

REV.

051-7374

A
OF

29

79

One cap for each side of every RPAK, one cap for every two discrete resistors
BOMOPTION shown at the top of each group applies to every part below it

64D6

29B6 29B4 28B6 28B4 14C4

IN

MEM_CS_L<3..0>
0
1
2
3

RP3000
R3001
RP3001
RP3002

56
56
56
56

=PP0V9_S0_MEM_TERM

3
1

6
2

5%

5% 1/16W SM-LF
1/16W MF-LF 402

5%

1/16W SM-LF

D
29C6 29C4 28C6 28C4 14C4

IN

MEM_CKE<3..0>
0
1
2
3

RP3003
RP3004
RP3005
RP3006

56
56
56
56

5% 1/16W SM-LF

5% 1/16W SM-LF

5% 1/16W SM-LF

IN

MEM_ODT<3..0>
0
1
2
3

28C6 28C4 28B6 28B4 15C5 15B5

IN

MEM_A_A<13..0>
0
1
2
3
4
5
6
7
8
9

10
11
12
13

RP3000
R3009
RP3001
R3011

RP3007
RP3008
RP3007
RP3008
RP3007
RP3008
RP3007
RP3004
RP3008
RP3003
RP3009
RP3004
RP3003
R3025

56

56
56

56

56

5%

5% 1/16W SM-LF
1/16W MF-LF 402
5%

2
5%

1/16W SM-LF
1/16W MF-LF 402

5% 1/16W SM-LF

5% 1/16W SM-LF

5% 1/16W SM-LF

5% 1/16W SM-LF

5% 1/16W SM-LF

5% 1/16W SM-LF

5% 1/16W SM-LF

5% 1/16W SM-LF

5% 1/16W SM-LF

5% 1/16W SM-LF

5% 1/16W SM-LF

5% 1/16W SM-LF

IN

MEM_A_BS<2..0>
0
1
2

RP3009
RP3000
RP3003

56
56
56

IN
IN

28B6 15B5

IN

RP3000
RP3009
RP3009

MEM_A_RAS_L
MEM_A_CAS_L
MEM_A_WE_L

56
56
56

5% 1/16W SM-LF

5%

1/16W SM-LF

5% 1/16W SM-LF

5% 1/16W SM-LF
5% 1/16W SM-LF

C3004
20%
10V
CERM
402

C3006
20%
10V
CERM
402

C3008
20%
10V
CERM
402

29B6 15B2
29B4 15C2

IN
IN
IN

29B6 15B2

IN

29B4 15B2

IN

29B6 15B2

IN

29C4 15B2
29C4 15B2
29C6 15B2

IN
IN
IN

29C6 15B2

IN

29B6 15C2

IN

29C4 15B2

IN

29C6 15B2

IN

29B4 15B2

IN

56
56
56
56
56
56
56
56
56
56
56

C3010

20%
10V
CERM
402

5% 1/16W SM-LF

IN

5% 1/16W SM-LF

5% 1/16W SM-LF

5% 1/16W SM-LF

5% 1/16W SM-LF

5% 1/16W SM-LF

5% 1/16W SM-LF

5% 1/16W SM-LF

5% 1/16W SM-LF

5% 1/16W SM-LF

C3012
20%
10V
CERM
402

0
1
2

29B4 15B2

IN

29B6 15D2

IN

29B6 15B2

IN

RP3002
RP3011
RP3005

RP3001
RP3002
RP3002

MEM_B_RAS_L
MEM_B_CAS_L
MEM_B_WE_L

56
56
56

56
56
56

20%
10V
CERM
402

C3009
20%
10V
CERM
402

C3014
20%
10V
CERM
402

C3016
20%
10V
CERM
402

C3011
20%
10V
CERM
402

C3013
0.1uF

20%
10V
CERM
402

C3015
0.1uF

20%
10V
CERM
402

C3017
0.1uF

5% 1/16W SM-LF

5% 1/16W SM-LF

C3018

0.1uF
2

20%
10V
CERM
402

20%
10V
CERM
402

C3020

20%
10V
CERM
402

C3022

20%
10V
CERM
402

20%
10V
CERM
402

C3021
0.1uF

0.1uF

5% 1/16W SM-LF

C3019
0.1uF

0.1uF

5% 1/16W SM-LF

MEM_B_BS<2..0>

C3007

5% 1/16W SM-LF
5% 1/16W MF-LF 402

29C6 29B6 29B4 15D2

20%
10V
CERM
402

0.1uF
2

0.1uF

6
5% 1/16W SM-LF

C3005

0.1uF
2

0.1uF

56
56
56

20%
10V
CERM
402

0.1uF
2

0.1uF

RP3011
RP3010
RP3011
R3035
RP3011
RP3010
RP3006
RP3006
RP3010
RP3005
RP3010
RP3006
RP3005
RP3001

C3003

LAYOUT NOTE:PLACE ONE CAP CLOSE TO EVERY TWO PULLUP RESISTORS TERMINATED
TO PP0V9_S0_MEM_TERM

MEM_B_A<0>
MEM_B_A<3>
MEM_B_A<2>
MEM_B_A<10>
MEM_B_A<4>
MEM_B_A<5>
MEM_B_A<6>
MEM_B_A<7>
MEM_B_A<8>
MEM_B_A<9>
MEM_B_A<1>
MEM_B_A<11>
MEM_B_A<12>
MEM_B_A<13>

0.1uF
2

0.1uF

29B4 15C2

20%
10V
CERM
402

0.1uF
2

0.1uF

28B6 15D5

20%
10V
CERM
402

0.1uF

5% 1/16W SM-LF

28B4 15B5

C3002

C3001
0.1uF

0.1uF

5% 1/16W SM-LF
5% 1/16W MF-LF 402

28C6 28B6 28B4 15D5

5
2

56
56
56
56
56
56
56
56
56
56
56
56
56

20%
10V
CERM
402

0.1uF

5% 1/16W SM-LF

29B6 29B4 28B6 28B4 14C4

C3000
0.1uF

5% 1/16W SM-LF

20%
10V
CERM
402

C3023
0.1uF

20%
10V
CERM
402

Memory Active Termination

5%

5% 1/16W SM-LF

1/16W SM-LF

5% 1/16W SM-LF

C3024

0.1uF
2

20%
10V
CERM
402

C3025

0.1uF
2

NOTICE OF PROPRIETARY PROPERTY

20%
10V
CERM
402

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

30

79

8
Page Notes

Power aliases required by this page:


- =PP5V_S0_MEMVTT
- =PP1V8_S0_MEMVTT
- =PP0V9_S0_MEMVTT_LDO
Signal aliases required by this page:
(NONE)
BOM options provided by this page:
(NONE)

DDR2 Vtt Regulator


C

64D3

=PP5V_S0_MEMVTT

64C3

=PP1V8_S3_MEMVTT

R3104
1

220

5%
1/16W
MF-LF
402

If power inputs are not S0,


MEMVTT_EN can be used to
disable MEMVTT in sleep.

PP1V8_S3_MEMVTT_VDDQ

MIN_LINE_WIDTH=0.2 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=1.8V

R3100
1K

5%
1/16W
MF-LF
402

C3104

20%
6.3V
CERM1
603

C3101

10uF
20%
6.3V
X5R
603

VCC

U3100
MSOP-8

VTT_IN
EN

VREF

MEMVTT_VREF

CRITICAL

C3103

VTTS

VTT

10%
16V
X5R
402

C3102
10uF

GND

0.1uF
2

10%
6.3V
CERM
402

BD3533FVM

VDDQ

2.2uF

MEMVTT_EN

C3100
1uF

MEMVTT_EN_PU

20%
6.3V
X5R
603

=PP0V9_S0_MEM_REG

63B2 64D8

CRITICAL

C3105
150UF

20%
6.3V
POLY
SMC-LF

Memory Vtt Supply

SYNC_MASTER=(MASTER)

SYNC_DATE=(MASTER)

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

31

79

PP3V3_S0_CK410_VDD48
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.5mm
MIN_NECK_WIDTH=0.2mm

0.1UF
10%
402

120-OHM-0.3A-EMI
1

10UF

=PP3V3_S0_CK410

32C7 32D8 64A6

0402-LF

5%
1/16W
MF-LF
402

C3308 1 C3309

2 16V
X5R

2.2

L3302

R3302
1

C3310
1UF

20%
2 6.3V
X5R
603

10%
2 6.3V
CERM
402

D
L3301

120-OHM-0.3A-EMI
64A6 32D3 32C7

=PP3V3_S0_CK410

PP3V3_S0_CK410_VDD_CPU_SRC

PP3V3_S0_CK410_VDD_PCI

VOLTAGE=3.3V
MIN_LINE_WIDTH=0.5mm
MIN_NECK_WIDTH=0.2mm

0402-LF

C3314

1UF

10UF

10%
6.3V
2 CERM
402

VOLTAGE=3.3V
MIN_LINE_WIDTH=0.5mm
MIN_NECK_WIDTH=0.2mm

C3316 1 C3315 1 C3301 1 C3302 1 C3303 1 C3304


0.1UF

20%
2 6.3V
X5R
603

10%
16V
2 X5R
402

0.1UF

10%
16V
2 X5R
402

0.1UF

0.1UF

10%
16V
2 X5R
402

10%
16V
2 X5R
402

C3305 1 C3306 1 C3317


0.1UF

0.1UF

10%

2 16V
X5R

10%
16V
2 X5R
402

0.1UF
10%

2 16V
X5R

402

402

R3304
1

2.2

10UF

20%
2 6.3V
X5R
603

R3303
PP3V3_S0_CK410_VDDA

PP3V3_S0_CK410_VDD_REF

VOLTAGE=3.3V
MIN_LINE_WIDTH=0.5mm
MIN_NECK_WIDTH=0.2mm

5%
1/16W
MF-LF
402

VOLTAGE=3.3V
MIN_LINE_WIDTH=0.5mm
MIN_NECK_WIDTH=0.2mm

C3312 C3311
1

10UF

0.1UF

20%
2 6.3V
X5R
603

C3307
0.1UF

10%

5%
1/16W
MF-LF
402

10%

2 16V
X5R

2 16V
X5R

402

402

C3389
15PF

5%
50V
2 CERM
402

C3390

17
28

12

49

35

(EACH POWER PIN PLACED ONE 0.1UF)


(PLACED 0.1UF NEAR THE RELATIVE POWER PIN)

VDD_SRC

VDD_REF

5X3.2-SM

61
VDD_PCI 67

VDD_48

NEED TO CHECK CAP VALUE

VDD_CPU

Y3301

14.31818

43

CRITICAL

15PF

5%
50V
2 CERM
402

OMIT

U3301
SLG8LP436

38

VDD_A
39 VSS_A

PCI_STOP*
CPU_STOP*

QFN

CPU_0*
CPU_0

CK410_XTAL_IN
CK410_XTAL_OUT
64A6 32D8 32D3

=PP3V3_S0_CK410
33B8

IN

CK410_FSB_TEST_MODE

R3301

33D8

OUT

CK410_PCIF0_CLK

(FW PCI 33MHZ) 33D8


10K
5%
(TPM LPC 33MHZ)
1/16W
MF-LF
(SMC LPC 33MHZ)
2402
(NO USED)
33A8 CK410_PCI5_FCTSEL1
IO
(PORT80 LPC 33MHZ)

(ICH7M PCI 33MHZ)

33D8
5C7

OUT

OUT
OUT
OUT
OUT

CRITICAL

51 XTAL_IN
50 XTAL_OUT

CK410_PCI1_CLK
CK410_PCI2_CLK
CK410_PCI3_CLK
CK410_PCI4_CLK
(INT PD)

8 FS_B_TEST_MODE

44
45

PM_STPPCI_L
23C8 PM_STPCPU_L

23C8

33D5

CK410_CPU1_N
5C7 CK410_CPU1_P

OUT

42

33D5

CPU_ITP/SRC_11*

36

CPU_ITP/SRC_11

37

CK410_CPU2_ITP_SRC10_N
CK410_CPU2_ITP_SRC10_P

SRC_0/LCD_CLK*
SRC_0/LCD_CLK

11
10

SRC_1*

14

SRC_1

13
9

CK410_SRC1_N
6B4 CK410_SRC1_P
6B4 CK410_SRC_CLKREQ1_L

SRC_2*
SRC_2

16

33C5 5C7

15

33C5 5C7

SRC_3*

19
18

CK410_SRC3_N
CK410_SRC3_P
6B4 CK410_SRC_CLKREQ3_L

64 PCI_4
65 PCI_5/FCT_SEL_1

(INT PU) CLKREQ_1*

IN
OUT

41

57 PCI_1
58 PCI_2
63 PCI_3

IN

CK410_CPU0_N
5C7 CK410_CPU0_P

33D5 5C7

CPU_1*
CPU_1

68 PCIF_0/ITP_EN
1 PCIF_1

CK410_PCIF1_CLK

56 (INT PU)
55 (INT PU)

33D5 5C7

CK410_LVDS_N
5C7 CK410_LVDS_P

OUT

OUT

OUT
OUT

33A5

OUT

CK410_SRC2_N
CK410_SRC2_P

(CPU HOST 133/167MHZ)


(GMCH HOST 133/167MHZ)

OUT

33A5 5C7

6B4

(FROM ICH7 GPIO18 STPPCI* )


(FROM ICH7 GPIO20 STPCPU* )

OUT

(ITP HOST 133/167MHZ)


(GMCH D_REFSSCLKIN DISPLAY PLL B 100MHZ)
(GPU PCI-E 100 MHZ )

OUT
IN

NEED TO DECIDE THE CLKREQ CONNECTION,TO GPIO?

OUT
OUT

(ICH7M DMI 100 MHZ )

(PULL UP PIN 68 TO ENABLE ITP HOST CLK)


(ICH SM BUS)

27D6
27D6

IN
IO

SMB_CK410_CLK
SMB_CK410_DATA

47 SCL
48 SDA

CK410_IREF

SRC_3
(INT PU) CLKREQ_3*

40 NC

SRC_4*

VSS_48

R3300

SRC_4
(INT PU) CLKREQ_4*

46 VSS_CPU

475

1%
1/16W
MF-LF
2 402

62

59
22
21
20

SRC_5*

24

SRC_5

23
60

66 VSS_PCI

(INT PU) CLKREQ_5*


SRC_6*
SRC_6

27

52 VSS_REF
31 VSS_SRC

(INT PU) CLKREQ_6*

25

SRC_7*
SRC_7

30
29

SRC_8*

32

SRC_8

33
34

69 THRML_PAD

(INT PU) CLKREQ_8*


DOT_96*/27M_SS*
DOT_96/27M

(INT PD)

VTT_PWRGD*/PD

48M/FS_A

REF_0/FS_C/TEST_SEL

(INT PD)
REF_1/FCT_SEL_0

54
53

OUT

6B4

OUT

CK410_SRC4_N
CK410_SRC4_P
23C3 SB_CLK100M_SATA_OE_L
33B5 5C7
33B5 5C7

CK410_SRC5_N
33C5 5C7 CK410_SRC5_P
14B6 CLK_NB_OE_L
33C5 5C7

CK410_SRC6_N
CK410_SRC6_P
CK410_SRC_CLKREQ6_L

33C5 5C7

26

6B4

33D5 5C7
43C6

6B4
6B4

CK410_SRC7_N
CK410_SRC7_P

CK410_SRC8_N
33C5 5B7 CK410_SRC8_P
5B7 CK410_SRC_CLKREQ8_L
33C5 5B7

33A5

OUT
OUT
IN

CK410_PD_VTT_PWRGD_L

CK410_USB48_FSA
CK410_CLK14P3M_TIMER
33A8 CK410_REF1_FCTSEL0
33C8

33B8

(ICH SATA 100 MHZ)


(FROM ICH7 GPIO35)

(SIGNAL NAME WILL BE CHANGED POST PROTO TO REMOVE 100M FROM SIGNAL NAME)

OUT
OUT
IN

(GMCH G_CLKIN 100 MHZ )


(FROM GMCH CLK_REQ*)

OUT
OUT

(WIRELESS PCI-E 100 MHZ )

IN
OUT

(NOT USED )

OUT
OUT

(GIGA LAN PCI-E 100 MHZ )

OUT
IN

CK410_DOT96_27M_N
CK410_DOT96_27M_P
26A8

(FOR PCI-E CARD)

IN

(GMCH D_REFCLKIN DISPLAY PLL A 96MHZ)

OUT
OUT
IN
OUT
OUT

(FROM CPU VCORE PWR GOOD)


(ICH7M USB 48MHZ)
(ICH7M,SIO,LPC REF. 14.318MHZ)

IO

CLOCKS

FCTSEL1
0

FCTSEL0
0

PIN 6
DOT96T

PIN 7
DOT96C

PIN 10
100MT_SST

SYNC_MASTER=CLOCK

PIN 11
100MC_SST

DOT96T

DOT96C

SRCT0

SRCC0

27M NON
SPREAD

27M
SPREAD

SRCT0

SRCC0

OFF LOW

TBD

SRCT0

SRCC0

SYNC_DATE=06/03/2005

NOTICE OF PROPRIETARY PROPERTY

* FOR INT. GRAPHIC SYSTEM

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

* FOR EXT. GRAPHIC SYSTEM

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

32

79

R3429
32B6

IN

32B6

IN

32B6

IN

CK410_PCI1_CLK

33

TPM

5%
1/16W
MF-LF
402

CK410_PCI2_CLK
1

33

33

5%
1/16W
MF-LF
402

R3433
CK410_PCI3_CLK

PCI_CLK_FW

38A5

OUT

(TO FIREWIRE PCI 33MHZ)

R3430
2

PCI_CLK_TPM

OUT

53C6

PCI_CLK_SMC

OUT

45C8

R3413
32C4 5C7

32C4 5C7

32C4 5C7

33

32B7

32C4 5C7

PCI_CLK_SB

5%
1/16W
MF-LF
402

CK410_USB48_FSA

IN

33

R3417
32A4

33

22A6

OUT

CK410_CPU1_N

IN

5%
1/16W
MF-LF
402

PCI_CLK_PORT80_LPC

5C2 47C5

OUT

(PORT80 LPC 33MHZ)

23D3

SB_CLK48M_USBCTLR

=PP1V05_S0_FSB_NB

CK410_SRC6_P

IN

32B4 5C7

12A7 12B7 12C2 19D7 33B8 33C8 64D6

5%
1/16W
MF-LF
2 402

1K

NB_BSEL<0>

5%
1/16W
MF-LF
402

R3401
2.2K 2

32B4 5C7

R3450

CPU_BSEL_R<0>

5%
1/16W
MF-LF
402

OUT

7B4

CPU_BSEL<0>

IN

5%
1/16W
MF-LF
402

NOSTUFF
1

R3469
1K

32B4 5C7

CK410_SRC2_P

IN

32B4 5C7

=PP1V05_S0_FSB_NB

32A4 5B7

CK410_SRC8_P

IN

R3470

NEED TO CHECK THE BSEL PULLS

1K

5%
1/16W
MF-LF
2 402

R3471
OUT

CK410_FSB_TEST_MODE

1K

32A4 5B7

14C6

1K

NB_BSEL<1>

5%
1/16W
MF-LF
402

OUT

CK410_SRC4_P

IN

7B4

CPU_BSEL<1>

IN

(FROM CPU FS_B)

5%
1/16W
MF-LF
402

NOSTUFF
1

R3452
1K

=PP1V05_S0_FSB_NB

49.9 2
1%
1/16W
MF-LF
402

49.9 2

NOSTUFF

1%
1/16W
MF-LF
402

FSB_CLK_NB_P

33D3 12A6

R3404
1

49.9 2

NOSTUFF

1%
1/16W
MF-LF
402

R3403
FSB_CLK_NB_N

49.9 2

NOSTUFF

1%
1/16W
MF-LF
402

OUT

FSB_CLK_CPU_P

R3442
49.9 2
1

NOSTUFF

NB_CLK100M_GCLKIN_P

OUT

R3400

1%
1/16W
MF-LF
402

1%
1/16W
MF-LF
402

R3405

49.9 2
1

FSB_CLK_CPU_N

(GMCH G_CLKIN 100MHZ)


2

33B2 14C4

NB_CLK100M_GCLKIN_N

33B3 14C4

NB_CLK_DREFCLKIN_P

NOSTUFF

49.9 2

NOSTUFF

OUT

1%
1/16W
MF-LF
402

R3402
SB_CLK100M_DMI_P

33B3 14C4

OUT

NB_CLK_DREFCLKIN_N

49.9 2

22C2 33B2

1%
1/16W
MF-LF
402

(ICH7M DMI 100MHZ)


33A4 14C4

OUT

NOSTUFF

49.9 2

NOSTUFF

OUT

NB_CLK_DREFSSCLKIN_P

1%
1/16W
MF-LF
402

33D2 36C6

(GIGA-LAN PCI-E 100MHZ)


33C4 14C4

NOSTUFF

1%
1/16W
MF-LF
402

NB_CLK100M_GCLKIN_P

R3408
1

49.9 2

NOSTUFF

ENET_CLK100M_PCIE_N

OUT

OUT

NB_CLK100M_GCLKIN_N

OUT

21B6 33B2

49.9 2

NOSTUFF

1%
1/16W
MF-LF
402

21B6 33B2

SB_CLK100M_DMI_P

R3431
1

1%
1/16W
MF-LF
402

R3407
33C3 22C2

49.9 2
1

SB_CLK100M_DMI_N

5%
1/16W
MF-LF
402

1%
1/16W
MF-LF
402

NOSTUFF

49.9 2

NOSTUFF

(ICH7M SATA 100MHZ)


SB_CLK100M_SATA_N

1%
1/16W
MF-LF
402

R3406

33D2 36C6

33C4 14C4

49.9 2

43C6 33D4

NOSTUFF

R3436

AIRPORT_CLK100M_PCIE_P

49.9 2

R3473

R3474
IN

32A4

CK410_CLK14P3M_TIMER

1K

R3437

5%
1/16W
MF-LF
2 402

R3475

14C6

5%
1/16W
MF-LF
402

1K

43C6 33C4

NB_BSEL<2>

5%
1/16W
MF-LF
402

OUT

7B4

R3454
1K

CPU_BSEL<2>

IN

(FROM CPU FS_C)

R3418
32A4 5C7

IN

CK410_DOT96_27M_P

32A4 5C7 IN

SB_CLK14P3M_TIMER

5%
1/16W
MF-LF
402

33C2 14C4

IO

CK410_DOT96_27M_N

IO

OUT

23D3

(ICH7M 14.318MHZ)
IN

CK410_LVDS_P

CK410_PCI5_FCTSEL1

1%
1/16W
MF-LF
402

NOSTUFF

OUT

(GMCH DISPLAY PLLA 96MHZ)

33B3 21B6

SB_CLK100M_SATA_N

33C2 14C4

NB_CLK_DREFCLKIN_N

49.9 2
1%
1/16W
MF-LF
402

OUT

33C2 14B4

NB_CLK_DREFSSCLKIN_P OUT

(GMCH DISPLAY PLLB FOR LVDS SPREAD 100MHZ)

R3421
IN

CK410_LVDS_N

33C2 14C4

NB_CLK_DREFSSCLKIN_N

OUT

5%
1/16W
MF-LF
402

CK410_REF1_FCTSEL0

CLOCK TERMINATION

R3466

R3467

10K
5%

10K
5%

1/16W
MF-LF
2402

1/16W
MF-LF
2402

SET FCTSEL0,FCTSEL1 TO 00
EVEN THESE TWO PINS INTERNAL PULL DOWN,
CYPRESS RECOMMAND TO ADD EXTERNAL PULLS,

49.9 2

R3420
32B4 5C7

5%
1/16W
MF-LF
402

32B4 5C7

32A4

NB_CLK_DREFCLKIN_P

NOSTUFF

R3481

R3482

5%
1/16W
MF-LF
402
32B6

49.9 2

SB_CLK100M_SATA_P

R3419

R3476
2

33B3 21B6

5%
1/16W
MF-LF
402

5%
1/16W
MF-LF
2 402

56

1%
1/16W
MF-LF
402

5%
1/16W
MF-LF
402

AIRPORT_CLK100M_PCIE_N

(TO MCH FS_C)

R3453

CPU_BSEL_R<2>

1%
1/16W
MF-LF
402

NOSTUFF

1K

R3410

NB_CLK_DREFSSCLKIN_N

22C2 33B2

33A3 14B4

ENET_CLK100M_PCIE_P

R3478

5%
1/16W
MF-LF
2 402

R3438
ENET_CLK100M_PCIE_N

NOSTUFF

NOSTUFF

36C6 33C3

33C3 22C2

R3439

ENET_CLK100M_PCIE_P

33D3 7C6

SB_CLK100M_SATA_P

CK410_SRC4_N

IN

1%
1/16W
MF-LF
402

R3409

1%
1/16W
MF-LF
402

49.9 2
1

OUT

5%
1/16W
MF-LF
402

5%
1/16W
MF-LF
402

R3451

CPU_BSEL_R<1>

R3477

(TO MCH FS_B)

11B3 33D2

OUT

AIRPORT_CLK100M_PCIE_N

R3426

CK410_SRC8_N

IN

R3472

5%
1/16W
MF-LF
402

19D7 12C2 12B7 12A7


64D6 33C8 33C7

5%
1/16W
MF-LF
402

43C6
33B2

SB_CLK100M_DMI_N

5%
1/16W
MF-LF
402

R3465
0

36C6 33C3

49.9 2

R3440
CPU_XDP_CLK_N

33D3 12A6

R3428

CK410_SRC2_N

IN

11B3 33D2

OUT

AIRPORT_CLK100M_PCIE_P

5%
1/16W
MF-LF
402

5%
1/16W
MF-LF
402

5%
1/16W
MF-LF
2 402

1
NOSTUFF

(ITP HOST 133/167MHZ)


CPU_XDP_CLK_N

R3423
1

CPU_XDP_CLK_P

33D3 7C6

R3427

(FROM CPU FS_A)

5%
1/16W
MF-LF
402

33C2 14C4

CK410_SRC5_N

IN

CPU_XDP_CLK_P

(WIRELESS PCI-E 100MHZ)

5%
1/16W
MF-LF
402

(TO MCH FS_A)

33D3 11B3

5%
1/16W
MF-LF
402

R3468
1

14C6

CK410_SRC5_P

IN

R3422
32B4 5C7

33D3 11B3

12A6 33C2

OUT

ITP

R3435

CK410_SRC6_N

IN

12A6 33D2

OUT

R3415

43C6 33B2

5%
1/16W
MF-LF
402

(TO ICH7M USB 48MHZ)

OUT

NOSTUFF

5%
1/16W
MF-LF
402

R3434
32B4 5C7

IN

1K

32C6

FSB_CLK_NB_N

CK410_CPU2_ITP_SRC10_N

7C6 33C2

OUT

(GMCH HOST 133/167MHZ)

ITP

R3480

19D7 12C2 12B7 12A7


64D6 33C7 33B8

FSB_CLK_NB_P

CK410_CPU2_ITP_SRC10_P

IN

FSB_CLK_CPU_N

R3441

R3416
32C4 5C7

5%
1/16W
MF-LF
402

5%
1/16W
MF-LF
402

7C6 33C2

OUT

(CPU HOST 133/167MHZ)

R3412

(TO ICH7M PCI 33MHZ)

R3463

CK410_PCIF0_CLK

IN

CK410_CPU1_P

IN

FSB_CLK_CPU_P

5%
1/16W
MF-LF
402

5%
1/16W
MF-LF
402

R3432
1

R3411

D
CK410_PCIF1_CLK

CK410_CPU0_N

IN

(TO SMC PCI 33MHZ)

5%
1/16W
MF-LF
402

R3414

32C4 5C7

IN

(TO TPM PCI 33MHZ)

5%
1/16W
MF-LF
402

32B6 5C7

CK410_CPU0_P

IN

SYNC_MASTER=CLOCK

NOSTUFF R3450,R3451,R3453 FOR MANUAL CPU FREQUENCY


FS_C
1
0
#
0
0

FS_B
0
0
1
1

FS_A
1
1
1
0

CPU
100M
133M
166M
200M

32A4 5B7

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

CK410_SRC_CLKREQ8_L

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
1

R3490

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

1K
5%
1/16W
MF-LF
2 402

SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

SHT
NONE

REV.

051-7374

SCALE

# NAPA PLATFORM ONLY SUPPORT 133M/166M CPU SPEED, M42 133MHZ

SYNC_DATE=06/06/2005

NOTICE OF PROPRIETARY PROPERTY

A
OF

33

79

Q3810
FDC638P
64A3

SM-LF

=PP5V_S5_PATA

PP5V_S0_IDE_PATA

MAKE_BASE=TRUE
VOLTAGE=5V
MIN_LINE_WIDTH=0.35MM
MIN_NECK_WIDTH=0.25MM

5
4
1

R3865

6.2K
5%
1/16W
MF-LF
2 402

=PP3V3_S0_SB
64B6 25D8 22B5

ODD_PWR_EN_SLOW_START_L

R3876

C3876

ODD_PWR_EN_SLOW_START

Q3875

SB_GPIO5

ODD_PWR_EN_L

26C3 22A6

2N7002DW-X-F

SOT-363

MAKE_BASE=TRUE

NOSTUFF

10K

R3851

C3875

5%
1/16W
MF-LF
Per ATA Spec
2 402

0.47UF

10%
2 6.3V
CERM-X5R
402

R3877

NC
NC

IDE_RESET_L
21B5 IDE_PDD<7>
21B5 IDE_PDD<6>
21B5 IDE_PDD<5>
21B5 IDE_PDD<4>
21B5 IDE_PDD<3>
21B5 IDE_PDD<2>
21B5 IDE_PDD<1>
21C5 IDE_PDD<0>
23A3

100K

5%
1/16W
MF-LF
2 402

ODD detect need less than 100ms include OS latency

21B6
21B6

OUT

21B6

OUT

IDE_PDIOW_L

IDE_PDIORDY
IDE_IRQ14
IDE_PDA<1>
IDE_PDA<0>
21B5 IDE_PDCS1_L
21B5
21B5

NO STUFF

C3804 1

R3853

M-ST-SM
51

NC

33K

NC

5%
1/16W
MF-LF
2 402

4.7K

SOT-363

CRITICAL

J3801
5-1775184-0

2N7002DW-X-F

5%
1/16W
MF-LF
402 2

20%
10V
CERM
402

6
D

Q3875

64A6

R38241

0.1UF
ODD_PWR_EN_SLOW_START_L_R

5%
1/16W
MF-LF
2 402

SB_GPIO5 IS PULLED HIGH

10K

5%
1/16W
MF-LF
402

10K

=PP3V3_S0_PATA

R3825
1

=PP5V_S0_IDE_PATA

10pF

10

12

11

14

13

16

15

18

17

20

19

22

21

24

23

26

25

28

27

30

29

32

31

34

33

36

35

NC 38

37

40

39

42

41

44

43

46

45

48

47

50

49

5%
50V
CERM 2
402

IDE_CSEL_PD

IDE_PDD<8>
IDE_PDD<9>
IDE_PDD<10>
IDE_PDD<11>
IDE_PDD<12>
IDE_PDD<13>
IDE_PDD<14>
IDE_PDD<15>
IDE_PDIOR_L

21B5
21B5
21B5
21B5
21B5
21B5

21B6

IDE_PDDACK_L 21B6
SMC_ODD_DETECT
IDE_PDA<2>
IDE_PDCS3_L

21B5
21B5

NOSTUFF
NC

C3805
0.1uF
10V

NC

NOSTUFF
1

C3806
10uF

20%
6.3V
2 X5R
603

20%

52

Indicates disk presence, to SMC

NC

NC

21B5
21B5

2 CERM
402

516S0339

21B6

OUT

IDE_PDDREQ
1

R3858
0

5%
1/16W
MF-LF
2 402
PER ATA SPEC

R3859

PLACE C3805/C3806 CLOSE TO JC901 FOR PP5V_PATA.


APPLY A WIDE TRACE SHAPE FROM JC901 TO C3805/C3806.
MIN_NECK & MIN_LINE WIDTH
ARE CONTROLLED BY PP5V_RUN 1MM / 0.6MM.

6.2K
5%
1/16W
MF-LF
2 402
PER ATA7 SPEC

PATA CONNECTOR

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

34

79

SATA CONNECTOR
Place L3901 near J3901

518S0390

VALUE=3900PF IN REFERENCE SCHEM

L3901
90-OHM-300mA

CRITICAL

SATA_C_R2D_F_P

CAPS TO BE SAME DISTANCE


FROM SB WITHIN EACH PAIR
21B6 SATA_C_R2D_C_P

C3903

2012H

R3900
1

0.0047UF

J3901

402

SATA_C_R2D_F_N

20247-019E

F-ST-SM
20

C3901

21B6

SATA_C_R2D_C_N

0.0047UF

100

23D2

SATA_C_DET_L

IN

5%
1/16W
MF-LF
402

IN

IN

402

SYM_VER-1

PLACE NEAR ICH7 PIN


1
2

SATA_C_R2D_P
SATA_C_R2D_N

SATA_C_D2R_C_N
SATA_C_D2R_C_P

L3902

C3900
1
2

402

C3902
402

=PP5V_S0_SATA
NC

NOSTUFF
1

11

C3920
0.1uF

21B6

SATA_RBIAS_N

21B6

SATA_RBIAS_P

MAKE_BASE=TRUE

21B6

SATA_C_D2R_P

OUT

OUT

R3901
24.9

SYM_VER-1

1%
1/16W
MF-LF
2 402

64D3

C3921

PLACE L3902 NEAR SB

10uF

402

OUT

SATA_RBIAS_PN

OUT

20%
2 6.3V
X5R
603

2 10V
CERM

13

SATA_C_D2R_N

NOSTUFF

20%

12

SATA_C_D2R_F_P

0.0047UF

10

21B6

0.0047UF

90-OHM-300mA
2012H

SATA_C_D2R_F_N

14
15
16
17
18
19

NC
NC
NC

SYSTEM (SLEEP) LED FILTER

21

L3912

SATA DIFF PAIR GND VIAS

600-OHM-300MA
6C7

SYS_LED_ANODE_L

GND_CHASSIS_SATA

SYS_LED_ANODE

GV3901

5B2 46A3

GV3902

HOLE-VIA-P5RP25

0402

HOLE-VIA-P5RP25

1
1

C3923

470PF
IR_RX_OUT

41C6

10%
50V
CERM
402

C3922

GV3903

0.01UF
10%
16V
CERM
402

GV3904

HOLE-VIA-P5RP25

HOLE-VIA-P5RP25

GV3905

GV3906

HOLE-VIA-P5RP25

HOLE-VIA-P5RP25

(TO IR RECEIVER)
PP5V_S3_SYSLED_F

C3950

R3950
1

100

=PP5V_S3_SYSLED

GV3907

46B4 64B3

GV3908

HOLE-VIA-P5RP25

5%
1/16W
MF-LF
402

HOLE-VIA-P5RP25

4.7UF

20%
6.3V
2 CERM
603

TABLE_ALT_HEAD

PART NUMBER

ALTERNATE FOR
PART NUMBER

BOM OPTION

155S0227

155S0164

REF DES

COMMENTS:
TABLE_ALT_ITEM

L3901,L3902

KEEP MAG.LAYER IN BOM

SATA CONNECTOR

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

35

79

PLACE C4100-C4106 NEAR PINS AVDLL0-AVDLL6.

MIN_LINE_WIDTH=0.4MM
MIN_NECK_WIDTH=0.22MM

SCHEME MATCHES DOC MVL100258-01

37D8

L4100
FERR-120-OHM-1.5A

VOLTAGE=2.5V

PP2V5_S3_ENET_AVDD

=PP2V5_S3_ENET

64C3

0402-LF
1

C4100

36C8 36B5 36B4 36A5


64B3 36D6

0.1UF

1UF
2

C4101

10%
6.3V
CERM
402

C4102

C4103

0.1UF

10%
16V
X5R
402

0.1UF

10%
16V
X5R
402

C4105

0.1UF

10%
16V
X5R
402

C4104

C4106

0.001UF

10%
16V
X5R
402

10%
50V
CERM
402

C4107

0.001UF

0.1UF

10%
50V
CERM
402

10%
16V
X5R
402

PLACE C4107 NEAR U4101 AVDD

=PP3V3_S3_ENET
1

R4101=PP1V2_S3_ENET
4.7K

=PP3V3_S3_ENET

36A8 64C3

36D8 64B3
36A5 36B4
36B5 36C8

PLACE C4110 AND C4111 WITHIN


12 MIL OF U4101 PIN 49 AND 50

5%
1/16W
MF-LF
2 402

C4110

11

VMAIN_AVLBL
SWITCH_VCC

NC

SWITCH_VAUX

NC

24

NC

25

ENET_CTRL25
6A4 ENET_CTRL12

CRITICAL

U4101

OUT

1%
1/16W
MF-LF
402

4.75K

NO PULL-UP NEEDED

ENET_RSET

CTRL25

CTRL12

16

NC

59

NC

60

NC

62

NC

63

PCI EXPRESS

46

TESTMODE

VDD25

49

TX_N

50

RX_P
RX_N

54

22D4

PCIE_A_D2R_P

OUT

22D4

PCIE_A_D2R_N

OUT

C4111

C4112

0.1UF

0.1UF

402

X5R
10%
16V

402

PCIE_A_R2D_P
PCIE_A_R2D_N

53

REFCLKP

55

33D2 33C3

REFCLKN

56

33D2 33C3

1
1

ENET_CLK100M_PCIE_P
ENET_CLK100M_PCIE_N
PCIE_WAKE_L
26A1 ENET_RST_L

43C6 23C8

22D4

22D4

IN

C4113

IN

0.1UF

PCIE_A_R2D_C_P
PCIE_A_R2D_C_N

IN
IN

PLACE C4113 AND C4112 WITHIN


12 MIL OF U2100 E27 AND E28

402
X5R
16V
10%

OUT
IN

ENET_MDI_P<0>
ENET_MDI_N<0>

IO

IO

21

ENET_MDI_P<1>
37B8 ENET_MDI_N<1>

MDIP2
MDIN2

26

37B8

IO

27

ENET_MDI_P<2>
37B8 ENET_MDI_N<2>

MDIP3

30

37B8

IO

MDIN3

31

ENET_MDI_P<3>
37B8 ENET_MDI_N<3>

17

37C8

18

37C8

MDIP1

20

37B8

MDIN1

MEDIA

LED

LED_LINK1000*
LINK*

TSTPT

TX_P

MDIP0
MDIN0

LED_ACT*
LED_LINK10/100*

PCIE_A_D2R_C_N
10%
16V
X5R

WAKE*
PERST*

RSET

29

PCIE_A_D2R_C_P

88E8053

ANALOG

10%
16V
X5R

402

64

19

22

OMIT

HSDACP
HSDACN

AVDDL0

28

32

51

AVDDL2
AVDDL1

52

AVDDL4
AVDDL3

57

AVDDL5

AVDD

AVDDL6

23

45

47

VDDO_TTL1
VDDO_TTL0

VAUX_AVLBL

40

LOM_DISABLE*

12

NC

6A4

OUT

R4102

10

QFN

OPTIONAL EXTERNAL LDO

64A6

=PP3V3_S3_ENET
=PP3V3_S0_ENET

VDDO_TTL2

5%
1/16W
MF-LF
402
36B5 36B4 36A5
64B3 36D8 36D6

VDDO_TTL4
VDDO_TTL3

61

VDD0

13

VDD2
VDD1

33

39

VDD3

44

ENET_LOM_DIS_L

48

VDD5
VDD4

SB_GPIO30 1

VDD6

58

R4107
22C4
22D8

VDD7

0.1UF

NOSTUFF

ENET_VPD_CLK
ENET_VPD_DATA

VPD_CLK

38

TWSI

VPD_DATA

41

TEST

PU_VDDO_TTL0
PU_VDDO_TTL1

42

SPI_DI

35

NC

SPI_DO
SPI_CLK

34

NC

37

NC

SPI_CS

36

NC

TEST

SPI

MAIN CLK

IO

IO

IO

IO

36A2
36A2

ENET_PU_VDD_TTL0 36A6
ENET_PU_VDD_TTL1 36A6

43

ASF IS UNAVAILABLE ON 8053

INTERNAL PULL-UP

XTALI

15

XTALO

14

ENET_XTALI
ENET_XTALO

1. KEEP ENET_XTALI AND ENET_XTALO

65

THRML_PAD

CRITICAL

R4105

R4104

R4103

R4120

R4119

49.9

49.9

49.9

49.9

49.9

49.9

1%
1/16W
MF-LF
402

1%
1/16W
MF-LF
402

1%
1/16W
MF-LF
402

1%
1/16W
MF-LF
402

1%
1/16W
MF-LF
402

1%
1/16W
MF-LF
402

1%
1/16W
MF-LF
402

R4118

49.9

R4117
49.9

1%
1/16W
MF-LF
402

TRACE LENGTH <12MIL

1
4

R4106

ENET_MDI0

2. DO NOT ROUTE UNDER CRYSTAL

ENET_MDI1

ENET_MDI2

ENET_MDI3

NC NC

Y4101
1

25.0000M
SM-3.2X2.5MM
1

C4150

15PF

5%
50V
CERM
402

C4151

15PF
2

C4116

C4115

C4117

0.001UF

0.001UF

0.001UF

10%
50V
CERM
402

10%
50V
CERM
402

10%
50V
CERM
402

C4118
0.001UF

10%
50V
CERM
402

5%
50V
CERM
402

B
PLACE RESISTORS CLOSE TO U4101

36A5 36B4 36C8 36D6 36D8 64B3


64B3 36D8 36D6 36C8 36B5 36A5

PLACE C4127-C4134 NEAR PINS VDD0-VDD7 ON U4101

SCHEME MATCHES DOC MVL100258-01

=PP1V2_S3_ENET

64B3 36D8 36D6 36C8 36B5 36B4

VSS

=PP3V3_S3_ENET

4
1
1

C4126

0.1UF

10%
16V
X5R
402

C4127

0.1UF
2

10%
16V
X5R
402

C4128

0.1UF
2

10%
16V
X5R
402

C4129

0.1UF
2

10%
16V
X5R
402

C4130

0.1UF
2

10%
16V
X5R
402

C4131

0.001UF
2

10%
50V
CERM
402

C4132

0.001UF
2

10%
50V
CERM
402

C4133

0.001UF
2

10%
50V
CERM
402

C4134

0.001UF
2

C4135

0.1UF

10%
50V
CERM
402

10%
16V
X5R
402

C4136

0.1UF
2

10%
16V
X5R
402

C4137

0.1UF
2

10%
16V
X5R
402

C4138

0.001UF

0.001UF
2

10%
50V
CERM
402

C4139

5%
1/16W
MF-LF
402

OMIT

4.7K

10%
16V
X5R
402

CRITICAL 8
VCC
3 E2
2 NC1
U4102 SDA
1 NC0
M24C08 SCL
7 WC*
SO8

PLACE C4135-C4139 NEAR VDDO_TTL0-VDD_TTL4 ON U4101

SCHEME MATCHES DOC MVL100258-01

64C3 36D7

C4140
0.1UF

R4123

PLACE C4140 NEAR U4102 VCC


1

5%
1/16W
MF-LF
402

4.7K

5%
1/16W
MF-LF
402

5%
1/16W
MF-LF
402

36B6

ENET_PU_VDD_TTL1

4.7K

=PP3V3_S3_ENET

R4131

4.7K

ENET_PU_VDD_TTL0

R4122

2
36C6

R4130

=PP3V3_S3_ENET
1

ENET_VPD_DATA

36C6

ENET_VPD_CLK

36C6

NOSTUFF
1

R4124
0

5%
1/16W
MF-LF
2 402

ETHERNET CONTROLLER

10%
50V
CERM
402

SYNC_MASTER=ENET

SYNC_DATE=12/06/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

36

79

L4250
120-OHM-0.3A-EMI
36D5

PP2V5_S3_ENET_AVDD 1

2PP2V5_S3_ENET_AVDD_F

PLACE ONE CAP AT EACH PIN 3 AND 6 OF TRANSFORMERS

0402-LF
1

C4200

C4201

C4202

0.1UF

0.1UF

0.1UF

10%
16V
X5R
402

10%
16V
X5R
402

10%
16V
X5R
402

C4203
0.1UF
10%
16V
X5R
402

PLACE ONE CAP NEAR EACH PIN 3 AND 6 OF TRANSFORMERS

C4204

C4205

C4206

0.001UF

0.001UF

0.001UF

10%
50V
CERM
402

10%
50V
CERM
402

10%
50V
CERM
402

C4207
0.001UF
10%
50V
CERM
402

CROSS-OVERS ARE IN SCHEMATIC TO EASE ROUTING


OMIT
CRITICAL

RJ45
819B-3608-M280

T4201
36C3

ENET_MDI_P<0>

IO

36C3

ENET_MDI_N<0>

IO

J4200

CRITICAL
1000BT-824-00275

XFR-SM

16

ENET_MDI_TRAN_P<0>

15

ENET_MDI_TRAN_N<0>

10

F-RT-SM
SYM_VER-2

1
2

14

NC1
NC2

LINE
SIDE

CHIP
SIDE

NC4
NC3

ENET_CENTER_TAP<0>

13

4
12

11

ENET_CENTER_TAP<1>

6
7

36C3

36C3

ENET_MDI_P<1>

10

IO

ENET_MDI_TRAN_P<1>

IO

ENET_MDI_N<1>

ENET_MDI_TRAN_N<1>

CRITICAL
1000BT-824-00275

514S0119
T4202
XFR-SM

ENET_MDI_P<3>

IO

36C3

ENET_MDI_N<3>

15

IO

14

36C3

36C3

NC1
NC2

LINE
SIDE

CHIP
SIDE

36C3

16

NC4
NC3

ENET_MDI_TRAN_P<3>

5A7

ENET_MDI_TRAN_N<3>
ENET_CENTER_TAP<2>

13

12

11

ENET_CENTER_TAP<3>

ENET_MDI_P<2>

10

IO

5A7

ENET_MDI_TRAN_P<2>

IO

ENET_MDI_N<2>

5A7

ENET_MDI_TRAN_N<2>

TABLE_ALT_HEAD

PART NUMBER

ALTERNATE FOR
PART NUMBER

BOM OPTION

157S0037

157S0011

REF DES

COMMENTS:
1
TABLE_ALT_ITEM

T4201,T4202

R4200

E&E AND DELTA TRANSFORMER

R4201

75

75

1%
1/16W
MF-LF
402

1%
1/16W
MF-LF
402

1%
1/16W
MF-LF
402

R4202

75

R4203
75

1%
1/16W
MF-LF
402

ENET_BOB_SMITH_CAP
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1

C4210
0.001UF

20%
2KV
CERM
1808

6C8

=GND_CHASSIS_RJ45

OUT

ETHERNET CONNECTOR

SYNC_MASTER=ENET

C4211

0.001UF

10%
2 50V
CERM
402

C4212

SYNC_DATE=11/14/2005

NOTICE OF PROPRIETARY PROPERTY

0.001UF

10%
2 50V
CERM
402

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

PLACE C4211 AND C4212


ON EACH SIDE OF J4200

SIZE

TABLE_5_HEAD

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

CRITICAL

BOM OPTION
TABLE_5_ITEM

514S0143

CONN,8P RJ-45 JACK,MIDPLANE,MG3,LF

J4200

CRITICAL

APPLE COMPUTER INC.

NORMAL

CONN,8P RJ-45 JACK,MIDPLANE,BLACK,LF

J4200

CRITICAL

FANCY

SHT
NONE

REV.

051-7374

SCALE

TABLE_5_ITEM

514S0144

DRAWING NUMBER

A
OF

37

79

PAGE NOTES
MOBILE TURNS OFF CONTROLLER POWER DURING SLEEP
0.001A DURING SLEEP

INPUT
=PP3V3_S0_FW - 3.3V POWER FOR FIREWIRE (MOBILE: OFF DURING SLEEP)
=PP3V3_S0_PCI - 3.3V POWER FOR PCI FIREWIRE (MOBILE: OFF DURING SLEEP)
PCI_GNT3_L - PCI GRANT FROM SB
PCI_CLK_FW - NEED TO REFERENCE TO ALIAS PAGE
PCI_RST_L - PCI RESET FROM SB
FW_PC0 - FIREWIRE POWER CLASS IDENTIFIER

64B3

=PP3V3_S3_FW
PLACE ONE CAP PER TWO PINS STARTING WITH C4424 ON VDD0
1

C4424

10UF

PCI_AD<0..31>,PCI_C_BE_L<0..3>,PCI_FRAME_L,PCI_IRDY_L,PCI_TRDY_L,
PCI_DEVSEL_L, PCI_STOP_L, PCI_PAR, PCI_PERR_L, PCI_SERR_L
FW_A_TPA_P/N, FW_A_TPB_P/N, FW_A_TPBIAS - PORT 0 FIREWIRE DIFF PAIRS
FW_B_TPA_P/N, FW_B_TPB_P/N, FW_B_TPBIAS - PORT 1 FIREWIRE DIFF PAIRS
FW_C_TPA_P/N, FW_C_TPB_P/N, FW_C_TPBIAS - PORT 2 FIREWIRE DIFF PAIRS

C4418
0.1UF

20%
2 6.3V
X5R
603

INPUT/OUTPUT

L4400

PCI_REQ3_L - PCI REQUEST TO SB


PM_CLKRUN_L - CLOCK-RUN PCI PROTOCOL
INT_PIRQD_L - INTERRUPT TO SB
PCI_PME_FW_L - DEDICATED PME FOR FIREWIRE (SB GPIO1)

C4422

C4426

C4428

0.1UF

20%
2 10V
CERM
402

0.1UF

20%
2 10V
CERM
402

20%
2 10V
CERM
402

C4430

0.1UF

C4432
0.1UF

20%
2 10V
CERM
402

20%
2 10V
CERM
402

PLACE ONE CAP PER TWO PINS STARTING WITH C4416 ON VDDA0

600-OHM-300MA

OUTPUT

0.1UF

20%
2 10V
CERM
402

PP3V3_S3_FW_AVDD

0402

C4416

C4417

10UF

0.1UF

20%
2 6.3V
X5R
603

10%
2 16V
X5R
402

C4429
0.1UF

10%
2 16V
X5R
402

C4425

VOLTAGE=3.3V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.2MM

0.1UF

10%
2 16V
X5R
402

PAGE HISTORY
FIRST REVISION OF PAGE
BGA VERSION OF FW323-06 ADDED
CHANGED INT* TO INT_PIRQD_L (PER ARCHITECTURAL DEFINITION)
CHANGED PCI_ID TO AD19 (PER ARCHITECTURAL DEFINITION)
CHANGED REQ/GNT TO REQ3/GNT3 (PER ARCHITECTURAL DEFINITION)
ADDED 510K PULL-DOWN ON RST* AND REMOVED CONNECTION TO PLT_RST_L
CHANGED CLK,PME,DIFF PAIR NAMES TO BE RE-USE COMPLIANT
REMOVED CONSTRAINT SETS AS THEY WILL BE MANAGED ON BOARD SIDE
REMOVED C4421 - REDUNDANT
BRING OUT PC0 CONNECTION TO BE CONNECTED ON PORT PAGE
CONNECTED PIN E10 TO GND

64B3

=PP3V3_S3_PCI

IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO

22A7

PCI_AD<19>
IO
IO
IO
IO
IO
IO
IO

IO
IO
IO
IO
IO
22B6

IO

22B6

IO

22B6

IO

22B6

IO
IO

R44311
22

5%
1/16W
MF-LF
402 2

IO
IO
IO
IO
IO

OUT
IN
IO
IO
IN

R4432
IN

22A6

PCI_RST_L

100

PCI_AD0
PCI_AD1

U4400

PCI_AD3
PCI_AD4

FW32306

PCI_AD5
PCI_AD6

PCI_CLK_FW
PM_CLKRUN_L

FW_XI

XO

B5

FW_XO

B4

FW_PWRON_RST_L

PCI_AD10

R1

A6

FW_R1

PCI_AD11
PCI_AD12

SPEC RECOMMENDS 2.49K

R0

OUT
OUT

FW_PCI_RST_L
26C3
22A7 INT_PIRQD_L
22B5 PCI_PME_FW_L

B7

FW_R0

PCI_AD13
PCI_AD14
PCI_AD15

TPBIAS0
TPA0_P

PCI_AD16
PCI_AD17

TPA0_N

PCI_AD18

TPB0_P
TPB0_N

PCI_AD19
PCI_AD20

TPBIAS1

PCI_AD21

TPA1_P
TPA1_N

PCI_AD22
PCI_AD23

TPB1_P

PCI_AD24

TPB1_N
TPBIAS2

PCI_AD25
PCI_AD26

TPA2_P
TPA2_N

PCI_AD27
PCI_AD28

TPB2_P
TPB2_N

PCI_AD29

C4412

15pF

5%
2 50V
CERM
402

B8
A9
B9
B10
A10
D8
A11
B11
B12
A12
C13
C11
C12
D13
D12

R4452

C4420
0.1UF

10%
2 16V
X5R
402

2.1K

1%
1/16W
MF-LF
2 402

FW_A_TPBIAS
FW_A_TPA_P
FW_A_TPA_N
39B6 FW_A_TPB_P
39B6 FW_A_TPB_N
6D2 FW_B_TPBIAS
6D2 FW_B_TPA_P
6D2 FW_B_TPA_N
6D2 FW_B_TPB_P
6D2 FW_B_TPB_N
6D2 FW_C_TPBIAS
6D2 FW_C_TPA_P
6D2 FW_C_TPA_N
6D2 FW_C_TPB_P
6D2 FW_C_TPB_N
39B6

IO

39B6

IO

39B6

IO

R4420
510K

5%
1/16W
MF-LF
2 402

IO
IO
IO
IO
IO
IO
IO
IO
IO

IO
IO
IO

PCI_AD30
PCI_AD31

PCI_PAR

33D6

C4411 1
5%
50V
CERM 2
402

RESET*

N10
N6
M6
N7
N8
M7
L2
E2
E1
M8
N9

XI

A5

PCI_AD8
PCI_AD9

PCI_PAR
PCI_FRAME_L
PCI_IRDY_L
PCI_TRDY_L
26D3
22A6 PCI_DEVSEL_L
26D3
22A6 PCI_STOP_L
FW_PCI_IDSEL
PCI_REQ3_L
22B6 PCI_GNT3_L
26D3
22A6 PCI_PERR_L
26D3
22A6 PCI_SERR_L

3
2 4

NEED TO CHECK CRYSTAL LOAD CAPACITANCE

PCI_AD7

PCI_CBE0*

26C3
22B6

BGA

K12
M9
L3
L1

26D3
22A6
26D3
22A6

24.576MHZ
FW_XO_R

15pF

CRITICAL

PCI_AD2

390

5%
1/16W
MF-LF
402

OMIT

PCI_C_BE_L<0>
PCI_C_BE_L<1>
PCI_C_BE_L<2>
PCI_C_BE_L<3>
22A6
26D3
22A7

PCI_CBE1*
PCI_CBE2*
PCI_CBE3*
MODE_420

PCI_FRAME*
PCI_IRDY*

MODE_A

PCI_TRDY*

PC0

PCI_DEVSEL*
PCI_STOP*

PC1
PC2

PCI_IDSEL

CONTENDER
CARDBUSN
MPCI_ACTN_323

PCI_REQ*
PCI_GNT*
PCI_PERR*

TEST0

PCI_SERR*

TEST1
PTEST

MANUFACTURING TEST PINS

G2 PCI_CLK
D1 CLKRUN*

SE
SM

1%
1/16W
MF-LF
402

IO

PCI_AD<20>
22A7 PCI_AD<21>
22A7 PCI_AD<22>
22A7 PCI_AD<23>
22A7 PCI_AD<24>
22A7 PCI_AD<25>
22A7 PCI_AD<26>
22A7 PCI_AD<27>
22A7 PCI_AD<28>
22A7 PCI_AD<29>
22A7 PCI_AD<30>
22A7 PCI_AD<31>
22A7

Y4403

VDDA5

IO

VDDA4
VDDA3

IO

VDDA2

IO

VDDA1
VDDA0

IO

VDD9

IO

VDD7

IO

CRITICAL
SM-3.2X2.5MM

R4400

G13 PCI_VIOS
F10
G10
H10
H12
J13
J12
K13
K10
L12
M13
L11
M12
M11
N12
M10
N11
M4
N5
N4
M3
M2
N3
K4
M1
K2
J4
K1
J2
J1
H2
H4
H1

22B7

VDD6
VDD5

IO

PCI_AD<0>
PCI_AD<1>
22B7 PCI_AD<2>
22B7 PCI_AD<3>
22B7 PCI_AD<4>
22B7 PCI_AD<5>
22B7 PCI_AD<6>
22B7 PCI_AD<7>
22B7 PCI_AD<8>
22B7 PCI_AD<9>
22B7 PCI_AD<10>
22B7 PCI_AD<11>
22B7 PCI_AD<12>
22B7 PCI_AD<13>
22B7 PCI_AD<14>
22B7 PCI_AD<15>
22B7 PCI_AD<16>
22B7 PCI_AD<17>
22B7 PCI_AD<18>
22B7

VDD4

IO

VDD3
VDD2

IO

VDD1

VDD0

CONNECT TO VDD FOR 3.3V OPERATION

D10
A13
B13
A7
A8
D6

197S0030 3.2MMX2.5MM
A2

G4
N1
N2
K5
K6
K7
L13
H13

M5
B6
E12
F13
F12
G12
B1
E10

MODE FOR EXTERNAL LINK

39C8

FW_PC0

IO

DUAL PORT DEVICES ARE POWER CLASS 4 (100)


SINGLE PORT DEVICES ARE POWER CLASS 0 (000)

LOW = NOT BUS MANAGER


LOW = PCI OPERATION

C2
C1
A4
A3
B3

FIREWIRE CONTROLLER

F1 PCI_RST*
D2 PCI_INTA*
F2 PCI_PME*

SYNC_MASTER=ENET

SYNC_DATE=08/30/2005

NOTICE OF PROPRIETARY PROPERTY

THIS IS FROM ICH-7M

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

VSSA3
VSSA4

VSSA1
VSSA2

VSSA0

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

E13
E9
D9
D7
D5

VSS21
VSS22

VSS20

VSS18
VSS19

VSS17

VSS15
VSS16

VSS11

VSS9
VSS10

VSS8

VSS6
VSS7

VSS4
VSS5

VSS3

VSS1
VSS2

A1
B2
C3
D4
E4
E5
F4
F6
F7
F8
G1
G6
G7
G8
H6
H7
H8
J5
J9
J10
K8
K9
N13

VSS0

PLACE R4432 VERY CLOSE TO PIN B18 OF U2100


VSS12
VSS13
VSS14

5/19/2005
6/20/2005
6/21/2005
6/21/2005
6/21/2005
6/22/2005
6/22/2005
6/22/2005
6/22/2005
6/22/2005
7/26/2005

SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

38

79

Page Notes
INPUT:
=PPBUS_FW - PORT POWER
=PP3V3_S5_FW - DIGITAL POWER
=GND_CHASSIS_FW_PORT0 - CHASSIS GROUND
=FWPWR_PWRON - ADDITIONAL POWER CONTROL

INPUT/OUTPUT:
FW_TPA0_P/N,FW_TPB0_P/N,FW_TPBIAS0 - FIREWIRE DIFF PAIRS

OUTPUT:

PPBUS_S5_FWPWRSW_F

FW_PC0 - POWER CLASS IDENTIFIER (SINGLE PORT - TIE LOW)

VOLTAGE=18.5V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM

PPFW_SWITCH

Q4590

PAGE HISTORY
5/19/05
6/22/05
6/22/05
6/22/05
7/26/05
7/26/05
7/26/05
7/26/05
7/26/05
7/26/05
7/26/05

FDC638P

FL4590

INITIAL REVISION
CHANGED DIFF PAIR NAMES TO MATCH REUSE
REMOVED CONSTRAINTS BECAUSE USING ALLEGRO CONST MANAGER
CONNECTED FW_PC0 FOR SINGLE PORT
UPDATED LATE-VG POWER RAIL CIRCUIT FROM M1
CHANGED CONNECTOR PORT NAMING TO PORT0
SWITCHED TO 514-0124 FOR PRE-PROTO CONNECTOR
REMOVED R4520 - IT HASNT BEEN STUFFED FOR MANY PRODUCTS
CHANGED FL4590 TO 1.1A VERSION
REMOVED ETHERNET LOW-POWER MODE CIRCUIT
UPDATED SIGNAL NAMES FOR FW PORT POWER ENABLE

SM-LF

1.1A-24V
64C1

=PPBUS_S5_FWPWRSW

5B2

VOLTAGE=19V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM

D4590
SMB

5
4

MINISMDC

B340LBXF

R4590 1
64A6

470K

=PP3V3_S0_FW

5%
1/16W
MF-LF
402 2

1394b implementation based on Apple


FireWire Design Guide (FWDG 0.6, 5/14/03)

IF =FWPWR_PWRON IS NC:

Cable Power
PPFW_PORT0_VP_F

5%
1/16W
MF-LF
402 2

SOT-363
1

FWPWR_RUN

VOLTAGE=16.5V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM

330K

BAS16TW-X-F
2

L4510
FWPWR_EN_L

D4591
5

Q4591

OUT

2N7002

FWPWR_EN

D4591

FW_PC0
65C3 46B3 45D5 5C1

10K

SMC_PS_ON

SOT23-LF

10%
50V
CERM
402

BAS16TW-X-F

R4594
38A3

C4510
0.001uF

0 FOR SINGLE PORT


1 FOR DUAL PORT

VOLTAGE=16.5V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM

SM
1

SOT-363

60C8

MIN_LINE_WIDTH=0.05MM
MIN_NECK_WIDTH=0.05MM

BAS16TW-X-F

=FWPWR_PWRON

PPFW_PORT0_VP

FERR-250-OHM
1

ENABLES PORT POWER WHEN MACHINE IS RUNNING


OR ON AC AND NOT SHUTDOWN
6D2

10%
16V
CERM
402

R4591 1

D4591

ENABLES PORT POWER WHEN MACHINE IS RUNNING


OR ON AC
IF =FWPWR_PWRON LOW WHEN OFF:

PORT POWER CLASS

0.01uF
2

MIN_LINE_WIDTH=0.05MM
MIN_NECK_WIDTH=0.05MM

100K
5%
1/16W
MF-LF
402

C4590

FWPWR_EN_L_DIV

R4593 1

SOT-363
3

FWPWR_ACIN

5%
1/16W
MF-LF
402

Enables port power whenever


machine AC Adapter is plugged
or system at run state with battery only

R4595
470K

5%
1/16W
MF-LF
402

"Snapback" & "Late VG" Protection


39A6

PP3V3_S5_FWLATEVG

[LATE VG NOTES]
CURRENT THROUGH THE BIAS RESISTOR SHOULD BE 5MA FOR A VOLTAGE DROP TO 2.2V

D4520

IT IS 2.2V INSTEAD OF 2.7V BECAUSE THE SNAPBACK ESD DIODES HAVE A 0.5V DROP
38B3

IO

FW_A_TPBIAS

D4520

BAV99DW-X-F

C4520 1
0.01UF

1
1

R4500

R4501

56.2

56.2

1%
1/16W
MF-LF
2 402

1%
1/16W
MF-LF
2 402

C4500
10%
6.3V
CERM-X5R
402

BAV99DW-X-F

C4521

SOT-363

1
2

0.01UF

10%
16V
CERM 2
402

0.33UF
2

SOT-363
5

10%
16V
CERM 2
402

PORT 0
1394A

120-OHM

OMIT

2012

FW_PORT0_TPA_P

CRITICAL

J4500
FW_PORT0_TPA_N

FW_A_TPA_P
38B3 FW_A_TPA_N
38B3 FW_A_TPB_P
38B3 FW_A_TPB_N

38B3

IO
IO
IO
IO

2012

FW_PORT0_TPB_P

R4502
56.2

1%
1/16W
MF-LF
2 402

LATE-VG PROTECTION POWER

FW_PORT0_TPB_N

R4503
56.2

1%
1/16W
MF-LF
2 402

D4521

D4521

BAV99DW-X-F

BAV99DW-X-F

SOT-363

PP3V3_S5_FWLATEVG_F

PP3V3_S5_FWLATEVG

L4550

FW_PORT0_TPA_N_FL

FW_PORT0_TPB_P_FL

VOLTAGE=3.3V
MIN_LINE_WIDTH=0.35MM
MIN_NECK_WIDTH=0.25MM

39B5

5%
25V
CERM
402

0.01UF

10%
16V
CERM 2
402

1%
1/16W
MF-LF
402

SYM_VER-2

FW_PORT0_TPB_N_FL

FL4521

(PPFW_PORT0_VP)

(GND_FW_PORT0_VGND)

C4523

0.01UF

C4524
0.01UF

10%
16V
CERM 2
402

10%
50V
2 X7R
603-1

(TPA-)

TPI

(TPB+)

TPI#

(TPB-)

0.01uF
10%
16V
CERM
402

(TPA+)

TPO#

VGND
7

C4525

TPO

VP

5
6

C4522 1

R4504
4.99K

220PF

400-OHM-EMI
1

C4501

=GND_CHASSIS_FW_UPPER

6A6

Plexi: 514-0124
Enclosure: 514-0289

=GND_CHASSIS_FW_DOWN

6C8

SM-1

5%
1/16W
MF-LF
402

TABLE_5_HEAD

C4551

NO STUFF
1

0.001uF

20%
10V
CERM
402

10%
50V
CERM
402

D4550
SOT23

C4552

0.1uF

PART#

NO STUFF

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

CRITICAL

BOM OPTION
TABLE_5_ITEM

MMBZ5227B

514-0359

CONN,6P 1394A RCPT,MIDPLANE,MG3,LF

J4500

CRITICAL

NORMAL

514-0316

CONN,6P 1394A RCPT,MIDPLANE,BLACK,LF

J4500

CRITICAL

FANCY

FIREWIRE PORT

TABLE_5_ITEM

VOLTAGE=3.3V
MIN_LINE_WIDTH=0.35MM
MIN_NECK_WIDTH=0.25MM

330

FW_PORT0_TPA_P_FL

SOT-363

FW_PORT0_TPB

R4550

F-RT-TH1

120-OHM

=PP3V3_S5_FWLATEVG

1394A

FL4520

64A3

SYM_VER-2

SYNC_MASTER=ENET

SYNC_DATE=11/16/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

CAPS MAY NOT BE NECESSARY.


NO STUFF FOR NOW THOUGH

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

39

79

GEYSER AND DIMM0 REMOTE TEMP SENSORS


D

L4900

600-OHM-300MA
=PP5V_S3_GEYSER

64B3

2
0402

R4910
SMC_ONOFF_L

48C8 46D6 46C8 45C5

CONN_GEYSER_ONOFF_L

C4910
0.1uF

VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.3MM

0.1uF

20%
10V
CERM
402

OMIT

CRITICAL

J4900
53307-1071

L4901
90-OHM

F-ST-SM

SM

SYM_VER-1

6C2

=USB2_GEYSER_P

=USB2_GEYSER_N

C4900

20%
10V
2 CERM
402

CRITICAL

6C2

CONN_GEYSER_ONOFF_FLTR_L

5%
1/16W
MF-LF
402

MAKE_BASE=TRUE
OUT

1K

PLACE C4900 NEAR J4900

PP5V_S3_GEYSER_F

CONN_GEYSER_USB_P
CONN_GEYSER_USB_N

27B6

27B6

10

=SMB_GEYSER_CLK
=SMB_GEYSER_DATA
SMC_LID

49D6

IO
IO

5B2 45B5 46C6 65A8

THRM_DIMM0_DXP1

IN

PLACE L4901 NEAR J4900

CRITICAL

D4900
SC-75

L4902

600-OHM-300MA
1
2 GEYSER_GND_F
0402

516S0251
RESERVE FOR POSSUM BUILD DEBUG USE

MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.3MM
VOLTAGE=0V

3
2

49C6

IN

THRM_DIMM0_DXN

RCLAMP0502B
TABLE_5_HEAD

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

CRITICAL

BOM OPTION
TABLE_5_ITEM

516S0482

ACES 88646-1071-NS

J4900

CRITICAL

NORMAL

516S0482

ACES 88646-1071-NS

J4900

CRITICAL

FANCY

TABLE_5_ITEM

CONNECTOR MISC
SYNC_MASTER=ENET

SYNC_DATE=11/16/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

40

79

PLACE C5100 AND C5101


NEAR U5100 PIN 22 AND 49

D
64B3

=PP5V_S3_IR

C5100
0.1UF

C5101
0.1UF

20%
2 10V
CERM
402

20%
2 10V
CERM
402

22 49

OMIT

VDD

U5100

6C2
6C2

20

=USB2_IR_P
=USB2_IR_N

21

CY8C24794
MLF

D+
D-

45

P0_0
P0_1
46
P0_2
53
P0_3
47
P0_4
52
P0_5
48 P0_6
51
P0_7

P1_0
P1_1
P1_2
P1_3
P1_4
P1_5
P1_6
P1_7

25

41

P2_0
P2_1
P2_2
1
P2_3
43
P2_4
56
P2_5
44
P2_6
55
P2_7

P3_0
P3_1
P3_2
P3_3
P3_4
P3_5
P3_6
P3_7

33

37

P5_0
P5_1
P5_2
P5_3
P5_4
P5_5
P5_6
P5_7

29

54

R5100
35C6

IR_RX_OUT

100
5%
1/16W
MF-LF
402

IR_RX_OUT_F

42
1

C5102

0.001UF

10%
50V
2 CERM
402

P4_0
P4_1
38
P4_2
5
P4_3
39
P4_4
4
P4_5
40
P4_6
3
P4_7
6

C5102 CLOSE TO U5100 PIN 2

24
23

P7_0
P7_7

THRML
PAD

18
26
17
27
16
28
15

10
34
9
35
8
36
7

14
30
13
31
12
32
11

57

VSS
19 50

IR CONTROLLER

SYNC_MASTER=ENET

SYNC_DATE=11/09/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

41

79

USB 2.0 CONNECTORS


42D2

L5202

PP5V_S3_USB2_EXTA_F
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.3MM
VOLTAGE=5V

FERR-120-OHM-1.5A
2

0402-LF

OMIT
CRITICAL

PLACE L5200 NEAR J5200


ROUTE USB DATA LINES AS DIFFERENTIAL PAIRS

J5200
USB
F-RT-TH-M42
5

CRITICAL

L5200
90-OHM
SM
SYM_VER-1

6C2

=PP5V_S5_USB

64A3

6C2

C5213

10uF
603

1K

FERR-120-OHM-1.5A
1

0.47UF

C5208
0.1UF
20%

2 10V
CERM
402

CRITICAL

U5200
2
8
3
5
4

IN

OUT1

C5210

42C2 42A4 42A2 6C8

100UF

OC1*
OUT2

OC2*

20%
2 6.3V
POLY
B2

=EXTBUSB_OC_L

1K

6C2

0.47UF

C5202

0.01UF

C5203
0.01UF

10%
2 16V
CERM
402

10%
2 16V
CERM
402

42C4 42A4 42A2 6C8

=GND_CHASSIS_USB

PP5V_S3_USB2_EXTB
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.3MM
42B2

PP5V_S3_USB2_EXTB_F
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.3MM
VOLTAGE=5V

L5203

FERR-120-OHM-1.5A
1

2 EXTBUSB_OC_F_L

2
0402-LF

NOSTUFF
1

10%
2 6.3V
CERM-X5R
402

CRITICAL

C5209

0.1UF
20%

C5211
100UF

20%
2 6.3V
POLY
B2

10V
402

2 CERM

63D6

PP5V_S3_USB2_EXTA

5%
1/16W
MF-LF
402

C5251

GND

EN2*

D+

VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.3MM

MSOP
EN1*

D-

LAYOUT NOTE:C5202,C5203 ARE EMC BY-PASS CAPS FOR J5200

=GND_CHASSIS_USB

RCLAMP0502B
7

CRITICAL
1

GND TPAD

R5251

MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.3MM
VOLTAGE=0V

D5200
SC-75

TPS2042B

10%
6.3V
2 CERM-X5R
402

1 VBUS

PP5V_S3_USB2_EXTA_F
USB2_EXTA_F_N
USB2_EXTA_F_P
USB2_GND_EXTA_F

0402-LF

CRITICAL

2 EXTAUSB_OC_F_L

5%
1/16W
MF-LF
402

C5250

20%
10V
CERM
402

R5250
1

C5212

NOSTUFF

=EXTAUSB_OC_L

=USB2_EXTA_P

L5204

6C2

42D3

0.1UF

20%

2 6.3V
X5R

=USB2_EXTA_N

PM_SLP_S4_LS5V

OMIT
PLACE L5201 NEAR J5201
ROUTE USB DATA LINES AS DIFFERENTIAL PAIRS

CRITICAL

J5201
USB

CRITICAL

F-RT-TH-M42
5

L5201
90-OHM

SM
SYM_VER-1

42C3

6C2

=USB2_EXTB_N

6C2

=USB2_EXTB_P

PP5V_S3_USB2_EXTB_F
USB2_EXTB_F_N
USB2_EXTB_F_P
USB2_GND_EXTB_F

VBUS

D-

D+

GND

CRITICAL

D5201
SC-75

42C4 42C2 42A2 6C8

=GND_CHASSIS_USB

C5206

0.01UF

1
3
2

C5207
0.01UF

10%
2 16V
CERM
402

10%
2 16V
CERM
402

LAYOUT NOTE:C5206,C5207 ARE EMC BY-PASS CAPS FOR J5201

RCLAMP0502B
42C4 42C2 42A4 6C8

=GND_CHASSIS_USB

L5205

FERR-120-OHM-1.5A MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.3MM
1

VOLTAGE=0V

TABLE_5_HEAD

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

CRITICAL

BOM OPTION

0402-LF
TABLE_5_ITEM

514-0288

CONN,4P USB RCPT,MIDPLANE,MG3,LF

J5200,J5201

CRITICAL

NORMAL

514-0315

CONN,4P USB RCPT,MIDPLANE,BLACK,LF

J5200,J5201

CRITICAL

FANCY

TABLE_5_ITEM

DESCRIPTION:
USB EXTERNAL CONNECTORS

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

42

79

=PP1V5_S0_AIRPORT
1

C5304

C5305

0.1UF
2

20%
10V
CERM
402

0.1UF

0.1UF

20%
10V
CERM
402

20%
10V
CERM
402

=PP3V3_S0_AIRPORT

CRITICAL

J5300

C5308

F-ST-SM

32B4

PCIE_WAKE_L

IN

CK410_SRC_CLKREQ6_L

OUT

33C4 33B2

IN

AIRPORT_CLK100M_PCIE_N

33D4 33B2

IN

AIRPORT_CLK100M_PCIE_P

10

11

12

13

14

15

16

17

22D4
22D4

OUT
OUT

22D4

IN
IN

18

23

24

PCIE_B_D2R_P

25

26

27

28

29

30

SMB_AIRPORT_CONN_CLK

PCIE_B_R2D_N

31

32

SMB_AIRPORT_CONN_DATA

PCIE_B_R2D_P

33

34

35

36

PCIE_B_R2D_C_P

0.1UF

C5301
PLACE CAPS < 250 MILS FROM (U2100) SB

=PP3V3_S3_AIRPORT_AUX
1

C5309

20%
6.3V
2 X5R
603

0
1

R5302

27C6 =SMB_AIRPORT_DATA

40

6B2 =USB2_AIRPORT_N

42

6B2 =USB2_AIRPORT_P

43

44

45

46

50
52

IO
IO

402
1/16W
MF-LF 5%

38

51

0.1UF

41

48

64B3

C5310

20%
10V
2 CERM
402

27C6 =SMB_AIRPORT_CLK

37

47

402 1/16W
R5301 MF-LF
5%

39

49

IN

10UF

PCIE_B_D2R_N

0.1UF

AIRPORT_RST_L

5%
1/16W
MF-LF
402

MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=3.3V

22

20%
10V
CERM
402

PP3V3_S3_AIRPORT_AUX_CONN

20

C5307

R5303

21

PCIE_B_R2D_C_N

26B1

19

C5300
22D4

KEY

64A6

0.1UF

20%
10V
CERM
402

54

36C6 23C8

0.1UF

AS0B22-S45N-7F

64C6

C5306

IO
IO

SB HAS INTERNAL 15K PULL-DOWNS

53

B
CONNECT TO M35 MODULE
Plexi: 516S0363
* Enclosure: 516S0406

AIRPORT CONN

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

43

79

PLACE L5410 NEAR J5400

L5410

PLACE C5498 C5499 NEAR L5410


64B3

120-OHM-0.3A-EMI
1

=PP3V3_S3_BT

NOSTUFF
NOSTUFF

C5499

0.1UF

10UF
2

20%
6.3V
X5R
603

0402-LF

C5498

20%
10V
CERM
402

PP3V3_S3_BT_F
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=3.3V

CRITICAL

J5400

88609-04001

CRITICAL

F-ST-SM
5

L5400
90-OHM
SM

SB HAS INTERNAL 15K PULL-DOWNS

SYM_VER-1

1
6B2
6C2

=USB2_BT_N
=USB2_BT_P

USB2_BT_F_N

USB2_BT_F_P

TO M13D SLOT

PLACE L5400 NEAR J5400


6

GND_BT_F

L5411

120-OHM-0.3A-EMI
1

518S0486

MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=0V

2
0402-LF

PLACE L5411 NEAR J5400

BLUETOOTH INTERFACE

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

44

79

OMIT
=PP3V42_G3H_SMC

64D1 48C8 46D8 46D5 46D1 45D3 45D2

OUT

23C3

OUT
46C6

46C6
46C6
46C6
66A3 46B6 5C1

OUT

66A4 46B6 5C1

OUT
46C6
46C6

53C6 47C6 21D4 5D2

IO

53C6 47C6 21D4 5D2

IO

53C6 47C5 21D4 5C2

IO

53C6 47C5 21D4 5C2

IO

53C6 47C6 21C5 5C2

IN

26B1

IN

33D6
53C6 47C5 23C8 5C2

IN
OUT
OUT

46A4

OUT

27B3

IO

53C7

OUT
46C6

OUT
46C6
46C6

47B6 46D6 46B2 5C2

OUT

47B5 46D6 46B2 5C2

27D6

IN
IO

P61/KIN1*

SMC_P20
SMC_P21
SMC_P22
SMC_P23
SMC_BATT_TRICKLE_EN_L
SMC_BATT_CHG_EN
SMC_P26
SMC_P27

D13
D14
D15
E12
E14
E15
E13
F14

LPC_AD<0>
LPC_AD<1>
LPC_AD<2>
LPC_AD<3>
LPC_FRAME_L
SMC_LRESET_L
PCI_CLK_SMC
INT_SERIRQ

D9
C9
A9
B9
D8
C8
A8
D7

P12
P13

BGA
(1 OF 4)

P62/KIN2*
P63/KIN3*

P14
P15

P64/KIN4*
P65/KIN5*

P16

P66/IRQ6*/KIN6*

P17

P67/IRQ7*/KIN7*

P20
P21

P70/AN0
P71/AN1

P22

P72/AN2

P23
P24

P73/AN3
P74/AN4

P25

P75/AN5

P26
P27

P76/AN6
P77/AN7

P30/LAD0

P80/PME*

P31/LAD1
P32/LAD2

P81/GA20
P82/CLKRUN*

P33/LAD3

P83/LPCPD*

P34/LFRAME*
P35/LRESET*

P84/IRQ3*/TXD1
P85/IRQ4*/RXD1

P36/LCLK

P86/IRQ5*/SCK1/SCL1

P37/SERIRQ

SMC_DISPLAY_ENABLE
SMC_SYS_LED_16B
SMB_BSB_DATA (BAT B SMBUS DATA)
SMC_TPM_PP (TPM physical presence)
SMC_P44
SMC_BKLIGHT_ENABLE
SMC_P46
SMC_SYS_KBDLED

A5
B5
D5
C3
B1
C2
D3
C1

P40/TMIO
P41/TMO0

SMC_TX_L (Debug feature,16550 Transmit)


SMC_RX_L (Debug feature,16550 Receive)
SMB_0_CLK

G1
G4
F2

P50

P90/IRQ2*
P91/IRQ1*
P92/IRQ0*

P42/SDA1
P43/TMI1/EXSCK1

P93/IRQ12*
P94/IRQ13*

P44/TMO1

P95/IRQ14*

P45
P46/PWX0/PWM0

P96/EXCL
P97/IRQ15*/SDA0

SMC_PM_G2_EN
(Enable AC adapter
SMC_PS_ON
22C6 SPI_ARB
22C6 SPI_SCLK
22C6 SPI_SI
22C6 SPI_SO
46C1 SMC_PROCHOT_3_3_L
6B1 SMC_CPU_INIT_3_3_L
63C8

65C3 46B3 39C6 5C1

50C7
50C1
50C1

OUT
PWR)

N12
R13
P13
R14
P14
R15
N13
P15

SMC_CPU_ISENSE
48B1 5B2 SMC_CPU_VSENSE
46C6 SMC_GPU_ISENSE
46C6 SMC_GPU_VSENSE
66C2 SMC_DCIN_ISENSE
48C5 SMC_PBUS_VSENSE
66B1 SMC_BATT_ISENSE
46B3 SMC_FWIRE_ISENSE

C7
A7
B7
D6
C6
A6
B6

SMC_WAKE_SCI_L
46B2 SMC_TPM_GPIO
53C6
23C8 5C2 PM_CLKRUN_L
53C6
23C5 5C2 PM_SUS_STAT_L
46B1 SC_TX_L
(Serial Port Transmit)
(Serial Port Receive)
46B1 SC_RX_L
(BAT B SMBUS CLK)
27B3 SMB_BSB_CLK

K4
J2
J1
J3
J4
H2
H1
G2

48C1

23C1

47C6 38A5
47C5 46D3

SMC_ONOFF_L
SMC_BC_ACOK (AC
65A2 46C6 5D1 SMC_BS_ALRT_L
63B8 63A7 23C3 PM_SLP_S3_L
61B8 60C8 23C3 PM_SLP_S4_L
46D3 23C3 PM_SLP_S5_L
46A6 SMC_SUS_CLK
27D6 SMB_0_DATA

48C8 46D6 46C8 40C8


66A5
65C7 65C3 46B6 5C1

63D6

CRITICAL

OUT

OUT

IO

26C5 23C5
53B7 46D6

IN
OUT

14B7 6B2

IN

23C8

IO

65C8 46D6 5C1

IO

23C1

OUT

23B8
23C8

IN
OUT

34B3
48A8

IN
OUT
46C3
46C3
46D3
46C6

46C3
51B4 5D2

OUT
46C3

46C3
46C3
51C4 5D2

IN
46C3

46C3 5A7

52C2

IN

52C2

IN

52C2

IN
46C3

62A5 46B3
61C1 46B3
46C3 5A7
46C3

SMC_RCIN_L
BOOT_LPC_SPI_L
PM_SYSRST_L
SMC_TPM_RESET_L
PM_EXTTS_L<0>
PM_THRM_L
SYS_ONEWIRE
PM_BATLOW_L

R3
P3
R2
N3
R1
N2
M4
N1

IN

LAYOUT NOTE:

(VCL IS INTERNAL RAIL)

PLACE R5899, C5820 NEAR SMC PIN N14, N15

SMC_VCL

SMC_EXTSMI_L
SMC_RUNTIME_SCI_L
SMC_ODD_DETECT (Optical
ISENSE_CAL_EN
SMC_EXCARD_CP
SMC_EXCARD_PWR_EN
SMC_EXCARD_PWR_OC_L
SMC_PB7

Disk Insert detect)

SMC_FAN_0_CTL
SMC_FAN_1_CTL
SMC_FAN_2_CTL
SMC_FAN_3_CTL
SMC_FAN_0_TACH
SMC_FAN_1_TACH
SMC_FAN_2_TACH
SMC_FAN_3_TACH
SMS_X_AXIS
SMS_Y_AXIS
SMS_Z_AXIS
SMC_PD3
SMC_NB_ISENSE
SMC_MEM_ISENSE
ALS_LEFT
ALS_RIGHT

B10
A10
D10
A11
B11
C11
A12
D11
G14
G15
G13
G12
H14
H15
H13
H12
M11
P11
R11
N11
P10
R10
N10
M10

(ANALOG_ID)

64D1 48C8 46D8 46D5 46D1 45D3 45D2

IN

=PP3V42_G3H_SMC

PA2/KIN10*/PS2AC

PE2*/ETDI

PA3/KIN11*/PS2AD
PA4/KIN12*/PS2BC

PE3*/ETDO
PE4*/ETMS

PA5/KIN13*/PS2BD
PA6/KIN14*/PS2CC

PF0/IRQ8*/PWM2

PA7/KIN15*/PS2CD

PF1/IRQ9*/PWM3
PF2/IRQ10*/TMOY

PB0/LSMI*

PF3/IRQ11*/TMOX

PB1/LSCI
PB2

PF4/PWM4
PF5/PWM5

PB3

PF6/PWM6

PB4
PB5

PF7/PWM7

PB6
PB7

PG0/EXIRQ8*/TMIX
PG1/EXIRQ9*/TMIY

PC0/TIOCA0/WUE8*

PG2/EXIRQ10*/SDA2
PG3/EXIRQ11*/SCL2

PC1/TIOCB0/WUE9*

PG4/EXIRQ12*/EXSDAA

PC2/TIOCC0/TCLKA/WUE10*
PC3/TIOCD0/TCLKB/WUE11*

PG5/EXIRQ13*/EXSCLA
PG6/EXIRQ14*/EXSDAB

PC4/TIOCA1/WUE12*

PG7/EXIRQ15*/EXSCLB

PC5/TIOCB1/TCLKC/WUE13*
PC6/TIOCA2/WUE14*

PH0/EXIRQ6*

PC7/TIOCB2/TCLKD/WUE15*

PH1/EXIRQ7*
PH2/FWE

PD0/AN8

PH3/EXEXCL

PD1/AN9
PD2/AN10

PH4
PH5

M3
M2
M1
L4
L2
M7
P6
R6
N6
M6
R5
P5
N5
P9
R9
N9
P8
R8
M8
P7
R7
E1
F3
K2
C4
D4
B3

SMC_CASE_OPEN
SMC_TCK
5C2 SMC_TDI
5C2 SMC_TDO
5C2 SMC_TMS

IN

R5899

20%
2 10V
CERM
402

5%
1/16W
MF-LF
2 402

IN

=PP3V42_G3H_SMC

PP3V3_AVREF_SMC

C5820
0.1UF

IO

20%
2 10V
CERM
402

OMIT

46C6

66C2 66B1 62A5 61C1 48C1 48B5 48A1 46B6 45C2

BGA
(3 OF 4)

IN
47C5 46D7 5C2 IN

(To debug card for mode select)

(Should PD)
(Should PU)

NOSTUFF
1

R5802 1R5803
10K

SMC_RST_L

E3

RES*

SMC_XTAL
SMC_EXTAL

A2
B2

XTAL

5%
1/16W
MF-LF
2 402

SMC_H8S2116

GND_SMC_AVSS

IN

IN

SMC_MD1
KBC_MDE

5%
1/16W
MF-LF
2 402

U5800

IN
IN

47B6 5C2

10K

5%
1/16W
MF-LF
2 402

SMC_AVCC_RC

IN
IO
IO

R5801

10K

IO
IO

R5809

PIN F1

OUT

MD2

E2
K1

NMI

F4

ETRST*

L1

MD1

5%
1/16W
MF-LF
2 402

IN
46C7

IO

EXTAL

P12
R12

(Should PD) (To debug card for mode select)

47B5 5C2

SMC_NMI

47C6 5C2

SMC_TRST_L
IN

IN

R5898
10K

5%
1/16W
MF-LF
2 402

(CASE OPEN/CLOSE DETECT) 46B3


IN
IN

XW5800
SM
1

GND_SMC_AVSS 45C4

46B6 48A1 48B5 48C1 61C1 62A5 66B1 66C2

OUT
IN

SMC_DISP_BKLT_B
SMC_DISP_BKLT_A
SMC_LID (LID OPEN/CLOSE SW)
46C1 SMC_CPU_RESET_3_3_L
66B7 5C1 SMC_BATT_ISET
SMC_BATT_VSET
66D7 SMC_SYS_ISET
SMC_SYS_VSET

65A8 46C6 40C4 5B2

SPI_CE_L
SMC_PG1
SMB_BSA_DATA
27C3 SMB_BSA_CLK
27D3 SMB_RMT_DATA
27D3 SMB_RMT_CLK
27B6 SMB_MLB_DATA
27C6 SMB_MLB_CLK

50C7 22C6

46C3

OUT
IN
IN
OUT
46C3

OUT
46C3

IO
46C6

27C3

IO
IO
IO

IO
IO
IO

SMC_PROCHOT
SMC_THRMTRIP
SMC_FWE
ALS_GAIN
23C3 SMS_INT_L
52C7 SMS_ONOFF_L
46B6

OUT

46B5

46D6

C5806
0.1UF

20%
2 10V
CERM
402

C5807

10%
2 6.3V
CERM-X5R LAYOUT NOTE:
402
PLACE C5807 NEAR

4.7

IN

47C5 46C6

47C6 46C6

0.1UF

0.47UF

IN

47C5 46C6 5C2

47B6 46C6

C5805

64D1 48C8 46D8 46D5 46D1 45D3

D1
P4
R4
F12
F13
B13
A13
A4
B4
D2
PE0
PE1*/ETCK

IN

P51
P52/SCL0

BGA
(2 OF 4)

20%
2 10V
CERM
402

IN

46C7

U5800

0.1UF

IN

P47/PWX1/PWM1

PA0/KIN8*/PA2DC
SMC_H8S2116
PA1/KIN9*/PA2DD

C5804

IN

OMIT

IN

20%
2 10V
CERM
402

IN

VSS

21C3

C5803
0.1UF

20%
2 6.3V
CERM-X5R
805

AVSS

47C6 22B3 5C2

22UF

OUT

IN
I/P detect)

C5802

1
OUT

AVREF M15

OUT

58C7

P11

L13
L14
L15
K12
K13
K14
J12
J13

VCL F1

OUT

P60/KIN0*

AVREF M14

23C3
23C1

U5800
SMC_H8S2116

VCC A1

IN

P10

VCC P1
VCC J15

IN

59A1 46D6

B12
C13
A15
B14
B15
C14
D12
C15

VCC P2

OUT

63B1 26A5 5B2

PM_LAN_ENABLE
SMC_RSTGATE_L
ALL_SYS_PWRGD
RSMRST_PWRGD
SMC_SB_NMI
PM_RSMRST_L
IMVP_VR_ON
PM_PWRBTN_L

AVCC N15

OUT

26A3

AVCC N14

23C3

OUT
46C6
46C6

OUT
OUT

PD3/AN11
PD4/AN12
PD5/AN13
PD6/AN14
PD7/AN15

OMIT

U5800
SMC_H8S2116
BGA
(4 OF 4)
NC

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

G3
H3
K3
L3
N4
M5
N7
M12
M13
L12
K15
J14

NC0
NC1

NC12
NC13

NC2

NC14

NC3
NC4

NC15
NC16

NC5
NC6

NC17
NC18

NC7

NC19

NC8
NC9

NC20
NC21

NC10

NC22

F15
A14
C12
C10
C5
A3
B8
E4
H4
M9
N8

SMC

NC

SYNC_MASTER=SMC

NC
NC

SYNC_DATE=08/18/2005

NOTICE OF PROPRIETARY PROPERTY

NC

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

NC
NC

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NC

II NOT TO REPRODUCE OR COPY IT

NC

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

NC
NC

SIZE
NC

NC11

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

45

79

SMC Reset Button / Brownout Detect


48C8 46D5 46D1 45D3 45D2
64D1

SMS_INT_L
SMC_TPM_RESET_L
CRITICAL

1K

RN5VD30A-F

R5901

NC

OUT

CD
NC

53B7 45C8

47C5 45C3 5C2

SMC_RST_L

59A1 45D8
48C8 46C8 45C5 40C8

65C8 45B8 5C1


65A2 45C5 5D1
47C6 45B5 5C2

Debug Power Button


SMC_ONOFF_L

SMC Crystal Circuit


C5920

OUT

10K

6.2K

5%
1/16W
MF-LF
402 2

=PP3V42_G3H_SMC

R5994
R5953

RSMRST_PWRGD
SMC_ONOFF_L

47C5 45C5 5C2


47C5 45C5 5C2

R5910

SMC_XTAL

45C4

Y5920 1

20.00MHZ
5X3.2-SM

197S0169
SMC_EXTAL

45C4

45B5
65A8 45B5 40C4 5B2

5%
50V
CERM
402

CRITICAL

Silk: "PWR BTN"

1
1

SMC_FWE
SMC_LID
SMC_PG1

R5948
R5973
R5919
R5930

1.05V Mid-Reference

=PP3V42_G3H_SMC

5%
50V
CERM
402

45D8
45D8

45D8
45D8

NOSTUFF

45D8

R5972

45C8

45C8

5%
1/16W
MF-LF
402

45C8

45B5

VR5965

45D5

ISL60002-33

PP3V3_AVREF_SMC

SOT23-3

VIN

VOUT

MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=3.3V

CRITICAL

P0V52_SMC_LSREF

1K

R5928

1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2

10K
100K
2.0K
470K
10K
10K
10K
10K

1
1

2
2

10K
100K

1
1

2
2

10K
100K

45D5

45D2

NOSTUFF
NOSTUFF
NOSTUFF
NOSTUFF
NOSTUFF
NOSTUFF
NOSTUFF
NOSTUFF
NOSTUFF

SMC_P20
SMC_P21
SMC_P22
SMC_P23
SMC_P26
SMC_P27
SMC_P46
SMC_P44
SMC_SYS_KBDLED

NOSTUFF

ALS_GAIN
SMC_GPU_ISENSE
SMC_GPU_VSENSE

R5920
R5922
R5923
R5925
R5927
R5929
R5934
R5936
R5938
R5918
R5940
R5942

1
1
1
1
1
1
1
1
1
1
1
1

SMC_EXCARD_PWR_OC_L

10K

R5905
R5906

1
1

2
2

R5924
R5926

1
1

2
2

10K SMC_EXCARD_CP
10K SMC_EXCARD_PWR_EN

R5931
R5932
R5933
R5935
R5937
R5939
R5941

1
1
1
1
1
1
1

2
2
2
2
2
2
2

10K
10K
10K
10K
10K
10K
10K

5%
1/16W
MF-LF
402 2

45B8

PM_SUS_STAT_L
PM_SLP_S5_L

100K
100K

5%
1/16W
MF-LF
2 402

5C2 23C5 45D5 47C5 53C6


23C3 45C5

45B8

NOSTUFF

SMC_CPU_RESET_3_3_L

2
2
2

10K
10K
10K
10K
10K
10K
10K
10K
10K

SMC_FAN_0_CTL NOSTUFF 45B8


SMC_FAN_2_CTL NOSTUFF 45B8
SMC_FAN_3_CTL NOSTUFF 45B8
SMC_FAN_0_TACH NOSTUFF 45B8
SMC_FAN_2_TACH NOSTUFF 45B8
SMC_FAN_3_TACH NOSTUFF 5A7 45B8
SMC_PD3
NOSTUFF
45B8

10K
10K
10K

R5945
R5946

1
1

2
2

10K
10K

ALS_LEFT
ALS_RIGHT

R5949

10K

SMC_DISP_BKLT_B

NOSTUFF
NOSTUFF

5A7 45A8

C5965 C5966
0.47UF

C5967

66A3 45D8 5C1

0.01uF

66A4 45D8 5C1

10%
2 16V
CERM
402

66A5 65C7 65C3 45C5 5C1

R5954
R5955
R5988

SMC_BATT_TRICKLE_EN_L
SMC_BATT_CHG_EN
SMC_BC_ACOK

1
1
1

2
2
2

10K
10K
470K

20%
6.3V 2
X5R
603
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=0V

58C8 46B5 7C6

45B5

CPU_PROCHOT_L

R5947
R5996

1
1

R5943
R5944

SMC_CASE_OPEN
SMC_PS_ON

10K
10K

2
2

1
1

ALTERNATE FOR
PART NUMBER

BOM OPTION

REF DES

COMMENTS:

R5997

CPU_PROCHOT_L

353S1381

VR5965

NOSTUFF
45B8
NOSTUFF

45B5

SMC_PROCHOT

R5990
SMC_TPM_GPIO

45D5

SMC_THRMTRIP

47B5 46D6 45C8 5C2

SMC_RX_L

SOT-363

47B6 46D6 45C8 5C2

5%
1/16W
MF-LF
402

Q5901

TPM_GPIO2

53C6

SC_RX_L

45C5

SC_TX_L

45C5

R5991

R5992

7C6 14B6 21C2

2N7002DW-X-F

45B5

53C6

5%
1/16W
MF-LF
402

PM_THRMTRIP_L

TPM_GPIO1
NOSTUFF

5%
1/16W
MF-LF
402

SOT-363

45D5

NOSTUFF
62A5

45A8 61C1

SMC_FWIRE_ISENSE

10K

2N7002DW-X-F

TI REF3133

SMC_PROCHOT_3_3_L

V-

5C1 39C6 45D5 65C3

SMC_NB_ISENSE
SMC_MEM_ISENSE

10K
10K

2
2

7C6 46C2 58C8

Q5901

SM-LF
1

45C5

45D5

3
TABLE_ALT_ITEM

353S1278

TABLE_ALT_HEAD

PART NUMBER

LMC7211

45B5

SMC 3.3V to 1.05V Level Shifting

45C2 45C4 48A1 48B5 48C1 61C1 62A5 66B1 66C2

U5977

GND_SMC_AVSS

5%
1/16W
MF-LF
2 402

45B5

10uF

10%
2 6.3V
CERM-X5R
402

R5977

NOSTUFF

NOSTUFF
NOSTUFF

SMC_BATT_VSET
SMC_SYS_VSET

10K
10K

2
2

1K

45A8

V+
1
1

NOSTUFF

C5977

20%
2 10V
CERM
402

R5998
R5999

45B5

45B8

0.1uF

2
2
2
2
2
2
2
2
2

R5976

10K

GND

45D2 45D3 46D5


46D8 48C8 64D1

R59711

10K
10K

2
2

5%
1/16W
MF-LF
402

45D8

SMC_PB7

15pF
1

SMC AVREF Supply

R5980
R5981
R5982
R5983
R5984
R5985
R5986
R5987

45B5
45B8

C5921

Is this the best part to use?

=PP3V42_G3H_SMCVREF

SMC_TX_L
SMC_RX_L
SYS_ONEWIRE ONEWIRE_PULLUP_OLD
SMC_BS_ALRT_L
SMC_TMS
SMC_TDO
SMC_TDI
SMC_TCK

15pF

NOSTUFF

64D1

R59701

5%
1/16W
MF-LF
402
47B6 46B2 45C8 5C2

SMC_TPM_RESET_L

47B5 46B2 45C8 5C2

5%
1/10W
MF-LF
2 603

10K

OUT

Silk: "SMC RST"

R5989

10%
16V
CERM 2
402

48C8 46D6 45C5 40C8

SMS_INT_L

64D1 48C8 46D8 46D1 45D3 45D2

0.01UF

5%
1/10W
MF-LF
2 603

SMC 1.05V to 3.3V Level Shifting


=PP3V3_S0_SMC_LS

GND

C5901 1

45B5 23C3

5%
1/16W
MF-LF
2 402

U5900

SMC_MANUAL_RST_L
NOSTUFF

=PP3V3_S3_SMS

R5995

R5900

SOT23-5

=PP3V3_S3_TPM

64B3 52C7

VDD

20%
10V
CERM 2
402

5B2

64B3 53C2

64A6

0.1uF

THESE NEED TO BE PULLED TO THE PROPER RAIL:

=PP3V42_G3H_SMC

C5900 1

SMC_TX_L

R5993
1

5%
1/16W
MF-LF
402

Stuff R5992, R5993 for development only

SMC G3HOT OSCILLATOR


System (Sleep) LED Circuit
64B3 35B6

64D1

=PP5V_S3_SYSLED

=PP3V42_G3H_SMC_CLK

CRITICAL
TABLE_5_HEAD

NOSTUFF

C5951 1

2.2UF

20%
4V
X5R 2
402

L5910
FERR-120-OHM-0.2A

OMIT
1

R5951
2.2K

5%
1/16W
MF-LF
402 2

R5950

1%
1/16W
MF-LF
2 402

MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=3.425V

C5911

U5910

NC
NC
NC
NC

2
3
4
5

84.5, 1%, 1/16W, MF-LF, 402

R5950

NORMAL

114S0126

115, 1%, 1/16W, MF-LF, 402

R5950

FANCY

OUT

VIO
NC0
NC1

NC4
NC5

NC2

NC6

NC3

NC7

5%
1/16W
MF-LF
402 2

R5911
7

SMC_SUS_CLK_R

22

45C5

SMC_SUS_CLK

35C5 5B2

NC
NC
10 NC
11 NC
9

OUT

SYNC_MASTER=SMC

SYNC_DATE=08/23/2005

NOTICE OF PROPRIETARY PROPERTY

5%
1/16W
MF-LF
402

SMC SUPPORT
SYS_LED_ANODE

SYS_LED_L

OUT

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

Q5952

II NOT TO REPRODUCE OR COPY IT

2N7002

45C8

GND
6

U5910 is really a 32.768KHz oscillator

2N3906
SOT23-LF
3

4.7K

32.768KHZ-9-3.6V
SG-3040LC-SM

114S0114

Q5950

R59521

12
VDD

0.1UF

20%
2 10V
CERM
402

IN

SMC_SYS_LED_16B

SOT23-LF

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART


SIZE

197S0166

APPLE COMPUTER INC.

DRAWING NUMBER

SHT
NONE

REV.

051-7374

SCALE

BOM OPTION

SYS_LED_L_VDIV

CRITICAL
20%
6.3V 2
CERM
603

REFERENCE DESIGNATOR(S)

SYS_LED_ILIM

PP3V42_G3H_SMC_CLK_F

4.7UF

DESCRIPTION

TABLE_5_ITEM

C5951 AND R5951 SHOULD BE PLACED CLOSE TO Q5950

QTY

TABLE_5_ITEM

84.5

0603

C5910 1

PART#

A
OF

46

79

64D1 5D2

64D3 5D2

=PP3V42_G3H_LPCPLUS

=PP5V_S0_LPCPLUS

CRITICAL

J6000
F-ST-5047
SM1

C
53C6 45D8 21D4 5D2
53C6 45D8 21D4 5D2

53C6 45C8 21C5 5C2


53C6 45D5 38A5 23C8 5C2
45C8 22B3 5C2
46C6 45B5 5C2
26B1 5C2
45C1 5C2
46C6 45C5 5C2
45C2 5C2
46D6 46B2 45C8 5C2

LPC_AD<0>
LPC_AD<1>
LPC_FRAME_L
PM_CLKRUN_L
BOOT_LPC_SPI_L
SMC_TMS
DEBUG_RST_L
SMC_TRST_L
SMC_TDO
SMC_MD1
SMC_TX_L

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

FWH_INIT_L
5C2 6B2 21C4
PCI_CLK_PORT80_LPC 5C2 33D6
LPC_AD<2>
LPC_AD<3>
INT_SERIRQ
PM_SUS_STAT_L
SMC_TDI
SMC_TCK
SMC_RST_L
SMC_NMI
SMC_RX_L
SV_SET_UP

5C2 21D4 45D8 53C6


5C2 21D4 45D8 53C6

5C2 23C8 45C8 53C6


5C2 23C5 45D5 46D3 53C6
5C2 45C5 46C6
5C2 45C5 46C6
5C2 45C3 46D7
5C2 45C1
5C2 45C8 46B2 46D6

GPIO15

5C2 23B6 23C3

516S0002

LPC+ Debug Connector

SYNC_MASTER=NB

SYNC_DATE=06/30/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

47

79

CPU CURRENT SENSE


C6100
470PF
1

R6107
58B6 58A4

IMVP6_DROOP

R6105

5%
1/16W
MF-LF
402

NOSTUFF
1

10%
50V
CERM
402

30.1K2
IMVP6_CPU_ISENSE_P 1
1%
1/16W
MF-LF
402

C6104

0.1UF

1M

CPU_ISENSE_R_P

R6108
58B6 58A4

IMVP6_VO

S0T23-3

64C1 58D8 58D5 58C2

NOSTUFF
1

C6105

Q6153
TP0610
G

PM_SLP_S3

Q6152
TP0610

S0T23-3
1

63B7

SMC_ONOFF_L

R6150

U6100

SMC_CPU_ISENSE
1

45D5

C6102
0.22UF

20%
2 6.3V
X5R
402

GND_SMC_AVSS

C6101

45C2 45C4 46B6 48A1 48B5 61C1 62A5 66B1 66C2

0.1UF

PLACE RC FILTER CLOSE TO SMC

1
C6103 R6103
1M
1%
1/16W
MF-LF
2 402

27.4K
1%
1/16W
MF-LF
2 402

10%
2 50V
CERM
402

5%
1/16W
MF-LF
2 402

S0T23-3
1

45C5 40C8
46D6 46C8

1%
1/16W
MF-LF
402

LMV2011MF

=PP3V3_S0_CPUPOWER 64A6

100K
NOSTUFF

1%
1/16W
MF-LF
402

470PF

R6152

SOT23-5

=PP3V42_G3H_SMC

CPU_ISENSE_R_N

4.53K2

CPU_ISENSE_OUT_R

20%
2 10V
CERM
402
PBUS_S0_SMC_VSENSE

46D8
45D3 45D2
46D5 46D1
64D1

R6102
1

20%
2 10V
CERM
402

TP0610
2

CRITICAL

0.1UF

Q6150
=PPVIN_S5_IMVP6

R6106

30.1K2
IMVP6_CPU_ISENSE_N 1

5%
1/16W
MF-LF
402

1%
1/16W
MF-LF
402

20%
2 10V
CERM
402

PROCESSOR DCIN VOLTAGE SENSE

R6100

PBUS_SMC_VSENSE_EN_L

SMC_PBUS_VSENSE
DRIVEN LOW IN S0

DRIVEN LOW BY SMC


OR POWER BUTTON

45D5

Q6151

R6151

2N7002

PBUS_SMC_VSENSE_EN

5.49K

SOT23-LF

R6153

C6150
0.22UF

1%
1/16W
MF-LF
2 402

10%
6.3V
2 CERM-X5R
402

GND_SMC_AVSS

100K

5%
1/16W
MF-LF
2 402

45C2 45C4 46B6 48A1 48C1 61C1 62A5 66B1 66C2

PLACE C6150 NEAR U5800

B
CPU VOLTAGE SENSE
R6112

Current Sense Calibration Circuit

64D6 48A5 9B8 8D7 8B5

=PPVCORE_S0_CPU

4.53K2
1%
1/16W
MF-LF
402

Switches in fixed load on power supplies to calibrate current sense circuits

SMC_CPU_VSENSE 5B2

45D5

C6112
0.22UF
20%
6.3V
402

2 X5R
64D3

GND_SMC_AVSS

=PP5V_S0_ISENSECAL

R61441
10K

R6140
470K

64D6 48B3 9B8 8D7 8B5

5%
1/16W
MF-LF
402 2

5%
1/16W
MF-LF
2 402

R6143

TSOP-LF

Q6101
SOT-363

A
IN

ISENSE_CAL_EN
1

R6141

MIN_LINE_WIDTH=0.50 mm
MIN_NECK_WIDTH=0.20 mm

CPU Current & Voltage Sense


SYNC_DATE=08/30/2005

Q6101

NOTICE OF PROPRIETARY PROPERTY

R6142
470K

SOT-363

CPUVCORE_ISENSE_CAL

SYNC_MASTER=ENET

2N7002DW-X-F

45B8

1
2
5
6

6
D

1%
1/4W
MF-LF

2 1206

SI3446DV
2N7002DW-X-F

1.00

Q6100

=PPVCORE_S0_CPU

CRITICAL

ISENSE_CAL_EN_LS5V

ISENSE_CAL_EN_L

45C2 45C4 46B6 48B5 48C1 61C1 62A5 66B1 66C2

PLACE RC FILTER CLOSE TO SMC

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

5%
1/16W
MF-LF
402 2

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT

100K

5%
1/16W
MF-LF
2 402

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART


SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

48

79

DIMM0 TEMPERATURE ZONE


ADDITIONAL NOISE FILTERING

R6203
THRM_DIMM0_3V3_UNFILTERED

47

=PP3V3_S0_THRM_SNR

10C4 49B3 64A6

1%
1/16W
MF-LF
402

C6202
0.1UF
10%

2 16V
X5R

PLACE C6200 AND C6201


NEXT TO DXP AND DXN

PLACE NEXT TO C6202 U6200 PIN 1

NOSTUFF

IF A SENSOR INPUT IS UNUSED STUFF


THE CORRESPONDING RESISTOR

R6200

10%
50V
2 CERM
402

R6201

IF B SENSOR INPUT IS UNUSED STUFF


THE CORRESPONDING RESISTOR

SMBCLK
ALERT*

0.0022UF

1.
2.
3.
4.

1
2

THRM_DIMM0_SMB_DATA
THRM_DIMM0_SMB_CLK

27B3

NC

OT1*

NC

OT2*

10 NC

IO
IO

GND

PLACE U6200 NEAR U1200

BM02B-ACHKS-GAN-TF-LF-SN-M
M-RT-SM
3

27B3

THRM_DIMM0_DXP2

9
7

SMBDATA

C6201

10%
2 50V
CERM
402

5%
1/16W
MF-LF
2 402

CRITICAL

J6250

U6200
UMAX1

NOSTUFF
1

CRITICAL

MAX6695AUB
2 DXP1
3 DXN
4 DXP2

THRM_DIMM0_DXN

OUT

VCC

C6200
0.0022UF

5%
1/16W
MF-LF
2 402
40C5

402

THRM_DIMM0_DXP1

OUT

40C4

ROUTE DXP AND DXN DIFFERENTIALLY


DXP AND DXN TRACE LENGTH MUST NOT EXCEED 4 INCHES
ROUTE GROUNDED GAURD TRACES AROUND THE DXP/DXN DIFF PAIR
10 MIL TRACE WIDTHS AND 10MIL SPACING BETWEEN THE GAURD

518S0487

NOTE: REPLACE J6250 AND J6251 FROM 518S0332 TO 518S0452 AND THEN 518S0487
AFTER THIS CHANGE, THE SCHEAMTIC DOES NOT MATCH THE PCB ON THESE TWO LOCATIONS.

DIMM1 TEMPERATURE ZONE

R6252

PLACE UNDER J2900


PLACE C6250 AND C6251
NEXT TO DXP AND DXN
PLACE R6250 AND R6251
AWAY FROM U6250 BUT CLOSE TO
C6250 AND C6251

Q6200

THRM_DIMM1_3V3_UNFILTERED

47

=PP3V3_S0_THRM_SNR

10C4 49D3 64A6

1%
1/16W
MF-LF
402

0.1UF

BC846BM3T5G

10%

2 16V
X5R

SOT732-3
2

C6252

402

THRM_DIMM1_DXP1

PLACE NEXT TO C6252 U6250 PIN 1


1

C6250

VCC

0.0022UF

10%
50V
2 CERM
402

IF A SENSOR INPUT IS UNUSED STUFF


THE CORRESPONDING RESISTOR

THRM_DIMM1_DXN

U6250

CRITICAL

MAX6695AUB
UMAX1

2 DXP1
3 DXN
4 DXP2

SMBDATA
SMBCLK

9
7

ALERT*

OT1*
OT2*

27C3

THRM_DIMM1_SMB_DATA
THRM_DIMM1_SMB_CLK

27D3

IO
IO

NC
5 NC
10 NC

GND
6

NOSTUFF
1

R6251

CRITICAL

J6251
BM02B-ACHKS-GAN-TF-LF-SN-M
M-RT-SM
3

5%
1/16W
MF-LF
2 402

C6251

PLACE U6250 IN BATTERY CHARGER AREA

0.0022UF

10%
50V
2 CERM
402

THRM_DIMM1_DXP2

518S0487

1.
2.
3.
4.

ROUTE DXP AND DXN DIFFERENTIALLY


DXP AND DXN TRACE LENGTH MUST NOT EXCEED 4 INCHES
ROUTE GROUNDED GAURD TRACES AROUND THE DXP/DXN DIFF PAIR
10 MIL TRACE WIDTHS AND 10MIL SPACING BETWEEN THE GAURD

TEMPERATURE SENSE
SYNC_MASTER=ENET

SYNC_DATE=11/09/2005

NOTICE OF PROPRIETARY PROPERTY

NOTE: REPLACE J6250 AND J6251 FROM 518S0332 TO 518S0452 AND 518S0487
AFTER THIS CHANGE, THE SCHEAMTIC DOES NOT MATCH THE PCB ON THESE TWO LOCATIONS.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

49

79

64A3

=PP3V3_S5_ROM
1

0.1UF

R63021 R63011
3.3K

20%

2 10V
CERM

3.3K

5%
1/16W
MF-LF
402 2

402

5%
1/16W
MF-LF
402 2

C6312

R6308
CRITICAL

10K

OMIT

5%
1/16W
MF-LF
402

VDD

U6301
16MBIT

R6307
1

SPI_CE_L

22pF
5%
50V
402

NOSTUFF
1

C6308 R6309
22pF
10K

5%
2 50V
CERM
402

SI

SCK

SPI_SI_R

SST25VF016B

SPI_WP_L
SPI_HOLD_L

C6309

2 CERM

R6306

SOI

SPI_SCLK_R

5%
1/16W
MF-LF
402

45B5 22C6

SPI_SCLK

3
7

CE*
WP*
HOLD*

47

SPI_SI

22C6 45D5

SPI_SO

22C6 45D5

5%

R6303 1/16W
MF-LF
SO

SPI_SO_R

47

5%
1/16W
MF-LF
402

VSS

402

C6301
22pF
5%

2 50V
CERM

C6311
22pF

402

5%
1/16W
MF-LF
402

5%

2 50V
CERM

402

45D5 22C6

47

R6309 IS NOT NEEDED WHEN SHARING SPI FLASH WITH


ICH7M AND TEKOA(LAN CHIP)

R6307 AND R6306 SHOULD BE PLACED LESS THAN 100 MILS FORM ICH7M
R6303 SHOULD BE PLACED LESS THAN 100 MILS FORM FLASH ROM

SPI BOOTROM
SYNC_MASTER=MASTER

SYNC_DATE=5/23/05

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

50

79

64D3 5D2

=PP5V_S0_FAN_RT

64A6 5D2

=PP3V3_S0_FAN_RT

CRITICAL

1
R6560
47K

45B8 5D2

R6565
47K
1

SMC_FAN_1_TACH

5D2

5%
1/16W
MF-LF
4022

J6501

88609-04001
F-ST-SM
NC 5
1

FAN_RT_TACH

5%
1/16W
MF-LF
402

5V DC
TACH

3
4

NC

R6561
100K

MOTOR CONTROL
GND

518S0486

5%
1/16W
MF-LF
4022

Q6560
2N7002

SOT23-LF
2 S
45B8 5D2

SMC_FAN_1_CTL
5D2

FAN_RT_PWM

Fan
SYNC_MASTER=ENET

SYNC_DATE=11/10/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

51

79

PAGE NOTES
INPUT
=PP3V3_S3_SMS - 3.3V POWER FOR SMS (STAYS ALIVE IN SLEEP)
SMS_ONOFF_L - CONNECT TO SMC TO BE ABLE TO PUT SMS INTO LOW-POWER MODE

OUTPUT
SMS_ACC_*_AXIS - ACCELEROMETER OUTPUT TO SCU

PAGE HISTORY

5/19/2005
7/26/2005
7/26/2005
7/26/2005

- FIRST REVISION OF PAGE


- REMOVED BOM TABLE AND UPDATED SYMBOL TO KXM52-2050
- CONNECTED PD PIN TO SMCS SMS_ONOFF_L
-

Desired Orientation
(Placed on board bottom side)
Package Top
1

64B3 46D5

+Y

=PP3V3_S3_SMS

+X

C6620 1
0.1uF

ACCEL_KIONIX
CRITICAL 8

+Z (up)

20%
10V
CERM 2
402

VDD

U6620
KXM52-2050
QFN
OUTPUTX 2

SMS_X_AXIS

45B8

9 PS

OUTPUTY 13

SMS_Y_AXIS

45B8

5 PARITY

OUTPUTZ 14

SMS_Z_AXIS

45B8

10 SELF
TEST

45B5

SMS_ONOFF_L
NC

R66521

4
6
7
11

100K

5%
1/16W
MF-LF
402 2

ACCEL_ST1

R6650
10K

RSVD
RSVD

DNC 1

NC
OMIT

RSVD
RSVD

5%
1/16W
MF-LF
402 2

1
GND

THRML
PAD

3 12 15

OMIT

C6604
0.033uF

10%
2 16V
X5R
402

C6605
0.033uF

10%
2 16V
X5R
402

OMIT
1

C6606

TABLE_5_HEAD

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

CRITICAL

BOM OPTION

0.033uF

10%
2 16V
X5R
402

TABLE_5_ITEM

132S0131

0.033UF,10%,16V,402

C6604,C6605,C6606

ACCEL_KIONIX

132S0042

0.01UF,10%,16V,402

C6604,C6605,C6606

ACCEL_ST

TABLE_5_ITEM

ST_ACCEL_ON_L

ACCEL_ST

G
3

Q6651
TP0610
S0T23-3

ACCEL_ST

Q6650

2N7002

SOT23-LF

PP3V3_S3_ST_ACCEL
ACCEL_ST
CRITICAL
8
VDD

U6650

LIS3L02AL
SMS_ACC_SELFTEST

SMC_ACC_SELFTEST-->is a test signal


0 -->Normal operation
1 -->Self test

LGA

1 ST
1

R6621

4 RSRVD1
5 RSVRD2

VOUTX 7
VOUTY 6

10K

VOUTZ 2

5%
1/16W
MF-LF
2 402

GND

Desired Orientation
(Placed on board bottom side)
1

Package Top
+Z (up)

+X
+Y

SMS
SYNC_MASTER=SMC

SYNC_DATE=08/23/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

52

79

64A6

=PP3V3_S0_TPM

TPM
1

C6700
0.1UF

10%
16V
2 X5R
402

CRITICAL

TPM
1

C6701
0.1UF

10%
16V
2 X5R
402

TPM
1

C6702

NOSTUFF

0.1UF

10%
16V
2 X5R
402

5%
1/8W
MF-LF
2 805

TPM
47C6 45D8 21D4 5D2

IO

47C6 45D8 21D4 5D2

IO

47C5 45D8 21D4 5C2


47C5 45D8 21D4 5C2

33D6

IN

47C5 46D3 45D5 23C5 5C2

IN

47C5 45C8 23C8 5C2

SMC_TPM_PP

45C8

47C6 45D5 38A5 23C8 5C2

IO
IN

TPM

46B1

46B1

15pF

VDD

TSSOP

VDD

17

PCI_CLK_TPM
LPC_FRAME_L

21

LCLK

PM_SUS_STAT_L
INT_SERIRQ
PM_CLKRUN_L

28
27

CRITICAL
1

22
16

15pF

3V1
3V2

15

10

TPM

19
24

R6704

VNC

SMC_TPM_PP_R
TPM_GPIO1
TPM_GPIO2

NC

12

NC

VOLTAGE=3.3V
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.25MM

TPM_XTALI
TPM_XTALO

LRESET*
LPCPD*

VBAT

TPM

NC

SERRIRQ
CLKRUN/GPIO*
PP/GPIO

GPIO_EXPRESS_00

5%
1/16W
MF-LF
2 402

(INT PD)

PP

GPIO

GPIO/SM_DAT
NC
GPIO/SM_CLK

13

XTALI/32K_IN

14

XTALO

SM-LF

C6703

=PP3V3_S3_TPM

46D5 64B3

5%
1/8W
MF-LF
805

0.1UF

R6702

10K

6
1

Y6795

TPM

NC

PP3V3_S0_TPM_3VSB

VSB

LFRAME*

32.768K

C6796

3V0

VDD

10%
16V
2 X5R
402

TPM_BADD
TESTBI/BADD/GPIO
TESTBI/BADD

TESTI

GPIO2

TPM

5%
50V
CERM
TPM
402

TPM

LAD2
LAD3

NC

C6795
1

LAD1

CLKRUN*

5%
1/16W
MF-LF
402

LAD0

23
20

3VSB

IN

47C6 45C8 21C5 5C2

NOSTUFF

R6700

IO

26

9
8

NOSTUFF
1

GND

4 GND0
11 GND1
18 GND2
25 GND3

IO

U6700

LPC_AD<0>
LPC_AD<1>
LPC_AD<2>
LPC_AD<3>

NOTE:
SINCE CURRENT OF VSB IS NOT YET ON SPEC,
1/8W (R6704/R6705) IS USED FOR NOW

R6705

R6703

10K

5%
1/16W
MF-LF
2 402

197S0098

5%
50V
CERM
402
TPM

R6798
26B1

IN

TPM_LRESET_L

5%
1/16W
MF-LF
402

TPM_RST_L
NOSTUFF

R6799
46D6 45C8

IN

SMC_TPM_RESET_L

5%
1/16W
MF-LF
402

TPM
SYNC_MASTER=SMC

SYNC_DATE=07/18/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

53

79

AUDIO CODEC
APPLE P/N 353S1458

2
0402

CRITICAL

CRITICAL

C6800 1

10UF

0.001uF

20%

10%
50V
2 CERM
402

6.3V 2
X5R
603

21C7 5C1

IN

21C7 5C1

IN

21C7 5D1

IN

C6801

0.001uF

ACZ_SDATAIN<0>

OUT

39

6
10
5

SDATAIN

SDATA_OUT
SDATA_IN

8
44

AUD_BI_PORT_C_L
55C8 AUD_BI_PORT_C_R

23
24

PORT-C_L

AUD_BI_PORT_D_L
55A8 AUD_BI_PORT_D_R

35

PORT-D_L_HP
PORT-D_R_HP

57A5

BAL_IN_L
57A3 BAL_IN_COM
57A3 BAL_IN_R

ACZ_RST_L

R6800
100K

13

SENSE_B

34

PORT-A_L_HP

39
41

HP

PORT-A_R_HP

PORT-E_R

15

VREFOUT-B
PORT-B_L

28
21

PORT-B_R

22

VOLUME_DOWN
PC_BEEP

VREFOUT-C
VREFOUT-D

29

27

RESET*

VREF_FILT
AFILT1
AFILT2
CAP2

31
33

AUD_VREF_FILT
AUD_ANALOG_FILT_1
AUD_ANALOG_FILT_2
AUD_BYPASS

NC1

40

AUD_JDREF

NC2

43

MIC1

MIC2

12

10%
2 16V
X5R
402

R6850
AUD_GPIO_0

VOL_UP

54C7

5%
1/16W
MF-LF
402

AUD_SPDIF_OUT 56D3

AUD_SPDIF_IN

17

14

NC

AUD_BI_PORT_E_L
AUD_BI_PORT_E_R

AUD_BI_PORT_B_L
AUD_BI_PORT_B_R

32

30

NC
NC

56B3

57C5 57D8
57C4 57C8 57D8
57C3
57B3

57B3
57A3

57A5
57A5

57A6

57A6

PLACE R6809 CLOSE TO COMBO JACK


1

R6809

5%
1/16W
MF-LF
2 402

=GND_AUDIO_CODEC
MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM
VOLTAGE=0V

C6812

0.001uF
10%

2 50V
CERM

AUD_ALC_COUT
CRITICAL

C6853

0.1UF

10%
X5R 2
402

16V

402

CRITICAL

NO STUFF

R68541
20.0K

1%
1/16W
MF-LF
402 2

CRITICAL
1

C6806
1000pF

CRITICAL

CRITICAL
1

C6813

CRITICAL

10uF

C6805

20%
6.3V 2
TANT
SMA-LF

10%
2 50V
CERM
402

10%
50V
2 CERM
402

CRITICAL

C6810 1

C6807 1

1000pF

5%
25V
CERM 2
603

C6833

0.001uF

0.001uF

5%
25V
2 CERM
603

CRITICAL

C6804 1

57A6

5%
1/16W
MF-LF
2 402

CRITICAL
1

AUD_VREF_PORT_B

100K

C6821

STUFFING OPTIONS FOR ALC882 CODEC

OUT

22

AUD_BI_PORT_F_L
AUD_BI_PORT_F_R

37

R6801

55A8

AUD_SENSE_A
AUD_SENSE_B
AUD_BI_PORT_A_L
AUD_BI_PORT_A_R

VREFOUT-A
PORT-E_L

57B3 57A6 57A5 56B5 56B3 55C8 55B8 55A8 54D2 54A6
64B3 57D8 57C8 57C5 57C3 57B8 57B5

54A6 54B6 55A8 55B8 55C8 56B3 56B5 57A5 57A6 57B3
57B5 57B8 57C3 57C5 57C8 57D8 64B3

5%
1/16W
MF-LF
402

16

NO STUFF

NO STUFF

=GND_AUDIO_CODEC

AUD_SPDIF_OUT_R

PORT-F_L_HP
PORT-F_R_HP

LO

0.1UF

5%
1/16W
MF-LF
2 402

SENSE_A

CRITICAL
1

10%
2 50V
CERM
402

VOLUME_UP

11

U6800
STAC92204XR

7 DVSS3
4 DVSS2

IN

47

CD-R

2
3

BEEP

GPIO3/SPDIFIN

CD-L
CD-G

19
20

VOL_UP
54B7 VOL_DOWN

0.001uF

47UF

20%
6.3V 2
POLY
CASE-B3-LF

PORT-C_R

18

54B7

C6836

R6808
48

CRITICAL

GPIO1

36

57A3

10%
50V
2 CERM
402

CRITICAL
1

PLACE CLOSE TO U6800


SPDIF-OUT

GPIO2
GPIO0

45
46

C6803 1

57C3 57C5

LQFP

AUD_GPIO_2
54B7 AUD_GPIO_0_R
54A7 AUD_GPIO_1_R
55B8

57C3 21C7 5C1

SYNC

CRITICAL

C6830

0.001uF

47UF

BIT_CLK

CRITICAL
1

20%
6.3V 2
POLY
CASE-B3-LF

ACZ_BITCLK
ACZ_SYNC
ACZ_SDATAOUT

5%
1/16W
MF-LF
402

C6802 1

10%
2 50V
CERM
402

R6807
21C7 5D1

CRITICAL

C6835

26 AVSS1
42 AVSS3

AVDD1 25
AVDD2 38

L6801

FERR-220-OHM

PP4V5_AUDIO_ANALOG 54A3
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=4.5V

MIN_LINE_WIDTH=0.30MM
MIN_NECK_WIDTH=0.20MM
VOLTAGE=3.3V
PP3V3_AUDIO_CODEC
CRITICAL

DVDD_CORE1 1
DVDD_CORE3 9

64A6 57B5 56D8

MIN_LINE_WIDTH=0.30MM
MIN_NECK_WIDTH=0.20MM
VOLTAGE=3.3V
54A6 =PP3V3_S0_AUDIO

10uF

10UF

20%
6.3V 2
TANT
SMA-LF

20%

6.3V 2
TANT

SMA-LF

R6852
0

AUD_GPIO_0_R

54C7

5%
1/16W
MF-LF
402
NO STUFF

USING DC OFFSET SCREENED PART AS PRIMARY OPTION

R6851
57C3

OUT

AUD_GPIO_1

VOL_DOWN

54C7
TABLE_ALT_HEAD

5%
1/16W
MF-LF
402

AUD_GPIO_1_R

5%
1/16W
MF-LF
402

54C7

64D3

CRITICAL

MIN_LINE_WIDTH=0.60 MM
MIN_NECK_WIDTH=0.20 MM
L6800
VOLTAGE=5V
FERR-220-OHM
=PP5V_S0_AUDIO
1
2
55C8

MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=5V
5V_REG_IN
AUD_4V5_SHDN_L

0402

=PP3V3_S0_AUDIO

1K

TPS79501

SOT223-6
2 IN
OUT 4
1 EN
NR/FB 5

GND
3

1%
1/16W
MF-LF
402

MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=4.5V
PP4V5_AUDIO_ANALOG 54D2

VR6800

R6802
64A6 57B5 56D8 54D7

C6823

R6810

GND
TAB

78.7K

1%
1/16W
MF-LF
2 402

BOM OPTION

REF DES

COMMENTS:

353S1345

353S1458

U6800

DC OFFSET SCREEN PRTS

10%
2 16V
X5R
402

C6822 1
10UF

C6825
15pF

5%
2 50V
CERM
402

R6811
29.4K

AUDIO: CODEC

1%
1/16W
MF-LF
2 402

20%
6.3V 2
X5R
603

57B3 57A6 57A5 56B5 56B3 55C8 55B8 55A8 54D2 54B6
64B3 57D8 57C8 57C5 57C3 57B8 57B5

57C3 57C5

CRITICAL

VREG_FB

0.1UF

CRITICAL

ALTERNATE FOR
PART NUMBER

TABLE_ALT_ITEM

R6853
1

PART NUMBER

SYNC_MASTER=M42AUDIO

=GND_AUDIO_CODEC

SYNC_DATE=08/05/2006

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

4.5V POWER SUPPLY FOR CODEC

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

54

79

7
SATELLITE

& SUB TWEETER AMPLIFIER

SATELLITE
SUB

D
64D3

APN:353S1595

442 Hz < FC < 736 Hz


169 Hz < FC < 282 Hz

SPEAKER OUTPUT EMI FILTERS

VOLTAGE=5V
MIN_LINE_WIDTH=0.60 MM
MIN_NECK_WIDTH=0.20 MM
55B8 =PP5V_S0_AUDIO_PWR

MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
55C4 SPKRAMP_R_P_OUT

MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
SPKRCONN_R_P_OUT
OUT

R7260
2

5%
1/16W
MF-LF
402

NO STUFF
CRITICAL
1

C7200

55C8 55C3 55B8 55B3 55A8 55A5


64B3 56C2

20%
6.3V
POLY 2
SMC-LF

64B3 56C2 55D8 55C8 55C3 55B8 55B3 55A8 55A5 55A3

100PF

=GND_AUDIO_PWR

MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
55C4 SPKRAMP_R_N_OUT

MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
SPKRCONN_R_N_OUT

R7261
2

NO STUFF
CRITICAL

5%
1/16W
MF-LF
402

64D3

VOLTAGE=5V
MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM
54A6 =PP5V_S0_AUDIO

PP5V_S0_AUDIO_F

VOLTAGE=5V
MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM

L7200

FERR-220-OHM
2

CRITICAL

AUD_BI_PORT_C_R
54C7

IN

10%
16V
X5R 2
402

55B8 55A6

1
VDD

AUD_SPKRAMP_INR_L

2 IN+
3 IN-

MAX9705_R_N

55D3 55C3 55B8 55B3 55A8 55A5 55A3


64B3 56C2 55D8

20%
POLY
CASE-B3-LF

2 6.3V

55B4

SPKRAMP_R_P_OUT
SPKRAMP_R_N_OUT

8
9

MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
SPKRCONN_L_P_OUT

R7270
0

NO STUFF
CRITICAL

5%
1/16W
MF-LF
402

55D3
55C3

5%
2 50V
CERM
402

R7201
100

5%
1/16W
MF-LF

56C2 55D8 55D3 55C8 55C3 55B8 55B3 55A8 55A5 55A3
64B3

=GND_AUDIO_PWR

2 402

10%
16V
X7R 2
402

SPKRAMP_SYNC1 55A4
55B4

SPKRAMP_THERMPLANE

MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
SPKRAMP_L_N_OUT

NO STUFF
CRITICAL

5%
1/16W
MF-LF
402

55A4 55B4

=GND_AUDIO_PWR

CRITICAL

C7204

C7208

1
VDD

0.1UF

C7220

FERR-1000-OHM
AUD_BI_PORT_C_L
54C7

IN

AUD_SPKRAMP_INL_L

0.018UF

0402

55C8 55A6

10%
16V
X5R 2
402

CRITICAL

L7220

AUD_SPKRAMP_SHUTDOWN_L

100PF

U7220

56C2 55D8 55D3 55C8 55C3 55B8 55B3 55A8 55A5 55A3
64B3

C7203

=GND_AUDIO_PWR

47UF

20%
6.3V 2
X5R
603

10
PVDD

2 IN+
3 IN-

MAX9705_L_N

OUT+
OUT-

CRITICAL SYNC

5 SHDN*

20%
2 6.3V
POLY
CASE-B3-LF

LEFT SATELLITE

SPKRAMP_L_P_OUT 55C3
SPKRAMP_L_N_OUT 55C3
SPKRAMP_SYNC2 55A4

55A4

MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
SPKRAMP_SUB_P_OUT

NO STUFF
CRITICAL

5%
1/16W
MF-LF
402

GND PGND PAD


11
4
7

C7221 1

64D3 55D8 55B8

55C4 55B8

=GND_AUDIO_CODEC

SPKRAMP_THERMPLANE

=PP5V_S0_AUDIO_PWR
PP5V_S0_AUDIO_F

CRITICAL

C7206

CRITICAL

AUD_BI_PORT_D_R
IN

AUD_SPKRAMP_INSUB_L

FERR-1000-OHM
AUD_GPIO_0

0.047UF
1

2
10%
16V
X7R
402

L7211

IN

10%
16V
X5R 2
402

C7230

0402

1
VDD

0.1UF

CRITICAL

L7230

54B8

2 IN+
3 IN-

OUTCRITICAL SYNC
5 SHDN*
GND PGND PAD
7
11
4

55B8 55C8

CRITICAL

C7231 1

10K

5%
1/16W
MF-LF
402 2

55D3 55C8 55C3 55B8 55B3 55A5 55A3


64B3 56C2 55D8

OUT+

THRML

R7210

C7205

NO STUFF
CRITICAL
1

OUT

56C2

C7281
100PF

5%
2 50V
CERM
402

120UF

20%
6.3V
X5R 2
603

MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
SPKRCONN_SUB_N_OUT

R7281
5%
1/16W
MF-LF
402

20%
2 6.3V
POLY
CASE-B2

64B3 56C2 55D8 55D3 55C8 55C3 55B8 55B3 55A8 55A5

TDFN1

AUD_SPKRAMP_INSUB
MAX9705_SUB_N

AUD_SPKRAMP_SHUTDOWN_L

=GND_AUDIO_PWR

CRITICAL

10UF

10
PVDD

U7230

2
1

C7280

=GND_AUDIO_PWR

MAX9705

0402

64B3 57D8 57C8


56B5 56B3 55C8 55B8 54D2 54B6 54A6
57C5 57C3 57B8 57B5 57B3 57A6 57A5

56C2 55D8 55D3 55C8 55C3 55B8 55B3 55A8 55A5 55A3
64B3

MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
55A4 SPKRAMP_SUB_N_OUT

C7209 1

54C7

55A4 55C4

=GND_AUDIO_PWR

FERR-1000-OHM

56C2

5%
2 50V
CERM
402

10%
16V
X7R 2
402

55D3 55C8 55C3 55B3 55A8 55A5 55A3


64B3 56C2 55D8

OUT

100PF

0.018UF
64B3 57D8 57C8
56B5 56B3 55C8 55A8 54D2 54B6 54A6
57C5 57C3 57B8 57B5 57B3 57A6 57A5

MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
SPKRCONN_SUB_P_OUT

R7280

THRML

C7271

MAX9705

CRITICAL

56D2

TDFN1

AUD_SPKRAMP_INL

10%
16V
X7R
402

CRITICAL
1

10UF

OUT

5%
2 50V
CERM
402

=PP5V_S0_AUDIO_PWR
55B8 PP5V_S0_AUDIO_F
CRITICAL

MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
SPKRCONN_L_N_OUT

R7271

64D3 55D8 55B8


55C4

C7270
100PF

GND PGND PAD


7
11
4

0.018UF

MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
SPKRAMP_L_P_OUT

THRML

CRITICAL

C7211 1

64B3 57D8
56B5 56B3 55B8 55A8 54D2 54B6
57C5 57C3 57B8 57B5 57B3 57A6

OUTSYNC

CRITICAL

VOLTAGE=0V
MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM
57C8
54A6 =GND_AUDIO_CODEC
57A5

47UF

20%
6.3V
X5R 2
603

OUT+

5 SHDN*

AUD_SPKRAMP_SHUTDOWN_L

56D2

=GND_AUDIO_PWR

C7201

TDFN1

10%
16V
X7R
402

OUT

100PF

5%
2 50V
CERM
402

MAX9705

0.018UF AUD_SPKRAMP_INR
1

10uF

10
PVDD

U7210

C7210

0402

56C2

CRITICAL

C7202 1

0.1UF

FERR-1000-OHM

OUT

C7261

RIGHT SATELLITE

CRITICAL

C7207 1
CRITICAL

55B8
56C2 55D8 55D3 55C8 55C3 55B8 55B3 55A8 55A5 55A3
64B3

0402

L7210

C7260

5%
2 50V
CERM
402

150uF

VOLTAGE=0V
MIN_LINE_WIDTH=0.60 MM
MIN_NECK_WIDTH=0.20 MM
55A3 =GND_AUDIO_PWR
55D3

D
56C2

NO STUFF
CRITICAL

SUB-TWEETER

SPKRAMP_SUB_P_OUT 55B3
SPKRAMP_SUB_N_OUT 55B3
SPKRAMP_SYNC1 55C4

8
9
6
1

R7202
100

5%
1/16W
MF-LF

2 402

0.047UF

10%
16V
X7R 2
402

AUDI0: SPEAKER AMP

SPKRAMP_SYNC2 55B4

=GND_AUDIO_CODEC

SPKRAMP_THERMPLANE

55A4 55B4 55C4

SYNC_MASTER=M42AUDIO

=GND_AUDIO_PWR

SYNC_DATE=08/05/2006

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

XW7200
SM
64B3 56C2 55D8 55D3 55C8 55C3 55B8 55B3 55A8 55A3

=GND_AUDIO_PWR

II NOT TO REPRODUCE OR COPY IT

SPKRAMP_THERMPLANE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART


55A4 55B4 55C4

SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

55

79

MIC CONNECTOR

TABLE_ALT_HEAD

PART NUMBER

ALTERNATE FOR
PART NUMBER

BOM OPTION

518S0491

518S0332

REF DES

COMMENTS:

CRITICAL

APN:514S0392

TABLE_ALT_ITEM

J7302

IMPROVED TWO PIN CONNECTOR

J7301
48227-0301
M-RT-SM1
4

AUDIO JACK 1: LO/HP CONNECTOR, SPDIF TX


L7390

56B1

FERR-220-OHM

57B5 54D7 54A6


64A6

=PP3V3_S0_AUDIO

56B1

AUD_SPDIF_OUT

0402

L7300

J7300

C7307

10%

16V

402

AUD_CONNJ1_RING_F

1
0402

L7306

FERR-1000-OHM
1

AUD_CONNJ1_TIP

L7307

5%
50V
CERM 2
402

56A8

C7300

GND_AUDIO_SPDIF_DGND

CRITICAL

1UF

AUD_CONNJ1_SLEEVEDET_F

C7304 1

5%
50V
CERM 2
402

5%
50V
CERM 2
402

100PF

0405

R7391
0

DZ7301

5.6V-15A

C7301
100PF

0405
2

AUD_PORTA_L

57D1

BI

10K

AUD_J1_SLEEVEDET_R

OUT

55B1

IN

55B1

IN

55D1

IN

55C1

IN

5%
2 CERM
402
50V

C7303
0.001uF

10%
2 CERM
402
50V

4.7

OUT

2
3
4

56A3 56A8 56B1


56B6 56C1 56C8

CHASSIS_AUDIO_JACK_ISOL

XW7302
SM

100PF

5%
2 50V
CERM
402

AUDIO_SHIELD_PLANE

XW7300
SM
1

AUD_J2_COM

=GND_AUDIO_CODEC

56D8

54A6 54B6 54D2 55A8 55B8 55C8 56B5 57A5 57A6 57B3
57B5 57B8 57C3 57C5 57C8 57D8 64B3

APN:514-0291
APN:514-0318

2
OUT

L7350

OMIT
CRITICAL

J7350

F-RT-TH
2
4

SHLD_PIN
SHLD_PIN

57A8

L7356

FERR-1000-OHM

0402

5%
CERM 2
402

0402

C7350
1UF

10%
2 6.3V
CERM
402
56C8

C7351

10uF

CRITICAL

DZ7351

20%

GND_AUDIO_SPDIF_DGND
CRITICAL

DZ7350

5%
CERM 2
402

C7352
100PF

5%
2 50V
CERM
402

MIC_HI

BI

57B1

57A8

OUT

MIC_SHIELD

10K

L7373

CHASSIS_AUDIO_JACK_ISOL

50V

C7354

0.001uF

10%
50V
2 CERM
402

MIC_HI_F

0402

0402

L7374

L7375

OUT

0402

5%
50V
CERM 2
402

57B8

56C8 56C1 56B6 56B1 56A8

MIC_HI_CONN 56D3

FERR-1000-OHM
1
2 MIC_SHLD_CONN 56D3

MIC_SHIELD_F

100PF
AUD_J2_SLEEVEDET_R

100PF

5%
50V
CERM 2
402

C7372 1
100PF

5%
50V
CERM 2
402

CHASSIS_AUDIO_JACK_ISOL

4.7

AUD_J2_TIPDET_R

OUT

57B8

5%
1/16W
MF-LF
402
1

C7356
100PF

5%
2 50V
CERM
402

AUDIO: JACK

TABLE_5_HEAD

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

CRITICAL

BOM OPTION
TABLE_5_ITEM

514-0290

CONN,3.5MM COMBO AUDIO OUT,RA,MG3,LF

J7300

CRITICAL

NORMAL

514-0291

CONN,3.5MM COMBO AUDIO IN,RA,MG3,LF

J7350

CRITICAL

NORMAL

514-0317

CONN,3.5MM COMBO AUDIO OUT,RA,BLACK,LF

J7300

CRITICAL

FANCY

514-0318

CONN,3.5MM COMBO AUDIO IN,RA,BLACK,LF

J7350

CRITICAL

FANCY

SYNC_MASTER=M42AUDIO

SYNC_DATE=08/05/2006

TABLE_5_ITEM

NOTICE OF PROPRIETARY PROPERTY


TABLE_5_ITEM

AUDIO JACK 2: LINE IN CONNECTOR, SPDIF RX

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

TABLE_5_ITEM

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

SHT
NONE

REV.

051-7374

SCALE

56D3

FERR-1000-OHM

0402

B
MIC_LO_CONN

R7351

100PF

50V

0405

56B6 56B1 56A3


56C8 56C1

C7355 1

5%
CERM 2
402

100PF

5.6V-15A

C7353 1

0405

603

OUT

FERR-1000-OHM
AUD_PORTF_L

5%
1/16W
MF-LF
402

5.6V-15A

2 6.3V
X5R

57A8

R7350
AUD_CONNJ2_SLEEVEDET_F

100PF
50V

57A1

C7370 1 C7371
2

0402

L7372

BI

0402

FERR-1000-OHM
AUD_CONNJ2_SLEEVEDET

MIC_LO_F

FERR-1000-OHM
AUD_PORTF_R

FERR-1000-OHM
AUD_CONNJ2_TIP_F

L7357

10

MIC_LO

0402

L7355

L7371

FERR-1000-OHM

L7354

1
0402

OUT

FERR-1000-OHM
AUD_CONNJ2_RING_F

0402

C7357

L7370

FERR-1000-OHM

L7353

7
6

NO STUFF

MIC EMI FILTER

AUD_CONNJ2_TIPDET_F

FERR-1000-OHM

VCC
GND
VOUT

2
0402

0402

AUD_CONNJ2_RING

5
1

FERR-1000-OHM

AUD_CONNJ2_TIP
AUD_CONNJ2_TIPDET

L7352

5%
1/16W
MF-LF
402

AUDIO-IN

FERR-220-OHM
AUD_CONNJ2_SLEEVE_F

0402

R7322
1

56A3 56A8 56B6


56C1 56C8

5%
1/16W
MF-LF
402

54C1

L7351

FERR-220-OHM
1

CHASSIS_AUDIO_JACK_ISOL

R7382

AUD_CONNJ2_SLEEVE
NO STUFF

56A3 56A8 56B1


56B6 56C1 56C8

NO STUFF

AUD_SPDIF_IN

5%
1/16W
MF-LF
402

PP3V3_S0_AUDIO_SPDIF

CHASSIS_AUDIO_JACK_ISOL

54A6 54B6 54D2 55A8 55B8 55C8 56B3 57A5 57A6 57B3
57B5 57B8 57C3 57C5 57C8 57D8 64B3

R7349
10

56A3 56A8 56B1


56B6 56C1 56C8

XW7304
SM

5%
1/16W
MF-LF
402

AUD_J2_OPT_OUT

CHASSIS_AUDIO_JACK_ISOL

XW7303
SM

XW7301
SM
=GND_AUDIO_CODEC

AUDIO SHIELD FILL

57D8

C7305

R7320

CHASSIS_AUDIO_JACK_ISOL

F-ST-SM
5

XW7305
SM
2

88609-04001

SPKRCONN_SUB_P_OUT
SPKRCONN_SUB_N_OUT
SPKRCONN_R_P_OUT
SPKRCONN_R_N_OUT

5%
1/16W
MF-LF
402

AUD_J1_COM

J7303

SPKR_SHIELD

REPLACE 518S0334 WITH 518S0486


AUD_J1_TIPDET_R

NO STUFF
=GND_CHASSIS_AUDIO_JACK

CHASSIS_AUDIO_JACK_ISOL

6D8

CRITICAL

57C6 57C8

R7301

100PF

CRITICAL

5%
1/16W
MF-LF
402
56B1 56A8 56A3
56C1 56B6

C7302 1

5.6V-15A
2

=GND_AUDIO_PWR

5%
1/16W
MF-LF
402

DZ7300

10%
2 6.3V
CERM
402

R7380

R7300

100PF

5%
1/16W
MF-LF
402

NO STUFF

F-ST-SM
3

SPKRCONN_L_P_OUT
SPKRCONN_L_N_OUT

57C1

BI

0402

0402

C7306

AUD_PORTA_R

64B3 55D8 55D3 55C8 55C3 55B8 55B3 55A8 55A5 55A3

AUD_CONNJ1_TIP_F

FERR-1000-OHM
AUD_CONNJ1_SLEEVEDET

IN

FERR-1000-OHM

2
0402

88611-02001

NO STUFF

0402

8
9

IN

55C1

L7304

L7305

55C1

FERR-1000-OHM

AUD_CONNJ1_RING

10

SPEAKER CONNECTOR

AUD_CONNJ1_TIPDET_F

FERR-1000-OHM

2 X7R

J7302

APN:518S0332

L7303

C7308
0.047uF

10%
16V
X7R 2
402

SHLD_PIN

0.047uF

1
7

CRITICAL

2
0402-LF

0402

F-RT-TH
2
3

SHLD_PIN

AUD_CONNJ1_TIPDET

AUDIO-OUT

AUD_CONNJ1_SLEEVE_F

FERR-1000-OHM

5%
1/16W
MF-LF
402

OMIT
CRITICAL

L7302

54D1

FERR-120-OHM-1.5A

2
0402-LF

R7321

APN:514-0290
APN:514-0317

VCC
GND
VIN

AUD_CONNJ1_SLEEVE
NO STUFF

PP3V3_S0_AUDIO_SPDIF

L7301

FERR-120-OHM-1.5A
56B8

56B1

IN

MIC_LO_CONN
MIC_HI_CONN
MIC_SHLD_CONN

A
OF

56

79

PORT A DETECT
OUT AUD_SENSE_B

57C5 54C1

OUT AUD_SENSE_A

57C8 57B3

PORT E DETECT(E TELLS H TO TURN ON)


CODEC PORT ASSIGNMENTS

PP3V3_S0_AUDIO_F

R7405

39.2K
1

AUD_OUTJACK_INSERT_L

470K

5%
1/16W
MF-LF
402

AUD_PORTA_DET_L

5%
1/16W
MF-LF
402

57D8 57C8 57B3

Q7401
2N7002DW-X-F

SOT-363

SOT-363

0.1UF

PORT A HP/LO

10V

20%
CERM

402

CRITICAL

C7430
100UF

100K 2

57B1

270K

57C3 54D2 54A3


57C8 56C3

Q7400

R7404

2N7002DW-X-F
5

5.11K

SOT-363

1%
1/16W
MF-LF
402

C7402

4
57D8

10%

R7414
5.11K

54C1 AUD_SENSE_A

2
64B3
56B5 56B3 55C8 55B8 55A8 54D2 54B6 54A6
57D8 57C8 57C5 57B8 57B5 57B3 57A6 57A5

CRITICAL
100UF

C7414

PORT F DETECT
57D8 57C4 54C1

CERM
402

PORT G DETECT
64B3
56B5 56B3 55C8 55B8 55A8 54D2 54B6 54A6
57D8 57C8 57C3 57B8 57B5 57B3 57A6 57A5

AUD_SENSE_B

57B1

AUD_PORTA_R_R

20%
CERM
402

HP/LO DE-POP SWITCH

=GND_AUDIO_CODEC
57C5 54D2 54A3

5%
1/16W
MF-LF
2 402

Q7402

R7412
IN

47K

AUD_J2_TIPDET_R

56A4

IN

IN

AUD_GPIO_1

54C1

SOT-363

AUD_BI_PORT_A_L

BI

4.7

10%

54C1

16V

2 CERM

10V

402

C1

R7431

0.01UF

0.1UF

U7400

5%
1/10W
MF-LF
603

C7412

C2
VCC

R7430

Q7402

NO STUFF
4

C7411
20%
CERM

NC

2N7002DW-X-F

5%
1/16W
MF-LF
402
54B8

ACZ_RST_L

SOT-363

IN

2 402

2N7002DW-X-F
5

AUD_J2_DET_RC

5%
1/16W
MF-LF
402

64B3
57B5 57B3 57A6 57A5
55A8 54D2 54B6 54A6
56B5 56B3 55C8 55B8
57D8 57C8 57C5 57C3

1%
1/16W
MF-LF
2 402

AUD_PORTG_DET_L

5%
1/16W
MF-LF

20.0K

56A4

R7413

54C7 21C7 5C1

2 402

270K

AUD_INJACK_INSERT_L

470K

NO STUFF

R7438

1%
1/16W
MF-LF

R7460

R7411

APN:353S1459

PP4V5_AUDIO_ANALOG

20.0K
NO STUFF

56C3

POLY
B2

NO STUFF

BI

6.3V

R7415

PP3V3_S0_AUDIO_F

AUD_PORTA_R

20%

10V

1
57D8 57C8 57B3

0.1UF

20%
10V

R7435

1%
1/16W
MF-LF
2 402

C7431

54C1 57C8 57D8

16V

0.1UF

1%
1/16W
MF-LF
402

47.0K

AUD_SENSE_B

C7404

56C3

=GND_AUDIO_CODEC

1%
1/16W
MF-LF
402

2 CERM
402

BI

R7434
47.0K

POLY
B2

PP4V5_AUDIO_ANALOG

AUD_J1_SLEEVEDET_R

0.01UF

AUD_PORTA_L
1

6.3V

AUD_J1_SLEEVEDET_R

=GND_AUDIO_CODEC

20%

5%
1/16W
MF-LF
2 402

AUD_PORTA_L_R

AUD_J1_SLEEVEDET_INV

5%
1/16W
MF-LF
402

R7461

57C5 57C3 57B8 57B5 57B3


55B8 55A8 54D2 54B6 54A6
57A6 57A5 56B5 56B3 55C8
64B3 57D8

R7403

PP3V3_S0_AUDIO_F

IN

NC

=GND_AUDIO_CODEC

57C6 56C3

C7401

AUD_PORTE_DET_L
6

2N7002DW-X-F

SOT-363

2
57C5 57C3 57B8 57B5 57B3
55B8 55A8 54D2 54B6 54A6
57A6 57A5 56B5 56B3 55C8
64B3 57C8

AUD_J1_DET_RC

NC

Q7401

2N7002DW-X-F

47K
1

Q7400

R7402
AUD_J1_TIPDET_R

1%
1/16W
MF-LF

2 402

IN

39.2K

1%
1/16W
MF-LF
2 402

R7401

PORT A :HEADPHONE/LINE OUT


PORT B :MICROPHONE ON BOTH CH (ADC 0)
PORT C :SPEAKER AMP
PORT D :UNUSED
PORT E :SW USES TO TRIGGER DIGITAL OUT
PORT F :LINE IN (ADC 1)
CD INPUT :UNUSED

R7406

56C3

AUD_BI_PORT_A_R

BI

4.7

5%
1/10W
MF-LF
603

402

=GND_AUDIO_CODEC

MAX9890
CEXT C3

SHDN*

MAX9890_CEXT

MAX9890_INL

B1 INLCRITICALOUTL A1

AUD_PORTA_L_R

57D3

MAX9890_INR

B3 INR

UCSP1 OUTR A3

AUD_PORTA_R_R

57C3

A2 GND

57C8 57C4 54C1

R74391
10K

0.1UF
20%
10V

2 CERM

5%
1/16W
MF-LF
402 2

AUD_J2_SLEEVEDET_R

57A6 57A5 56B5 56B3 55C8 55B8 55A8 54D2 54B6 54A6
64B3 57D8 57C8 57C5 57C3 57B8 57B5 57B3

L7400

C7435

402

=GND_AUDIO_CODEC

FERR-1000-OHM
64A6 56D8 54D7 54A6

=PP3V3_S0_AUDIO

PP3V3_S0_AUDIO_F

57C8 57D8

0402

CRITICAL
1

C7400

CRITICAL

PORT F LI

0.1UF
20%
2

CERM
402

54C1

BI

C7432

R7432

10V

4.7

AUD_BI_PORT_F_L

54A6 =GND_AUDIO_CODEC

57A6 57A5 56B5 56B3 55C8 55B8 55A8 54D2 54B6


64B3 57D8 57C8 57C5 57C3 57B8 57B3

57A6 57A5 56B5 56B3 55C8 55B8 55A8 54D2 54B6 54A6
64B3 57D8 57C8 57C5 57C3 57B8 57B5 57B3

MIC INPUT CIRCUITRY

3.3uF

AUD_PORTF_L_R

5%
1/16W
MF-LF
402

10%
10V
CERM-X5R
805-1

R7451
IN

1/16W
MF-LF

5%
402

1/16W
MF-LF
CRITICAL

5%
402

2
2

5%
1/16W
MF-LF
402

IN

AUD_BI_PORT_B_L
MAKE_BASE=TRUE

54C1

C7452

MIC_LO

AUD_BI_PORT_B_R

54C1

0.001UF
50V

CERM
402

54C1
54C1
54A6 54B6 54D2 55A8 55B8 55C8 56B3 56B5
57A5 57B3 57B5 57B8 57C3 57C5 57C8 57D8 64B3

R7453
IN

MIC_SHIELD

54C7

BAL_IN_COM
BAL_IN_R
BAL_IN_L

OUT AUD_BI_PORT_E_L
OUT AUD_BI_PORT_E_R

3.3uF
AUD_PORTF_R_R

OUT

54C7

OUT

54C7

OUT

54C7

AUD_PORTF_R

BI

56B4

SYNC_MASTER=M42AUDIO

R7440
20K

5%
1/16W
MF-LF
2 402

R7454
2

AUDIO: JACK TRANSLATORS

1%
1/16W
MF-LF
402

10%
10V
CERM-X5R
805-1

OUT AUD_BI_PORT_D_L

5%
1/16W
MF-LF
402

4.7

UNUSED CODEC ANALOG PORT TERMINATIONS

NO STUFF
56B3

NO STUFF

=GND_AUDIO_CODEC

AUD_BI_PORT_F_R

PLACE C7452 NEAR U6800

10%

XW7400

BI

5%
1/16W
MF-LF
402

CRITICAL

SM
56B3

54C1

CRITICAL

R7452
100K

10%
CERM
402

R7433

10% 16V
X5R 402

0.001UF
50V

C7433

54C1

0.1uF

C7451

CRITICAL

C7450
MIC_IN

R7437
47.0K

AUD_VREF_PORT_B

330
1

R7436

=GND_AUDIO_CODEC
1

MIC_HI

56B4

1%
1/16W
MF-LF
2 402

6.8K

56B3

BI

47.0K

R7450
1

AUD_PORTF_L

=GND_CHASSIS_AUDIO_MIC

5%
1/16W
MF-LF
402

C7440

0.1UF
16V

CRITICAL

CRITICAL

C7441

C7445

0.1UF

10%
X5R
402

6D8

57B3 57A6 56B5 56B3 55C8 55B8 55A8 54D2 54B6 54A6
64B3 57D8 57C8 57C5 57C3 57B8 57B5

CRITICAL

10%
2

16V

X5R
402

CRITICAL
1

0.1UF

0.1UF
10%
16V
X5R
402

C7446

CRITICAL
1

16V

X5R
402

C7447
0.1UF

10%
2

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

10%
2

SYNC_DATE=08/05/2006

NOTICE OF PROPRIETARY PROPERTY

16V

X5R
402

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

=GND_AUDIO_CODEC

II NOT TO REPRODUCE OR COPY IT


III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

57

79

1
TABLE_ALT_HEAD

PART NUMBER

ALTERNATE FOR
PART NUMBER

BOM OPTION

REF DES

COMMENTS:

128S0093

128S0092

C7501,C7508

KEMET T520V336M016ATE0457650

128S0093

128S0092

C7509,C7517

KEMET T520V336M016ATE0457650

TABLE_ALT_ITEM

TABLE_ALT_ITEM

=PP5V_S0_IMVP6

64D3

64C1 58D8 58C2 48C7

R7512

10
5%
1/16W
MF-LF
402

D
58D5 58C2 48C7
64C1

1uF

5%
1/16W
MF-LF
402

IN

MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM

C7596

DPRSTP*

2-Phase CCM

1-Phase CCM

1-Phase DCM

5%
1/16W
MF-LF
402

GND_IMVP6_SGND

NO STUFF

4.02K

470K
402

R7527

58A4
58A4

2
1

58A4

R7545
499

NO STUFF

ERT-J0EV474J

C7510
0.01uF
10%
16V
CERM
402

IMVP6_NTC_R

58A4

21C4 7B3

R7506

5%
1/16W
MF-LF
402

CPU_PROCHOT_L
1

7A3

R7519
499

46C2 46B5 7C6

IN

62A1
63C2 IN

1%
1/16W
MF-LF
402
45D8

26B5 14B6

IN
OUT

147K

0.015uF

1%
1/16W
MF-LF
402
1

39
38
37

46
45
2
3

47
44
1
5
6

VDD

58A4 5D7

IMVP6_SOFT

IMVP6_RBIAS

BOOT1 36

VID5

U7500

BOOT2

VID4 ISL6262-SCRN

QFN

VID3
VID2

UGATE1

CRITICAL
PHASE1

26

58A8

IMVP6_UGATE1

34

58A8

IMVP6_PHASE1

32

58A8

IMVP6_LGATE1

R7509
1.82K

1%
1/16W
MF-LF
402

470pF
10%
50V
CERM
402

R7513

58A4

58A4

11

58A4 5D7

10

2.0K
IMVP6_VDIFF_RC
1

12

IMVP6_FB2
IMVP6_FB
IMVP6_COMP
58A4 IMVP6_VW

NO STUFF

1%
1/16W
MF-LF
402

VID0

LGATE1
PGND1

R7511

DPRSLPVR

58A8

IMVP6_ISEN1

PGD_IN

UGATE2 27

58A6

IMVP6_UGATE2

PHASE2
CLK_EN*

LGATE2

VR_ON
PGND2
VR_TT*

58A6

IMVP6_PHASE2

30

58A6

IMVP6_LGATE2

2
1

R7514

C7507

RBIAS

VO

SMB

18

17

VSEN
RTN

COMP

58A4

IMVP6_DFB

R7518
1K

5.11K

1%
1/16W
MF-LF
402

1%
1/16W
MF-LF
402

NC
TPAD
49

C7531
0.068UF
10%
10V
CERM
402

58A4

R7517

C7529
180pF

R7510

10%
50V
CERM
402

15

5%
50V
CERM
402

CRITICAL

5%
1/16W
MF-LF
402

R7501
3.65K

1%
1/16W
MF-LF
402

MPC1055LR36
DCR=0.8mOHM

CRITICAL

(IMVP6_PHASE2)

0.36uH-30A-0.80mOhm
5

HAT2165H

SM

NO STUFF

LFPAK

LFPAK

1
4

R7502
1

1%
1/16W
MF-LF
402

2
2

5%
1/8W
MF-LF
805

1
1

R7505

(IMVP6_VO)

10K

IMVP6_FET_RC2

C7534

0.033UF
10%
16V
X5R
402

C7528

10%
6.3V
CERM-X5R
402

0.33uF

R7515
11K

1%
1/16W
MF-LF
402

NO STUFF

NO STUFF
1

IMVP6_VO_R
1

R7531

C7502

0.0022UF
10%
50V
CERM
402

D7501

0.0022UF
2

B340LBXF

10%
50V
CERM
402

R7507
1
5%
1/16W
MF-LF
402

NO STUFF

CRITICAL

C7592

10%
6.3V
CERM-X5R
402

3.92K
1%
1/16W
MF-LF
402

C7504
0.22uF

1% 58A6
1/16W
MF-LF
402

R7530

C7511

0.0047UF

SMB
2

10%
25V
CERM
402

R7543
3.65K

1%
1/16W
MF-LF
402

10KOHM-5%

0603-LF

1%
1/16W
MF-LF
402

L7501

Q7505

HAT2165H

11.5K

(IMVP6_ISEN2)

C7533

(IMVP6_VSUM)

ERT-J1VR103J

0.018UF
10%
16V
X7R
402

(IMVP6_VO)

(IMVP6_COMP)

TABLE_5_HEAD

R0802/R0803 **on the CPU page** protect the IMVP6 if the CPU is not installed

C7521

10%
6.3V
CERM-X5R
402

R7523

R7522

5%
1/16W
MF-LF
402

CPU_VCCSENSE_P
CPU_VCCSENSE_N

8B6 58A4
8B6 58A4

IMVP6 CPU VCORE REGULATOR

58B6
58C7 9D2 9C2

58B6 48C5
58B6 48D5
58B6
58C7
58B7 5D7

MIN_NECK_WIDTH
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM

58C6
58C6
58C6
58C6
58C6
58B2

IMVP6_PHASE2
IMVP6_BOOT2
IMVP6_UGATE2
IMVP6_LGATE2
IMVP6_ISEN2
IMVP6_FET_RC2
IMVP6_VSUM_R2
IMVP6_VO_R2

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

CRITICAL

MIN_LINE_WIDTH
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM

353S1465

ISL6262

U7500

M42

353S1461

ISL9504

U7500

M42A

MIN_NECK_WIDTH
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM

58B7
58B7
58B7
58B7 5D7
58B7
58A5 8B6
58A5 8B6
58B6
58B5

IMVP6_OCSET
CPU_VID_R<0..6>
IMVP6_VSUM
GND_IMVP6_SGND
IMVP6_VO
IMVP6_DROOP
IMVP6_DFB
IMVP6_SOFT
IMVP6_RBIAS
IMVP6_VDIFF
IMVP6_FB2
IMVP6_FB
IMVP6_COMP
IMVP6_VW
CPU_VCCSENSE_P
CPU_VCCSENSE_N
IMVP6_RTN
IMVP6_VSEN

MIN_LINE_WIDTH
0.25 MM
0.25 MM
0.25 MM
0.50 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM

MIN_NECK_WIDTH
0.20 MM
0.20 MM
0.20 MM
0.20 MM
0.20 MM
0.20 MM
0.20 MM
0.20 MM
0.20 MM
0.20 MM
0.20 MM
0.20 MM
0.20 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM

IMVP6 CPU VCore Regulator


SYNC_MASTER=POWER

SYNC_DATE=07/13/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

SHT
NONE

REV.

051-7374

SCALE

BOM OPTION

TABLE_5_ITEM

5%
1/16W
MF-LF
2 402

58C6

MIN_LINE_WIDTH
1.5 MM
0.25 MM
1.5 MM
1.5 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM

PART#

TABLE_5_ITEM

58C8 58B7

58C2

C7599
1uF
10%
16V
X5R
603

CRITICAL

Q7503

R7516

SM

58C6

20%
16V
2
POLY
CASED2E-SM

LFPAK

C7516

VW

XW7500

58C6

33UF

20%
16V
POLY
CASED2E-SM

HAT2168H

14

0.22uF

58C6

R7504
1

0.22uF
10%
6.3V
CERM-X5R
402

58D8
48C7
58D5
64C1

Q7502
NO STUFF

FB

OMIT

IMVP6_PHASE1
IMVP6_BOOT1
IMVP6_UGATE1
IMVP6_LGATE1
IMVP6_ISEN1
IMVP6_FET_RC1
IMVP6_VSUM_R1
IMVP6_VO_R1

CRITICAL

IMVP6_VSUM
IMVP6_OCSET
58A4
48C5 IMVP6_VO
58A4
48D5 IMVP6_DROOP
58A4

58A4

FB2

58C6

C7508

33UF

Note 1: C7532,C7533 = 27.4 Ohm For Validating CPU Only.

58C6

0.001uF

C7503

10K
1%
1/16W
MF-LF
402

CRITICAL
1

C7501

IMVP6_ISEN2

VDIFF

61.9K
1%
1/16W
MF-LF
402

58A6

4.42K

R7500

10%
25V
CERM
402

B340LBXF

CRITICAL

NO STUFF

47PF

10%
50V
CERM
402

GND_IMVP6_SGND

5%
50V
CERM
402

D7500

0.0022UF

0.01UF

CRITICAL

C7590

10%
50V
CERM
402

=PPVIN_S5_IMVP6

10%
16V
CERM
402

C7513

C7500
0.0022UF

C7512
0.0047UF

NO STUFF

VSUM
OCSET 8

SOFT

10%
16V
X5R
402

390pF

C7532

10%
50V
CERM
402

58A8

NO STUFF

NTC

(IMVP6_VW)

NO STUFF

(GND)

29

58A4

IMVP6_COMP_RC

MPC1055LR36
DCR=0.8mOHM

28

ISEN2 23

0.033UF

0.22uF

10%
6.3V
2 CERM-X5R
402

10%
6.3V
CERM-X5R
402

PGOOD

C7514

3V3

21

0.36uH-30A-0.80mOhm

(IMVP6_ISEN1)

24

ISEN1

VSS

58A4
58C8

SM

5%
1/8W
MF-LF
805

PSI*

1%
1/16W
MF-LF
402

(IMVP6_FB)

0.22uF

DPRSTP*

1.40K

R7503

1
2

C7515

C7527
1

64D8

(GND)

33

1
25

L7500

IMVP6_FET_RC1

5%
1/16W
MF-LF
402

=PPVOUT_S0_IMVP6_REG

VID1

DFB

C7506

13

IMVP6_VDIFF

IMVP6_BOOT1
58A6 IMVP6_BOOT2
58A8

35

DROOP 16
58A4

4
2

R7525

PVCC

36A MAX CURRENT


2

NO STUFF
1

19

58A4

LFPAK

31

OMIT

41
40

VR_PWRGD_CK410_L
IMVP_VR_ON
VR_PWRGOOD_DELAY
IMVP6_VR_TT
IMVP6_NTC

OUT

R7508

C7505

22

VID6

42

48
26A7

FROM SMC

10%
16V
X7R
402

43

CPU_DPRSTP_L
IMVP_DPRSLPVR
CPU_PSI_L
1V51V05S0_PGOOD

IN

NO STUFF

58A4
58A4

1%
1/16W
MF-LF
2 402

HAT2165H

2 IMVP6_BOOT2_RC

CPU_VID_R<6>
9D2 CPU_VID_R<5>
9C2 CPU_VID_R<4>
9C2 CPU_VID_R<3>
9C2 CPU_VID_R<2>
9C2 CPU_VID_R<1>
9C2 CPU_VID_R<0>

Q7504

HAT2165H

5%
1/16W
MF-LF
402

0.1uF

CRITICAL

10%
16V
X5R
402

58A4 9D2

IMVP6_BOOT1_RC

R7524

C7530

VIN

R7526

1%
1/16W
MF-LF
402

CRITICAL

1-Phase DCM

LFPAK

20

NO STUFF

IMVP6_VSEN

R7521

PP3V3_S0_IMVP6_3V3

10

58B7 58A4

CRITICAL

(IMVP6_PHASE1)

IMVP6_RTN

1uF
10%
16V
X5R
603

Q7501

=PP3V3_S0_IMVP6

20%
16V
POLY
CASED2E-SM

C7518

33UF

20%
16V
POLY
CASED2E-SM

0.01UF
10%
16V
CERM
402

C7517

33UF

CRITICAL
1

C7509

HAT2168H

Operation Mode

MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
64A6

PSI*

Q7500
LFPAK

4.7uF
20%
6.3V
CERM
603

PPVIN_S5_IMVP6_VIN

R7520
PM_DPRSLPVR

DPRSLPVR

C7535

10%
16V
X5R
603

=PPVIN_S5_IMVP6

CRITICAL

CRITICAL
5

MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=5V

C7526

10
23C3 14B7

=PPVIN_S5_IMVP6

PP5V_S0_IMVP6_VDD

A
OF

58

79

5V/3.3V POWER SUPPLY

=PPVIN_S5_5V3V3S5
64C1 63B7

CRITICAL
2

R7621

0.1uF

1%
1/16W
MF-LF
402

C7640

33UF

C7609

1.02K

20%
16V
2
POLY
CASED2E-SM

10%
16V
X5R
402

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
1

20%
16V
POLY
CASED2E-SM

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

D7624

10%
16V
X5R
402

1%
1/16W
MF-LF
402

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

Q7620

STL8NH3LL

PWRFLT-3P3X3P3

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

OMIT
CRITICAL

L7620

4.7UH-6.5A

C7624
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

C7651

20%
6.3V
POLY
SMC-LF

22UF

150uF

20%
6.3V
CERM-X5R
805

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

OMIT

Q7621

NC 3

<Rc>
R7627

1
1

C7629

63.4K

10%
50V
CERM
402

3V3S5_RUNSS

0.001uF

BG1

SW2

QFN

5%
1/16W
MF-LF
402

5V3V3S5_FCB

59A3

C7664

10%
50V
CERM
402

R7625

VOSENSE2

10K

1%
1/16W
MF-LF
2 402

GND_5V3V3S5_SGND

Vout = 0.8V * (1 + Rc / Rd)


59B1

10%
16V
X5R
402

PP5V_S5_REG_P

C7605
1

TABLE_5_HEAD

DESCRIPTION

REFERENCE DESIGNATOR(S)

1uF

10%
6.3V
CERM
402

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

4.7UH,+/-20%,40mOHM,3mm

L7620

3V3_IND_3MM

152S0365

4.7UH,+/-20%,40mOHM,2.8mm

L7620

3V3_IND_2MM8

C7661
10%
50V
CERM
402

C7665

NC

376S0445

FAIRCHILD FDM6296

Q7620,Q7621,Q7660,Q7661

C7689

NC
NC
NC
NC

R7665

128S0092

C7680,C7640

1%
1/16W
MF-LF
402

NO STUFF

<Rb>
R7668

C7668
10%
50V
CERM
402

376S0445

Q7620,Q7621

376S0445

Q7660,Q7661

20.0K

1%
1/16W
MF-LF
2 402

I629

RSMRST_PWRGD
45D8 46D6

MAKE_BASE=TRUE

PP5V_S5_5V3V3S5_INTVCC

C7602

C7601

20%
6.3V
CERM
603

1uF

4.7UF

R7606

5%
1/16W
MF-LF
2 402

COMMENTS:

KEMET T520V336M016ATE0457650

59C3 59C6

VOLTAGE=5V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

30.1K

0
5%
1/16W
MF-LF
2 402

R7603

5V3V3S5_FCB
1

C7607

5V3V3S5_FSEL

59B5

59B4

C7604

R7604

1%
1/16W
MF-LF
402

10%
2 16V
CERM
402

5.62K

0.01uF

10%
16V
2 CERM
402

1%
1/16W
MF-LF
402

0.01uF

5V / 3.3V Power Supply


SYNC_MASTER=POWER

SYNC_DATE=07/13/2005

NOTICE OF PROPRIETARY PROPERTY

VISHAY SI7806ADN
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

TABLE_ALT_ITEM

376S0448

5V3V3S5_PGOOD

TABLE_ALT_ITEM

376S0448

105K

0.001UF

XW7600

TABLE_ALT_ITEM

128S0093

150uF

SM

R7607

REF DES

C7692

20%
2 6.3V
POLY
SMC-LF

Vout = 0.8V * (1 + Ra / Rb)

TABLE_ALT_HEAD

BOM OPTION

20%
6.3V
CERM-X5R
805

59A6

<Ra>
R7667

5%
2 50V
CERM
402

5V3V3S3_CONT
ALTERNATE FOR
PART NUMBER

5%
50V
CERM
402

C7666
100PF

1%
1/16W
MF-LF
402

1
PART NUMBER

C7669

180PF
2

20.0K

0.1uF
10%
16V
X5R
402

22UF

5VS5_ITH_RC

5%
25V
CERM
402

C7670

PP5V_S5_REG_P
CRITICAL

C7690 C7691
22UF

0.001UF

64A6

10%
50V
CERM
402

10%
2 6.3V
CERM
402

FET_FDN6296

CRITICAL

20%
2 6.3V
CERM-X5R
805

PWRFLT-3P3X3P3

5V3V3S3_SKIP

TABLE_5_ITEM

STL8NH3LL

0.001uF

5VS5_RUNSS

1
TABLE_5_ITEM

CRITICAL
1

NO STUFF

TABLE_5_ITEM

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

CRITICAL

5VS5_ITH

=PP5V_S5_REG

JUMPER

VOLTAGE=5V

OMIT

59A2

BOM OPTION

152S0133

OPEN-SAWTOOTH
1
2

IHLP2525/4.2UH
DCR=32 MOHM

INTVCC 20

NC4 32

XW7660

SM

PGOOD 27

0.1uF

4.2UH
1

5VS5_VOSNS

NC1 10
NC2 16
NC3 29

5A MAX CURRENT

L7680

Q7661

RUN_SS2 13

4 FCB

C7630

CRITICAL
1 2

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

5V3V3S5_FSEL

ITH2 8

ITH1

28 RUN_SS1

21 EXTVCC

10%
16V
X5R
402

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

5VS5_BG

BG2 18

PWRFLT-3P3X3P3

0.1uF

5VS5_SW

15

STL8NH3LL

12
SENSE2+
11
SENSE2-

SENSE1-

C7628

CRITICAL
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

5VS5_BOOST

PLLFLTR 2

PLLIN

3V3S5_ITH_RC

0.001uF

QTY

10%
50V
CERM
402

OMIT

Q7660

5VS5_TG

17

3_3VOUT 7

10%
50V
CERM
402

NO STUFF

VOLTAGE=0V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

PART#

0.001uF

220PF
1

20.0K

1%
1/16W
MF-LF
2 402

C7625

220PF

R7664 1

C76261

5%
2 25V
CERM
402

<Rd>
R7628

U7600
LTC3728LXC

1 VOSENSE1
5

3V3S5_ITH
63C7

5%
50V
CERM
402

3V3S5_VOSNS

0.001UF

180PF

1%
1/16W
MF-LF
2 402

3 2

31

C7621

PWRFLT-3P3X3P3

CRITICAL
SW1

30 SENSE1+

NO STUFF

STL8NH3LL

22UF

3V3S5_BG

22

CRITICAL

C7650
20%
6.3V
CERM-X5R
805

25

BOOST2

PGND

C7652

DCR=40 mOHM

CRITICAL

C7662

19

CRITICAL

3V3S5_SW

BOOST1

THRML_PAD

CRITICAL

10%
6.3V
CERM-X5R
402

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

5%
1/16W
MF-LF
2 402

TG2 14

TG1

SGND

PP3V3_S5_REG_P

IHLP2525/4.7uH

26

24

3V3S5_BOOST

JUMPER
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

D7664
5VS5_BOOST_RC

VIN

3V3S5_TG

10%
2 16V
X5R
402

OPEN-SAWTOOTH
1
2

=PP3V3_S5_REG

10%
50V
CERM
402

0.1uF

2 1

L812HW

R7670

0.001uF

64A6

1M

10%
2 16V
X5R
603

5%
1/16W
MF-LF
2 402

C7622

5%
1/16W
MF-LF
402

1uF

1M

R7624

C7600

R7630

1%
1/16W
MF-LF
402

CMDSH-3

OMIT

0.22UF

2.74K

3V3S5_BOOST_RC

CRITICAL

XW7620

C7632

R7666

59A2
59C6

SOD-323

SOD-323

3.32K

0.1uF

CMDSH-3

R7626

23

C7631

4A MAX CURRENT

VOLTAGE=12V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

CRITICAL
1

PP5V_S5_5V3V3S5_INTVCC
CRITICAL

PPVIN_S5_5V3V3S5_R

33

PP5V_S5_5V3V3S5_INTVCC

1%
1/16W
MF-LF
402
2

5VS5_SNS_P
1

59A2
59C3

976

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

1.5K

1%
1/16W
MF-LF
402
2
1

1%
1/16W
MF-LF
402

5VS5_SNS_N

1%
1/16W
MF-LF
2 402

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

R7629

10%
6.3V
CERM-X5R
402

R7669

R7600
10

3V3S5_SNS_P

R7661

715

0.22UF

C7680
33UF

10%
16V
X5R
603

3V3S5_SNS_N

1uF

1uF
10%
16V
X5R
603

C7608

CRITICAL

C7681

C7641

VISHAY SI7806ADN

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

59

79

2.5V REGULATORS

YUKON POWER CONTROL

=PP3V3_S3_2V5S3
64B3 60C4

ENETPWR_EN
60C5 60B5

CRITICAL

U7700

1
64C1

R7750

=PPBUS_S5_YUKON_CTRL

470K

64B3 60D6

R7751

ENETPWR_EN

470K
5%
1/16W
MF-LF
2 402

SHDN_L

=PP2V5_S3_REG

64C6

SOT-363

10%
2 50V
CERM
402

VOLTAGE=2.5V
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.5 mm

2V5S3_BP

BP

GND

C7701

1
2

20%
2 6.3V
CERM
603

10%
16V
CERM

402

0.0022UF

C7702
4.7uF

0.01uF

C7750

Q7750

2N7002DW-X-F

IN

20%
2 6.3V
CERM
603

3
D

PM_SLP_S3BATT

C7700

SOT23-5
OUT

4.7uF

60B5 60D4

0.3A MAX CURRENT

MAX8887

=PP3V3_S3_2V5S3

5%
1/16W
MF-LF
2 402

4
6

Q7750

2N7002DW-X-F

63D6 61B8 45C5 23C3

PM_SLP_S4_L

CRITICAL

SOT-363

MAX8887

=PP3V3_S0_2V5S0

64A6

Q7750 HAS A BUILT-IN BODY DIODE

FWPWR_EN_L 1

C7703

SOT23-5
IN
OUT
SHDN_L

4.7uF

R7752
39C4

0.3A MAX CURRENT

U7701

63B3 64B8

VOLTAGE=2.5V
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.5 mm

4 2V5S0_BP

GND

20%
2 6.3V
CERM
603

FWPWR_EN_L_R

BP

=PP2V5_S0_REG

C7704

1
2

5%
1/16W
MF-LF
402

C7705
4.7uF

0.01uF

20%
2 6.3V
CERM
603

10%
16V
CERM
402

NOSTUFF

R7753
1

5%
1/16W
MF-LF
402

1.2V REGULATOR
S3 | S0

~S0 | ~SMC_PS_ON

S3 ON BATTERY

TRUE (3.3V)

TRUE (PBUS 12.6V)

S0 OR S3 ON AC

TRUE (3.3V)

FALSE (0V)

PM_SLP_S3BATT

CRITICAL

ENETPWR_EN

U7720
MAX8516

POWER YUKON
TRUE (PBUS 12.6V)
FALSE (0V)

FALSE (0V)
64C3

TRUE (3.3V)

S5 ON AC

FALSE (0V)

TRUE (PBUS 12.6V)

TRUE (PBUS 12.6V)

FALSE (0V)

S5 ON BATT

FALSE (0V)

FALSE (0V)

TRUE (PBUS 12.6V)

FALSE (0V)

=PP1V8_S3_1V2S3

2 IN0
3 IN1

ENETPWR_EN

1 EN

60D4 60C5

NOTE: IF CHANGE TO STUFFING R7753 THEN ENETPWR_EN IS BUFFERED PM_SLP_S4_L

C7720
1uF

10%
6.3V
2 CERM
402

NC
NC
NC

OUT0

OUT1

=PP1V2_S3_REG
63B5 64C6

FB 7

<Ra>
1
R7720

1%
1/16W
MF-LF
2 402

20%
2 6.3V
CERM
603

5.11K

4 NC0
5 NC1
10 NC2
GND

0.5A MAX CURRENT

SOP

THRML
PAD

1V2_FB

FWPWR_EN_L

11

LOGIC

PM_SLP_S4_L

NAME

C7721
4.7UF

<Rb>
R7721
3.65K

1%
1/16W
MF-LF
2 402

Vout = 0.5V * (1 + Ra / Rb)

2.5V/1.2V Regulator
SYNC_MASTER=ENET

SYNC_DATE=12/06/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

60

79

1.8V POWER SUPPLY


MEM_ISENSE_VCC

1
1

C7804

=PPVIN_S5_1V8S3

0.1UF
64C3

CRITICAL
1

=PP5V_S5_1V8S3

20%
16V
POLY
CASED2E-SM

C7831

NO STUFF
1

R7804

C7801

10%
16V
X5R
603

NO STUFF 1

C7802

R7807

2.2UF

1uF

5%
1/16W
MF-LF
402

20%
6.3V
CERM1
603

12

PVCC

1V8S3_FSET

7 FSET

1V8S3_FCCM

4 EN
3 FCCM

PM_SLP_S4_L
NC
5D7

1V8S3_COMP

R7805
0

1V8S3_FB

R7808
100K

5%
1/16W
MF-LF
2 402

5 6 7 8

0.01UF

10%
16V
CERM
402

R7806

U7800
ISL6269
QFN

UG 14 1V8S3_UG

BOOT 13 1V8S3_BOOT
PHASE 15 1V8S3_PHASE
ISEN 9 1V8S3_ISEN

16 PGOOD
5 COMP
6 FB

2 1V8S3_BOOT_RC 1

57.6K

1%
1/16W
MF-LF
2 402

1 2 3

R7800

C7809

2.2

0.1uF

5%
1/16W
MF-LF
402

0.0022UF

22PF

PLACE RC CLOSE TO SMC

MEM_ISENSE

INA326EA-250

R7863

5%
50V
CERM
402

NO STUFF

C7810
10%
50V
CERM
402

IRF7832PBF

20%
6.3V
X5R
402
45C2 45C4 46B6 48A1 48B5 48C1 62A5
66B1 66C2

0.001UF
2

10%
50V
CERM
402

=PP1V8_S3_REG
1

1.53uH

CRITICAL

SM

C7843

CRITICAL

CRITICAL

C7840

D7820

B340LBXF

20%
2 6.3V
CERM-X5R
805

22UF

20%
2.5V-ESR9V
POLY
CASE-D2E-LF

CRITICAL

C7841

CRITICAL
1

C7842
330UF

20%
2.5V-ESR9V
POLY
CASE-D2E-LF

R7801
5%
1/16W
MF-LF
402

<Ra>
R7821
4.02K

PP1V8_S3_R
1

22UF

20%
6.3V
CERM-X5R
805

64C6

NO STUFF
0

330uF

CRITICAL

Q7821

0.22UF

1%
1/16W
MF-LF
402

8A MAX CURRENT

0.001uF

45A8 46B3

C7805

C7864

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.4 mm

L7820

2.49K

1%
1/16W
MF-LF
402

5 6 7 8

XW7800
SM

4.53K

GND_SMC_AVSS

1%
1/16W
MF-LF
402

CRITICAL

R7810

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

PGND 10

R7803

U7801

SMC_MEM_ISENSE

VOLTAGE=1.8V

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

CRITICAL

R2

NC

10%
16V
X5R
402

10%
50V
CERM
402

V-

MEM_ISENSE_R2

SO-8

SMB

C7807

THRML
PAD

V+

MSOP

IRF7821PBF

17

C7808

R1-

8 R1+
3

Q7820
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

VCC

C7806

MEM_ISENSE_R1_P

1V8S3_COMP_R

R7860
2.0K

1%
1/10W
MF-LF
603

PLACE C7804 NEAR U7801 PIN 7

CRITICAL

8 VO

1%
1/16W
MF-LF
2 402

1/4W
MF-LF
1206

20%
6.3V
CERM1
603

LG 11 1V8S3_LG
1

10%
16V
X5R
603

2.2UF

CRITICAL
1 VIN

5D7

5%
1/16W
MF-LF
402

C7800

0.005 1
1%

Placement Note:

5%
1/16W
MF-LF
402

100K

GND_1V8S3_SGND

61B5

10%
16V
X5R
402

=PP1V8_S3_MEM_NB

R7802

1uF

33UF

1V8S3_VCC

63D6 60C8 45C5 23C3

C7830

MEM_ISENSE_R1_N

64A3

=PP1V8_S3_MEM_NB_SENSE

64C1

=PP3V3_S3_PDCISENS 64B3

R7861
100

NO STUFF2

1%
1/16W
MF-LF
402

C7803
0.0047uF

10%
25V
CERM
402

1 2 3

SO-8

<Rb>
R7822
2.0K

61C6

GND_1V8S3_SGND

1%
1/16W
MF-LF
402

Vout = 0.6V * (1 + Ra / Rb)


TABLE_ALT_HEAD

PART NUMBER

ALTERNATE FOR
PART NUMBER

BOM OPTION

REF DES

COMMENTS:

128S0093

128S0092

C7830

KEMET T520V336M016ATE0457650

PART NUMBER

ALTERNATE FOR
PART NUMBER

BOM OPTION

REF DES

COMMENTS:

128S0094

128S0060

C7842,C7843

PANASONIC EEFSX0D331ER

128S0095

128S0060

C7842,C7843

PANASONIC EEFSX0D331XE

TABLE_ALT_ITEM

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

1.8V Supply
SYNC_MASTER=POWER

SYNC_DATE=07/13/2005

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

61

79

1.5V/1.05V POWER SUPPLY

64C1

=PPVIN_S5_1V51V05S0
CRITICAL
1
2

10%
6.3V
CERM-X5R
402

33UF

R7961

20%
16V
POLY
CASED2E-SM

R7929

10%
6.3V
CERM-X5R
402

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

1%
1/16W
MF-LF
402

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

0.22UF

1%
1/16W
MF-LF
402

10

1V5S0_SNS_P

C7908

523

R7900

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

1V05S0_SNS_P

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

0.22UF
VOLTAGE=12V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

D7924

10%
6.3V
CERM-X5R
402

1%
1/16W
MF-LF
402

1V5S0_BOOST_RC
2

20%
6.3V
CERM-X5R

330UF

20%
2.5V-ESR9V
POLY
CASE-D2E-LF

D104C/2.8uH
DCR=10.7 mOhm

22UF

NO STUFF

IRF7832PBF

C7921

SO-8
2

805

<Rc>
R7927

180PF

17.8K

1%
1/16W
MF-LF
2 402

CRITICAL

2
63B7 5D7

BG2 18

1V05S0_BG

SENSE2+
SENSE2VOSENSE2

28 RUN_SS1

C7926

C7925

47pF

470pF

5%
50V
CERM
402

1V51V05S0_FCB

62A3

10%
50V
CERM
402

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

NO STUFF
0.001UF

10%
50V
CERM
402

R7925

C7930

24.3K

GND_1V51V05S0_SGND

VOLTAGE=0V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

0.1uF

1%
1/16W
MF-LF
402

10%
16V
X5R
402

NC1 10
NC2 16
NC3 29
NC4 32

C7905
1

=PP1V05_S0_CPU_NB
2

NB_ISENSE_VCC

64D8

C7990

R7902

1%
1/4W
MF-LF
1206

20%
2 6.3V
CERM-X5R
805

0.002

22UF

CRITICAL
NB_ISENSE_R1_N

R7992
2.0K

1%
1/10W
MF-LF
603

NB_ISENSE_R1_P

L7960

Q7961

5 6 7 8

62A2

IRF7832PBF

CRITICAL2

1V05S0_VOSNS

NO STUFF

1V05S0_ITH

C7961
C7965

NC

SMB

C7989

NC
NC
NC
NC

C7969

330UF

0.0022UF

330PF

C7992

20%
2 2.5V-ESR9V
POLY
CASE-D2E-LF

1 2 3

10%
50V
CERM
402

10%
50V
CERM
402

B240-X-F

0.001uF
10%
50V
CERM
402

CRITICAL

1.53uH
SM
PCI-1050
DCR=6.3 mOHM

D7961

C7991

C7903

22UF

0.1UF

20%
2 6.3V
CERM-X5R
805

10%
16V
X5R
402

<Ra>
R7967
6.34K

2 1%
1/16W
MF-LF
402

=PP3V3_S0_1V51V05S0

=PP3V3_S0_PDCISENS

64A6 66C4

C7970
10%
16V
X5R

R7965
33.2K

1%
1/16W
MF-LF

C7966

47PF

NO STUFF

C7968
0.001uF

5%
2 50V
CERM
402

2 402

402

10%
50V
CERM
402

<Rb>
R7968
20.0K

1%
1/16W
MF-LF
2 402

R7901
10K

5%
1/16W
MF-LF
2 402

58C7 63C2

XW7900

PP5V_S5_1V51V05S0_INTVCC

SM

10%
6.3V
CERM
402

C7902

C7901

20%
6.3V
CERM
603

1uF

10%
2 6.3V
CERM
402

5%
1/16W
MF-LF
402

V+
R1-

8 R1+
3

V-

NB_ISENSE

R2

U7901

INA326EA-250

MSOP

NB_ISENSE_R2

SMC_NB_ISENSE

R7905

5%
1/16W
2 MF-LF
402

4.53K
1%
1/16W
MF-LF
402

1V51V05S0_FCB

5%
1/16W
MF-LF
402

R7903

1%
1/16W
MF-LF
402

1V51V05S0_FSEL

62B5

C7907

1%
1/16W
MF-LF
402

10%
2 16V
CERM
402

5.62K

0.01uF

10%
2 16V
CERM
402

R7904

62B4

C7904
0.01uF

1.5V / 1.05V Power Supply


SYNC_MASTER=POWER

C7906
0.22UF

R7991
100K

1%
1/16W
MF-LF
402

GND_SMC_AVSS
1

C7999

TABLE_ALT_HEAD

PART NUMBER

ALTERNATE FOR
PART NUMBER

BOM OPTION

128S0092

REF DES

COMMENTS:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

45C2 45C4 46B6 48A1 48B5


48C1 61C1 66B1 66C2

128S0093

C7980,C7940

KEMET T520V336M016ATE0457650

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

0.001UF
2

SYNC_DATE=07/13/2005

NOTICE OF PROPRIETARY PROPERTY

20%
6.3V
X5R
402

TABLE_ALT_ITEM

62C3 62C6

VOLTAGE=5V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

30.1K

45B8 46B3

R7906

PLACE RC CLOSE TO SMC

CRITICAL

1V51V05S0_SKIP

1V51V05S0_CONT
1
R7907
0

PLACE C7903 NEAR U7901 PIN 7

4.7UF

Placement Note:

1V51V05S0_PGOOD

100
2

B
64A6

1V05S0_ITH_RC

5%
25V
CERM
402

0.1uF

R7990

CRITICAL

1uF

5B2
64D8

VOLTAGE=1.05V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

CRITICAL

CRITICAL

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

1V05S0_RUNSS

8A MAX CURRENT
=PP1V05_S0_REG

Vout = 0.8V * (1 + Ra / Rb)


1

=PP5V_1V51V05S0_VCC
64D3

=PP1V05_S0_CPU_NB_SENSE 1

IRF7821PBF
SO-8

Vout = 0.8V * (1 + Rc / Rd)

64D6

Q7960

SO-8

INTVCC 20

C7928

CRITICAL

1 2 3
2

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

PGOOD 27

21 EXTVCC

10%
16V
X5R
402

11

3_3VOUT 7

1V5S0_ITH_RC

0.1uF

1V51V05S0_FSEL

63B7 13
RUN_SS2

4 FCB

12

ITH2 8

ITH1

C7964

220PF

20.0K

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
2

1
1

1%
1/16W
MF-LF
2 402

1 VOSENSE1

1V5S0_ITH
1V5S0_RUNSS

1V05S0_SW

PLLFLTR 2

1V5S0_VOSNS

402

B
<Rd>
1
R7928

QFN

30 SENSE1+
31 SENSE1-

3 2 1

SMB

5%
1/16W
MF-LF
402

1V05S0_BOOST

17

10%
50V
CERM
402

15

SW2

LTC3728LXC
BG1

NC 3 PLLIN

10%
50V
CERM

5%
50V
CERM
402

22

0.001uF

D7921
B240-X-F

C7929

1V5S0_BG

U7900

PGND

C7950

25 SW1

BOOST2

CRITICAL

THRML_PAD

Q7921

R7964

0.001uF

1V05S0_TG

TG2 14

TG1

24 BOOST1

1V5S0_SW

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

CRITICAL

SM

CRITICAL

C7962

19

C7952

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

8 7 6 5

2.8UH

PP1V5_S0_REG_P
CRITICAL

1V5S0_BOOST
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

L7920

26

1V5S0_TG

CRITICAL

5%
1/16W
MF-LF
2 402

2.1K
1%
1/16W
MF-LF
402

1%
1/16W
MF-LF
402

5 6 7 8

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

1M

R7969

698

1V05S0_BOOST_RC

VIN

SGND

JUMPER
VOLTAGE=1.5V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

SO-8

C7924

10%
2 16V
X5R
402

IRF7821PBF
1

10%
50V
CERM
402

R7970

10%
2 16V
X5R
603

33

=PP1V5_S0_REG

0.001uF

0.1uF

Q7920

OPEN-SAWTOOTH
1
2

64C8

3 2 1

CRITICAL

5%
1/16W
MF-LF
2 402

C7922

5%
1/16W
MF-LF
402

1uF

1M

R7924

C7900

R7930

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm

R7966

2
1

CMDSH-3

XW7920

D7964
SOD-323

2
8 7 6 5

6A MAX CURRENT

SOD-323

1.43K

0.22uF

CRITICAL

CMDSH-3

R7926

23

C7931

10%
6.3V
CERM-X5R
402

62A2 62C6

CRITICAL
1

PP5V_S5_1V51V05S0_INTVCC

PPVIN_S5_1V51V05S0_R

PP5V_S5_1V51V05S0_INTVCC

62C3 62A2

C7932

4.53K

1%
1/16W
MF-LF
402
2
1

C7980

1V05S0_SNS_N

1V5S0_SNS_N

1uF
10%
16V
X5R
603

0.22uF

1%
1/16W
MF-LF
402
1

20%
16V
POLY
CASED2E-SM

10%
16V
X5R
603

CRITICAL

C7981

1uF

33UF

R7921 C7909

1.07K

C7941

C7940

II NOT TO REPRODUCE OR COPY IT

10%
50V
CERM
402

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

TABLE_ALT_HEAD

PART NUMBER

ALTERNATE FOR
PART NUMBER

BOM OPTION

128S0094

128S0060

REF DES

COMMENTS:
SIZE

DRAWING NUMBER

REV.

TABLE_ALT_ITEM

C7952,C7992

PANASONIC EEFSX0D331ER

APPLE COMPUTER INC.

TABLE_ALT_ITEM

128S0095

128S0060

C7952,C7992

PANASONIC EEFSX0D331XE

051-7374

SCALE

SHT
NONE

A
OF

62

79

=PP5V_S3_FET

POWER CONTROL SIGNALS


64A3

These rails are monitored by LTC2908

CRITICAL

State

SMC_PM_G2_ENABLE

PM_SLP_S4_L

PM_SLP_S3_L

Run
(S0)

Q8000
FDC638P
SM-LF

MAKE_BASE=TRUE

Sleep
(S3)

Soft-Off
(S5)

Battery Off
(G3Hot)

63A7
64A3

=PP5V_S5_PWRCTL

=P5VS3_EN_L

R8032

R8033

Q8031

=P3V3S3_EN_L

5%
1/16W
MF-LF
402
1
2

R8057

0.01UF

SMC_PM_G2_EN

1
1

R8056

100K

SOT-363

=P5VS0_EN

5%
1/16W
MF-LF
2 402

P-TYPE

RDS(ON)

65 mOhm @2.5V

=PP3V42_G3H_REG

C8092

<Ra>
1
R8091

5%
50V
CERM
402

NC
8

348K

22pF

5D7

1%
1/16W
MF-LF
2 402

P3V42G3H_FB

C8090
10%
25V
X5R
1206-1

1%
1/16W
MF-LF
2 402

C8093
22UF

20%
6.3V
2 CERM-X5R
805

200K

10UF

1 A

64D3

CRITICAL
1

<Rb>
1
R8092

CRITICAL

64D6

5V S0 FET

C8005

MOSFET

STL8NH3LL

0.1UF

CHANNEL

N-TYPE

5%
1/16W
MF-LF
402

10%
25V
X5R
402
1

RDS(ON)

15 mOhm @10V

LOADING

3 A

P5VS0_EN_RC

5 PP3V42G3H_SW
7

GND
4

R8005

CDPH4D19F-SM

10K

2N7002DW-X-F

CHANNEL

33uH

59B5

Q8059

SW
BIAS

L8090

Vout = 1.25V * (1 + Ra / Rb)

OMIT

=PP5V_S5_P5VS0

SOT23-LF

FDC638P

=PP5V_S0_FET

2N7002

IN

Q8060

MOSFET

LOADING

STL8NH3LL

3V3S5_RUNSS

0.22uF

10%
6.3V
CERM-X5R
402

SHDN* TSOT23-8

Q8005

64A3

45D5

10%
16V
CERM
402
1

P3V3S3_EN_L_RC

CRITICAL

5%
1/16W
MF-LF
402

C8091

6
BOOST

64B6

3.3V S3 FET

C8010

100K

59B4

P3V42G3H5_BOOST

FB

PWRFLT-3P3X3P3

470K

3
VIN

NC

6
5
2
1

R8010

SOT-363

=PPVIN_G3H_P3V42G3H

LT3470
=PP3V3_S3_FET

2N7002DW-X-F

5 G
SMC_PM_G2_EN_L

64B1

SM-LF

Q8059

=PP3V42_G3H_PWRCTL1

100 mA

64D1 63B8

LOADING

SOT-363

5%
1/16W
MF-LF
402

5VS5_RUNSS 5D7

48 mOhm @4.5V

2N7002DW-X-F

100K

5V/3.3V S5 RUN/SS CONTROL

P-TYPE

RDS(ON)

Q8010
FDC638P

=PP3V3_S5_P3V3S3

64A3

CHANNEL

CRITICAL

5%
1/16W
MF-LF
402

PM_SLP_S4_L

0.0022uF
10%
50V
CERM
402
1

U8090

61B8 60C8 45C5 23C3

FDC638P

CRITICAL

10K

5%
1/16W
MF-LF
402

P5VS3_EN_L_RC

Supply needs to guarantee 3.31V delivered to SMC VRef generator

MOSFET

R8000

100K

PM_SLP_S4_LS5V

64B6

5V S3 FET

C8000

3.425V "G3Hot" SUPPLY

6
5
2
1

=PP5V_S5_P5VS3

ALL SYSTEM PWRGD CIRCUIT

CRITICAL

Q8015

62A1 58C7

OMIT

STL8NH3LL

=PP3V3_S0_FET

PWRFLT-3P3X3P3

1V51V05S0_PGOOD

64B8

1.5V/1.05V S0 RUN/SS CONTROL

64A3

=PP3V3_S5_P3V3S0

3.3V S0 FET

1V5S0_RUNSS 5D7

62B5

Q8061

2N7002DW-X-F

64D1 63C8

=PP3V42_G3H_PWRCTL

2 48C8 PM_SLP_S3 5

R8059

470K

C8015

5%
1/16W
MF-LF
402

10%
25V
X5R
402
1

0.1UF

100K

SOT-363

R8015

=P3V3S0_EN

P3V3S0_EN_RC

5%
1/16W
MF-LF
402

Q8062

1
1

15 mOhm @10V

LOADING

2 A

62B4

SOT-363

5%
1/16W
MF-LF
402

5%
1/16W
MF-LF
2 402

64C1 59D8

=PPVIN_S5_5V3V3S5

1
1

=P1V2S0_EN

100K

PM_SLP_S3_LS12V6

CRITICAL

SOT-6

64C3

=PP1V8_S3_P1V8S0

Q8030

PM_SLP_S3_LS5V

R8050

3
C8062 U8080
MC74VHC1G08
SC70

20%
2 10V
CERM
402

5%
1/16W
MF-LF
402

=P1V8S0_EN_L 1

S0PWRGD_0V9_DIV
=PP0V9_S0_MEM_REG

Q8031

10%
16V
CERM
402
1

P1V8S0_EN_L_RC

100K
1%

68.1K
1%
1/16W
MF-LF
402

1.8V S0 FET
MOSFET

SI3447BDV

CHANNEL

P-TYPE

RDS(ON)

72 mOhm @1.8V

LOADING

320 mA

R8062

R8061

64B8

1/16W
MF-LF
402

S0PWRGD_1V2_DIV
2

R8064

R8063

100K
1%

124K
1%
1/16W
MF-LF
402

1/16W
MF-LF
402

100K
6

5%
1/16W
MF-LF
402

R8025

100K

Nothing

5B2 26A5
45D8

0.1UF

1%
1/16W
MF-LF
2 402

C8025
MAKE_BASE=TRUE

PM_SLP_S3_L

13.5 Ohm

LOADING

549K

SOT-363

0.01UF

63B8 63A7 45C5 23C3

RDS(ON)

R8065

THRML
PAD
9

ALL_SYS_PWRGD

=PP5V_S5_PWRCTL

RST* 2

64A3 63D6

N-TYPE

S0PWRGD_OK

64A6

LLP

2N7002DW-X-F

2N7002

CHANNEL

=PP1V8_S0_FET

SOT-363

PM_SLP_S3_L

MOSFET

SI3447BDV

1
2N7002DW-X-F

63B8 63A7 45C5 23C3

=PP3V3_S0_ALLSYSPG

LTC2908

64D8 31B3

Q8030
D

7 V3

Q8025

20%
2 10V
CERM
402

V2

R8030

5%
1/16W
MF-LF
2 402

V1

C8061
0.1UF

CRITICAL

GND
1

PM_SLP_S3_LS12V6_L

1
5

8 VADJ2

1.2V S0 FET

MAKE_BASE=TRUE
2

0.1UF

6 VADJ1

R8031

100K

2N7002DW-X-F

=PP2V5_S0_REG

PP1V2_S0

2
D

Q8061

C8060
20%
10V
CERM
402

3 V4

SOT23-LF 3

=PP1V2_S3_REG

U8070

Q8063

SOT23-LF

R8058
100K

N-TYPE

RDS(ON)

2N7002
64C6 60B2

2N7002

PM_SLP_S3_L

STL8NH3LL

CHANNEL

64B8 60C2

1V05S0_RUNSS

45C5 23C3
63A7 IN

MOSFET

S3/S0 FETS, G3H SUPPLY

TABLE_5_HEAD

PART#

QTY

DESCRIPTION

REFERENCE DESIGNATOR(S)

BOM OPTION
TABLE_5_ITEM

376S0445

FAIRCHILD FDM6296

Q8005,Q8015

SYNC_MASTER=ENET

FET_FDN6296

SYNC_DATE=08/30/2005

NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

TABLE_ALT_HEAD

2N7002DW-X-F

PART NUMBER

ALTERNATE FOR
PART NUMBER

BOM OPTION

376S0448

376S0445

SOT-363

REF DES

COMMENTS:

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


TABLE_ALT_ITEM

Q8005,Q8015

VISHAY SI7806ADN

II NOT TO REPRODUCE OR COPY IT


III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

63

79

7
"S0" RAILS

PPVCORE_CPU_S0
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.4MM
VOLTAGE=0.9V

(REGULATOR OUTPUT CPU VCORE PWR)


58D1

=PPVOUT_S0_IMVP6_REG
(CPU VCORE PWR)

MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.4MM
VOLTAGE=0.9V

(LDO OUTPUT 0.9V PWR)

=PP0V9_S0_MEM_REG
(DDR2 TERMINATION 0.9V PWR)

D
62B1 5B2

MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.4MM
VOLTAGE=1.05V

=PP1V05_S0_REG
(ICH CPU I/O 1.05V PWR)
(ICH VCORE 1.05V PWR)

8B5 8D7 9B8 48A5 48B3

PP5V_S0
63C3

=PP1V05_S0_SB_CPU_IO
=PPVCORE_S0_SB
=PP1V05_S0_CPU_NB_SENSE

21C1 24C3 25C4


24D3 25D3
62A8

PP1V05_S0_CPU_NB
62A6

MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.4MM
VOLTAGE=1.05V

=PP1V05_S0_CPU_NB
(MCH CORE 1.05V PWR)
(CPU FSB 1.05V PWR)
(MCH FSB 1.05V PWR)
(MCH FSB 1.05V PWR)

=PPVCORE_S0_NB
=PP1V05_S0_CPU
=PP1V05_S0_FSB_NB
=PP1V05_S0_NB_VTT
=PP1V05_S0_NB
PP1V5_S0
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.4MM
VOLTAGE=1.5V

(REGULATOR OUTPUT 1.5V PWR)


62B8

=PP1V5_S0_REG

(CPU AVDD
(MCH PCIE GRAPHICS O/P COMPENSATION
(MCH DDR DLL&IO, FSB HSIO&IO
(MCH DIGITAL DIVIDER IN HMPLL
(MCH LVDS DIGITAL
(HOST/MEMORY PLL

1.5V PWR)
1.5V PWR)
PWR 1.5V)
1.5V PWR)
1.5V PWR)
1.5V PWR)

(MCH TVDAC DEDICATED/QUIET


(MCH 3GIO[PCIE/DMI]
(MCH 3GIO PLL
(ICH LOGIC&IO[ARX]
(ICH SATA PLL
(ICH LOGIC&IO[ATX]
(ICH USB PLL
(ICH USB CORE
(ICH LOGIC&IO

PWR 1.5V)
1.5V PWR)
1.5V PWR)
1.5V PWR)
1.5V PWR)
1.5V PWR)
1.5V PWR)
1.5V PWR)
1.5V PWR)

(WIRELESS CARD 1.5V PWR)

(DDR2 TERMINATION REGULATOR 1.8V SWITCH PWR)


(TMDS 1.8V PWR)

MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.5 mm
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=2.5V

(COME FROM S3 TO S0 MOSFET)

=PP2V5_S0_REG
(MCH H/V SYNC
(MCH LVDS DATA/CLK TX
(MCH PCIE/DMI BAND GAP
(MCH LVDS ANALOG
(MCH CRTDAC ANALOG
(TMDS

2.5V
2.5V
2.5V
2.5V
2.5V
2.5V

PWR)
PWR)
PWR)
PWR)
PWR)
PWR)

(COME FROM S5 TO S0 MOSFET)

=PP3V3_S0_FET
(MCH HV BUFFER 3.3V PWR)

(ICH GPIO PULLS 3.3V PWR)


(ICH IO BUFFER 3.3V PWR)
(ICH PCI I/O 3.3V PWR)
(ICH IDE I/O 3.3V PWR)
(ICH PCI PULLS 3.3V PWR)
(ICH PM PULLS 3.3V PWR)
(PATA PULLS 3.3V PWR)
(SATA 3.3V PWR)
(MCH PULLS 3.3V PWR)
(ICH LAN I/F 3.3V PWR, NEED TO CHECK INTEL)
(ICH INTEL HDA CORE 3.3V PWR)
(DIMM SPD 3.3V PWR)
(CLOCK GENERATOR 3.3V PWR)
(WIRELESS CARD 3.3V PWR)
(TPM 3.3V PWR)
(AUDIO 3.3V PWR)
(TMDS 3.3V PWR)
(CPU THERMAL SENSOR 3.3V PWR)
(ISL6262 3V3)

(FIREWIRE DIGITAL 3.3V PWR)

PP1V2_S3

19D1 19D7

MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.30MM
MIN_NECK_WIDTH=0.20MM
VOLTAGE=3.3V

63B5 60B2

=PP1V2_S3_REG

PP3V42_G3H

31C6

55B8 55D8

63D1

58D8
62A8

(LPC DEBUG BOARD)

5D2 51C4
67D7

(SMC 32.768KHz OSC)


(SMC 3.3V PWR)

48A8

16D1 17B6 19B6 19D7

61B1

=PP1V8_S3_REG

17C6 19D7

(DDR2 DIMM 1.8V PWR)


17C6 19B8 19D7
19C6 19D7
19C1 19D7
19A8 19D7

46C8
27C3
63B8 63C8
65A8
5D2 47C6
26D6
65C4 65C8 66A5
46A8
45D2 45D3 46D1 46D5
46D8 48C8

PBUS HOT

=PP1V2_S3_ENET

36A8 36D7

5A2

MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.4MM
VOLTAGE=1.8V

(REGULATOR OUTPUT 1.8V PWR)

=PP3V42_G3H_SMCVREF
=PP3V42_G3H_SMBUS_SMC_BSA
=PP3V42_G3H_PWRCTL
=PP3V42_G3H_LIDSWITCH
=PP3V42_G3H_LPCPLUS
=PP3V42_G3H_SB_RTC
=PP3V42_G3H_ACIN
=PP3V42_G3H_SMC_CLK
=PP3V42_G3H_SMC

5D2 47C6
19C4 19C7

68B7 69C6

5A2

MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=3.425V

=PP3V42_G3H_REG

5A2

PP1V8_S3

8B7 9D8
13D2 19D7

PPBUSB_G3H
66C2

=PP1V8_S3_MEM
=PP1V8_S3_P1V8S0
=PP1V8_S3_MEMVTT
=PP1V8_S3_MEM_NB_SENSE
=PP1V8_S3_1V2S3

(INVERTER PBUS PWR)


(ISL6262 VIN)
(LTC3728 VIN)

19C7 19C8 28B2 28D4 28D6 29B2 29D4 29D6


63A5

5A2

MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.3MM
VOLTAGE=12.6V

=PPBUSA_G3H

=PPBUS_S5_INV

67D4

31C6
61C4
60B5

19B5

=PPVIN_S5_IMVP6

48C7 58C2 58D5 58D8

=PPVIN_S5_1V51V05S0

62D8

19A5
24B5 25D6
24B5 25D6

66C2
61C2 29D2 28D2 19D7 16B6 14C2

=PP1V8_S3_MEM_NB

PP1V8_S3_MEM_NB

(MCH DDR2 1.8V PWR)

24A5 25C6
24A5 25B6

=PPBUSB_G3H
=PPVIN_S5_5V3V3S5
=PPVIN_S5_1V8S3
=PPBUS_S5_FWPWRSW
=PPBUS_S5_YUKON_CTRL

(LTC3728 VIN)
(ISL6269 VIN)
(FIREWIRE PORT PBUS PWR)
(YUKON POWER CONTROL)

MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.4MM
VOLTAGE=1.8V

24A3 25B2

59D8 63B7
61C7
39D6
60C8

24A3 25C2

PP2V5_S3

25A8 25C8

MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.5 mm
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=2.5V

(REGULATOR OUTPUT 2.5V PWR)

43D3

=PP2V5_S3_REG

5B2

(ENET 2.5V PWR)

68D6

(ETHERNET 3.3V PWR)


(BLUETOOTH 3.3V PWR)
(ACCELEROMETER 3.3V PWR)
(TPM 3.3V SUSPEND PWR)
(TPS62050 VIN)
(FIREWIRE CHIP PCI SIGNAL INDICATOR)

5B2

17D6 19B6 19D7


17D6 19B8 19D7
17D6 19B7 19D7
17C6 19C7 19D1
19D4 19D7
68B7
19D6

63D3

=PP5V_S3_FET
(ISL6269 PVCC)
(SYSTEM LED PWR)
(USB IO PORT 5V PWR)
(USB IR CONTROLLER 5V PWR)

17C6 19B7 19C7


22B5 25D8 34C8
21C3 21D3 23B2 23D5

36D3

24B5 25B8 25C6

5A2

=PP18V5_G3H_CHGR

(DC-IN OUTPUT 18.5V PWR)


(CHARGER INPUT 18.5V PWR)
(SMC INPUT 18.5V PWR)

5A2

=PP3V3_S3_SMBUS_SMC_RMT
=PP3V3_S3_ENET
=PP3V3_S3_BT
=PP3V3_S3_SMS
=PP3V3_S3_TPM
=PP3V3_S3_2V5S3
=PP3V3_S3_PCI
=PP3V3_S3_RSTGATE
=PP3V3_S3_AIRPORT_AUX
=PP3V3_S3_FW
=PP3V3_S3_PDCISENS
PP5V_S3
5A2

MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.20 MM
VOLTAGE=18.5V

=PP18V5_G3H_INRUSH

66D8

27D3
36A5 36B4 36B5 36C8 36D6 36D8
44C6
46D5 52C7
46D5 53C2

DCIN G3HOT

60C4 60D6
38C5
26B3

PPDCIN_G3H

43C3

MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.3MM
VOLTAGE=18.5V

38D5
61C1

65D3
66B2

=PPDCIN_G3H
=PPVBATT_G3H

MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.3MM
VOLTAGE=5V

(COME FROM S5 TO S3 MOSFET)

5A2

PP18V5_G3H

=PP2V5_S3_ENET
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.16 MM
VOLTAGE=3.3V

=PP3V3_S3_FET

5A2

65D1

PP3V3_S3

(COME FROM S5 TO S3 MOSFET)

=PP3V3_S0_NB_VCC_HV
=PP3V3_S0_SB
=PP3V3_S0_SB_GPIO
=PP3V3_S0_SB_VCC3_3
=PP3V3_S0_SB_VCC3_3_PCI
=PP3V3_S0_SB_VCC3_3_IDE
=PP3V3_S0_SB_PCI
=PP3V3_S0_SB_PM
=PP3V3_S0_PATA
=PP3V3_S0_SMC_LS
=PP3V3_S0_NB
=PP3V3_S0_SB_VCCLAN3_3
=PP3V3_S0_SB_3V3_1V5_VCCHDA
=PPSPD_S0_MEM
=PP3V3_S0_CK410
=PP3V3_S0_AIRPORT
=PP3V3_S0_TPM
=PP3V3_S0_AUDIO
=PP3V3_S0_TMDS
=PP3V3_S0_THRM_SNR
=PP3V3_S0_IMVP6
=PP3V3_S0_RSTBUF
=PP3V3_S0_SMBUS_SB
=PP3V3_S0_SMBUS_SMC_0
=PP3V3_S0_SMBUS_SMC_MLB
=PP3V3_S0_ALLSYSPG
=PP3V3_S0_FAN_RT
=PP3V3_S0_LCD
=PP3V3_S0_PBATTISENS
=PP3V3_S0_PDCISENS
=PP3V3_S0_CPUPOWER
=PP3V3_S0_SMBUS_SMC_BSB
=PP3V3_S0_1V51V05S0
=PP3V3_S0_2V5S0
=PP3V3_S0_FW
=PP3V3_S0_ENET

35C6

54A6 55C8

MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.32MM
VOLTAGE=1.2V

(LDO OUTPUT 1.2V PWR)

60C2

=PP2V5_S0_NB_VCCSYNC
=PP2V5_S0_NB_VCC_TXLVDS
=PP2V5_S0_NB_VCCA_3GBG
=PP2V5_S0_NB_VCCA_LVDS
=PP2V5_S0_NB_CRTDAC
=PP2V5_S0_TMDS
=PP2V5_S0_NB_DISP_PLL
PP3V3_S0

63C3

17D3 19B5 19D7

63D3

PP2V5_S0
63B3 60C2

12A7 12B7 12C2 19D7 33B8 33C7 33C8

(ENET 1.2V PWR)

=PP1V8_S0_TMDS

25D8

"S3"
RAILS
ON IN RUN AND SLEEP

7B5 7B6 7D5 8C7 9C8 11B3 11C5

MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.4MM
VOLTAGE=1.8V

(COME FROM S3 TO S0 MOSFET)

=PP1V8_S0_FET

G3 HOT

=PP5V_S0_SB
=PP5V_S0_SATA
=PP5V_S0_MEMVTT
=PP5V_S0_AUDIO
=PP5V_S0_AUDIO_PWR
=PP5V_S0_LPCPLUS
=PP5V_S0_NB_TVDAC
=PP5V_S0_IMVP6
=PP5V_1V51V05S0_VCC
=PP5V_S0_TMDS
=PP5V_S0_FAN_RT
=PP5V_S0_LCD
=PP5V_S0_ISENSECAL

16C8 16D3 19C8 19D7

5B2

=PP1V5_S0_CPU
=PP1V5_S0_NB_PCIE
=PP1V5_S0_NB_VCCAUX
=PP1V5_S0_NB_VCCD_HMPLL
=PP1V5_S0_NB_VCCD_LVDS
=PP1V5_S0_NB_PLL
=PP1V5_S0_NB
=PP1V5_S0_NB_TVDAC
=PP1V5_S0_NB_3G
=PP1V5_S0_NB_3GPLL
=PP1V5_S0_SB_VCC1_5_A_ARX
=PP1V5_S0_SB_VCCSATAPLL
=PP1V5_S0_SB_VCC1_5_A_ATX
=PP1V5_S0_SB_VCCUSBPLL
=PP1V5_S0_SB_VCC1_5_A_USB_CORE
=PP1V5_S0_SB_VCC1_5_A
=PP1V5_S0_SB
=PP1V5_S0_AIRPORT
PP1V8_S0

63B3

=PP5V_S0_FET
(SATA 5V PWR)
(DDR2 TERMINATION)
(AUDIO 5V PWR)
(AUDIO SPEAKER 5V PWR)
(LPC DEBUG BOARD 5V PWR)
(MCH TV 3.3V LDO)
(ISL6262 VDD)
(LTC3728LXC EXTVCC)
(TMDS 5V PWR)

30D4

5B2

5A2

MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM
VOLTAGE=5V

(COME FROM S5 TO S0 MOSFET)


5A2

=PP0V9_S0_MEM_TERM
PP1V05_S0

(REGULATOR OUTPUT 1.05V PWR)

5B2

=PPVCORE_S0_CPU
PP0V9_S0

63B2 31B3

ONLY ON IN RUN

=PPVIN_G3H_P3V42G3H

=PP5V_S3_SYSLED
=PP5V_S3_CAMERA
=PP5V_S3_IR
=PP5V_S3_GEYSER

63D3

GND RAILS

35B6 46B4
67A5

XW8101
SM

41D6
40D6

24B3 25A4

57A6 57A5 56B5 56B3 55C8 55B8 55A8 54D2 54B6 54A6
57D8 57C8 57C5 57C3 57B8 57B5 57B3

24C3 25B4

"S5" RAILS

26D1

ALWAYS ON WHEN UNIT HAS AC POWER (TRICKLE)

5D1

GND_AUDIO_CODEC

MAKE_BASE=TRUE

XW8102
SM

56C2 55D8 55D3 55C8 55C3 55B8 55B3 55A8 55A5 55A3

26B6 26B8

=GND_AUDIO_CODEC

=GND_AUDIO_PWR

5D1

GND_AUDIO_PWR

MAKE_BASE=TRUE
34C2

PP3V3_S5

46D3

24D3 25D3

MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.3MM
VOLTAGE=3.3V

(REGULATOR OUTPUT 3.3V PWR)

14C7 14D6 19C7 20A4 20B4


59B8

=PP3V3_S5_REG

24C3 25C4

(ICH USB CTL PULLS 3.3V


(ICH PM 3.3V
(ICH SUSPEND 3.3V
(ICH SUSPEND USB 3.3V
(ICH SUSPEND PULLS 3.3V
(ICH INTEL HDA SUSPEND 3.3V
(SPI BOOTROM

28A7 29A3 29A7


32C7 32D3 32D8
43C3
53D4
54A6 54D7 56D8 57B5
68B1 68B2 68C8 68D8 69B7 69D1 69D5
10C4 49B3 49D3
58D8
26B4
27D8
27D5

PWR)
PWR)
PWR)
PWR)
PWR)
PWR)
PWR)

5A2

=PP3V3_S5_SB
=PP3V3_S5_SB_USB
=PP3V3_S5_SB_PM
=PP3V3_S5_SB_VCCSUS3_3
=PP3V3_S5_SB_VCCSUS3_3_USB
=PP3V3_S5_SB_IO
=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA
=PP3V3_S5_ROM
=PP3V3_S5_P3V3S3
=PP3V3_S5_P3V3S0
=PP3V3_S5_FWLATEVG
=PP3V3_S5_LCD

23A7 23B7 23D4 23D8 25C8


22D8
11B5 23D1 26C5
24A5 24B3 25B6 25D2
24B3 25D2
22C6
24C3
50D4
63D5

Power Conn / Alias

63C5
39A8

SYNC_MASTER=ENET

SYNC_DATE=11/16/2005

67C7

NOTICE OF PROPRIETARY PROPERTY

27C5
63B1

PP5V_S5

5D2 51C4

(REGULATOR OUTPUT 5 PWR)

67B5 67B7 67C6


59B1

=PP5V_S5_REG

66B3

MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.3MM
VOLTAGE=5V

=PP5V_S5_SB
=PP5V_S5_P5VS3
=PP5V_S5_PWRCTL
=PP5V_S5_P5VS0
=PP5V_S5_USB
=PP5V_S5_PATA
(PATA
=PP5V_S5_1V8S3

62A5 66C4
48C2
27B1
62B1
60C4
39C6

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

5A2

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT

25C8

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

63D5
63A7 63D6

SIZE
63C5
42C8

5V PWR)

APPLE COMPUTER INC.

34D6

DRAWING NUMBER

D
SCALE

SHT

61C7

NONE

36C8

REV.

051-7374

A
OF

64

79

DC-JACK INTERFACE
D

PPDCIN_G3H_R

87438-0543

6AMP-24V
1

PP18V5_DCIN_F

VOLTAGE=18.5V
MIN_LINE_WIDTH=2 MM
MIN_NECK_WIDTH=0.20 MM

0.01uF

ONEWIRE_PWR_EN_L

NC

CRITICAL
66A5 65C3 46B6 45C5 5C1

ADAPTER_SENSE

OVP

RCLAMP2402B
46D6 45B8 5C1

SMC_BC_ACOK 5

SYS_ONEWIRE

100K

5%
1/16W
MF-LF
402

Q8210
2N7002DW-X-F

G S

65C8 64D1
66A5

Q8240
TP0610

R8206

S0T23-3

102K

SOT-363

66A5 65C4 64D1

=PP3V42_G3H_ACIN 2

1%
1/16W
MF-LF
2 402

0.1UF

R8208

10%
2 25V
X5R
402

102K
1%
1/16W
MF-LF
2 402

ONEWIRE_PULLUP
1

R8298

2N7002DW-X-F

Q8298

TP0610

5%
1/16W
MF-LF
2 402

24.3K

1K

5%
1/16W
MF-LF

ONEWIRE_EN

ONEWIRE_PU_PROT

R8296

5%
1/16W
MF-LF
402

Q8299

2N7002

R8200

100K

SOT23-LF
2

5%
1/16W
MF-LF
2 402

C8203

0.001UF

20%
50V
2 CERM
402

5
1

U8290

R8207

1
3

ONEWIRE_ESD

1%
1/16W
MF-LF
2 402

R8231
100K

R8209
57.6K

1%
1/16W
MF-LF
2 402

5%
1/16W
MF-LF
2 402

LM397
SOT23-5

10.7K

V-

R8210

ONEWIRE_DCIN_DIV

C8217
0.22UF
20%
25V

2 X5R

603

U8200

330K

5%
1/16W
MF-LF
2 402

SMC_BC_ACOK

2
3

V5

2
5C1

ONEWIRE_PU_ACOK
1

R8214

SC70

LMC7211
SM-LF
1

MC74VHC1G08

5%
1/16W
MF-LF
402
1

MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.2 MM

U8250
5

1M

V+

CRITICAL

ACIN_DIV

5%
1/16W
MF-LF
2 402

D
1

C8230

10%
25V
2 X5R
402

0
D

ONEWIRE_PULLUP

R8233
100K

1%
1/16W
MF-LF
2 402

0.1UF

2 402
ONEWIRE_OV

ONEWIRE_PU_EN_L

R8203
10K

S0T23-3

R8201

ACIN_ENABLE_L_DIV

ACIN_1V20_REF

R8232

1%
1/16W
MF-LF
2 402

ONEWIRE_PULLUP

100K

64C3

VOLTAGE=18.5V
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.20 MM

SMC_PS_ON

CRITICAL

PP18V5_DCIN_ONEWIRE

SOT-363

S1

=PP18V5_G3H_INRUSH

39C6 5C1
46B3 45D5

Q8220

2
PP3V42_ONEWIRE

470K

5%
1/16W
MF-LF
2 402

V+
5

R8213

C8218

2.0K
5%
1/16W
MF-LF
402

=PP3V42_G3H_ACIN

ONEWIRE_PWRCTL

D4
D3
D2
D1

GATE

ACIN DETECTION

5%
1/16W
MF-LF
402

ONEWIRE_PWR_EN_L_DIV

S3
S2

ONEWIRE_PULLUP 1

R8299

SO-8

ONEWIRE_ALWAYSON

R8202

5%
2 1/16W
MF-LF
402

R8211

ONEWIRE_PWRCTL
100K

SI4405DY-E3

R8204

ONEWIRE_PWRCTL

SC-75

PP18V5_DCIN

C8202

10%
2 25V
X7R
402

6C8 =GND_DCIN_CHGND

VOLTAGE=18.5V
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.20 MM

1206

Q8250

INRUSH LIMITER

F8200

M-RT-SM

D8200

CRITICAL

ACIN_ENABLE_GATE

J8200

D
64B3

5%
1/8W
MF-LF
805

SOT-363

CRITICAL

=PPDCIN_G3H

47

BAS16TW-X-F

CRITICAL

R8205

D8201
518S0287

ACIN_ENABLE_L

6
D

Q8210
2N7002DW-X-F

SOT-363

R8297

5%
1/16W
MF-LF
2 402

Q8220

2N7002DW-X-F

TABLE_ALT_HEAD

SOT-363

PART NUMBER

ALTERNATE FOR
PART NUMBER

BOM OPTION

REF DES

COMMENTS:

376S0466

376S0410

Q8250

VISHAY SI4413ADY

TABLE_ALT_ITEM

ONEWIRE_PU_EN

BATTERY INTERFACE
B

64D1

=PP3V42_G3H_LIDSWITCH

600-OHM-300MA

L8209

0402

L8207

600-OHM-300MA
0402
1

PP3V42_G3H_LIDSWITCH_F
GND_SMC_LID_F

SMC_LID

10

12

11

14

13

16

15

18

17

20

19

5D1

5D1
5D1

SMBUS_BATT_SCL_F
SMBUS_BATT_SDA_F
SMC_BS_ALRT_L_F
BATT_POS
BATT_NEG

L8202

120-OHM-0.3A-EMI
0402-LF
1

=SMBUS_BATT_SCL

27C1

L8203

C8211

0.001UF

10%
2 50V
CERM
402

C8205

0.001UF

10%
2 50V
CERM
402

C8209

0.001UF

10%
2 50V
CERM
402

C8215
47pF

5%
2 50V
CERM
402

C8206
47pF

5%
2 50V
CERM
402

120-OHM-0.3A-EMI
0402-LF
1

=SMBUS_BATT_SDA

27C1

L8204

120-OHM-0.3A-EMI

600-OHM-300MA

CRITICAL

0402

J8250

5D1

SMC_LID_F

L8208

46C6 45B5 40C4 5B2

65A6 6D8

0402-LF

=GND_BATT_CHGND

SMC_BS_ALRT_L

DC-In & Battery Connectors

127216FA020

F-ST-SM1

L8201

SYNC_MASTER=POWER

FERR-50-OHM

C8220
0.01uF

10%
2 16V
CERM
402

C8221

0.01uF

=GND_BATT_CHGND

PIN 1

10%
2 16V
CERM
402

SYNC_DATE=07/13/2005

SM-LF

MLB TOP VIEW


1

NOTICE OF PROPRIETARY PROPERTY

BATT_POS_F
66B2

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

L8205

FERR-50-OHM

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

SM-LF

II NOT TO REPRODUCE OR COPY IT

6D8 65A6

LID HALL EFFECT SENSOR

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART


SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

65

79

PBUS SUPPLY / BATTERY CHARGER

CRITICAL

Q8300
SI4405DY-E3
SO-8

=PP18V5_G3H_CHGR

7
66B6

2
5

150pF
5%
50V
CERM
402

C8340

0.1UF
2

10%
25V
X5R
402

CHGR_VCOMP_CC

C8325

C
4

R8306

5%
50V
CERM
402
1

SOT-363

5%
1/16W
MF-LF
402

66B6

VCOMP

CHGR_VADJ

9
2

1%
1/16W
MF-LF
402

45B5 5C1

R8343

R8341

10K

10K

1%
1/16W
MF-LF
2 402

1%
1/16W
MF-LF
2 402

SMC_BATT_ISET1

R8344
100K

1%
1/16W
MF-LF
2 402

14

CHGR_BOOT

15

CHGR_UGATE

PHASE

16

CHGR_PHASE

1%
1/16W
MF-LF
402

R8363

C8341

CHGR_CHLIM
1

1%
1/16W
MF-LF
402

10%
25V
X5R
402

C8328

VREF

27

ACSET

12

DCPRN

24

DCSET

28

20%
4V
X5R
402

2
5

R8370

1%
1/16W
MF-LF
402

C8305

5%
1/16W
MF-LF
402

10UF

10%
25V
X5R
1206-1

10%
25V
X5R
1206-1

C8307
10UF
10%
25V
X5R
1206-1

CRITICAL
2

Q8301

7AMP

0.01

PPVBAT_G3H_CHGR_REG

CRITICAL

Q8302

CRITICAL

L8300
4.7UH

HAT2165H
LFPAK

MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM

PPVBAT_G3H_CHGR_OUT

33UF

C8309

C8310
33UF

100UF

20%

20%
2 16V
ELEC
6.3X5.5SM1

2 16V

POLY
CASED2E-SM

5C1 66B5

CRITICAL

CRITICAL
1

C8308

SM
4

NO STUFF

0.5%
1W
MF
0612

MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM

CRITICAL

20%
16V
POLY
CASED2E-SM

NO STUFF
1
C8316

C8317
0.1UF

0.001uF

10%
2 25V
X5R
402

10%
50V
CERM
402
1

2 CHGR_PHASE_RC

R8381

49.9
1%

10%
2 50V
CERM
603

U8375
5

=PP3V3_S0_PBATTISENS

SOT23-5

V+

C8375

R8364

CHGR_VADJ

TABLE_ALT_HEAD

PART NUMBER

ALTERNATE FOR
PART NUMBER

BOM OPTION

128S0093

128S0092

REF DES

66C2 5C1
66C6

66D6

CHGR_VDD

COMMENTS:

NO STUFF
KEMET T520V336M016ATE0457650

376S0410

376S0466

376S0410

Q8300,Q8320

VISHAY SI4413ADY
TABLE_ALT_ITEM

Q8321

VISHAY SI4413ADY

1
1

R8365
0

TABLE_ALT_ITEM

376S0466

R8351

5%
1/16W
MF-LF
402
2

1%
1/16W
MF-LF
2 402

1%
1/16W
MF-LF
2 402

C8320

0.01uF

R8350
100K

100K

C8321

0.1UF

10%
16V
CERM
402

NO STUFF

C8322

D8322
BAS16TW-X-F
SOT-363
6

0.01UF

10%
16V
X5R
402

=PP3V42_G3H_ACIN

C8318
0.22UF

S1

R8324

2N7002

100K

SOT23-LF

1%
1/16W
MF-LF
402

GND_CHGR_SGND

D8322

NO STUFF

10%
16V
CERM
402

Q8324
3

Q8322

SMC_BC_ACOK

SOT-363

5C1 SMC_BATT_CHG_EN
45D8
46B6

R8325
10K

1%
1/16W
MF-LF
402

65A2

PPVBATT_G3H_R

BAS16TW-X-F
SOT-363

C8323

5%
1/8W
MF-LF
805

SO-8
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.2 MM

R8323
1%
1/16W
MF-LF
402

Q8324

PBUS Supply/Battery Charger

2N7002DW-X-F
SOT-363

S
S

SYNC_MASTER=SMC
SMC_BATT_TRICKLE_EN_L

SYNC_DATE=08/19/2005

5C1 45D8 46B6

NOTICE OF PROPRIETARY PROPERTY

4
1

0.1UF
2

64B3

47

4
1

=PPVBATT_G3H

R8304

SI4405DY-E3

BATT_RC

D8201
Q8321

1%
1/16W
MF-LF
402

SOT-363
65C7 65C3 46B6 45C5 5C1

BATT_POS_F

45C2 45C4 46B6 48A1 48B5 48C1 61C1


62A5 66C2

BYPASS_R_DRV

2N7002DW-X-F

2N7002DW-X-F

20%
6.3V
X5R
402

35.7K

SOT-363

BATT_FET_DRAIN

C8372
0.22UF

CRITICAL

BYPASS_R_GATE

MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.2 MM

R8322
39.2K

2N7002DW-X-F

SOT-363
5

C8324
0.01uF

45D5

GATE

Q8322

BAS16TW-X-F

66B7

D4
D3
D2
D1

S1

5%
1/16W
MF-LF
402

1%
1/16W
MF-LF
402

MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 MM

S3
S2

3
5
1

4.53K

GND

10%
6.3V
CERM
402

SMC_BATT_ISENSE

BATT_ENABLE_L
6

6
2

R8331

R8371

GATE

10%
10V
CERM
402

330K

Q8350

1%
1/16W
MF-LF
402

D4
D3
D2
D1

8 PPVBATT_G3H_PRE

BATT_FET_GATE

65C8 65C4 64D1

R8330
470K

10%
16V
CERM
402

S3
S2

2
1

CHGR_EN_L

TABLE_ALT_ITEM

C8308,C8310

PPVBAT_G3H_CHGR_OUT

GND_SMC_AVSS

5%
3W
MF
2525

SO-8

BATT_ISENSE

27

SI4405DY-E3

1%
1/16W
MF-LF
2 402

5%
1/16W
MF-LF
402

R8320

Q8320

100K

CRITICAL

OUT

CRITICAL

1uF
2

R8352

PLACE RC CLOSE TO SMC

INA193
64A6

Place near R8308

VIN+ VIN-

0.0022uF

1/10W
MF-LF
603

Placement Note:
3

C8381

SM

NO STUFF

1206

NC
2

64C3

R8308

XW8300

CHLIM circuit (R8362, R8363, C8328) subject to change


pending M1 resolution (100mV offset, radar 4221420)

64C3

=PPBUSA_G3H

LFPAK

0.1UF

66A5 GND_CHGR_SGND

=PPBUSB_G3H

F8300

HAT2168H

C8303
10%
25V
X5R
402

45C2 45C4 46B6 48A1 48B5 48C1 61C1 62A5 66B1

CRITICAL
1

C8306

10UF

CRITICAL

2.2

20%
6.3V
X5R
402

CHGR_BOOT_RC

R8310

CHGR_LGATE

0.22UF

PP18V5_S5_CHGR_SW_R

1
1

45D5

C8371

GND_SMC_AVSS

CRITICAL
1

CRITICAL

1%
1/16W
MF-LF
402

SMC_DCIN_ISENSE

R8302

GND

10%
6.3V
CERM
402

NO STUFF

2.2uF

24.9K

0.1UF
2

VADJ
DCIN
ISL6255AHRZ
CELLS
QFN
BOOT

CHGR_DCIN

LGATE
EN

100K

CHGR_BGATE

PLACE RC CLOSE TO SMC

DCIN_ISENSE

4.53K

1uF
2

0.5%
1W
MF
0612
2
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM

5%
1/16W
MF-LF
402

CHGR_CSIN

25

ACPRN

CHGR_SGATE

UGATE

100K

90.9K

1%
1/16W
MF-LF
2 402

20
17

23

U8370 OUT
INA193

V+

C8370

R8397
0.02

18

19

CSON
CHLIM

R8309

R8362

270

18

CSIN

CSOP

CHGR_VREF

SGATE
CSIP

22

CHGR_ACSET

R8305

BGATE

U8300

0.0082uF

R8311

SOD-123

21

10%
25V
X5R
402

B0530WXF

CHGR_CSON

C8304

D8300

CHGR_CSOP

C8302

CHGR_VCOMP

10%
25V
2 X7R
402

CHGR_ACSET_RC

1%
1/16W
MF-LF
2 402

ACLIM
ICOMP CRITICAL

2.2

93.1K

ICM

D8322

BAS16TW-X-F

R8342

120pF

VDDP

CHGR_ICOMP

10%
6.3V
CERM
402

C8326

SOT23-5

0.1UF

VDD

CHGR_ACLIM

NO STUFF

1%
1/16W
MF-LF
402

CHGR_ACPRN

C8301

0.022uF
10%
16V
CERM-X5R
402
1
2

NO STUFF

PGND

1%
1/16W
MF-LF
2 402

=PP3V3_S0_PDCISENS

1UF

GND

88.7K

100

Placement Note:
PLACE NEAR R8397

CRITICAL
64A6 62A5

MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.2 MM

1%
1/16W
MF-LF
402

5%
1/16W
MF-LF
402

13

R8301
34.8K

R8340

CHGR_ICOMP_RC

R8367

VIN+ VIN-

1%
1/16W
MF-LF
2 402

C8312

4.7

11

R8300
1

10

100K

CHGR_VDDP

R8303

CHGR_ICM_R

5%
1/16W
MF-LF
402

10%
16V
X5R
402

10%
6.3V
CERM
402

1
2

0.033UF

1UF

IRLML5203-2.6A

10%
50V
CERM
402
1

C8311
SM

0.0033uF

PPVDCIN_G3H_PRE

NO STUFF
1

R8312

C8300

Q8340

10%
6.3V
CERM
402

CHGR_VCOMP_RC

C8313

26

1UF

CHGR_ICM

CLOSE TO PIN 26
1

S1

1%
1/16W
MF-LF
402
2

3.32K

S3
S2

GATE

C8327

THRML_PAD

R8361

D4
D3
D2
D1

CHGR_EN

1%
1/16W
MF-LF
402

CHGR_DCPRN

4.99K

CHGR_DCSET

R8360

CHGR_VDD

29

45B5

SMC_SYS_ISET

MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM

64C1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

20%
10V
CERM
402

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

66

79

=PP5V_S0_LCD

64D3

R9400
100K

FERR-120-OHM-1.5A
=PPBUS_S5_INV 1
2

Q9405

R9401

100K 2 INV_PWREN_L1

Q9406

LVDS_BKLTEN

CRITICAL

J9400

88609-04001
F-ST-SM
5

L9400

SOT23-LF

2
0402-LF

2N7002

IN

INVERTER CONNECTOR

FERR-120-OHM-1.5A

S0T23-3

1%
1/16W
MF-LF
402

PPBUS_ALL_INV_CONN

VOLTAGE=12.6V
MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM

L9402

TP0610
G

5B1

0402-LF

INV_PWREN_F_L1

L9403

64C1

1%
1/16W
MF-LF
2 402

13D5

PP5V_INV
MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM
VOLTAGE=5V

120-OHM-0.3A-EMI

C9414

0.0022UF

10%
50V
CERM
402

5B1

PP5V_INV_F

VOLTAGE=5V
MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM

0402-LF

5B1

INV_GND

5B1

INV_BKLIGHT_PWM_L

2
3
4

L9401

120-OHM-0.3A-EMI
1
67B7 67B5 64A6

=PP3V3_S0_LCD

REPLACE 518S0334 WITH 518S0486

0402-LF
1
5

13D5

5%
2 50V
CERM
402

MC74VHC1G08

U9453

LVDS_BKLTCTL

C9401

100PF

INVERTER_BUF

SC70
4

C9402
100PF

5%
2 50V
CERM
402

C9403
100PF

5%
2 50V
CERM
402

C9400
100PF

5%
1 50V
CERM
402

BKLIGHT_CTL

INVERTER_BUF

C9459

0.1UF
10%
16V
X5R
402

THIS GND CONECTS TO CHASSIS GND

INVT_CHGND

6D8

C
INVERTER_UNBUF

R9428
0

=PP3V3_S5_LCD

64A3

Q9403

R9402

FDC638P

100K

R9423
10K
5%
1/16W
MF-LF
402

Q9404

IN

VOLTAGE=3.3V
MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM
1

LCDVDD_PWREN_L_R

C9409
1

67A2 6C8

1%
1/16W
MF-LF
2 402

10K

5%
1/16W
MF-LF
2 402

5%
1/16W
MF-LF
2 402 67C6

VOLTAGE=3.3V

0402-LF

L9408

=PP3V3_S0_LCD

VOLTAGE=3.3V

MIN_LINE_WIDTH=0.25 MM

NOSTUFF

13C5

IO

13C5

IO

13C5

IO

13C5

IO

13C5

IO

13C5

IO

13D5

IO

13C5

IO

CRITICAL

10K

L9407

LVDS_A_DATA_N<0>
LVDS_A_DATA_P<0>
LVDS_A_DATA_N<1>
LVDS_A_DATA_P<1>
LVDS_A_DATA_N<2>
LVDS_A_DATA_P<2>
LVDS_A_CLK_N
LVDS_A_CLK_P

6C2

6C2

9
10
11
12
13
14

IO

IO

=USB2_CAMERA_N

USB2_CAMERA_CONN_P
USB2_CAMERA_CONN_N

C9416

13D5

LVDS_IBG

18

CAMERA I/F

20

PP5V_S3_CAMERA_F
VOLTAGE=5V
MIN_NECK_WIDTH=0.20 MM
MIN_LINE_WIDTH=0.30 MM

27D1

IO

27C1

IO

=SMBUS_ATS_SCL
=SMBUS_ATS_SDA

0.001uF
10%
50V
CERM
402

C9415
10%
50V
CERM
402

22

=GND_CHASSIS_LVDS

C9410

2 CERM

0.001uF
2

21

24
67B2 6C8

26

Plexi: 516S0212
*Enclosure: 518S0364

0.001uF
10%
50V
402

1.5K 2

INVERTER,LVDS,TMDS

1%
1/16W
MF-LF
402

13D5

17

19

L9405

R9413

LCD I/F

16

0402-LF

15

=USB2_CAMERA_P

FERR-120-OHM-1.5A
1
2
64B3 =PP5V_S3_CAMERA

LVDS REFERENCE CURRENT,1.5K OHM PULL DOWN RESISTOR NEEDED

90-OHM
SM

LVDS_CLKCTLB

13D5

SYM_VER-1

LVDS_CLKCTLA

LVDS_VREFH
LVDS_VREFL

=PP3V3_S0_LCD

R9415 R9416

13D5

(LVDS DDC POWER)


MIN_NECK_WIDTH=0.20 MM

2
0402-LF

5%
1/16W
MF-LF
2 402

MIN_NECK_WIDTH=0.20 MM

PP3V3_S0_LCD_F

120-OHM-0.3A-EMI

67B7 67B5 64A6

MIN_LINE_WIDTH=0.30 MM

LVDS_DDC_CLK
13D5 LVDS_DDC_DATA

13D5

23

13D5

5%
1/16W
MF-LF
2 402

=GND_CHASSIS_LVDS

PP3V3_LCDVDD_SW_F

R9408 R9409
10K

10K

F-RT-SM
25

FERR-120-OHM-1.5A

64A6 67B5 67B7 67C6

1
1

NOSTUFF

J9401

S-050162B

L9404

=PP3V3_S0_LCD

10%
50V
CERM
402

CRITICAL

10%
50V
CERM
402

0.0033UF

100K

67C6 67B5 64A6

10UF

C9413
1

R9414

CONNECTOR

0.001uF

C9412

20%
6.3V
2 X5R
603

10%
16V
2 X5R
402

C9411
0.1UF

SOT23-LF

PP3V3_LCDVDD_SW

2N7002

LVDS_VDDEN

6
4

LCDVDD_PWREN_L

LCD + CAMERA

SM-LF

5%
1/16W
MF-LF
402
2

13D5

5%
1/16W
MF-LF
402

SYNC_MASTER=GRAPHIC

C9408

0.001uF

SYNC_DATE=06/06/2005

NOTICE OF PROPRIETARY PROPERTY

10%
50V
2 CERM
402

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

67

79

7
L9506

PP3V3_S0_ANALOG_TMDS_F

68B1 68B4

68D6 64B6

120-OHM-0.3A-EMI
1
2
=PP1V8_S0_TMDS

VOLTAGE=3.3V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM

0402-LF

PP1V8_S0_TMDS_F

C9536
0.001UF

10%
2 50V
CERM
402

C9537
0.001UF
10%

50V
2 CERM

402

C9538

10%
2 16V
X5R
402

C9539

0.1UF

0.1UF

0402-LF

C9540

C9507

C9508

0.1UF

10UF

10%
2 16V
X5R
402

68B4

69B2 68B2

20%
2 6.3V
X5R
603

10%
2 50V
CERM
402

C9509

0.001UF

10%
2 16V
X5R
402

0.1UF

C9510

10%
2 50V
CERM
402

C9511

0.001UF

10%
2 16V
X5R
402

C9512

0.1UF

0.001UF

10%
2 16V
X5R
402

10%
2 50V
CERM
402

R9507

R9537

C9513

68D6 64B6

=PP1V8_S0_TMDS

VOLTAGE=3.3V
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.25MM

0402-LF
1

C9530

C9531

0.001UF
10%

2 50V
CERM

C9514

0.1UF

0.1UF

10%

10%

2 16V
X5R

402

C9500

0.001UF

10%

2 16V
X5R

402

2 50V
CERM

402

C9501

0.001UF
10%

2 50V
CERM

402

C9502

0.1UF

0.1UF

10%

10%

2 16V
X5R

402

C9503

2 16V
X5R

402

TMDS_TX_P<1>

C9532

C9533

10%

69B2

1%
1/16W
MF-LF
402

C9523
10%

C9504

402

10UF
20%

2 6.3V
X5R

402

603

R9509
TMDS_TX_P<2>

49.9 2

R9539
TMDS_TX<2>

1%
1/16W
MF-LF
402

49.9 2
1%
1/16W
MF-LF
402

C9524
10%

2 50V
CERM

68C4

402

0.1UF

R9510

0.1UF

10%

10%

2 16V
X5R

402

69A2 68B2

TMDS_TX_CLK_P

402
1

49.9 2

R9540
TMDS_TX_CLK

1%
1/16W
MF-LF
402

49.9 2 TMDS_TX_CLK_N
1%
1/16W
MF-LF
402

C9525

68B2 69A2

NOSTUFF
1

0.001UF

5%
2 50V
CERM
402

L9505

120-OHM-0.3A-EMI
2
=PP3V3_S0_TMDS 1

C9526

10pF

NOSTUFF

C9527
10pF

10%
2 50V
CERM
402

5%

2 50V
CERM

402

MCH SDVO CHANNEL R,G,B,CLK SIGNAL TO TMDS CHIP


68C4

PLACE THE CAP NEAR THE NB SIDE

C9526,C9527 close to CHIP

PEG_R2D_C_N<0>

IN
IN

PEG_R2D_C_N<2>
PEG_R2D_C_P<3>

68D6 68B1
68D3

PEG_R2D_C_N<3>

C9541
0.1UF
10%

2 16V
X5R
402

C9542

0.1UF
10%

2 16V
X5R

C9543
0.1UF
10%

2 16V
X5R

402

402

C9544
0.1UF
10%

2 16V
X5R
402

C9545
0.1UF
10%

2 16V
X5R
402

C9546
0.1UF
10%

2 16V
X5R
402

C9547
0.1UF
10%

2 16V
X5R
402

C9548
0.1UF
10%

2 16V
X5R

D9500

402

TMDS_SDR_P
TMDS_SDR_N
TMDS_SDG_P
TMDS_SDG_N
TMDS_SDB_P
TMDS_SDB_N

C9519

0.1UF

10% 16V
X5R 402

SOT-363

64B6

=PP2V5_S0_TMDS
13C3

R9501

R9502

3.3K

3.3K

5%
1/16W
MF-LF
402
2

5%
1/16W
MF-LF
402 2

13D3

OUT
OUT

PEG_D2R_P<1>
PEG_D2R_N<1>

TMDS_INT_P
TMDS_INT_N

SIL1362ACLU
LQFP

43 SDB_P
44 SDB_N

SDVO RCVR
CORE

TMDS_RST_L

DIFF SIG
DATA

64A6 68B1 68C8 68D8 69B7 69D1 69D5

C9505
10UF
20%

2 6.3V
X5R

402

603

PP3V3_S0_ANALOG_TMDS_F

SDVO_CTRLCLK
SDVO_CTRLDATA
ADDRESS=0X70 NC
IF HIGH, ADDRESS=0X72

5%
1/16W
MF-LF
402
1

R9503
1K

5 SDSCL
4 SDSDA
6 A1

TMDS_TX_P<0> OUT
TMDS_TX_N<0> OUT
TMDS_TX_P<1> OUT
68D1 TMDS_TX_N<1>
OUT
68C3 TMDS_TX_P<2>
OUT
68C1 TMDS_TX_N<2>
OUT
68C3 TMDS_TX_CLK_P
OUT
68C1 TMDS_TX_CLK_N
OUT

TX0_P
TX0_N

17

69B2 68D3

16

69B2 68D1

TX1_P

20
19

69B2 68D3

23

69B2

22
14

69B2

TX2_N
TXC_P
TXC_N

68B4 68D6

13

69B2

69A2
69A2

R9504
249

1%
1/16W
MF-LF
2 402

B
=PP3V3_S0_TMDS 64A6

68B2 68C8 68D8 69B7 69D1 69D5

EXT_SWING

CONFIG/
PRGRM

25

I2C MASTER
INTER SCLDDC

SDADDC

2 RESET*

TMDS_HTPLG_R

10%

2 16V
X5R

TX1_N
TX2_P

46 SDC_P
47 SDC_N

TMDS_EXT_RES 35 EXT_RES

14B6
14B6

C9521
0.1UF

U9500

37 SDR_P
38 SDR_N
40 SDG_P
41 SDG_N

32 SDI_P
33 SDI_N

26B1

IO

R9500

TMDS CHIP SDVO INPUT INTERRUPT SIGNAL TO MCH

IO

TMDS_HTPLG 1 2.2K 2

TMDS_SDC_P
TMDS_SDC_N

C9520
0.1UF
10% 16V
X5R 402

=PP3V3_S0_TMDS

CRITICAL

=PP5V_S0_TMDS

BAV99DW-X-F

PP3V3_S0_ANALOG_TMDS_F
PP1V8_S0_TMDS_F

PLACE IT CLOSE TO CONNECTOR


69C6 64D3

PP3V3_S0_PVCC1_TMDS_F

PEG_R2D_C_P<2>

OVCC 1

13B3

IN

PP3V3_S0_PVCC2_TMDS_F

68C6

SPVCC 48

13C3

13B3

IN

PEG_R2D_C_N<1>

TEXT MODE

R9505 1R9506

TMDS_EXT_SWING

TMDS_I2C_SCL
TMDS_I2C_SDA

10K

10K

5%
1/16W
MF-LF
2 402

5%
1/16W
MF-LF
2 402

TMDS_I2C_SCL AND TMDS_I2C_SDA DONT NEED TO CONNECT


TEST

30

29 HTPLG
3 SPGND

13B3

IN

68D3

68C7

PEG_R2D_C_P<1>

SVCC0 36
SVCC1 42

13C3

IN

39 SGND0
45 SGND1

13B3

402

PP3V3_S0_ANALOG_SDVO_F
PP1V8_S0_ANALOG_SDVO_F

68D6

10%

2 16V
X5R

402

IN

PVCC1 11
PVCC2 26

13C3

0.1UF

27 PGND2

10%

2 50V
CERM

C9535

VCC2 34

0.001UF

PEG_R2D_C_P<0>

AVCC0 15
AVCC1 21

C9534

IN

12 AGND0
18 AGND1
24 AGND2

13B3

VCC0 10
VCC1 28

VOLTAGE=3.3V
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.25MM

7 GND0
31 GND1

PP3V3_S0_PVCC2_TMDS_F

0402-LF

IN

TMDS_TX_N<2> 68B2

2 16V
X5R

402

69C6

49.9 2

0.001UF

C9506

0.001UF

2 50V
CERM

VOLTAGE=3.3V
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.25MM

2 50V
CERM

68C8 68B2 68B1 64A6


69D5 69D1 69B7 68D8

69B2

R9538
TMDS_TX<1>

0.001UF

PP3V3_S0_PVCC1_TMDS_F

0402-LF

49.9 2
1%
1/16W
MF-LF
402

68C4

L9504

TMDS_TX_N<1> 68B2

402

ONE 0.1UF AND 0.001UF FOR EACH PIN

120-OHM-0.3A-EMI
2
=PP3V3_S0_TMDS 1

C9522
10%

69B2 68B2

69B7 68D8
68B1 64A6
68C8 68B2
69D5 69D1

69B2

0.001UF

VOLTAGE=1.8V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM

0402-LF

TMDS_TX_N<0> 68B2

1%
1/16W
MF-LF
402

R9508

PP1V8_S0_ANALOG_SDVO_F

49.9 2

2 50V
CERM

69B2 68B2

20%
2 6.3V
X5R
603

120-OHM-0.3A-EMI
68C4

49.9 2 TMDS_TX<0>

10UF

L9500

PP3V3_S0_ANALOG_SDVO_F

1%
1/16W
MF-LF
402

ONE 0.1UF AND 0.001UF FOR EACH PIN

ONE 0.1UF AND 0.001UF FOR EACH PIN

L9503

120-OHM-0.3A-EMI
2
=PP3V3_S0_TMDS 1

TMDS_TX_P<0>

VOLTAGE=1.8V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM

1
1

69B7 68D8
68B1 64A6
68C8 68B2
69D5 69D1

L9501

120-OHM-0.3A-EMI
2
=PP3V3_S0_TMDS 1

69B7 68D8
68B1 64A6
68C8 68B2
69D5 69D1

5%
1/16W
MF-LF
2 402

PP5V_S0_DVIPORT

EXTERNAL TMDS

69B4 69C3

NC

D9500

SYNC_MASTER=GRAPHIC
5

SYNC_DATE=06/06/2005

NOTICE OF PROPRIETARY PROPERTY

BAV99DW-X-F

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY


PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

SOT-363
3

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE


69C5

PP5V_S0_DVIPORT_D

II NOT TO REPRODUCE OR COPY IT


III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

68

79

TABLE_ALT_HEAD

PART NUMBER

ALTERNATE FOR
PART NUMBER

BOM OPTION

155S0227

155S0164

REF DES

COMMENTS:
TABLE_ALT_ITEM

L9805,L9806,L9807

KEEP

MAG.LAYER IN BOM

Video Connectors
=PP3V3_S0_TMDS

EXTERNAL VIDEO (VGA) INTERFACE

64A6 68B1 68B2 68C8 68D8 69B7 69D1

Q9801
2N7002DW-X-F

R98211 R98221
2.2K

TMDS(MINI DVI) INTERFACE

Q9801
2N7002DW-X-F

3
D

IO

69B6

IO

13B5

CRT_DDC_CLK
CRT_DDC_DATA

5%
1/16W
MF-LF
402 2

13B5

2.2K

5%
1/16W
MF-LF
402 2

Isolation required for DVI power switch

GPU_CRT_DDC_CLK

SOT-363

SOT-363
6

PLACE THE RESISTOR CLOSE TO GMCH AND THE CAP NEAR CONNECTOR

GPU_CRT_DDC_DATA

69B6

68B7 64D3

=PP5V_S0_TMDS

400-OHM-EMI

PP5V_S0_TMDS_FUSE

PP5V_S0_DVIPORT

VOLTAGE=5V
MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.25 MM

SM-LF

VOLTAGE=5V
MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.25 MM

=PP3V3_S0_TMDS

L9844

F9804
0.5AMP-13.2V

C9804

255

CRT_IREF

8 SN74LVC2G125DCU

R9860

20%
10V
2 CERM
402

13B5

CRT_HSYNC_R

R9869
13B5

20%
10V
2 CERM
402

U9804

0.1UF

A 255 OHM 1% RESISTOR IS REQUIRED BETWEEN CRT_IREF


AND GROUND

=GND_CHASSIS_TMDS_UPPER

39

CRT_HSYNC_LS_R

R9870

US

VCC

5%
1/16W
MF-LF
402

6C8 69A4

C9860
0.1UF

68A6 69B4

VOLTAGE=5V
MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.25 MM

SM-1

64A6 68B1 68B2 68C8 68D8 69B7 69D5

125

CRT_HSYNC_LS

39

VGA_HSYNC

5%
1/16W
MF-LF
402

GND

7
4

69B4

NOSTUFF
1

C9842
33PF

1%
1/16W
MF-LF
402

PP5V_S0_DVIPORT_D

5%
50V
402

2 CERM

68A8

PLACE THE RESISTOR CLOSE TO GMCH AND THE CAP NEAR THE CONNECTOR

DVI power DIODE on page 95 (D9500)

TV REFERENCE CURRENT,USES AN EXTERNAL RESISTOR OF 5K OHM 1%


TO SET INTERNAL VOLTAGE LEVELS

R98621

R9863

13C5

4.99K2
1

TV_IREF

2.2K

5%
1/16W
MF-LF
402 2

R9868

U9804

8 SN74LVC2G125DCU

R9861

2.2K

13B5

5%
1/16W
MF-LF
2 402

CRT_VSYNC_R

39

R9871

US

VCC

CRT_VSYNC_LS_R

5%
1/16W
MF-LF
402

125

CRT_VSYNC_LS

39

VGA_VSYNC

5%
1/16W
MF-LF
402

GND

1
4

69B4

NOSTUFF
1

C9843
33PF

1%
1/16W
MF-LF
402

5%

68A7

2 50V
CERM

TMDS_HTPLG

402

C9808
0.001uF

10%
50V
2 CERM
402
69D5

GPU_CRT_DDC_CLK
1

C9809

CRITICAL

100pF

L9805

5%
2 50V
CERM
402
69D5

90-OHM-300mA
2012H

OMIT
CRITICAL

GPU_CRT_DDC_DATA

J9801
1

PLACE THE RESISTOR CLOSE TO GMCH

C9812

13C5
13B5

68A6
69C3

PP5V_S0_DVIPORT

R9850

R9851

75

75

1%
1/16W
MF-LF
2 402
13C5

13B5

1%
1/16W
MF-LF
2 402

69D5
68B2 68B1 64A6
69D1 68D8 68C8

FL9800
EXT_COMPVID_B
1

C9839
0.1UF

CRT_BLUE_L

69C1

17

26

TMDS_TX_CONN_P<2>

L9807

90-OHM-300mA
2012H

TMDS_TX_CONN_N<2>

R9852

R9853

75

75

1%
1/16W
MF-LF
2 402
13C5

13B5

1%
1/16W
MF-LF
2 402

TV_IRTNB

11 S1C
10 S2C

DB 7

VGA_G
69C1 VGA_VSYNC

0.25%
2 50V
CERM
402

FL9801

19

11

28

20

12

29

SM-220MHZ-LF

EXT_Y_G

30

22

14

31

VGA_R

32

24

16

TMDS_TX_CONN_P<1>
1

CRITICAL

TMDS_TX_CONN_N<0>

90-OHM-300mA
2012H

6A6 =GND_CHASSIS_TMDS_DOWN

13B5

TMDS_TX_CLK_N

68B2 68C1

NOSTUFF

C9821
0.1UF

10%
16V
2 X5R
402

2
3 4
1

1%
1/16W
MF-LF
402 2

MINI-DVI CONNECTOR

C9820
3.3PF

SYNC_MASTER=EUGENE

0.25%
50V
2 CERM
402

TV_DACC_OUT

SYNC_DATE=05/21/05

NOTICE OF PROPRIETARY PROPERTY


THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

CRT_RED
1

R9854
75

13C5

R9855

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

75

1%
1/16W
MF-LF
2 402

13B5

68B2 68C3

SYM_VER-1

150

13C5

TMDS_TX_CLK_P
2

4
6C8 =GND_CHASSIS_TMDS_UPPER
69C3

0.25%
50V
2 CERM
402

NOSTUFF

68B2 68D1

CRITICAL
370-OHM-280MA
SM1

C9834
3.3PF

FL9802

PLACE THE RESISTOR CLOSE TO GMCH

TMDS_TX_N<0>
4

L9804

LCFILTER

R98591

68B2 68D3

SYM_VER-1

TMDS_TX_P<0>
3

TMDS_TX_CONN_CLK_N

SM-220MHZ-LF

EXT_C_R

TMDS_TX_CONN_CLK_P

150
IN 1
EN_L 15

68B2 68D1

L9806

1%
1/16W
MF-LF
402 2

DD 12

14 S1D
13 S2D

TMDS_TX_N<1>
4

TMDS_TX_CONN_P<0>

R98641

DC 9

68B2 68D3

SYM_VER-1

TMDS_TX_CONN_N<1>

3 4

NOSTUFF

TMDS_TX_P<1>
3

15

LCFILTER

GND

CRT_GREEN_L

C9824
3.3PF

DA 4

SOP

27

33
34
35
36

5 S1B
6 S2B

150
1%
1/16W
MF-LF
402 2

U9801

10

13

R9856

16

TS3V330

13B5

2 S1A
3 S2A

VGA_B
VGA_HSYNC

18

VCC

TV_DACB_OUT
CRT_GREEN

68B2 68C1

CRITICAL

25

3 4

NOSTUFF

10%
16V
2 X5R
402

CRITICAL

13C5

SM-220MHZ-LF

TV_IRTNA

PLACE THE RESISTOR CLOSE TO GMCH

NC
NC

LCFILTER

=PP3V3_S0_TMDS

TMDS_TX_N<2>
4

68B2 68C3

SYM_VER-1

RT-TH

5%
50V
2 CERM
402

TV_DACA_OUT
CRT_BLUE

MINI-DVI

100pF

TMDS_TX_P<2>
3

II NOT TO REPRODUCE OR COPY IT

1%
1/16W
MF-LF
2 402

=SB_GPIO22

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

6B2
TABLE_5_HEAD

CRITICAL

BOM OPTION

514-0292

PART#

QTY

DESCRIPTION
CONN,32P MINI-DVI RCPT,RA,MG3,LF

REFERENCE DESIGNATOR(S)

J9801

CRITICAL

NORMAL

514-0319

CONN,32P MINI-DVI RCPT,RA,BLACK,LF

J9801

CRITICAL

FANCY

TV_IRTNC

SIZE
TABLE_5_ITEM

CRT_RED_L

TABLE_5_ITEM

APPLE COMPUTER INC.

DRAWING NUMBER

D
SCALE

SHT
NONE

REV.

051-7374

A
OF

69

79

8
Title:
Design:
Date:

Basenet Report
mlb_noldo
Mar 22 15:44:50 2007

5VS5_SW
5VS5_TG
5VS5_VOSNS

Base nets and synonyms for


mlb_noldo_lib.MLB_NOLDO(@mlb_noldo_lib.mlb_noldo(sch_1))
Base Signal
Synonyms
Location([Zone][dir])
1V2_FB
1V05S0_BG

1V2_FB - @mlb_noldo_lib.MLB_NOLDO
1V05S0_BG @mlb_noldo_lib.MLB_NOLDO
1V05S0_BOOST @mlb_noldo_lib.MLB_NOLDO
1V05S0_BOOST_RC @mlb_noldo_lib.MLB_NOLDO
1V05S0_COMP @mlb_noldo_lib.MLB_NOLDO
1V05S0_FSET @mlb_noldo_lib.MLB_NOLDO
1V05S0_ITH @mlb_noldo_lib.MLB_NOLDO
1V05S0_ITH_RC @mlb_noldo_lib.MLB_NOLDO
1V05S0_RUNSS @mlb_noldo_lib.MLB_NOLDO
1V05S0_SNS_N @mlb_noldo_lib.MLB_NOLDO
1V05S0_SNS_P @mlb_noldo_lib.MLB_NOLDO
1V05S0_SW @mlb_noldo_lib.MLB_NOLDO
1V05S0_TG @mlb_noldo_lib.MLB_NOLDO
1V05S0_VOSNS @mlb_noldo_lib.MLB_NOLDO
1V5S0_BG - @mlb_noldo_lib.MLB_NOLDO
1V5S0_BOOST @mlb_noldo_lib.MLB_NOLDO
1V5S0_BOOST_RC @mlb_noldo_lib.MLB_NOLDO
1V5S0_ITH @mlb_noldo_lib.MLB_NOLDO
1V5S0_ITH_RC @mlb_noldo_lib.MLB_NOLDO
1V5S0_RUNSS @mlb_noldo_lib.MLB_NOLDO
1V5S0_SNS_N @mlb_noldo_lib.MLB_NOLDO
1V5S0_SNS_P @mlb_noldo_lib.MLB_NOLDO
1V5S0_SW - @mlb_noldo_lib.MLB_NOLDO
1V5S0_TG - @mlb_noldo_lib.MLB_NOLDO
1V5S0_VOSNS @mlb_noldo_lib.MLB_NOLDO
1V8S3_BOOT @mlb_noldo_lib.MLB_NOLDO
1V8S3_BOOT_RC @mlb_noldo_lib.MLB_NOLDO
1V8S3_COMP @mlb_noldo_lib.MLB_NOLDO
1V8S3_COMP_R @mlb_noldo_lib.MLB_NOLDO
1V8S3_FB - @mlb_noldo_lib.MLB_NOLDO
1V8S3_FCCM @mlb_noldo_lib.MLB_NOLDO
1V8S3_FSET @mlb_noldo_lib.MLB_NOLDO
1V8S3_ISEN @mlb_noldo_lib.MLB_NOLDO
1V8S3_LG - @mlb_noldo_lib.MLB_NOLDO
1V8S3_PHASE @mlb_noldo_lib.MLB_NOLDO
1V8S3_UG - @mlb_noldo_lib.MLB_NOLDO
1V8S3_VCC @mlb_noldo_lib.MLB_NOLDO
1V51V05S0_FCB @mlb_noldo_lib.MLB_NOLDO
1V51V05S0_FSEL @mlb_noldo_lib.MLB_NOLDO
1V51V05S0_PGOOD @mlb_noldo_lib.MLB_NOLDO
2V5S0_BP - @mlb_noldo_lib.MLB_NOLDO
2V5S3_BP - @mlb_noldo_lib.MLB_NOLDO
3V3S5_BG - @mlb_noldo_lib.MLB_NOLDO
3V3S5_BOOST @mlb_noldo_lib.MLB_NOLDO
3V3S5_BOOST_RC @mlb_noldo_lib.MLB_NOLDO
3V3S5_COMP @mlb_noldo_lib.MLB_NOLDO
3V3S5_FSET @mlb_noldo_lib.MLB_NOLDO
3V3S5_ITH @mlb_noldo_lib.MLB_NOLDO
3V3S5_ITH_RC @mlb_noldo_lib.MLB_NOLDO
3V3S5_RUNSS @mlb_noldo_lib.MLB_NOLDO
3V3S5_SNS_N @mlb_noldo_lib.MLB_NOLDO
3V3S5_SNS_P @mlb_noldo_lib.MLB_NOLDO
3V3S5_SW - @mlb_noldo_lib.MLB_NOLDO
3V3S5_TG - @mlb_noldo_lib.MLB_NOLDO
3V3S5_VOSNS @mlb_noldo_lib.MLB_NOLDO
5V3V3S5_FCB @mlb_noldo_lib.MLB_NOLDO
5V3V3S5_FSEL @mlb_noldo_lib.MLB_NOLDO
5VS5_BG - @mlb_noldo_lib.MLB_NOLDO
5VS5_BOOST @mlb_noldo_lib.MLB_NOLDO
5VS5_BOOST_RC @mlb_noldo_lib.MLB_NOLDO
5VS5_ITH - @mlb_noldo_lib.MLB_NOLDO
5VS5_ITH_RC @mlb_noldo_lib.MLB_NOLDO
5VS5_RUNSS @mlb_noldo_lib.MLB_NOLDO
5VS5_SNS_N @mlb_noldo_lib.MLB_NOLDO
5VS5_SNS_P @mlb_noldo_lib.MLB_NOLDO

1V05S0_BOOST
1V05S0_BOOST_RC

1V05S0_COMP
1V05S0_FSET
1V05S0_ITH
1V05S0_ITH_RC
1V05S0_RUNSS
1V05S0_SNS_N
1V05S0_SNS_P
1V05S0_SW
1V05S0_TG
1V05S0_VOSNS
1V5S0_BG
1V5S0_BOOST
1V5S0_BOOST_RC
1V5S0_ITH
1V5S0_ITH_RC
1V5S0_RUNSS

1V5S0_SNS_N
1V5S0_SNS_P
1V5S0_SW
1V5S0_TG
1V5S0_VOSNS
1V8S3_BOOT
1V8S3_BOOT_RC
1V8S3_COMP
1V8S3_COMP_R
1V8S3_FB
1V8S3_FCCM
1V8S3_FSET
1V8S3_ISEN
1V8S3_LG
1V8S3_PHASE
1V8S3_UG
1V8S3_VCC
1V51V05S0_FCB
1V51V05S0_FSEL

1V51V05S0_PGOOD
2V5S0_BP
2V5S3_BP
3V3S5_BG
3V3S5_BOOST
3V3S5_BOOST_RC
3V3S5_COMP
3V3S5_FSET
3V3S5_ITH
3V3S5_ITH_RC
3V3S5_RUNSS
3V3S5_SNS_N
3V3S5_SNS_P
3V3S5_SW
3V3S5_TG
3V3S5_VOSNS
5V3V3S5_FCB
5V3V3S5_FSEL

5VS5_BG
5VS5_BOOST
5VS5_BOOST_RC
5VS5_ITH
5VS5_ITH_RC
5VS5_RUNSS
5VS5_SNS_N
5VS5_SNS_P

60A3
62B4
62B4
62C3
5D7
5D7
62B4
62B3
62B4 63B7
62C3
62C3
62B4
62C4
62B4
62B5
62B5
62C6
62B5
62B5
5D7 62B5 63B7
62C6
62C6
62B5
62C5
62B5
61B5
61C4
5D7 61B6
61B6
61B6
61B6
5D7 61C6
61B5
61B5
61B5
61C5
61C6
62A3 62B5
62A2 62B4
58C7 62A1 63C2
60C3
60C3
59B5
59B5
59C6
5D7
5D7
59B5
59B5
59B5 63C7
59C6
59C6
59B5
59C5
59B5
59A3 59B5
59A2 59B4
59B4
59B4
59C3
59B4
59B3
5D7 59B4 63C7
59C3
59C3

5VS5_SW - @mlb_noldo_lib.MLB_NOLDO
5VS5_TG - @mlb_noldo_lib.MLB_NOLDO
5VS5_VOSNS @mlb_noldo_lib.MLB_NOLDO
5V_REG_IN
5V_REG_IN @mlb_noldo_lib.MLB_NOLDO
=EXTBUSB_OC_L
=EXTBUSB_OC_L @mlb_noldo_lib.MLB_NOLDO
USB_C_OC_L @mlb_noldo_lib.MLB_NOLDO
EXTBUSB_OC_L @mlb_noldo_lib.MLB_NOLDO
=FWPWR_PWRON
=FWPWR_PWRON @mlb_noldo_lib.MLB_NOLDO
NC_FWPWR_PWRON @mlb_noldo_lib.MLB_NOLDO
=GND_BATT_CHGND
=GND_BATT_CHGND @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_AUDIO_JACK @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_AUDIO_MIC @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_DIPDIMM_LEFT @mlb_noldo_lib.MLB_NOLDO
GND_CHASSIS_IO @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_USB @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_FW_DOWN @mlb_noldo_lib.MLB_NOLDO
GND_CHASSIS_IO @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_USB @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_FW_DOWN @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_DIPDIMM_LEFT @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_AUDIO_SPKRCONN @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_AUDIO_SHIELD3 @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_AUDIO_SHIELD2 @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_AUDIO_SHIELD1 @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_AUDIO_MIC @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_AUDIO_JACK @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_DIPDIMM =GND_CHASSIS_DIPDIMM_CENTER _CENTER
@mlb_noldo_lib.MLB_NOLDO
GND_CHASSIS_CENTER @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_DIPDIMM =GND_CHASSIS_DIPDIMM_RIGHT _RIGHT
@mlb_noldo_lib.MLB_NOLDO
GND_CHASSIS_RIGHT @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_FW_UPPE =GND_CHASSIS_FW_UPPER R
@mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_TMDS_DOWN @mlb_noldo_lib.MLB_NOLDO
GND_CHASSIS_IO1 @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_TMDS_DOWN @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_LVDS
=GND_CHASSIS_LVDS @mlb_noldo_lib.MLB_NOLDO
GND_CHASSIS_SATA @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_RJ45
=GND_CHASSIS_RJ45 @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_TMDS_UPPER @mlb_noldo_lib.MLB_NOLDO
GND_CHASSIS_DCIN @mlb_noldo_lib.MLB_NOLDO
=GND_DCIN_CHGND @mlb_noldo_lib.MLB_NOLDO
GND_CHASSIS_DCIN @mlb_noldo_lib.MLB_NOLDO
=GND_DCIN_CHGND @mlb_noldo_lib.MLB_NOLDO
=GND_CHASSIS_TMDS_UPPER @mlb_noldo_lib.MLB_NOLDO
=P1V2S0_EN
=P1V2S0_EN @mlb_noldo_lib.MLB_NOLDO
PM_SLP_S3_LS12V6_L @mlb_noldo_lib.MLB_NOLDO
=P3V3S0_EN @mlb_noldo_lib.MLB_NOLDO
=P5VS0_EN @mlb_noldo_lib.MLB_NOLDO
PM_SLP_S3_LS12V6_L @mlb_noldo_lib.MLB_NOLDO
=P1V8S0_EN_L
=P1V8S0_EN_L @mlb_noldo_lib.MLB_NOLDO
PM_SLP_S3_LS5V @mlb_noldo_lib.MLB_NOLDO
=P3V3S3_EN_L
=P3V3S3_EN_L @mlb_noldo_lib.MLB_NOLDO
PM_SLP_S4_LS5V @mlb_noldo_lib.MLB_NOLDO
=P5VS3_EN_L @mlb_noldo_lib.MLB_NOLDO
PM_SLP_S4_LS5V @mlb_noldo_lib.MLB_NOLDO
=PP1V05_S0_FSB_NB
=PP1V05_S0_FSB_NB @mlb_noldo_lib.MLB_NOLDO
=PP1V05_S0_NB @mlb_noldo_lib.MLB_NOLDO
=PP1V05_S0_CPU_NB @mlb_noldo_lib.MLB_NOLDO
=PP1V05_S0_NB_VTT @mlb_noldo_lib.MLB_NOLDO
=PP1V05_S0_CPU @mlb_noldo_lib.MLB_NOLDO
=PPVCORE_S0_NB @mlb_noldo_lib.MLB_NOLDO
PP1V05_S0_CPU_NB @mlb_noldo_lib.MLB_NOLDO
=PPVCORE_S0_NB @mlb_noldo_lib.MLB_NOLDO
=PP1V05_S0_NB_VTT @mlb_noldo_lib.MLB_NOLDO

59B4
59C4
59B4
54A5
6C2 42C8

=PP1V05_S0_REG

6C1 22C4 22D8


6C2
6D2 39C6
6D1
6D8 65A6 65A6
6D8 56B8
6D8 57A6
6D8 28A5

=PP1V5_S0_NB

6C7 6D7
6C8 42A2 42A4 42C2 42C4
6C8 39A1
6C7 6D7
6C8 42A2 42A4 42C2 42C4
6C8 39A1
6D8 28A5
6D8
6D8
6D8
6D8
6D8 57A6
6D8 56B8
6B8 28D5 29A5
6B7
6B8 29D4
6B7
6A6 39A1
6A6 69A3
6A5
6A6 69A3
6C8 67A2 67B2
6C7 35C8
6C8 37A4
6C8 69A4 69C3
6C7
6C8 65C8
6C7
6C8 65C8
6C8 69A4 69C3
63B5
63B6
63B5
63C5
63B6
63A5
63A6
=PP1V8_S3_MEM_NB
63C5
42B8 63D6
=PP2V5_S0_NB_CRTDAC
63D5
42B8 63D6
12A7 12B7 12C2 19D7 33B8
33C7 33C8 64D6
19D1 19D7 64C6
62A6 64D8
17D3 19B5 19D7 64C6
7B5 7B6 7D5 7D5 8C7 9C8
11B3 11C5 64D6
16C8 16D3 19C8 19D7 64D6
64D7
16C8 16D3 19C8 19D7 64D6
17D3 19B5 19D7 64C6

=PP1V05_S0_NB @mlb_noldo_lib.MLB_NOLDO
=PP1V05_S0_CPU_NB @mlb_noldo_lib.MLB_NOLDO
=PP1V05_S0_CPU @mlb_noldo_lib.MLB_NOLDO
=PP1V05_S0_REG @mlb_noldo_lib.MLB_NOLDO
=PP1V05_S0_CPU_NB_SENSE @mlb_noldo_lib.MLB_NOLDO
=PP1V05_S0_SB_CPU_IO @mlb_noldo_lib.MLB_NOLDO
=PPVCORE_S0_SB @mlb_noldo_lib.MLB_NOLDO
PP1V05_S0 @mlb_noldo_lib.MLB_NOLDO
=PPVCORE_S0_SB @mlb_noldo_lib.MLB_NOLDO
=PP1V05_S0_SB_CPU_IO @mlb_noldo_lib.MLB_NOLDO
=PP1V05_S0_CPU_NB_SENSE @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_NB @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_NB_PCIE @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_AIRPORT @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_SB_VCCSATAPLL @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_SB_VCC1_5_A_ATX @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_SB_VCCUSBPLL @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_SB_VCC1_5_A_USB_CORE @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_SB_VCC1_5_A @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_SB @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_NB_VCCAUX @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_NB_VCCD_HMPLL @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_NB_VCCD_LVDS @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_NB_PLL @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_NB_TVDAC @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_NB_3G @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_NB_3GPLL @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_SB_VCC1_5_A_ARX @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_CPU @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_REG @mlb_noldo_lib.MLB_NOLDO
PP1V5_S0 - @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_SB_VCCUSBPLL @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_SB_VCCSATAPLL @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_SB_VCC1_5_A_USB_CORE @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_SB_VCC1_5_A_ATX @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_SB_VCC1_5_A_ARX @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_SB_VCC1_5_A @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_SB @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_REG @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_NB_VCCD_LVDS @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_NB_VCCD_HMPLL @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_NB_VCCAUX @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_NB_TVDAC @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_NB_PLL @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_NB_PCIE @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_NB_3GPLL @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_NB_3G @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_CPU @mlb_noldo_lib.MLB_NOLDO
=PP1V5_S0_AIRPORT @mlb_noldo_lib.MLB_NOLDO
=PP1V8_S3_MEM_NB @mlb_noldo_lib.MLB_NOLDO
PP1V8_S3_MEM_NB @mlb_noldo_lib.MLB_NOLDO
=PP2V5_S0_NB_CRTDAC @mlb_noldo_lib.MLB_NOLDO
=PP2V5_S0_NB_VCCA_3GBG @mlb_noldo_lib.MLB_NOLDO
=PP2V5_S0_NB_VCC_TXLVDS @mlb_noldo_lib.MLB_NOLDO
=PP2V5_S0_NB_DISP_PLL @mlb_noldo_lib.MLB_NOLDO
=PP2V5_S0_NB_VCCA_LVDS @mlb_noldo_lib.MLB_NOLDO
=PP2V5_S0_TMDS @mlb_noldo_lib.MLB_NOLDO
=PP2V5_S0_NB_VCCSYNC @mlb_noldo_lib.MLB_NOLDO
=PP2V5_S0_REG @mlb_noldo_lib.MLB_NOLDO
PP2V5_S0 - @mlb_noldo_lib.MLB_NOLDO
=PP2V5_S0_TMDS @mlb_noldo_lib.MLB_NOLDO
=PP2V5_S0_REG @mlb_noldo_lib.MLB_NOLDO
=PP2V5_S0_NB_VCC_TXLVDS @mlb_noldo_lib.MLB_NOLDO

19D1 19D7 64C6


62A6 64D8
7B5 7B6 7D5 7D5 8C7 9C8
11B3 11C5 64D6
5B2 62B1 64D8
62A8 64D6

=PP3V3_S0_FAN_RT

21C1 21C1 24C3 25C4 64D6


24D3 25D3 64D6
5B2 64D7
24D3 25D3 64D6
21C1 21C1 24C3 25C4 64D6
62A8 64D6
19C1 19D7 64C6
13D2 19D7 64C6
43D3 64C6
24B5 25D6 64C6
24A5 25C6 64C6
24A5 25B6 64C6
24A3 25B2 64C6
24A3 25C2 64C6
25A8 25C8 64C6
16D1 17B6 19B6 19D7 64C6
17C6 19D7 64C6
17C6 19B8 19D7 64C6
19C6 19D7 64C6
19A8 19D7 64C6
19B5 64C6
19A5 64C6
24B5 25D6 64C6
8B7 9D8 64C6
62B8 64C8
5B2 64C7
24A5 25B6 64C6
24B5 25D6 64C6
24A3 25B2 64C6
24A5 25C6 64C6
24B5 25D6 64C6
24A3 25C2 64C6
25A8 25C8 64C6
62B8 64C8
17C6 19B8 19D7 64C6
17C6 19D7 64C6
16D1 17B6 19B6 19D7 64C6
19A8 19D7 64C6
19C6 19D7 64C6
13D2 19D7 64C6
19A5 64C6
19B5 64C6
8B7 9D8 64C6
43D3 64C6
14C2 16B6 19D7 28D2 29D2
61C2 64C6
64C4
19D4 19D7 64B6
17D6 19B7 19D7 64B6
17D6 19B8 19D7 64B6
19D6 64B6
17C6 19C7 19D1 64B6
64B6 68B7
17D6 19B6 19D7 64B6
60C2 63B3 64B8
5B2 64B7
64B6 68B7
60C2 63B3 64B8
17D6 19B8 19D7 64B6

=PP2V5_S0_NB_VCCSYNC @mlb_noldo_lib.MLB_NOLDO
=PP2V5_S0_NB_VCCA_LVDS @mlb_noldo_lib.MLB_NOLDO
=PP2V5_S0_NB_VCCA_3GBG @mlb_noldo_lib.MLB_NOLDO
=PP2V5_S0_NB_DISP_PLL @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_FAN_RT @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_ENET @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_FW @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_2V5S0 @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_1V51V05S0 @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SMBUS_SMC_BSB @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_RSTBUF @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SMBUS_SB @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SMBUS_SMC_0 @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SMBUS_SMC_MLB @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_ALLSYSPG @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_LCD @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_PBATTISENS @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_PDCISENS @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_CPUPOWER @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SB @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SB_GPIO @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SB_VCC3_3 @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SB_VCC3_3_PCI @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SB_VCC3_3_IDE @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SB_PCI @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SB_PM @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_PATA @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SMC_LS @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_NB @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SB_VCCLAN3_3 @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SB_3V3_1V5_VCCHDA @mlb_noldo_lib.MLB_NOLDO
=PPSPD_S0_MEM @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_CK410 @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_AIRPORT @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_TPM @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_AUDIO @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_TMDS @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_THRM_SNR @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_IMVP6 @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_NB_VCC_HV @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_FET @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0 - @mlb_noldo_lib.MLB_NOLDO
=PPSPD_S0_MEM @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_TPM @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_TMDS @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_THRM_SNR @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SMC_LS @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SMBUS_SMC_MLB @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SMBUS_SMC_BSB @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SMBUS_SMC_0 @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SMBUS_SB @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SB_VCCLAN3_3 @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SB_VCC3_3_PCI @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SB_VCC3_3_IDE @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SB_VCC3_3 @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SB_PM @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SB_PCI @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SB_GPIO @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SB_3V3_1V5_VCCHDA @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_SB @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_RSTBUF @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_PDCISENS @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_PBATTISENS -

17D6 19B6 19D7 64B6


17C6 19C7 19D1 64B6
17D6 19B7 19D7 64B6
19D6 64B6
5D2 51C4 64A6
36C8 64A6
39C6 64A6

60C4 64A6
62B1 64A6
27B1 64A6
26B4 64A6
27D8 64A6
27D5 64A6
27C5 64A6
63B1 64A6
64A6 67B5 67B5 67B7 67C6
64A6 66B3
62A5 64A6 66C4
48C2 64A6
22B5 25D8 34C8 64B6
21C3 21D3 23B2 23D5 64B6
24B5 24B5 25B8 25C6 64B6
24B3 25A4 64B6

24C3 25B4 64B6


26D1 64B6
26B6 26B8 64B6
34C2 64A6
46D3 64A6
14C7 14D6 19C7 20A4 20B4
20B4 64A6
24D3 25D3 64A6
24C3 25C4 64A6
28A7 29A3 29A7 64A6
32C7 32D3 32D8 64A6
43C3 64A6
53D4 64A6
54A6 54D7 56D8 57B5 64A6
64A6 68B1 68B2 68C8 68C8
68D8 68D8 69B7 69D1 69D5
10C4 49B3 49D3 64A6
58D8 64A6

17C6 19B7 19C7 64B6


63C3 64B8
5A2 64B7
28A7 29A3 29A7 64A6
53D4 64A6
64A6 68B1 68B2 68C8 68C8
68D8 68D8 69B7 69D1 69D5
10C4 49B3 49D3 64A6
46D3 64A6
27C5 64A6
27B1 64A6
27D5 64A6
27D8 64A6
24D3 25D3 64A6
24B3 25A4 64B6
24C3 25B4 64B6
24B5 24B5 25B8 25C6 64B6
26B6 26B8 64B6

26D1 64B6
21C3 21D3 23B2 23D5 64B6
24C3 25C4 64A6
22B5 25D8 34C8 64B6
26B4 64A6
62A5 64A6 66C4
64A6 66B3
99

=PP3V42_G3H_LPCPLUS

=PP5V_S0_FAN_RT

7
@mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_PATA @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_NB_VCC_HV @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_NB @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_LCD @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_IMVP6 @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_FW @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_FET @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_ENET @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_CPUPOWER @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_CK410 @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_AUDIO @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_ALLSYSPG @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_AIRPORT @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_2V5S0 @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S0_1V51V05S0 @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_LPCPLUS @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_SMCVREF @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_SMC @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_SB_RTC @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_ACIN @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_SMC_CLK @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_LIDSWITCH @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_REG @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_SMBUS_SMC_BSA @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_PWRCTL @mlb_noldo_lib.MLB_NOLDO
PP3V42_G3H @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_SMC_CLK @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_SMCVREF @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_SMC @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_SMBUS_SMC_BSA @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_SB_RTC @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_REG @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_PWRCTL @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_LIDSWITCH @mlb_noldo_lib.MLB_NOLDO
=PP3V42_G3H_ACIN @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_FAN_RT @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_ISENSECAL @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_LCD @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_TMDS @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_IMVP6 @mlb_noldo_lib.MLB_NOLDO
=PP5V_1V51V05S0_VCC @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_NB_TVDAC @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_LPCPLUS @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_AUDIO_PWR @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_AUDIO @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_MEMVTT @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_FET @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_SATA @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_SB @mlb_noldo_lib.MLB_NOLDO
PP5V_S0 - @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_TMDS @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_SB @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_SATA @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_NB_TVDAC @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_MEMVTT @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_LPCPLUS @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_LCD @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_ISENSECAL @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_IMVP6 @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_FET @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_AUDIO_PWR @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_AUDIO @mlb_noldo_lib.MLB_NOLDO

34C2 64A6

=PP5V_1V51V05S0_VCC @mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_IDE_PATA @mlb_noldo_lib.MLB_NOLDO
PP5V_S0_IDE_PATA @mlb_noldo_lib.MLB_NOLDO
=PPDCIN_G3H
=PPDCIN_G3H @mlb_noldo_lib.MLB_NOLDO
=PPVBATT_G3H @mlb_noldo_lib.MLB_NOLDO
=PPVIN_G3H_P3V42G3H @mlb_noldo_lib.MLB_NOLDO
PPDCIN_G3H @mlb_noldo_lib.MLB_NOLDO
=PPVIN_G3H_P3V42G3H @mlb_noldo_lib.MLB_NOLDO
=PPVBATT_G3H @mlb_noldo_lib.MLB_NOLDO
=SMBUS_ATS_SCL
=SMBUS_ATS_SCL @mlb_noldo_lib.MLB_NOLDO
SMBUS_SMC_RMT_SCL @mlb_noldo_lib.MLB_NOLDO
SMB_RMT_CLK @mlb_noldo_lib.MLB_NOLDO
SMBUS_SMC_RMT_SCL @mlb_noldo_lib.MLB_NOLDO
=SMBUS_ATS_SDA
=SMBUS_ATS_SDA @mlb_noldo_lib.MLB_NOLDO
SMBUS_SMC_RMT_SDA @mlb_noldo_lib.MLB_NOLDO
SMB_RMT_DATA @mlb_noldo_lib.MLB_NOLDO
SMBUS_SMC_RMT_SDA @mlb_noldo_lib.MLB_NOLDO
=SMB_AIRPORT_CLK
=SMB_AIRPORT_CLK @mlb_noldo_lib.MLB_NOLDO
=SMB_GEYSER_CLK @mlb_noldo_lib.MLB_NOLDO
SMBUS_SB_SCL @mlb_noldo_lib.MLB_NOLDO
=I2C_SODIMMB_SCL @mlb_noldo_lib.MLB_NOLDO
SMB_CLK - @mlb_noldo_lib.MLB_NOLDO
=I2C_SODIMMA_SCL @mlb_noldo_lib.MLB_NOLDO
SMB_CK410_CLK @mlb_noldo_lib.MLB_NOLDO
SMB_CLK - @mlb_noldo_lib.MLB_NOLDO
SMB_CK410_CLK @mlb_noldo_lib.MLB_NOLDO
SMBUS_SB_SCL @mlb_noldo_lib.MLB_NOLDO
=SMB_GEYSER_CLK @mlb_noldo_lib.MLB_NOLDO
=I2C_SODIMMB_SCL @mlb_noldo_lib.MLB_NOLDO
=I2C_SODIMMA_SCL @mlb_noldo_lib.MLB_NOLDO
=SMB_AIRPORT_DATA
=SMB_AIRPORT_DATA @mlb_noldo_lib.MLB_NOLDO
=SMB_GEYSER_DATA @mlb_noldo_lib.MLB_NOLDO
SMBUS_SB_SDA @mlb_noldo_lib.MLB_NOLDO
=I2C_SODIMMB_SDA @mlb_noldo_lib.MLB_NOLDO
SMB_DATA - @mlb_noldo_lib.MLB_NOLDO
=I2C_SODIMMA_SDA @mlb_noldo_lib.MLB_NOLDO
SMB_CK410_DATA @mlb_noldo_lib.MLB_NOLDO
SMB_DATA - @mlb_noldo_lib.MLB_NOLDO
SMB_CK410_DATA @mlb_noldo_lib.MLB_NOLDO
SMBUS_SB_SDA @mlb_noldo_lib.MLB_NOLDO
=SMB_GEYSER_DATA @mlb_noldo_lib.MLB_NOLDO
=I2C_SODIMMB_SDA @mlb_noldo_lib.MLB_NOLDO
=I2C_SODIMMA_SDA @mlb_noldo_lib.MLB_NOLDO
=USB2_AIRPORT_N
=USB2_AIRPORT_N @mlb_noldo_lib.MLB_NOLDO
USB_H_N - @mlb_noldo_lib.MLB_NOLDO
USB2_AIRPORT_N @mlb_noldo_lib.MLB_NOLDO
=USB2_AIRPORT_P
=USB2_AIRPORT_P @mlb_noldo_lib.MLB_NOLDO
USB_H_P - @mlb_noldo_lib.MLB_NOLDO
USB2_AIRPORT_P @mlb_noldo_lib.MLB_NOLDO
=USB2_CAMERA_N
=USB2_CAMERA_N @mlb_noldo_lib.MLB_NOLDO
USB_D_N - @mlb_noldo_lib.MLB_NOLDO
USB2_CAMERA_N @mlb_noldo_lib.MLB_NOLDO
=USB2_CAMERA_P
=USB2_CAMERA_P @mlb_noldo_lib.MLB_NOLDO
USB_D_P - @mlb_noldo_lib.MLB_NOLDO
USB2_CAMERA_P @mlb_noldo_lib.MLB_NOLDO
ACIN_1V20_REF
ACIN_1V20_REF @mlb_noldo_lib.MLB_NOLDO
ACIN_DIV
ACIN_DIV - @mlb_noldo_lib.MLB_NOLDO
ACIN_ENABLE_GATE
ACIN_ENABLE_GATE @mlb_noldo_lib.MLB_NOLDO
ACIN_ENABLE_L
ACIN_ENABLE_L @mlb_noldo_lib.MLB_NOLDO
ACIN_ENABLE_L_DIV
ACIN_ENABLE_L_DIV @mlb_noldo_lib.MLB_NOLDO
ACZ_BITCLK
ACZ_BITCLK @mlb_noldo_lib.MLB_NOLDO
ACZ_RST_L
ACZ_RST_L @mlb_noldo_lib.MLB_NOLDO
ACZ_SDATAIN<0>
ACZ_SDATAIN<0> @mlb_noldo_lib.MLB_NOLDO
ACZ_SDATAOUT
ACZ_SDATAOUT @mlb_noldo_lib.MLB_NOLDO
ACZ_SYNC
ACZ_SYNC - @mlb_noldo_lib.MLB_NOLDO
ADAPTER_SENSE
ADAPTER_SENSE @mlb_noldo_lib.MLB_NOLDO
AIRPORT_CLK100M_PCIE AIRPORT_CLK100M_PCIE_N _N
@mlb_noldo_lib.MLB_NOLDO
=PP5V_S0_IDE_PATA

17C6 19B7 19C7 64B6


14C7 14D6 19C7 20A4 20B4
20B4 64A6
64A6 67B5 67B5 67B7 67C6
58D8 64A6
39C6 64A6
63C3 64B8
36C8 64A6
48C2 64A6
32C7 32D3 32D8 64A6
54A6 54D7 56D8 57B5 64A6
63B1 64A6
43C3 64A6
60C4 64A6
62B1 64A6
5D2 47C6 64D1
46C8 64D1
45D2 45D3 45D3 46D1 46D5
46D8 48C8 64D1
26D6 64D1
64D1 65C4 65C8 66A5
46A8 64D1
64D1 65A8
63D1 64D3
27C3 64D1
63B8 63C8 64D1
5A2 64D1
46A8 64D1
46C8 64D1
45D2 45D3 45D3 46D1 46D5
46D8 48C8 64D1
27C3 64D1
26D6 64D1
63D1 64D3
63B8 63C8 64D1
64D1 65A8
64D1 65C4 65C8 66A5
5D2 51C4 64D3
48A8 64D3
64D3 67D7
64D3 68B7 69C6
58D8 64D3
62A8 64D3
19C4 19C7 64D3
5D2 47C6 64D3
55B8 55B8 55D8 64D3
54A6 55C8 64D3
31C6 64D3
63C3 64D6
35C6 64D3
25D8 64D3
5A2 64D4
64D3 68B7 69C6
25D8 64D3
35C6 64D3
19C4 19C7 64D3
31C6 64D3
5D2 47C6 64D3
64D3 67D7
48A8 64D3
58D8 64D3
63C3 64D6
55B8 55B8 55D8 64D3
54A6 55C8 64D3

5
62A8 64D3

AIRPORT_CLK100M_PCIE AIRPORT_CLK100M_PCIE_P _P
@mlb_noldo_lib.MLB_NOLDO
AIRPORT_RST_L
AIRPORT_RST_L @mlb_noldo_lib.MLB_NOLDO
ALL_SYS_PWRGD
ALL_SYS_PWRGD @mlb_noldo_lib.MLB_NOLDO
ALS_GAIN
ALS_GAIN - @mlb_noldo_lib.MLB_NOLDO
ALS_LEFT
ALS_LEFT - @mlb_noldo_lib.MLB_NOLDO
ALS_RIGHT
ALS_RIGHT @mlb_noldo_lib.MLB_NOLDO
AUDIO_SHIELD_PLANE
AUDIO_SHIELD_PLANE @mlb_noldo_lib.MLB_NOLDO
AUD_4V5_SHDN_L
AUD_4V5_SHDN_L @mlb_noldo_lib.MLB_NOLDO
AUD_ALC_COUT
AUD_ALC_COUT @mlb_noldo_lib.MLB_NOLDO
AUD_ANALOG_FILT_1
AUD_ANALOG_FILT_1 @mlb_noldo_lib.MLB_NOLDO
AUD_ANALOG_FILT_2
AUD_ANALOG_FILT_2 @mlb_noldo_lib.MLB_NOLDO
AUD_BI_PORT_A_L
AUD_BI_PORT_A_L @mlb_noldo_lib.MLB_NOLDO
AUD_BI_PORT_A_R
AUD_BI_PORT_A_R @mlb_noldo_lib.MLB_NOLDO
AUD_BI_PORT_B_L
AUD_BI_PORT_B_L @mlb_noldo_lib.MLB_NOLDO
AUD_BI_PORT_B_R @mlb_noldo_lib.MLB_NOLDO
AUD_BI_PORT_C_L
AUD_BI_PORT_C_L @mlb_noldo_lib.MLB_NOLDO
AUD_BI_PORT_C_R
AUD_BI_PORT_C_R @mlb_noldo_lib.MLB_NOLDO
AUD_BI_PORT_D_L
AUD_BI_PORT_D_L @mlb_noldo_lib.MLB_NOLDO
AUD_BI_PORT_D_R
AUD_BI_PORT_D_R @mlb_noldo_lib.MLB_NOLDO
AUD_BI_PORT_E_L
AUD_BI_PORT_E_L @mlb_noldo_lib.MLB_NOLDO
AUD_BI_PORT_E_R
AUD_BI_PORT_E_R @mlb_noldo_lib.MLB_NOLDO
AUD_BI_PORT_F_L
AUD_BI_PORT_F_L @mlb_noldo_lib.MLB_NOLDO
AUD_BI_PORT_F_R
AUD_BI_PORT_F_R @mlb_noldo_lib.MLB_NOLDO
AUD_BYPASS
AUD_BYPASS @mlb_noldo_lib.MLB_NOLDO
AUD_CONNJ1_RING
AUD_CONNJ1_RING @mlb_noldo_lib.MLB_NOLDO
AUD_CONNJ1_RING_F
AUD_CONNJ1_RING_F @mlb_noldo_lib.MLB_NOLDO
AUD_CONNJ1_SLEEVE
AUD_CONNJ1_SLEEVE @mlb_noldo_lib.MLB_NOLDO
AUD_CONNJ1_SLEEVEDET AUD_CONNJ1_SLEEVEDET @mlb_noldo_lib.MLB_NOLDO
AUD_CONNJ1_SLEEVEDET AUD_CONNJ1_SLEEVEDET_F _F
@mlb_noldo_lib.MLB_NOLDO
AUD_CONNJ1_SLEEVE_F AUD_CONNJ1_SLEEVE_F @mlb_noldo_lib.MLB_NOLDO
AUD_CONNJ1_TIP
AUD_CONNJ1_TIP @mlb_noldo_lib.MLB_NOLDO
AUD_CONNJ1_TIPDET
AUD_CONNJ1_TIPDET @mlb_noldo_lib.MLB_NOLDO
AUD_CONNJ1_TIPDET_F AUD_CONNJ1_TIPDET_F @mlb_noldo_lib.MLB_NOLDO
AUD_CONNJ1_TIP_F
AUD_CONNJ1_TIP_F @mlb_noldo_lib.MLB_NOLDO
AUD_CONNJ2_RING
AUD_CONNJ2_RING @mlb_noldo_lib.MLB_NOLDO
AUD_CONNJ2_RING_F
AUD_CONNJ2_RING_F @mlb_noldo_lib.MLB_NOLDO
AUD_CONNJ2_SLEEVE
AUD_CONNJ2_SLEEVE @mlb_noldo_lib.MLB_NOLDO
AUD_CONNJ2_SLEEVEDET AUD_CONNJ2_SLEEVEDET @mlb_noldo_lib.MLB_NOLDO
AUD_CONNJ2_SLEEVEDET AUD_CONNJ2_SLEEVEDET_F _F
@mlb_noldo_lib.MLB_NOLDO
AUD_CONNJ2_SLEEVE_F AUD_CONNJ2_SLEEVE_F @mlb_noldo_lib.MLB_NOLDO
AUD_CONNJ2_TIP
AUD_CONNJ2_TIP @mlb_noldo_lib.MLB_NOLDO
AUD_CONNJ2_TIPDET
AUD_CONNJ2_TIPDET @mlb_noldo_lib.MLB_NOLDO
AUD_CONNJ2_TIPDET_F AUD_CONNJ2_TIPDET_F @mlb_noldo_lib.MLB_NOLDO
AUD_CONNJ2_TIP_F
AUD_CONNJ2_TIP_F @mlb_noldo_lib.MLB_NOLDO
AUD_GPIO_0
AUD_GPIO_0 @mlb_noldo_lib.MLB_NOLDO
AUD_GPIO_0_R
AUD_GPIO_0_R @mlb_noldo_lib.MLB_NOLDO
AUD_GPIO_1
AUD_GPIO_1 @mlb_noldo_lib.MLB_NOLDO
AUD_GPIO_1_R
AUD_GPIO_1_R @mlb_noldo_lib.MLB_NOLDO
AUD_GPIO_2
AUD_GPIO_2 @mlb_noldo_lib.MLB_NOLDO
AUD_INJACK_INSERT_L AUD_INJACK_INSERT_L @mlb_noldo_lib.MLB_NOLDO
AUD_J1_COM
AUD_J1_COM @mlb_noldo_lib.MLB_NOLDO
AUD_J1_DET_RC
AUD_J1_DET_RC @mlb_noldo_lib.MLB_NOLDO
AUD_J1_SLEEVEDET_INV AUD_J1_SLEEVEDET_INV @mlb_noldo_lib.MLB_NOLDO
AUD_J1_SLEEVEDET_R
AUD_J1_SLEEVEDET_R @mlb_noldo_lib.MLB_NOLDO
AUD_J1_TIPDET_R
AUD_J1_TIPDET_R @mlb_noldo_lib.MLB_NOLDO
AUD_J2_COM
AUD_J2_COM @mlb_noldo_lib.MLB_NOLDO
AUD_J2_DET_RC
AUD_J2_DET_RC @mlb_noldo_lib.MLB_NOLDO
AUD_J2_OPT_OUT
AUD_J2_OPT_OUT @mlb_noldo_lib.MLB_NOLDO
AUD_J2_SLEEVEDET_R
AUD_J2_SLEEVEDET_R @mlb_noldo_lib.MLB_NOLDO
AUD_J2_TIPDET_R
AUD_J2_TIPDET_R @mlb_noldo_lib.MLB_NOLDO
AUD_JDREF
AUD_JDREF @mlb_noldo_lib.MLB_NOLDO
AUD_OUTJACK_INSERT_L AUD_OUTJACK_INSERT_L @mlb_noldo_lib.MLB_NOLDO
AUD_PORTA_DET_L
AUD_PORTA_DET_L @mlb_noldo_lib.MLB_NOLDO

34C5
34D3
64B3 65D3
64B3 66B2
63D3 64B1
64B1
63D3 64B1
64B3 66B2
27D1 67A2
27D2
27D3 45B5
27D2
27C1 67A2
27D2
27D3 45B5
27D2
27C6 43B4
27B6 40C4
27D7
27C6 29A6
23D5 27D8
27D6 28A6
27D6 32B6
23D5 27D8
27D6 32B6
27D7
27B6 40C4
27C6 29A6
27D6 28A6
27C6 43B4
27B6 40C4
27D7
27C6 29A6
23D5 27D8
27C6 28A6
27D6 32B6
23D5 27D8
27D6 32B6
27D7
27B6 40C4
27C6 29A6
27C6 28A6
6B2 43B4
6B1 22C2
6B2
6B2 43B4
6B1 22C2
6B2
6C2 67A4
6C1 22C2
6C2
6C2 67B4
6C1 22C2
6C2
65C4
65C4
5C1 65C3
65C2
65C1
5C1 21C7 54D7
5C1 21C7 54C7 57C3
5D1 21C7 54D7
5D1 21C7 54D7
5C1 21C7 54D7
65C7
33B2 33C4 43C6

33B2 33D4 43C6

AUD_PORTA_L

56C3 57D1

26B1 43C4

AUD_PORTA_L_R

57B1 57D3

5B2 26A5 45D8 63B1


45B5 46C6
5A7 45A8 46C3
45A8 46C3
56C3
54A5
54B5
54C4
54C4
54C1 57C3
54C1 57B3
54C1 57A6
54C1 57A6
54C7 55B8
54C7 55C8
54C7 57A5
54C7 55A8
54C1 57A5
54C1 57A5
54C1 57B3
54C1 57A3
54C4
56C7
56C6
56D7
56C7
56C6
56D5
56C7
56D7
56D6
56C6
56B7
56B6
56B7
56A7
56A6
56B6
56B7
56B7
56B6
56B6
54B8 55A8
54B7 54C7
54B8 57C3
54A7 54C7
54C7
57C7
56C4
57D7
57C7
56C3 57C6 57C8
56C3 57D8
56B4
57B7
56B7
56A4 57B8
56A4 57B8
54C4
57D7
57D5

AUD_PORTA_L @mlb_noldo_lib.MLB_NOLDO
AUD_PORTA_L_R @mlb_noldo_lib.MLB_NOLDO
AUD_PORTA_R
AUD_PORTA_R @mlb_noldo_lib.MLB_NOLDO
AUD_PORTA_R_R
AUD_PORTA_R_R @mlb_noldo_lib.MLB_NOLDO
AUD_PORTE_DET_L
AUD_PORTE_DET_L @mlb_noldo_lib.MLB_NOLDO
AUD_PORTF_L
AUD_PORTF_L @mlb_noldo_lib.MLB_NOLDO
AUD_PORTF_L_R
AUD_PORTF_L_R @mlb_noldo_lib.MLB_NOLDO
AUD_PORTF_R
AUD_PORTF_R @mlb_noldo_lib.MLB_NOLDO
AUD_PORTF_R_R
AUD_PORTF_R_R @mlb_noldo_lib.MLB_NOLDO
AUD_PORTG_DET_L
AUD_PORTG_DET_L @mlb_noldo_lib.MLB_NOLDO
AUD_SENSE_A
AUD_SENSE_A @mlb_noldo_lib.MLB_NOLDO
AUD_SENSE_B
AUD_SENSE_B @mlb_noldo_lib.MLB_NOLDO
AUD_SPDIF_IN
AUD_SPDIF_IN @mlb_noldo_lib.MLB_NOLDO
AUD_SPDIF_OUT
AUD_SPDIF_OUT @mlb_noldo_lib.MLB_NOLDO
AUD_SPDIF_OUT_R
AUD_SPDIF_OUT_R @mlb_noldo_lib.MLB_NOLDO
AUD_SPKRAMP_INL
AUD_SPKRAMP_INL @mlb_noldo_lib.MLB_NOLDO
AUD_SPKRAMP_INL_L
AUD_SPKRAMP_INL_L @mlb_noldo_lib.MLB_NOLDO
AUD_SPKRAMP_INR
AUD_SPKRAMP_INR @mlb_noldo_lib.MLB_NOLDO
AUD_SPKRAMP_INR_L
AUD_SPKRAMP_INR_L @mlb_noldo_lib.MLB_NOLDO
AUD_SPKRAMP_INSUB
AUD_SPKRAMP_INSUB @mlb_noldo_lib.MLB_NOLDO
AUD_SPKRAMP_INSUB_L AUD_SPKRAMP_INSUB_L @mlb_noldo_lib.MLB_NOLDO
AUD_SPKRAMP_SHUTDOWN AUD_SPKRAMP_SHUTDOWN_L _L
@mlb_noldo_lib.MLB_NOLDO
AUD_VREF_FILT
AUD_VREF_FILT @mlb_noldo_lib.MLB_NOLDO
AUD_VREF_PORT_B
AUD_VREF_PORT_B @mlb_noldo_lib.MLB_NOLDO
BAL_IN_COM
BAL_IN_COM @mlb_noldo_lib.MLB_NOLDO
BAL_IN_L
BAL_IN_L - @mlb_noldo_lib.MLB_NOLDO
BAL_IN_R
BAL_IN_R - @mlb_noldo_lib.MLB_NOLDO
BATT_ENABLE_L
BATT_ENABLE_L @mlb_noldo_lib.MLB_NOLDO
BATT_FET_DRAIN
BATT_FET_DRAIN @mlb_noldo_lib.MLB_NOLDO
BATT_FET_GATE
BATT_FET_GATE @mlb_noldo_lib.MLB_NOLDO
BATT_IN
BATT_IN - @mlb_noldo_lib.MLB_NOLDO
BATT_ISENSE
BATT_ISENSE @mlb_noldo_lib.MLB_NOLDO
BATT_NEG
BATT_NEG - @mlb_noldo_lib.MLB_NOLDO
BATT_POS
BATT_POS - @mlb_noldo_lib.MLB_NOLDO
BATT_POS_F
BATT_POS_F @mlb_noldo_lib.MLB_NOLDO
BATT_RC
BATT_RC - @mlb_noldo_lib.MLB_NOLDO
BEEP
BEEP - @mlb_noldo_lib.MLB_NOLDO
BIOS_REC
BIOS_REC - @mlb_noldo_lib.MLB_NOLDO
BKLIGHT_CTL
BKLIGHT_CTL @mlb_noldo_lib.MLB_NOLDO
BOOT_LPC_SPI_L
BOOT_LPC_SPI_L @mlb_noldo_lib.MLB_NOLDO
BYPASS_R_DRV
BYPASS_R_DRV @mlb_noldo_lib.MLB_NOLDO
BYPASS_R_GATE
BYPASS_R_GATE @mlb_noldo_lib.MLB_NOLDO
CHASSIS_AUDIO_JACK_I CHASSIS_AUDIO_JACK_ISOL SOL
@mlb_noldo_lib.MLB_NOLDO
CHGR_ACLIM
CHGR_ACLIM @mlb_noldo_lib.MLB_NOLDO
CHGR_ACPRN
CHGR_ACPRN @mlb_noldo_lib.MLB_NOLDO
CHGR_ACSET
CHGR_ACSET @mlb_noldo_lib.MLB_NOLDO
CHGR_ACSET_RC
CHGR_ACSET_RC @mlb_noldo_lib.MLB_NOLDO
CHGR_BGATE
CHGR_BGATE @mlb_noldo_lib.MLB_NOLDO
CHGR_BOOT
CHGR_BOOT @mlb_noldo_lib.MLB_NOLDO
CHGR_BOOT_RC
CHGR_BOOT_RC @mlb_noldo_lib.MLB_NOLDO
CHGR_CHLIM
CHGR_CHLIM @mlb_noldo_lib.MLB_NOLDO
CHGR_CSIN
CHGR_CSIN @mlb_noldo_lib.MLB_NOLDO
CHGR_CSON
CHGR_CSON @mlb_noldo_lib.MLB_NOLDO
CHGR_CSOP
CHGR_CSOP @mlb_noldo_lib.MLB_NOLDO
CHGR_DCIN
CHGR_DCIN @mlb_noldo_lib.MLB_NOLDO
CHGR_DCPRN
CHGR_DCPRN @mlb_noldo_lib.MLB_NOLDO
CHGR_DCSET
CHGR_DCSET @mlb_noldo_lib.MLB_NOLDO
CHGR_EN
CHGR_EN - @mlb_noldo_lib.MLB_NOLDO
CHGR_EN_L
CHGR_EN_L @mlb_noldo_lib.MLB_NOLDO
CHGR_ICM
CHGR_ICM - @mlb_noldo_lib.MLB_NOLDO
CHGR_ICM_R
CHGR_ICM_R @mlb_noldo_lib.MLB_NOLDO
CHGR_ICOMP
CHGR_ICOMP @mlb_noldo_lib.MLB_NOLDO
CHGR_ICOMP_RC
CHGR_ICOMP_RC @mlb_noldo_lib.MLB_NOLDO
CHGR_LGATE
CHGR_LGATE @mlb_noldo_lib.MLB_NOLDO
CHGR_PHASE
CHGR_PHASE @mlb_noldo_lib.MLB_NOLDO
CHGR_PHASE_RC
CHGR_PHASE_RC @mlb_noldo_lib.MLB_NOLDO
CHGR_SGATE
CHGR_SGATE @mlb_noldo_lib.MLB_NOLDO

56C3 57C1
57B1 57C3
57D5
56B4 57B1
57B2

56B4 57A1
57A2
57C5
54C1 57C5 57D8
54C1 57C4 57C8 57D8
54C1 56B3
54D1 56D3
54D4
55B6
55B7
55C6
55C7
55A6
55A7
55A6 55B8 55C8
54C4

54C1 57A6
54C7 57A3
54C7 57A3
54C7 57A3
66A4
66A5
66A4
5D1
66B2
5D1 65A6
5D1 65A6
65A2 66B2
66A5
54C6
23A6 23C5
67C4
5C2 22B3 45C8 47C6
66A3
66A3
56A3 56A8 56B1 56B6 56B6
56C1 56C1 56C8
66C6

66B6
66C6
66C8
66C5
66C5
66C4
66B6
66C5
66C6
66C6
66C5
66B5
66B5
66B5
66A6
66C6
66C6

66C6
66C7
66C5
66C5
66B4
66C5
100

8
CHGR_UGATE
CHGR_VADJ
CHGR_VCOMP
CHGR_VCOMP_CC
CHGR_VCOMP_RC
CHGR_VDD
CHGR_VDDP
CHGR_VREF

CK410_CLK14P3M_TIMER
CK410_CPU0_N
CK410_CPU0_P
CK410_CPU1_N
CK410_CPU1_P
CK410_CPU2_ITP_SRC10
_N
CK410_CPU2_ITP_SRC10
_P
CK410_DOT96_27M_N
CK410_DOT96_27M_P
CK410_FSB_TEST_MODE
CK410_IREF
CK410_LVDS_N
CK410_LVDS_P
CK410_PCI1_CLK
CK410_PCI2_CLK
CK410_PCI3_CLK

CK410_PCI4_CLK
CK410_PCI4_CLK_SPN
CK410_PCI5_FCTSEL1
CK410_PCIF0_CLK
CK410_PCIF1_CLK
CK410_PD_VTT_PWRGD_L

CK410_REF1_FCTSEL0
CK410_SRC1_N

CK410_SRC1_P

CK410_SRC2_N
CK410_SRC2_P
CK410_SRC3_N

CK410_SRC3_P

CK410_SRC4_N
CK410_SRC4_P
CK410_SRC5_N
CK410_SRC5_P
CK410_SRC6_N
CK410_SRC6_P
CK410_SRC7_N

CK410_SRC7_P

CK410_SRC8_N
CK410_SRC8_P
CK410_SRC_CLKREQ1_L

A
CK410_SRC_CLKREQ3_L

CK410_SRC_CLKREQ6_L
CK410_SRC_CLKREQ8_L
CK410_USB48_FSA
CK410_XTAL_IN
CK410_XTAL_OUT

7
CHGR_UGATE @mlb_noldo_lib.MLB_NOLDO
CHGR_VADJ @mlb_noldo_lib.MLB_NOLDO
CHGR_VCOMP @mlb_noldo_lib.MLB_NOLDO
CHGR_VCOMP_CC @mlb_noldo_lib.MLB_NOLDO
CHGR_VCOMP_RC @mlb_noldo_lib.MLB_NOLDO
CHGR_VDD - @mlb_noldo_lib.MLB_NOLDO
CHGR_VDDP @mlb_noldo_lib.MLB_NOLDO
CHGR_VREF @mlb_noldo_lib.MLB_NOLDO
CK410_CLK14P3M_TIMER @mlb_noldo_lib.MLB_NOLDO
CK410_CPU0_N @mlb_noldo_lib.MLB_NOLDO
CK410_CPU0_P @mlb_noldo_lib.MLB_NOLDO
CK410_CPU1_N @mlb_noldo_lib.MLB_NOLDO
CK410_CPU1_P @mlb_noldo_lib.MLB_NOLDO
CK410_CPU2_ITP_SRC10_N @mlb_noldo_lib.MLB_NOLDO
CK410_CPU2_ITP_SRC10_P @mlb_noldo_lib.MLB_NOLDO
CK410_DOT96_27M_N @mlb_noldo_lib.MLB_NOLDO
CK410_DOT96_27M_P @mlb_noldo_lib.MLB_NOLDO
CK410_FSB_TEST_MODE @mlb_noldo_lib.MLB_NOLDO
CK410_IREF @mlb_noldo_lib.MLB_NOLDO
CK410_LVDS_N @mlb_noldo_lib.MLB_NOLDO
CK410_LVDS_P @mlb_noldo_lib.MLB_NOLDO
CK410_PCI1_CLK @mlb_noldo_lib.MLB_NOLDO
CK410_PCI2_CLK @mlb_noldo_lib.MLB_NOLDO
CK410_PCI3_CLK @mlb_noldo_lib.MLB_NOLDO
CK410_PCI4_CLK @mlb_noldo_lib.MLB_NOLDO
CK410_PCI4_CLK_SPN @mlb_noldo_lib.MLB_NOLDO
CK410_PCI5_FCTSEL1 @mlb_noldo_lib.MLB_NOLDO
CK410_PCIF0_CLK @mlb_noldo_lib.MLB_NOLDO
CK410_PCIF1_CLK @mlb_noldo_lib.MLB_NOLDO
CK410_PD_VTT_PWRGD_L @mlb_noldo_lib.MLB_NOLDO
VR_PWRGD_CK410_L @mlb_noldo_lib.MLB_NOLDO
CK410_REF1_FCTSEL0 @mlb_noldo_lib.MLB_NOLDO
CK410_SRC1_N @mlb_noldo_lib.MLB_NOLDO
CK410_SRC1_N_SPN @mlb_noldo_lib.MLB_NOLDO
CK410_SRC1_P @mlb_noldo_lib.MLB_NOLDO
CK410_SRC1_P_SPN @mlb_noldo_lib.MLB_NOLDO
CK410_SRC2_N @mlb_noldo_lib.MLB_NOLDO
CK410_SRC2_P @mlb_noldo_lib.MLB_NOLDO
CK410_SRC3_N @mlb_noldo_lib.MLB_NOLDO
CK410_SRC3_N_SPN @mlb_noldo_lib.MLB_NOLDO
CK410_SRC3_P @mlb_noldo_lib.MLB_NOLDO
CK410_SRC3_P_SPN @mlb_noldo_lib.MLB_NOLDO
CK410_SRC4_N @mlb_noldo_lib.MLB_NOLDO
CK410_SRC4_P @mlb_noldo_lib.MLB_NOLDO
CK410_SRC5_N @mlb_noldo_lib.MLB_NOLDO
CK410_SRC5_P @mlb_noldo_lib.MLB_NOLDO
CK410_SRC6_N @mlb_noldo_lib.MLB_NOLDO
CK410_SRC6_P @mlb_noldo_lib.MLB_NOLDO
CK410_SRC7_N @mlb_noldo_lib.MLB_NOLDO
CK410_SRC7_N_SPN @mlb_noldo_lib.MLB_NOLDO
CK410_SRC7_P @mlb_noldo_lib.MLB_NOLDO
CK410_SRC7_P_SPN @mlb_noldo_lib.MLB_NOLDO
CK410_SRC8_N @mlb_noldo_lib.MLB_NOLDO
CK410_SRC8_P @mlb_noldo_lib.MLB_NOLDO
CK410_SRC_CLKREQ1_L @mlb_noldo_lib.MLB_NOLDO
CK410_SRC_CLKREQ1_L_SPN @mlb_noldo_lib.MLB_NOLDO
CK410_SRC_CLKREQ3_L @mlb_noldo_lib.MLB_NOLDO
CK410_SRC_CLKREQ3_L_SPN @mlb_noldo_lib.MLB_NOLDO
CK410_SRC_CLKREQ6_L @mlb_noldo_lib.MLB_NOLDO
CK410_SRC_CLKREQ8_L @mlb_noldo_lib.MLB_NOLDO
CK410_USB48_FSA @mlb_noldo_lib.MLB_NOLDO
CK410_XTAL_IN @mlb_noldo_lib.MLB_NOLDO
CK410_XTAL_OUT -

66C5
CLK_NB_OE_L
66B6 66C6
CONN_GEYSER_ONOFF_FL
TR_L
CONN_GEYSER_USB_N

66C6
66C7

CONN_GEYSER_USB_P
66C7
CPUVCORE_ISENSE_CAL
66B6 66D6
66C5

CPU_A20M_L

66B6

CPU_BSEL<0>

32A4 33B8

CPU_BSEL<1>

5C7 32C4 33D5

CPU_BSEL<2>

5C7 32C4 33D5

CPU_BSEL_R<0>

5C7 32C4 33D5

CPU_BSEL_R<1>

5C7 32C4 33D5

CPU_BSEL_R<2>

5C7 32C4 33D5

CPU_COMP<0>

5C7 32C4 33D5


5C7 32A4 33B5
5C7 32A4 33B5
32C6 33B8

CPU_COMP<1>
CPU_COMP<2>
CPU_COMP<3>
CPU_DPRSTP_L

32B6

CPU_DPSLP_L

5C7 32B4 33A5


5C7 32B4 33A5
32B6 33D8

CPU_FERR_L
CPU_GTLREF
CPU_IGNNE_L

32B6 33D8

CPU_INIT_L

32B6 33D8

CPU_INTR
CPU_ISENSE_OUT_R

32B6
CPU_ISENSE_R_N
5C7
CPU_ISENSE_R_P
32B6 33A8
CPU_NMI
CPU_PROCHOT_L

32B7 33D8
5C7 32B6 33D8
26A8 32A4

CPU_PSI_L
CPU_PWRGD

26A7 58C7

CPU_RCIN_L

32A4 33A8

CPU_SMI_L

6B4 32B4

CPU_STPCLK_L

5C7 6B3

CPU_TEST1

6B4 32B4

CPU_TEST2

5C7 6B3
5C7 32B4 33C5
5C7 32B4 33C5
6B4 32B4

CPU_THERMAL_SCREW_DO
WN
CPU_THERMAL_SCREW_RI
GHT
CPU_THERMAL_SCREW_UP
CPU_THERMD_N

5C7 6B3

CPU_THERMD_P

6B4 32B4

CPU_THERMTRIP_R

5C7 6B3

CPU_VCCSENSE_N

5C7 32B4 33B5

CPU_VCCSENSE_P

5C7 32B4 33B5


5C7 32B4 33C5
5C7 32B4 33C5
5C7 32B4 33C5
5C7 32B4 33D5
6B4 32B4

CPU_VID<0>
CPU_VID<1>
CPU_VID<2>
CPU_VID<3>
CPU_VID<4>
CPU_VID<5>

5C7 6B3

CPU_VID<6>

6B4 32B4

CPU_VID_R<0>

5C7 6B3

CPU_VID_R<0..6>

5B7 32A4 33C5


5B7 32A4 33C5
6B4 32B4

CPU_VID_R<1>
CPU_VID_R<2>
CPU_VID_R<3>

5B7 6B3

CPU_VID_R<4>

6B4 32B4

CPU_VID_R<5>

5B7 6B3

CPU_VID_R<6>

32B4 43C6

CPU_XDP_CLK_N

5B7 32A4 33A5


32A4 33C8

CPU_XDP_CLK_P
CRB_SV_DET

32C6

CRT_BLUE
CRT_DDC_CLK

32C6

@mlb_noldo_lib.MLB_NOLDO
CLK_NB_OE_L @mlb_noldo_lib.MLB_NOLDO
CONN_GEYSER_ONOFF_FLTR_L @mlb_noldo_lib.MLB_NOLDO
CONN_GEYSER_USB_N @mlb_noldo_lib.MLB_NOLDO
CONN_GEYSER_USB_P @mlb_noldo_lib.MLB_NOLDO
CPUVCORE_ISENSE_CAL @mlb_noldo_lib.MLB_NOLDO
CPU_A20M_L @mlb_noldo_lib.MLB_NOLDO
CPU_BSEL<0> @mlb_noldo_lib.MLB_NOLDO
CPU_BSEL<1> @mlb_noldo_lib.MLB_NOLDO
CPU_BSEL<2> @mlb_noldo_lib.MLB_NOLDO
CPU_BSEL_R<0> @mlb_noldo_lib.MLB_NOLDO
CPU_BSEL_R<1> @mlb_noldo_lib.MLB_NOLDO
CPU_BSEL_R<2> @mlb_noldo_lib.MLB_NOLDO
CPU_COMP<0> @mlb_noldo_lib.MLB_NOLDO
CPU_COMP<1> @mlb_noldo_lib.MLB_NOLDO
CPU_COMP<2> @mlb_noldo_lib.MLB_NOLDO
CPU_COMP<3> @mlb_noldo_lib.MLB_NOLDO
CPU_DPRSTP_L @mlb_noldo_lib.MLB_NOLDO
CPU_DPSLP_L @mlb_noldo_lib.MLB_NOLDO
CPU_FERR_L @mlb_noldo_lib.MLB_NOLDO
CPU_GTLREF @mlb_noldo_lib.MLB_NOLDO
CPU_IGNNE_L @mlb_noldo_lib.MLB_NOLDO
CPU_INIT_L @mlb_noldo_lib.MLB_NOLDO
CPU_INTR - @mlb_noldo_lib.MLB_NOLDO
CPU_ISENSE_OUT_R @mlb_noldo_lib.MLB_NOLDO
CPU_ISENSE_R_N @mlb_noldo_lib.MLB_NOLDO
CPU_ISENSE_R_P @mlb_noldo_lib.MLB_NOLDO
CPU_NMI - @mlb_noldo_lib.MLB_NOLDO
CPU_PROCHOT_L @mlb_noldo_lib.MLB_NOLDO
CPU_PSI_L @mlb_noldo_lib.MLB_NOLDO
CPU_PWRGD @mlb_noldo_lib.MLB_NOLDO
CPU_RCIN_L @mlb_noldo_lib.MLB_NOLDO
CPU_SMI_L @mlb_noldo_lib.MLB_NOLDO
CPU_STPCLK_L @mlb_noldo_lib.MLB_NOLDO
CPU_TEST1 @mlb_noldo_lib.MLB_NOLDO
CPU_TEST2 @mlb_noldo_lib.MLB_NOLDO
CPU_THERMAL_SCREW_DOWN @mlb_noldo_lib.MLB_NOLDO
CPU_THERMAL_SCREW_RIGHT @mlb_noldo_lib.MLB_NOLDO
CPU_THERMAL_SCREW_UP @mlb_noldo_lib.MLB_NOLDO
CPU_THERMD_N @mlb_noldo_lib.MLB_NOLDO
CPU_THERMD_P @mlb_noldo_lib.MLB_NOLDO
CPU_THERMTRIP_R @mlb_noldo_lib.MLB_NOLDO
CPU_VCCSENSE_N @mlb_noldo_lib.MLB_NOLDO
CPU_VCCSENSE_P @mlb_noldo_lib.MLB_NOLDO
CPU_VID<0> @mlb_noldo_lib.MLB_NOLDO
CPU_VID<1> @mlb_noldo_lib.MLB_NOLDO
CPU_VID<2> @mlb_noldo_lib.MLB_NOLDO
CPU_VID<3> @mlb_noldo_lib.MLB_NOLDO
CPU_VID<4> @mlb_noldo_lib.MLB_NOLDO
CPU_VID<5> @mlb_noldo_lib.MLB_NOLDO
CPU_VID<6> @mlb_noldo_lib.MLB_NOLDO
CPU_VID_R<0> @mlb_noldo_lib.MLB_NOLDO
CPU_VID_R<0..6> @mlb_noldo_lib.MLB_NOLDO
CPU_VID_R<1> @mlb_noldo_lib.MLB_NOLDO
CPU_VID_R<2> @mlb_noldo_lib.MLB_NOLDO
CPU_VID_R<3> @mlb_noldo_lib.MLB_NOLDO
CPU_VID_R<4> @mlb_noldo_lib.MLB_NOLDO
CPU_VID_R<5> @mlb_noldo_lib.MLB_NOLDO
CPU_VID_R<6> @mlb_noldo_lib.MLB_NOLDO
CPU_XDP_CLK_N @mlb_noldo_lib.MLB_NOLDO
CPU_XDP_CLK_P @mlb_noldo_lib.MLB_NOLDO
CRB_SV_DET @mlb_noldo_lib.MLB_NOLDO
CRT_BLUE - @mlb_noldo_lib.MLB_NOLDO
CRT_DDC_CLK @mlb_noldo_lib.MLB_NOLDO

CRT_DDC_DATA
14B6 32B4
CRT_GREEN
40C6
CRT_HSYNC_LS
40C6
CRT_HSYNC_LS_R
40C6
CRT_HSYNC_R
48A5
CRT_IREF
CRT_RED
CRT_VSYNC_LS

7C8 21C4
7B4 33C6

CRT_VSYNC_LS_R
7B4 33B6
CRT_VSYNC_R
7B4 33B6
DCIN_ISENSE
33C7
DEBUG_RST_L
33B7
DMI_IRCOMP_R
33B7
DMI_N2S_N<0>
7B3
DMI_N2S_N<1>
7B3
DMI_N2S_N<2>
7B3
DMI_N2S_N<3>
7B3
DMI_N2S_P<0>
7B3 21C4 58C7
DMI_N2S_P<1>
7B3 21C4
DMI_N2S_P<2>
7C8 21C2
DMI_N2S_P<3>
7B4
DMI_S2N_N<0>
7C8 21C4
DMI_S2N_N<1>
7D6 21C4
DMI_S2N_N<2>
7C8 21C4
48C3

DMI_S2N_N<3>

48C3

DMI_S2N_P<0>

48C3

DMI_S2N_P<1>

7C8 21C4
7C6 46B5 46C2 58C8

DMI_S2N_P<2>
DMI_S2N_P<3>

7A3 58C7
ENETPWR_EN
7B3 21C4
ENET_BOB_SMITH_CAP
21C4
ENET_CENTER_TAP<0>
7C8 21C4
ENET_CENTER_TAP<1>
7C8 21C4
ENET_CENTER_TAP<2>
7B4
ENET_CENTER_TAP<3>
7B4
ENET_CLK100M_PCIE_N
6A8
ENET_CLK100M_PCIE_P
6A7
ENET_CTRL12
6A7
7C6 10B6
ENET_CTRL25
7C6 10B6
21C2
ENET_LOM_DIS_L
8B6 58A4 58A5
ENET_MDI0
8B6 58A4 58A5
ENET_MDI1
8B7 9C3
ENET_MDI2
8B7 9C3
ENET_MDI3
8B7 9C3
ENET_MDI_N<0>
8B7 9C3
ENET_MDI_N<1>
8B7 9C3
ENET_MDI_N<2>
8B7 9D3
ENET_MDI_N<3>
8B7 9D3
ENET_MDI_P<0>
9C2 58C7
ENET_MDI_P<1>
58A4
ENET_MDI_P<2>
9C2 58C7
ENET_MDI_P<3>
9C2 58C7
ENET_MDI_TRAN_N<0>
9C2 58C7
ENET_MDI_TRAN_N<1>
9C2 58C7
ENET_MDI_TRAN_N<2>
9D2 58C7
ENET_MDI_TRAN_N<3>
9D2 58C7
ENET_MDI_TRAN_P<0>
11B3 33D2 33D3
ENET_MDI_TRAN_P<1>
11B3 33D2 33D3
ENET_MDI_TRAN_P<2>
23B6 23C3
ENET_MDI_TRAN_P<3>
13B5 69B8
13B5 69D7

ENET_PU_VDD_TTL0

CRT_DDC_DATA @mlb_noldo_lib.MLB_NOLDO
CRT_GREEN @mlb_noldo_lib.MLB_NOLDO
CRT_HSYNC_LS @mlb_noldo_lib.MLB_NOLDO
CRT_HSYNC_LS_R @mlb_noldo_lib.MLB_NOLDO
CRT_HSYNC_R @mlb_noldo_lib.MLB_NOLDO
CRT_IREF - @mlb_noldo_lib.MLB_NOLDO
CRT_RED - @mlb_noldo_lib.MLB_NOLDO
CRT_VSYNC_LS @mlb_noldo_lib.MLB_NOLDO
CRT_VSYNC_LS_R @mlb_noldo_lib.MLB_NOLDO
CRT_VSYNC_R @mlb_noldo_lib.MLB_NOLDO
DCIN_ISENSE @mlb_noldo_lib.MLB_NOLDO
DEBUG_RST_L @mlb_noldo_lib.MLB_NOLDO
DMI_IRCOMP_R @mlb_noldo_lib.MLB_NOLDO
DMI_N2S_N<0> @mlb_noldo_lib.MLB_NOLDO
DMI_N2S_N<1> @mlb_noldo_lib.MLB_NOLDO
DMI_N2S_N<2> @mlb_noldo_lib.MLB_NOLDO
DMI_N2S_N<3> @mlb_noldo_lib.MLB_NOLDO
DMI_N2S_P<0> @mlb_noldo_lib.MLB_NOLDO
DMI_N2S_P<1> @mlb_noldo_lib.MLB_NOLDO
DMI_N2S_P<2> @mlb_noldo_lib.MLB_NOLDO
DMI_N2S_P<3> @mlb_noldo_lib.MLB_NOLDO
DMI_S2N_N<0> @mlb_noldo_lib.MLB_NOLDO
DMI_S2N_N<1> @mlb_noldo_lib.MLB_NOLDO
DMI_S2N_N<2> @mlb_noldo_lib.MLB_NOLDO
DMI_S2N_N<3> @mlb_noldo_lib.MLB_NOLDO
DMI_S2N_P<0> @mlb_noldo_lib.MLB_NOLDO
DMI_S2N_P<1> @mlb_noldo_lib.MLB_NOLDO
DMI_S2N_P<2> @mlb_noldo_lib.MLB_NOLDO
DMI_S2N_P<3> @mlb_noldo_lib.MLB_NOLDO
ENETPWR_EN @mlb_noldo_lib.MLB_NOLDO
ENET_BOB_SMITH_CAP @mlb_noldo_lib.MLB_NOLDO
ENET_CENTER_TAP<0> @mlb_noldo_lib.MLB_NOLDO
ENET_CENTER_TAP<1> @mlb_noldo_lib.MLB_NOLDO
ENET_CENTER_TAP<2> @mlb_noldo_lib.MLB_NOLDO
ENET_CENTER_TAP<3> @mlb_noldo_lib.MLB_NOLDO
ENET_CLK100M_PCIE_N @mlb_noldo_lib.MLB_NOLDO
ENET_CLK100M_PCIE_P @mlb_noldo_lib.MLB_NOLDO
ENET_CTRL12 @mlb_noldo_lib.MLB_NOLDO
ENET_CTRL12_SPN @mlb_noldo_lib.MLB_NOLDO
ENET_CTRL25 @mlb_noldo_lib.MLB_NOLDO
ENET_CTRL25_SPN @mlb_noldo_lib.MLB_NOLDO
ENET_LOM_DIS_L @mlb_noldo_lib.MLB_NOLDO
ENET_MDI0 @mlb_noldo_lib.MLB_NOLDO
ENET_MDI1 @mlb_noldo_lib.MLB_NOLDO
ENET_MDI2 @mlb_noldo_lib.MLB_NOLDO
ENET_MDI3 @mlb_noldo_lib.MLB_NOLDO
ENET_MDI_N<0> @mlb_noldo_lib.MLB_NOLDO
ENET_MDI_N<1> @mlb_noldo_lib.MLB_NOLDO
ENET_MDI_N<2> @mlb_noldo_lib.MLB_NOLDO
ENET_MDI_N<3> @mlb_noldo_lib.MLB_NOLDO
ENET_MDI_P<0> @mlb_noldo_lib.MLB_NOLDO
ENET_MDI_P<1> @mlb_noldo_lib.MLB_NOLDO
ENET_MDI_P<2> @mlb_noldo_lib.MLB_NOLDO
ENET_MDI_P<3> @mlb_noldo_lib.MLB_NOLDO
ENET_MDI_TRAN_N<0> @mlb_noldo_lib.MLB_NOLDO
ENET_MDI_TRAN_N<1> @mlb_noldo_lib.MLB_NOLDO
ENET_MDI_TRAN_N<2> @mlb_noldo_lib.MLB_NOLDO
ENET_MDI_TRAN_N<3> @mlb_noldo_lib.MLB_NOLDO
ENET_MDI_TRAN_P<0> @mlb_noldo_lib.MLB_NOLDO
ENET_MDI_TRAN_P<1> @mlb_noldo_lib.MLB_NOLDO
ENET_MDI_TRAN_P<2> @mlb_noldo_lib.MLB_NOLDO
ENET_MDI_TRAN_P<3> @mlb_noldo_lib.MLB_NOLDO
ENET_PU_VDD_TTL0 @mlb_noldo_lib.MLB_NOLDO

13B5 69D7

ENET_PU_VDD_TTL1

13B5 69A8

ENET_RSET

69C2

ENET_RST_L

69C3

ENET_VPD_CLK

13B5 69C3

ENET_VPD_DATA

13B5 69C8
13B5 69A8
69C2

ENET_XTALI

69C3

EXTAUSB_OC_F_L

13B5 69C3

EXTBUSB_OC_F_L

66C3

EXT_COMPVID_B

5C2 26B1 47C6


22C2

EXT_C_R
EXT_Y_G
FAN_RT_PWM

14B4 22D2

FAN_RT_TACH

14B4 22D2

FSB_ADSTB_L<0>

14B4 22D2

FSB_ADSTB_L<1>

14B4 22D2

FSB_ADS_L

14B4 22D2

FSB_A_L<3>

14B4 22D2

FSB_A_L<4>

14B4 22D2

FSB_A_L<5>

14B4 22D2

FSB_A_L<6>

14B4 22D2

FSB_A_L<7>

14B4 22D2

FSB_A_L<8>

14B4 22D2

FSB_A_L<9>

14B4 22D2

FSB_A_L<10>

14B4 22D2

FSB_A_L<11>

14B4 22D2

FSB_A_L<12>

14B4 22D2

FSB_A_L<13>

14B4 22D2

FSB_A_L<14>

60B5 60C5 60D4

FSB_A_L<15>

37A5

FSB_A_L<16>

37C6

FSB_A_L<17>

37B6

FSB_A_L<18>

37B6

FSB_A_L<19>

37B6

FSB_A_L<20>

33C3 33D2 36C6

FSB_A_L<21>

33C3 33D2 36C6

FSB_A_L<22>

6A4 36C8

FSB_A_L<23>

6A3

FSB_A_L<24>

6A4 36C8

FSB_A_L<25>

6A3

FSB_A_L<26>

36D8

FSB_A_L<27>

36B5

FSB_A_L<28>

36B4

FSB_A_L<29>

36B4

FSB_A_L<30>

36B3

FSB_A_L<31>

36C3 37C8

FSB_BNR_L

36C3 37B8

FSB_BPRI_L

36C3 37B8

FSB_BREQ0_L

36C3 37B8

FSB_CLK_CPU_N

36C3 37C8

FSB_CLK_CPU_P

36C3 37B8

FSB_CLK_NB_N

36C3 37B8

FSB_CLK_NB_P

36C3 37B8

FSB_CPURST_L

37C5

FSB_DBSY_L

37B5

FSB_DEFER_L

5A7 37B5

FSB_DINV_L<0>

37B5

FSB_DINV_L<1>

37C5

FSB_DINV_L<2>

37B5

FSB_DINV_L<3>

5A7 37B5

FSB_DPWR_L

5A7 37B5

FSB_DRDY_L

36A6 36C6

FSB_DSTBN_L<0>

ENET_XTALO

ENET_PU_VDD_TTL1 @mlb_noldo_lib.MLB_NOLDO
ENET_RSET @mlb_noldo_lib.MLB_NOLDO
ENET_RST_L @mlb_noldo_lib.MLB_NOLDO
ENET_VPD_CLK @mlb_noldo_lib.MLB_NOLDO
ENET_VPD_DATA @mlb_noldo_lib.MLB_NOLDO
ENET_XTALI @mlb_noldo_lib.MLB_NOLDO
ENET_XTALO @mlb_noldo_lib.MLB_NOLDO
EXTAUSB_OC_F_L @mlb_noldo_lib.MLB_NOLDO
EXTBUSB_OC_F_L @mlb_noldo_lib.MLB_NOLDO
EXT_COMPVID_B @mlb_noldo_lib.MLB_NOLDO
EXT_C_R - @mlb_noldo_lib.MLB_NOLDO
EXT_Y_G - @mlb_noldo_lib.MLB_NOLDO
FAN_RT_PWM @mlb_noldo_lib.MLB_NOLDO
FAN_RT_TACH @mlb_noldo_lib.MLB_NOLDO
FSB_ADSTB_L<0> @mlb_noldo_lib.MLB_NOLDO
FSB_ADSTB_L<1> @mlb_noldo_lib.MLB_NOLDO
FSB_ADS_L @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<3> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<4> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<5> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<6> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<7> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<8> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<9> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<10> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<11> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<12> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<13> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<14> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<15> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<16> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<17> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<18> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<19> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<20> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<21> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<22> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<23> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<24> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<25> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<26> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<27> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<28> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<29> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<30> @mlb_noldo_lib.MLB_NOLDO
FSB_A_L<31> @mlb_noldo_lib.MLB_NOLDO
FSB_BNR_L @mlb_noldo_lib.MLB_NOLDO
FSB_BPRI_L @mlb_noldo_lib.MLB_NOLDO
FSB_BREQ0_L @mlb_noldo_lib.MLB_NOLDO
FSB_CLK_CPU_N @mlb_noldo_lib.MLB_NOLDO
FSB_CLK_CPU_P @mlb_noldo_lib.MLB_NOLDO
FSB_CLK_NB_N @mlb_noldo_lib.MLB_NOLDO
FSB_CLK_NB_P @mlb_noldo_lib.MLB_NOLDO
FSB_CPURST_L @mlb_noldo_lib.MLB_NOLDO
FSB_DBSY_L @mlb_noldo_lib.MLB_NOLDO
FSB_DEFER_L @mlb_noldo_lib.MLB_NOLDO
FSB_DINV_L<0> @mlb_noldo_lib.MLB_NOLDO
FSB_DINV_L<1> @mlb_noldo_lib.MLB_NOLDO
FSB_DINV_L<2> @mlb_noldo_lib.MLB_NOLDO
FSB_DINV_L<3> @mlb_noldo_lib.MLB_NOLDO
FSB_DPWR_L @mlb_noldo_lib.MLB_NOLDO
FSB_DRDY_L @mlb_noldo_lib.MLB_NOLDO
FSB_DSTBN_L<0> @mlb_noldo_lib.MLB_NOLDO

36A6 36B6
36C8
26A1 36C6
36A2 36C6
36A2 36C6
36B6
36B6

42C8
42C8
69B6
69A6
69A6
5D2 51B3
5D2 51C3
7D8 12C4
7C8 12C4
7D6 12C4
7D8 12D4
7D8 12D4
7D8 12D4
7D8 12D4
7D8 12D4
7D8 12D4
7D8 12D4

7D8 12D4
7D8 12D4
7D8 12D4
7D8 12D4
7D8 12D4
7D8 12D4
7D8 12C4
7C8 12C4
7C8 12C4
7C8 12C4
7C8 12C4
7C8 12C4
7C8 12C4
7C8 12C4
7C8 12C4
7C8 12C4

7C8 12C4
7C8 12C4
7C8 12C4
7C8 12C4
7C8 12C4
7C8 12C4
7D6 12C4
7D6 12C4
7D6 12C4
7C6 33C2 33D3
7C6 33C2 33D3
12A6 33C2 33D3
12A6 33D2 33D3
7D6 11B5 12C4
7D6 12B4
7D6 12B4

7C4 12B4
7B4 12B4
7C3 12B4
7B3 12B4
7B3 12B4
7D6 12B4
7C4 12B4
101

8
FSB_DSTBN_L<1>

FSB_DSTBN_L<1> @mlb_noldo_lib.MLB_NOLDO
FSB_DSTBN_L<2> @mlb_noldo_lib.MLB_NOLDO
FSB_DSTBN_L<3> @mlb_noldo_lib.MLB_NOLDO
FSB_DSTBP_L<0> @mlb_noldo_lib.MLB_NOLDO
FSB_DSTBP_L<1> @mlb_noldo_lib.MLB_NOLDO
FSB_DSTBP_L<2> @mlb_noldo_lib.MLB_NOLDO
FSB_DSTBP_L<3> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<0> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<1> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<2> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<3> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<4> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<5> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<6> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<7> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<8> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<9> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<10> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<11> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<12> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<13> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<14> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<15> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<16> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<17> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<18> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<19> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<20> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<21> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<22> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<23> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<24> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<25> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<26> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<27> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<28> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<29> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<30> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<31> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<32> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<33> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<34> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<35> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<36> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<37> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<38> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<39> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<40> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<41> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<42> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<43> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<44> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<45> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<46> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<47> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<48> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<49> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<50> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<51> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<52> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<53> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<54> @mlb_noldo_lib.MLB_NOLDO

FSB_DSTBN_L<2>
FSB_DSTBN_L<3>
FSB_DSTBP_L<0>
FSB_DSTBP_L<1>
FSB_DSTBP_L<2>
FSB_DSTBP_L<3>

FSB_D_L<0>
FSB_D_L<1>
FSB_D_L<2>
FSB_D_L<3>
FSB_D_L<4>
FSB_D_L<5>
FSB_D_L<6>
FSB_D_L<7>
FSB_D_L<8>
FSB_D_L<9>
FSB_D_L<10>
FSB_D_L<11>
FSB_D_L<12>
FSB_D_L<13>
FSB_D_L<14>
FSB_D_L<15>

FSB_D_L<16>
FSB_D_L<17>
FSB_D_L<18>
FSB_D_L<19>
FSB_D_L<20>
FSB_D_L<21>
FSB_D_L<22>
FSB_D_L<23>
FSB_D_L<24>
FSB_D_L<25>
FSB_D_L<26>
FSB_D_L<27>
FSB_D_L<28>
FSB_D_L<29>
FSB_D_L<30>
FSB_D_L<31>

FSB_D_L<32>
FSB_D_L<33>
FSB_D_L<34>
FSB_D_L<35>
FSB_D_L<36>
FSB_D_L<37>
FSB_D_L<38>
FSB_D_L<39>
FSB_D_L<40>
FSB_D_L<41>
FSB_D_L<42>
FSB_D_L<43>
FSB_D_L<44>
FSB_D_L<45>
FSB_D_L<46>
FSB_D_L<47>

FSB_D_L<48>
FSB_D_L<49>
FSB_D_L<50>
FSB_D_L<51>
FSB_D_L<52>
FSB_D_L<53>
FSB_D_L<54>

7
7B4 12B4

FSB_D_L<55>

7C3 12B4

FSB_D_L<56>

7B3 12B4

FSB_D_L<57>

7C4 12B4

FSB_D_L<58>

7B4 12B4

FSB_D_L<59>

7C3 12B4

FSB_D_L<60>

7B3 12B4

FSB_D_L<61>

7C4 12D6

FSB_D_L<62>

7C4 12D6

FSB_D_L<63>

7C4 12D6

FSB_HITM_L

7C4 12D6

FSB_HIT_L

7C4 12D6

FSB_IERR_L

7C4 12D6

FSB_LOCK_L

7C4 12D6

FSB_REQ_L<0>

7C4 12D6

FSB_REQ_L<1>

7C4 12D6

FSB_REQ_L<2>

7C4 12D6

FSB_REQ_L<3>

7C4 12D6

FSB_REQ_L<4>

7C4 12D6

FSB_RS_L<0>

7C4 12D6

FSB_RS_L<1>

7C4 12C6

FSB_RS_L<2>

7C4 12C6

FSB_SLPCPU_L

7C4 12C6

FSB_TRDY_L

7C4 12C6

FWH_INIT_L

7C4 12C6
7B4 12C6

FWH_MFG_MODE

7B4 12C6

FWPWR_ACIN

7B4 12C6

FWPWR_EN
FWPWR_EN_L

7B4 12C6
FWPWR_EN_L_DIV
7B4 12C6
FWPWR_EN_L_R
7B4 12C6
FWPWR_RUN
7B4 12C6
FW_A_TPA_N
7B4 12C6
7B4 12C6
FW_A_TPA_P
7B4 12C6
7B4 12C6
FW_A_TPBIAS
7B4 12C6
FW_A_TPB_N
7B4 12C6
7B4 12C6
FW_A_TPB_P
7C3 12C6
7C3 12C6
FW_B_TPA_N
7C3 12C6
7C3 12C6
FW_B_TPA_P
7C3 12C6
7C3 12C6
FW_B_TPBIAS
7C3 12C6
7C3 12B6
FW_B_TPB_N
7C3 12B6
7C3 12B6
FW_B_TPB_P
7C3 12B6
7C3 12B6
FW_C_TPA_N
7C3 12B6
7C3 12B6
FW_C_TPA_P
7C3 12B6
7C3 12B6
FW_C_TPBIAS
7C3 12B6
7C3 12B6
FW_C_TPB_N
7B3 12B6
7B3 12B6
FW_C_TPB_P
7B3 12B6
7B3 12B6
FW_PCI_IDSEL
7B3 12B6
FW_PCI_RST_L

FSB_D_L<55> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<56> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<57> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<58> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<59> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<60> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<61> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<62> @mlb_noldo_lib.MLB_NOLDO
FSB_D_L<63> @mlb_noldo_lib.MLB_NOLDO
FSB_HITM_L @mlb_noldo_lib.MLB_NOLDO
FSB_HIT_L @mlb_noldo_lib.MLB_NOLDO
FSB_IERR_L @mlb_noldo_lib.MLB_NOLDO
FSB_LOCK_L @mlb_noldo_lib.MLB_NOLDO
FSB_REQ_L<0> @mlb_noldo_lib.MLB_NOLDO
FSB_REQ_L<1> @mlb_noldo_lib.MLB_NOLDO
FSB_REQ_L<2> @mlb_noldo_lib.MLB_NOLDO
FSB_REQ_L<3> @mlb_noldo_lib.MLB_NOLDO
FSB_REQ_L<4> @mlb_noldo_lib.MLB_NOLDO
FSB_RS_L<0> @mlb_noldo_lib.MLB_NOLDO
FSB_RS_L<1> @mlb_noldo_lib.MLB_NOLDO
FSB_RS_L<2> @mlb_noldo_lib.MLB_NOLDO
FSB_SLPCPU_L @mlb_noldo_lib.MLB_NOLDO
FSB_TRDY_L @mlb_noldo_lib.MLB_NOLDO
FWH_INIT_L @mlb_noldo_lib.MLB_NOLDO
SMC_CPU_INIT_3_3_L @mlb_noldo_lib.MLB_NOLDO
FWH_MFG_MODE @mlb_noldo_lib.MLB_NOLDO
FWPWR_ACIN @mlb_noldo_lib.MLB_NOLDO
FWPWR_EN - @mlb_noldo_lib.MLB_NOLDO
FWPWR_EN_L @mlb_noldo_lib.MLB_NOLDO
FWPWR_EN_L_DIV @mlb_noldo_lib.MLB_NOLDO
FWPWR_EN_L_R @mlb_noldo_lib.MLB_NOLDO
FWPWR_RUN @mlb_noldo_lib.MLB_NOLDO
FW_A_TPA_N @mlb_noldo_lib.MLB_NOLDO
FW_PORT0_TPA_N @mlb_noldo_lib.MLB_NOLDO
FW_A_TPA_P @mlb_noldo_lib.MLB_NOLDO
FW_PORT0_TPA_P @mlb_noldo_lib.MLB_NOLDO
FW_A_TPBIAS @mlb_noldo_lib.MLB_NOLDO
FW_A_TPB_N @mlb_noldo_lib.MLB_NOLDO
FW_PORT0_TPB_N @mlb_noldo_lib.MLB_NOLDO
FW_A_TPB_P @mlb_noldo_lib.MLB_NOLDO
FW_PORT0_TPB_P @mlb_noldo_lib.MLB_NOLDO
FW_B_TPA_N @mlb_noldo_lib.MLB_NOLDO
FW_B_TPA_N_SPN @mlb_noldo_lib.MLB_NOLDO
FW_B_TPA_P @mlb_noldo_lib.MLB_NOLDO
FW_B_TPA_P_SPN @mlb_noldo_lib.MLB_NOLDO
FW_B_TPBIAS @mlb_noldo_lib.MLB_NOLDO
FW_B_TPBIAS_SPN @mlb_noldo_lib.MLB_NOLDO
FW_B_TPB_N @mlb_noldo_lib.MLB_NOLDO
FW_B_TPB_N_SPN @mlb_noldo_lib.MLB_NOLDO
FW_B_TPB_P @mlb_noldo_lib.MLB_NOLDO
FW_B_TPB_P_SPN @mlb_noldo_lib.MLB_NOLDO
FW_C_TPA_N @mlb_noldo_lib.MLB_NOLDO
FW_C_TPA_N_SPN @mlb_noldo_lib.MLB_NOLDO
FW_C_TPA_P @mlb_noldo_lib.MLB_NOLDO
FW_C_TPA_P_SPN @mlb_noldo_lib.MLB_NOLDO
FW_C_TPBIAS @mlb_noldo_lib.MLB_NOLDO
FW_C_TPBIAS_SPN @mlb_noldo_lib.MLB_NOLDO
FW_C_TPB_N @mlb_noldo_lib.MLB_NOLDO
FW_C_TPB_N_SPN @mlb_noldo_lib.MLB_NOLDO
FW_C_TPB_P @mlb_noldo_lib.MLB_NOLDO
FW_C_TPB_P_SPN @mlb_noldo_lib.MLB_NOLDO
FW_PCI_IDSEL @mlb_noldo_lib.MLB_NOLDO
FW_PCI_RST_L -

7B3 12B6
FW_PORT0_TPA_N_FL
7B3 12B6
FW_PORT0_TPA_P_FL
7B3 12B6
FW_PORT0_TPB
7B3 12B6
FW_PORT0_TPB_N_FL
7B3 12B6
FW_PORT0_TPB_P_FL
7B3 12B6
FW_PWRON_RST_L
7B3 12B6
FW_R0
FW_R1
FW_XI
FW_XO
FW_XO_R
GEYSER_GND_F

7B3 12B6
7B3 12B6
7D6 12B4
7D6 12B4

GND_1V8S3_SGND

7D6

GND_1V51V05S0_SGND

7D6 12B4

GND_5V3V3S5_SGND

7D8 12B4

GND_AUDIO_CODEC

7D8 12B4

@mlb_noldo_lib.MLB_NOLDO
FW_PORT0_TPA_N_FL @mlb_noldo_lib.MLB_NOLDO
FW_PORT0_TPA_P_FL @mlb_noldo_lib.MLB_NOLDO
FW_PORT0_TPB @mlb_noldo_lib.MLB_NOLDO
FW_PORT0_TPB_N_FL @mlb_noldo_lib.MLB_NOLDO
FW_PORT0_TPB_P_FL @mlb_noldo_lib.MLB_NOLDO
FW_PWRON_RST_L @mlb_noldo_lib.MLB_NOLDO
FW_R0 - @mlb_noldo_lib.MLB_NOLDO
FW_R1 - @mlb_noldo_lib.MLB_NOLDO
FW_XI - @mlb_noldo_lib.MLB_NOLDO
FW_XO - @mlb_noldo_lib.MLB_NOLDO
FW_XO_R - @mlb_noldo_lib.MLB_NOLDO
GEYSER_GND_F @mlb_noldo_lib.MLB_NOLDO
GND_1V8S3_SGND @mlb_noldo_lib.MLB_NOLDO
GND_1V51V05S0_SGND @mlb_noldo_lib.MLB_NOLDO
GND_5V3V3S5_SGND @mlb_noldo_lib.MLB_NOLDO
GND_AUDIO_CODEC @mlb_noldo_lib.MLB_NOLDO
=GND_AUDIO_CODEC @mlb_noldo_lib.MLB_NOLDO

7D8 12A4
7D8 12A4

GND_AUDIO_PWR

7D8 12A4

GND_AUDIO_PWR @mlb_noldo_lib.MLB_NOLDO
=GND_AUDIO_PWR @mlb_noldo_lib.MLB_NOLDO

7D6 12A4
GND_AUDIO_SPDIF_DGND GND_AUDIO_SPDIF_DGND @mlb_noldo_lib.MLB_NOLDO
GND_BT_F
GND_BT_F - @mlb_noldo_lib.MLB_NOLDO
GND_CHASSIS_CPU
GND_CHASSIS_CPU @mlb_noldo_lib.MLB_NOLDO
GND_CHASSIS_FANSCREW GND_CHASSIS_FANSCREW @mlb_noldo_lib.MLB_NOLDO
GND_CHGR_SGND
GND_CHGR_SGND @mlb_noldo_lib.MLB_NOLDO
GND_IMVP6_SGND
GND_IMVP6_SGND @mlb_noldo_lib.MLB_NOLDO
GND_SMC_AVSS
GND_SMC_AVSS @mlb_noldo_lib.MLB_NOLDO
GND_SMC_LID_F
GND_SMC_LID_F @mlb_noldo_lib.MLB_NOLDO
GPU_CRT_DDC_CLK
GPU_CRT_DDC_CLK @mlb_noldo_lib.MLB_NOLDO
GPU_CRT_DDC_DATA
GPU_CRT_DDC_DATA @mlb_noldo_lib.MLB_NOLDO
IDE_CSEL_PD
IDE_CSEL_PD @mlb_noldo_lib.MLB_NOLDO
IDE_IRQ14
IDE_IRQ14 @mlb_noldo_lib.MLB_NOLDO
IDE_PDA<0>
IDE_PDA<0> @mlb_noldo_lib.MLB_NOLDO
IDE_PDA<1>
IDE_PDA<1> @mlb_noldo_lib.MLB_NOLDO
IDE_PDA<2>
IDE_PDA<2> @mlb_noldo_lib.MLB_NOLDO
IDE_PDCS1_L
IDE_PDCS1_L @mlb_noldo_lib.MLB_NOLDO
IDE_PDCS3_L
IDE_PDCS3_L @mlb_noldo_lib.MLB_NOLDO
IDE_PDD<0>
IDE_PDD<0> @mlb_noldo_lib.MLB_NOLDO
IDE_PDD<1>
IDE_PDD<1> @mlb_noldo_lib.MLB_NOLDO
IDE_PDD<2>
IDE_PDD<2> @mlb_noldo_lib.MLB_NOLDO
IDE_PDD<3>
IDE_PDD<3> @mlb_noldo_lib.MLB_NOLDO
IDE_PDD<4>
IDE_PDD<4> @mlb_noldo_lib.MLB_NOLDO
IDE_PDD<5>
IDE_PDD<5> @mlb_noldo_lib.MLB_NOLDO
IDE_PDD<6>
IDE_PDD<6> @mlb_noldo_lib.MLB_NOLDO
IDE_PDD<7>
IDE_PDD<7> @mlb_noldo_lib.MLB_NOLDO
IDE_PDD<8>
IDE_PDD<8> @mlb_noldo_lib.MLB_NOLDO
IDE_PDD<9>
IDE_PDD<9> @mlb_noldo_lib.MLB_NOLDO
IDE_PDD<10>
IDE_PDD<10> @mlb_noldo_lib.MLB_NOLDO
IDE_PDD<11>
IDE_PDD<11> @mlb_noldo_lib.MLB_NOLDO
IDE_PDD<12>
IDE_PDD<12> @mlb_noldo_lib.MLB_NOLDO
IDE_PDD<13>
IDE_PDD<13> @mlb_noldo_lib.MLB_NOLDO
IDE_PDD<14>
IDE_PDD<14> @mlb_noldo_lib.MLB_NOLDO
IDE_PDD<15>
IDE_PDD<15> @mlb_noldo_lib.MLB_NOLDO
IDE_PDDACK_L
IDE_PDDACK_L @mlb_noldo_lib.MLB_NOLDO
IDE_PDDREQ
IDE_PDDREQ @mlb_noldo_lib.MLB_NOLDO
IDE_PDIORDY
IDE_PDIORDY @mlb_noldo_lib.MLB_NOLDO
IDE_PDIOR_L
IDE_PDIOR_L @mlb_noldo_lib.MLB_NOLDO
IDE_PDIOW_L
IDE_PDIOW_L @mlb_noldo_lib.MLB_NOLDO
IDE_RESET_L
IDE_RESET_L @mlb_noldo_lib.MLB_NOLDO
IMVP6_BOOT1
IMVP6_BOOT1 @mlb_noldo_lib.MLB_NOLDO
IMVP6_BOOT1_RC
IMVP6_BOOT1_RC @mlb_noldo_lib.MLB_NOLDO
IMVP6_BOOT2
IMVP6_BOOT2 @mlb_noldo_lib.MLB_NOLDO
IMVP6_BOOT2_RC
IMVP6_BOOT2_RC @mlb_noldo_lib.MLB_NOLDO
IMVP6_COMP
IMVP6_COMP @mlb_noldo_lib.MLB_NOLDO

7D6 12A4
7D6 12A4
7A3 12A4
7D6 12A4
5C2 6B2 21C4 47C5
6B1 45D5
23A6 23C5
39C6
39C5
39C4 60C8
39C5
60C7
39C6
38B3 39B6
39B5
38B3 39B6
39B5
38B3 39B6
38B3 39B6
39B5
38B3 39B6
39B5
6D2 38B3
5B7 6D1
6D2 38B3
5B7 6D1
6D2 38B3
5B7 6D1
6D2 38B3
5B7 6D1
6D2 38B3
5B7 6D1
6D2 38B3
5B7 6D1
6D2 38B3
5B7 6D1
6D2 38B3
5B7 6D1
6D2 38B3
5B7 6D1
6D2 38B3
5B7 6D1
38A5
38A5

IMVP6_COMP_RC
39B2
IMVP6_CPU_ISENSE_N
39B2
IMVP6_CPU_ISENSE_P
39A5
IMVP6_DFB
39B2
IMVP6_DROOP
39B2
IMVP6_FB
IMVP6_FB2

38C3
38B3
38C3
38C3
38C3
38C3
40C5

IMVP6_FET_RC1
IMVP6_FET_RC2
IMVP6_ISEN1
IMVP6_ISEN2

61B5 61C6
IMVP6_LGATE1
62B7
IMVP6_LGATE2
59B7
IMVP6_NTC
5D1 64B2
IMVP6_NTC_R
54A6 54B6
55C8 56B3
57B3 57B3
57C5 57C8
5D1 64B2

54D2
56B5
57B5
57D8

55A8 55B8
57A5 57A6
57B8 57C3
64B3

IMVP6_OCSET
IMVP6_PHASE1
IMVP6_PHASE2

55A3
55B8
55D8
56A8

55A5 55A8 55B3 55B3


55C3 55C3 55C8 55D3
56C2 64B3
56C8

44B4
6B8

IMVP6_RBIAS
IMVP6_RTN
IMVP6_SOFT
IMVP6_UGATE1

6B8
IMVP6_UGATE2
66A5 66B7
IMVP6_VDIFF
58A4 58B7 58C8
IMVP6_VDIFF_RC
45C2 45C4 46B6 48A1 48B5
48C1 61C1 62A5 66B1 66C2
65A7

IMVP6_VO
IMVP6_VO_R

69B6 69D5

IMVP6_VO_R1

69B6 69D5

IMVP6_VO_R2

34B4

IMVP6_VR_TT

21B6 34B6

IMVP6_VSEN

21B5 34B5

IMVP6_VSUM

21B5 34B5

IMVP6_VSUM_R1

21B5 34B3

IMVP6_VSUM_R2

21B5 34B5

IMVP6_VW
IMVP_DPRSLPVR

21B5 34B3
IMVP_VR_ON
21C5 34C5
INT_PIRQA_L
21B5 34C5
INT_PIRQB_L
21B5 34C5
INT_PIRQC_L
21B5 34C5
INT_PIRQD_L
21B5 34C5
INT_SERIRQ
21B5 34C5
INVT_CHGND
21B5 34C5
INV_BKLIGHT_PWM_L
21B5 34C5
21B5 34C3

INV_GND
INV_PWREN_F_L

21B5 34C3

INV_PWREN_L

21B5 34C3

IR_RX_OUT

21B5 34C3

IR_RX_OUT_F

21B5 34C3

ISENSE_CAL_EN

21B5 34C3

ISENSE_CAL_EN_L

21B5 34C3

ISENSE_CAL_EN_LS5V

21B5 34C3

ITPRESET_L

21B6 34B3

ITP_TDO
J2900_SA1

21B6 34B6
21B6 34B6

KBC_MDE
LCDVDD_PWREN_L

21B6 34C3

LCDVDD_PWREN_L_R

21B6 34B5

LPC_AD<0>

23A3 34C5

LPC_AD<1>

58A8 58C6

LPC_AD<2>

58D5

LPC_AD<3>

58A6 58C6

LPC_FRAME_L

58C5

LVDS_A_CLK_N

5D7 58A4 58B7

LVDS_A_CLK_P

IMVP6_COMP_RC @mlb_noldo_lib.MLB_NOLDO
IMVP6_CPU_ISENSE_N @mlb_noldo_lib.MLB_NOLDO
IMVP6_CPU_ISENSE_P @mlb_noldo_lib.MLB_NOLDO
IMVP6_DFB @mlb_noldo_lib.MLB_NOLDO
IMVP6_DROOP @mlb_noldo_lib.MLB_NOLDO
IMVP6_FB - @mlb_noldo_lib.MLB_NOLDO
IMVP6_FB2 @mlb_noldo_lib.MLB_NOLDO
IMVP6_FET_RC1 @mlb_noldo_lib.MLB_NOLDO
IMVP6_FET_RC2 @mlb_noldo_lib.MLB_NOLDO
IMVP6_ISEN1 @mlb_noldo_lib.MLB_NOLDO
IMVP6_ISEN2 @mlb_noldo_lib.MLB_NOLDO
IMVP6_LGATE1 @mlb_noldo_lib.MLB_NOLDO
IMVP6_LGATE2 @mlb_noldo_lib.MLB_NOLDO
IMVP6_NTC @mlb_noldo_lib.MLB_NOLDO
IMVP6_NTC_R @mlb_noldo_lib.MLB_NOLDO
IMVP6_OCSET @mlb_noldo_lib.MLB_NOLDO
IMVP6_PHASE1 @mlb_noldo_lib.MLB_NOLDO
IMVP6_PHASE2 @mlb_noldo_lib.MLB_NOLDO
IMVP6_RBIAS @mlb_noldo_lib.MLB_NOLDO
IMVP6_RTN @mlb_noldo_lib.MLB_NOLDO
IMVP6_SOFT @mlb_noldo_lib.MLB_NOLDO
IMVP6_UGATE1 @mlb_noldo_lib.MLB_NOLDO
IMVP6_UGATE2 @mlb_noldo_lib.MLB_NOLDO
IMVP6_VDIFF @mlb_noldo_lib.MLB_NOLDO
IMVP6_VDIFF_RC @mlb_noldo_lib.MLB_NOLDO
IMVP6_VO - @mlb_noldo_lib.MLB_NOLDO
IMVP6_VO_R @mlb_noldo_lib.MLB_NOLDO
IMVP6_VO_R1 @mlb_noldo_lib.MLB_NOLDO
IMVP6_VO_R2 @mlb_noldo_lib.MLB_NOLDO
IMVP6_VR_TT @mlb_noldo_lib.MLB_NOLDO
IMVP6_VSEN @mlb_noldo_lib.MLB_NOLDO
IMVP6_VSUM @mlb_noldo_lib.MLB_NOLDO
IMVP6_VSUM_R1 @mlb_noldo_lib.MLB_NOLDO
IMVP6_VSUM_R2 @mlb_noldo_lib.MLB_NOLDO
IMVP6_VW - @mlb_noldo_lib.MLB_NOLDO
IMVP_DPRSLPVR @mlb_noldo_lib.MLB_NOLDO
IMVP_VR_ON @mlb_noldo_lib.MLB_NOLDO
INT_PIRQA_L @mlb_noldo_lib.MLB_NOLDO
INT_PIRQB_L @mlb_noldo_lib.MLB_NOLDO
INT_PIRQC_L @mlb_noldo_lib.MLB_NOLDO
INT_PIRQD_L @mlb_noldo_lib.MLB_NOLDO
INT_SERIRQ @mlb_noldo_lib.MLB_NOLDO
INVT_CHGND @mlb_noldo_lib.MLB_NOLDO
INV_BKLIGHT_PWM_L @mlb_noldo_lib.MLB_NOLDO
INV_GND - @mlb_noldo_lib.MLB_NOLDO
INV_PWREN_F_L @mlb_noldo_lib.MLB_NOLDO
INV_PWREN_L @mlb_noldo_lib.MLB_NOLDO
IR_RX_OUT @mlb_noldo_lib.MLB_NOLDO
IR_RX_OUT_F @mlb_noldo_lib.MLB_NOLDO
ISENSE_CAL_EN @mlb_noldo_lib.MLB_NOLDO
ISENSE_CAL_EN_L @mlb_noldo_lib.MLB_NOLDO
ISENSE_CAL_EN_LS5V @mlb_noldo_lib.MLB_NOLDO
ITPRESET_L @mlb_noldo_lib.MLB_NOLDO
ITP_TDO - @mlb_noldo_lib.MLB_NOLDO
J2900_SA1 @mlb_noldo_lib.MLB_NOLDO
KBC_MDE - @mlb_noldo_lib.MLB_NOLDO
LCDVDD_PWREN_L @mlb_noldo_lib.MLB_NOLDO
LCDVDD_PWREN_L_R @mlb_noldo_lib.MLB_NOLDO
LPC_AD<0> @mlb_noldo_lib.MLB_NOLDO
LPC_AD<1> @mlb_noldo_lib.MLB_NOLDO
LPC_AD<2> @mlb_noldo_lib.MLB_NOLDO
LPC_AD<3> @mlb_noldo_lib.MLB_NOLDO
LPC_FRAME_L @mlb_noldo_lib.MLB_NOLDO
LVDS_A_CLK_N @mlb_noldo_lib.MLB_NOLDO
LVDS_A_CLK_P @mlb_noldo_lib.MLB_NOLDO

58B8
48C4
48D4
58A4 58B6
48D5 58A4 58B6
58A4 58B7
58A4 58B7
58A8 58C2

58A6 58B2
58A8 58C6
58A6 58C6
58A8 58C6
58A6 58C6
58C7
58C7
58A4 58B6
58A8 58C6
58A6 58C6
5D7 58A4 58B7
58A4 58B6
58A4 58C7
58A8 58C6
58A6 58C6
58A4 58B7

58B7
48C5 58A4 58B6
58B4
58A8
58A6
58C7
58A4 58B5
58A4 58C6
58A8
58A6
58A4 58B7
58C7
45D8 58C7
22A7 26C3
22A7 26C3
22A7 26C3
22A7 26C3 38A5

5C2 23C8 45C8 47C5 53C6


6D8 67C2
5B1 67D2
5B1 67D2
67D6
67D6
35C6 41C6
41C5
45B8 48A8
48A7
48A6
11B3
11B3
29A4
45C2
67B7
67B6

5D2 21D4 45D8 47C6 53C6


5D2 21D4 45D8 47C6 53C6
5C2 21D4 45D8 47C5 53C6
5C2 21D4 45D8 47C5 53C6
5C2 21C5 45C8 47C6 53C6
13D5 67B2
13C5 67B2
102

8
LVDS_A_DATA_N<0>

LVDS_A_DATA_N<0> @mlb_noldo_lib.MLB_NOLDO
LVDS_A_DATA_N<1> @mlb_noldo_lib.MLB_NOLDO
LVDS_A_DATA_N<2> @mlb_noldo_lib.MLB_NOLDO
LVDS_A_DATA_P<0> @mlb_noldo_lib.MLB_NOLDO
LVDS_A_DATA_P<1> @mlb_noldo_lib.MLB_NOLDO
LVDS_A_DATA_P<2> @mlb_noldo_lib.MLB_NOLDO
LVDS_BKLTCTL @mlb_noldo_lib.MLB_NOLDO
LVDS_BKLTEN @mlb_noldo_lib.MLB_NOLDO
LVDS_B_CLK_N @mlb_noldo_lib.MLB_NOLDO
LVDS_B_CLK_N_SPN @mlb_noldo_lib.MLB_NOLDO
LVDS_B_CLK_P @mlb_noldo_lib.MLB_NOLDO
LVDS_B_CLK_P_SPN @mlb_noldo_lib.MLB_NOLDO
LVDS_B_DATA_N<0> @mlb_noldo_lib.MLB_NOLDO
LVDS_B_DATA_N0_SPN @mlb_noldo_lib.MLB_NOLDO
LVDS_B_DATA_N<1> @mlb_noldo_lib.MLB_NOLDO
LVDS_B_DATA_N1_SPN @mlb_noldo_lib.MLB_NOLDO
LVDS_B_DATA_N<2> @mlb_noldo_lib.MLB_NOLDO
LVDS_B_DATA_N2_SPN @mlb_noldo_lib.MLB_NOLDO
LVDS_B_DATA_P<0> @mlb_noldo_lib.MLB_NOLDO
LVDS_B_DATA_P0_SPN @mlb_noldo_lib.MLB_NOLDO
LVDS_B_DATA_P<1> @mlb_noldo_lib.MLB_NOLDO
LVDS_B_DATA_P1_SPN @mlb_noldo_lib.MLB_NOLDO
LVDS_B_DATA_P<2> @mlb_noldo_lib.MLB_NOLDO
LVDS_B_DATA_P2_SPN @mlb_noldo_lib.MLB_NOLDO
LVDS_CLKCTLA @mlb_noldo_lib.MLB_NOLDO
LVDS_CLKCTLB @mlb_noldo_lib.MLB_NOLDO
LVDS_DDC_CLK @mlb_noldo_lib.MLB_NOLDO
LVDS_DDC_DATA @mlb_noldo_lib.MLB_NOLDO
LVDS_IBG - @mlb_noldo_lib.MLB_NOLDO
LVDS_VDDEN @mlb_noldo_lib.MLB_NOLDO
MAX9705_L_N @mlb_noldo_lib.MLB_NOLDO
MAX9705_R_N @mlb_noldo_lib.MLB_NOLDO
MAX9705_SUB_N @mlb_noldo_lib.MLB_NOLDO
MAX9890_CEXT @mlb_noldo_lib.MLB_NOLDO
MAX9890_INL @mlb_noldo_lib.MLB_NOLDO
MAX9890_INR @mlb_noldo_lib.MLB_NOLDO
MEMVTT_EN @mlb_noldo_lib.MLB_NOLDO
MEMVTT_VREF @mlb_noldo_lib.MLB_NOLDO
MEM_A_A<0> @mlb_noldo_lib.MLB_NOLDO
MEM_A_A<13..0> @mlb_noldo_lib.MLB_NOLDO
MEM_A_A<1> @mlb_noldo_lib.MLB_NOLDO
MEM_A_A<2> @mlb_noldo_lib.MLB_NOLDO
MEM_A_A<3> @mlb_noldo_lib.MLB_NOLDO
MEM_A_A<4> @mlb_noldo_lib.MLB_NOLDO
MEM_A_A<5> @mlb_noldo_lib.MLB_NOLDO
MEM_A_A<6> @mlb_noldo_lib.MLB_NOLDO
MEM_A_A<7> @mlb_noldo_lib.MLB_NOLDO
MEM_A_A<8> @mlb_noldo_lib.MLB_NOLDO
MEM_A_A<9> @mlb_noldo_lib.MLB_NOLDO
MEM_A_A<10> @mlb_noldo_lib.MLB_NOLDO
MEM_A_A<11> @mlb_noldo_lib.MLB_NOLDO
MEM_A_A<12> @mlb_noldo_lib.MLB_NOLDO
MEM_A_A<13> @mlb_noldo_lib.MLB_NOLDO
MEM_A_A<14> @mlb_noldo_lib.MLB_NOLDO
MEM_A_A14_SPN @mlb_noldo_lib.MLB_NOLDO
MEM_A_A<15> @mlb_noldo_lib.MLB_NOLDO
MEM_A_A15_SPN @mlb_noldo_lib.MLB_NOLDO
MEM_A_BS<0> @mlb_noldo_lib.MLB_NOLDO
MEM_A_BS<2..0> @mlb_noldo_lib.MLB_NOLDO
MEM_A_BS<1> @mlb_noldo_lib.MLB_NOLDO
MEM_A_BS<2> @mlb_noldo_lib.MLB_NOLDO
MEM_A_CAS_L @mlb_noldo_lib.MLB_NOLDO
MEM_A_DM<0> -

LVDS_A_DATA_N<1>
LVDS_A_DATA_N<2>
LVDS_A_DATA_P<0>
LVDS_A_DATA_P<1>
LVDS_A_DATA_P<2>
LVDS_BKLTCTL

LVDS_BKLTEN
LVDS_B_CLK_N

LVDS_B_CLK_P

LVDS_B_DATA_N<0>

LVDS_B_DATA_N<1>

LVDS_B_DATA_N<2>

LVDS_B_DATA_P<0>

LVDS_B_DATA_P<1>

LVDS_B_DATA_P<2>

C
LVDS_CLKCTLA
LVDS_CLKCTLB
LVDS_DDC_CLK
LVDS_DDC_DATA
LVDS_IBG
LVDS_VDDEN
MAX9705_L_N
MAX9705_R_N
MAX9705_SUB_N
MAX9890_CEXT
MAX9890_INL
MAX9890_INR
MEMVTT_EN
MEMVTT_VREF
MEM_A_A<0>
MEM_A_A<13..0>

MEM_A_A<1>
MEM_A_A<2>
MEM_A_A<3>
MEM_A_A<4>
MEM_A_A<5>
MEM_A_A<6>
MEM_A_A<7>
MEM_A_A<8>
MEM_A_A<9>
MEM_A_A<10>
MEM_A_A<11>
MEM_A_A<12>
MEM_A_A<13>
MEM_A_A<14>

MEM_A_A<15>

MEM_A_BS<0>
MEM_A_BS<2..0>
MEM_A_BS<1>
MEM_A_BS<2>
MEM_A_CAS_L
MEM_A_DM<0>

7
13C5 67B2
MEM_A_DM<1>
13C5 67B2
MEM_A_DM<2>
13C5 67B2
MEM_A_DM<3>
13C5 67B2
MEM_A_DM<4>
13C5 67B2
MEM_A_DM<5>
13C5 67B2
MEM_A_DM<6>
13D5 67C6
MEM_A_DM<7>
13D5 67D7
MEM_A_DQ<0>
6D6 13C5
MEM_A_DQ<1>
5A7 6D5
MEM_A_DQ<2>
6D6 13C5
MEM_A_DQ<3>
5A7 6D5
MEM_A_DQ<4>
6D6 13C5
MEM_A_DQ<5>
5A7 6D5
MEM_A_DQ<6>
6D6 13C5
MEM_A_DQ<7>
5A7 6D5
MEM_A_DQ<8>
6D6 13C5
MEM_A_DQ<9>
5A7 6D5
MEM_A_DQ<10>
6D6 13C5
MEM_A_DQ<11>
6D5
MEM_A_DQ<12>
6D6 13C5
MEM_A_DQ<13>
5A7 6D5
MEM_A_DQ<14>
6D6 13C5
MEM_A_DQ<15>
5A7 6D5
MEM_A_DQ<16>
13D5 67A7
MEM_A_DQ<17>
13D5 67A7
MEM_A_DQ<18>
13D5 67B6
MEM_A_DQ<19>
13D5 67B6
MEM_A_DQ<20>
13D5 67A6
13D5 67B7

MEM_A_DQ<21>

55B6

MEM_A_DQ<22>

55C6

MEM_A_DQ<23>

55A6

MEM_A_DQ<24>

57B1

MEM_A_DQ<25>

57B2

MEM_A_DQ<26>

57B2

MEM_A_DQ<27>

31B5

MEM_A_DQ<28>

31C4

MEM_A_DQ<29>

15C5 28B4

MEM_A_DQ<30>

30C6

MEM_A_DQ<31>

15C5 28B6

MEM_A_DQ<32>

15C5 28B4

MEM_A_DQ<33>

15B5 28B6

MEM_A_DQ<34>

15B5 28B4

MEM_A_DQ<35>

15B5 28B6

MEM_A_DQ<36>

15B5 28C4

MEM_A_DQ<37>

15B5 28C4

MEM_A_DQ<38>

15B5 28C6

MEM_A_DQ<39>

15B5 28C6

MEM_A_DQ<40>

15B5 28B6

MEM_A_DQ<41>

15B5 28C4

MEM_A_DQ<42>

15B5 28C6

MEM_A_DQ<43>

15B5 28B4

MEM_A_DQ<44>

6A4 28C4

MEM_A_DQ<45>

6A3

MEM_A_DQ<46>

6A4 28C4

MEM_A_DQ<47>

6A3

MEM_A_DQ<48>

15D5 28B6

MEM_A_DQ<49>

30C6

MEM_A_DQ<50>

15D5 28B4

MEM_A_DQ<51>

15D5 28C6

MEM_A_DQ<52>

15D5 28B6 30B6

MEM_A_DQ<53>

15D5 28D4

MEM_A_DQ<54>

@mlb_noldo_lib.MLB_NOLDO
MEM_A_DM<1> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DM<2> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DM<3> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DM<4> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DM<5> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DM<6> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DM<7> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<0> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<1> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<2> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<3> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<4> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<5> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<6> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<7> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<8> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<9> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<10> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<11> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<12> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<13> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<14> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<15> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<16> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<17> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<18> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<19> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<20> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<21> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<22> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<23> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<24> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<25> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<26> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<27> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<28> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<29> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<30> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<31> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<32> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<33> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<34> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<35> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<36> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<37> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<38> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<39> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<40> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<41> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<42> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<43> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<44> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<45> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<46> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<47> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<48> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<49> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<50> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<51> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<52> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<53> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<54> -

15D5 28D4

MEM_A_DQ<55>

15D5 28C6

MEM_A_DQ<56>

15C5 28C4

MEM_A_DQ<57>

15C5 28B4

MEM_A_DQ<58>

15C5 28B6

MEM_A_DQ<59>

15C5 28A6

MEM_A_DQ<60>

15C5 28A4

MEM_A_DQ<61>

15D7 28D4

MEM_A_DQ<62>

15D7 28D4

MEM_A_DQ<63>

15D7 28D6

MEM_A_DQS_N<0>

15D7 28D6

MEM_A_DQS_N<1>

15D7 28D4

MEM_A_DQS_N<2>

15D7 28D4

MEM_A_DQS_N<3>

15D7 28D6

MEM_A_DQS_N<4>

15D7 28D6

MEM_A_DQS_N<5>

15C7 28D6

MEM_A_DQS_N<6>

15C7 28D6

MEM_A_DQS_N<7>

15C7 28D6

MEM_A_DQS_P<0>

15C7 28D4

MEM_A_DQS_P<1>

15C7 28D4

MEM_A_DQS_P<2>

15C7 28D6

MEM_A_DQS_P<3>

15C7 28D4

MEM_A_DQS_P<4>

15C7 28D4

MEM_A_DQS_P<5>

15C7 28C4

MEM_A_DQS_P<6>

15C7 28C6

MEM_A_DQS_P<7>

15C7 28C4

MEM_A_RAS_L

15C7 28C6

MEM_A_WE_L

15C7 28C6

MEM_B_A<0>

15C7 28C4

MEM_B_A<1>

15C7 28C6

MEM_B_A<2>

15C7 28C4

MEM_B_A<3>

15C7 28D6

MEM_B_A<4>

15C7 28C6

MEM_B_A<5>

15C7 28C4

MEM_B_A<6>

15C7 28C6

MEM_B_A<7>

15C7 28C4

MEM_B_A<8>

15C7 28D4

MEM_B_A<9>

15C7 28C4

MEM_B_A<10>

15C7 28C6

MEM_B_A<11>

15C7 28B6

MEM_B_A<12>

15C7 28B4

MEM_B_A<13>

15B7 28B4

MEM_B_A<14>

15B7 28B4
15B7 28B4

MEM_B_A<15>

15B7 28B6
15B7 28B6

MEM_B_BS<0>

15B7 28B6

MEM_B_BS<2..0>

15B7 28B4

MEM_B_BS<1>

15B7 28B6

MEM_B_BS<2>

15B7 28A4

MEM_B_CAS_L

15B7 28A6

MEM_B_DM<0>

15B7 28B6

MEM_B_DM<1>

15B7 28B4

MEM_B_DM<2>

15B7 28A4

MEM_B_DM<3>

15B7 28A6

MEM_B_DM<4>

15B7 28A6

MEM_B_DM<5>

15B7 28A6

MEM_B_DM<6>

15B7 28A4

MEM_B_DM<7>

15B7 28A4

MEM_B_DQ<0>

15B7 28A6

MEM_B_DQ<1>

15B7 28A4

MEM_B_DQ<2>

15B7 28A4

MEM_B_DQ<3>

@mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<55> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<56> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<57> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<58> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<59> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<60> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<61> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<62> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQ<63> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQS_N<0> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQS_N<1> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQS_N<2> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQS_N<3> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQS_N<4> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQS_N<5> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQS_N<6> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQS_N<7> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQS_P<0> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQS_P<1> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQS_P<2> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQS_P<3> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQS_P<4> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQS_P<5> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQS_P<6> @mlb_noldo_lib.MLB_NOLDO
MEM_A_DQS_P<7> @mlb_noldo_lib.MLB_NOLDO
MEM_A_RAS_L @mlb_noldo_lib.MLB_NOLDO
MEM_A_WE_L @mlb_noldo_lib.MLB_NOLDO
MEM_B_A<0> @mlb_noldo_lib.MLB_NOLDO
MEM_B_A<1> @mlb_noldo_lib.MLB_NOLDO
MEM_B_A<2> @mlb_noldo_lib.MLB_NOLDO
MEM_B_A<3> @mlb_noldo_lib.MLB_NOLDO
MEM_B_A<4> @mlb_noldo_lib.MLB_NOLDO
MEM_B_A<5> @mlb_noldo_lib.MLB_NOLDO
MEM_B_A<6> @mlb_noldo_lib.MLB_NOLDO
MEM_B_A<7> @mlb_noldo_lib.MLB_NOLDO
MEM_B_A<8> @mlb_noldo_lib.MLB_NOLDO
MEM_B_A<9> @mlb_noldo_lib.MLB_NOLDO
MEM_B_A<10> @mlb_noldo_lib.MLB_NOLDO
MEM_B_A<11> @mlb_noldo_lib.MLB_NOLDO
MEM_B_A<12> @mlb_noldo_lib.MLB_NOLDO
MEM_B_A<13> @mlb_noldo_lib.MLB_NOLDO
MEM_B_A<14> @mlb_noldo_lib.MLB_NOLDO
MEM_B_A14_SPN @mlb_noldo_lib.MLB_NOLDO
MEM_B_A<15> @mlb_noldo_lib.MLB_NOLDO
MEM_B_A15_SPN @mlb_noldo_lib.MLB_NOLDO
MEM_B_BS<0> @mlb_noldo_lib.MLB_NOLDO
MEM_B_BS<2..0> @mlb_noldo_lib.MLB_NOLDO
MEM_B_BS<1> @mlb_noldo_lib.MLB_NOLDO
MEM_B_BS<2> @mlb_noldo_lib.MLB_NOLDO
MEM_B_CAS_L @mlb_noldo_lib.MLB_NOLDO
MEM_B_DM<0> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DM<1> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DM<2> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DM<3> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DM<4> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DM<5> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DM<6> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DM<7> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<0> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<1> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<2> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<3> -

15B7 28A6

MEM_B_DQ<4>

15B7 28A6

MEM_B_DQ<5>

15B7 28A6

MEM_B_DQ<6>

15B7 28A6

MEM_B_DQ<7>

15B7 28A4

MEM_B_DQ<8>

15A7 28A4

MEM_B_DQ<9>

15A7 28A4

MEM_B_DQ<10>

15A7 28A4

MEM_B_DQ<11>

15A7 28A6

MEM_B_DQ<12>

15C5 28D6

MEM_B_DQ<13>

15C5 28D6

MEM_B_DQ<14>

15C5 28C4

MEM_B_DQ<15>

15C5 28C6

MEM_B_DQ<16>

15C5 28B6

MEM_B_DQ<17>

15C5 28B4

MEM_B_DQ<18>

15C5 28A4

MEM_B_DQ<19>

15C5 28A6

MEM_B_DQ<20>

15C5 28D6

MEM_B_DQ<21>

15C5 28D6

MEM_B_DQ<22>

15C5 28C4

MEM_B_DQ<23>

15C5 28C6

MEM_B_DQ<24>

15C5 28B6

MEM_B_DQ<25>

15C5 28B4

MEM_B_DQ<26>

15C5 28A4

MEM_B_DQ<27>

15C5 28A6

MEM_B_DQ<28>

15B5 28B4 30B6

MEM_B_DQ<29>

15B5 28B6 30B6

MEM_B_DQ<30>

15C2 29B4 30B5

MEM_B_DQ<31>

15C2 29B6 30B5

MEM_B_DQ<32>

15C2 29B4 30B5

MEM_B_DQ<33>

15B2 29B6 30B5

MEM_B_DQ<34>

15B2 29B4 30B5

MEM_B_DQ<35>

15B2 29B6 30B5

MEM_B_DQ<36>

15B2 29C4 30B5

MEM_B_DQ<37>

15B2 29C4 30B5

MEM_B_DQ<38>

15B2 29C6 30B5

MEM_B_DQ<39>

15B2 29C6 30B5

MEM_B_DQ<40>

15B2 29B6 30B5

MEM_B_DQ<41>

15B2 29C4 30A5

MEM_B_DQ<42>

15B2 29C6 30A5

MEM_B_DQ<43>

15B2 29B4 30A5

MEM_B_DQ<44>

6A4 29C4

MEM_B_DQ<45>

6A3

MEM_B_DQ<46>

6A4 29C4

MEM_B_DQ<47>

6A3

MEM_B_DQ<48>

15D2 29B6

MEM_B_DQ<49>

30A6

MEM_B_DQ<50>

15D2 29B4

MEM_B_DQ<51>

15D2 29C6

MEM_B_DQ<52>

15D2 29B6 30A6

MEM_B_DQ<53>

15D2 29D4

MEM_B_DQ<54>

15D2 29D4

MEM_B_DQ<55>

15D2 29C4

MEM_B_DQ<56>

15C2 29C6

MEM_B_DQ<57>

15C2 29A4

MEM_B_DQ<58>

15C2 29A6

MEM_B_DQ<59>

15C2 29A6

MEM_B_DQ<60>

15C2 29B4

MEM_B_DQ<61>

15D4 29D4

MEM_B_DQ<62>

15D4 29D6

MEM_B_DQ<63>

15D4 29D6

MEM_B_DQS_N<0>

15D4 29D6

MEM_B_DQS_N<1>

@mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<4> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<5> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<6> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<7> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<8> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<9> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<10> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<11> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<12> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<13> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<14> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<15> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<16> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<17> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<18> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<19> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<20> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<21> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<22> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<23> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<24> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<25> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<26> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<27> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<28> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<29> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<30> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<31> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<32> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<33> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<34> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<35> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<36> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<37> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<38> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<39> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<40> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<41> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<42> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<43> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<44> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<45> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<46> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<47> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<48> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<49> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<50> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<51> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<52> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<53> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<54> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<55> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<56> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<57> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<58> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<59> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<60> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<61> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<62> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQ<63> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQS_N<0> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQS_N<1> -

15D4 29D4
15D4 29D6
15D4 29D4
15D4 29D4
15C4 29D6
15C4 29D4
15C4 29D6

15C4 29D4
15C4 29D6
15C4 29D6
15C4 29D4
15C4 29D4
15C4 29C4
15C4 29C6
15C4 29C6
15C4 29C4
15C4 29C6
15C4 29C4
15C4 29C6
15C4 29C4
15C4 29C4
15C4 29C4
15C4 29C4

15C4 29C6
15C4 29C4
15C4 29C6
15C4 29C6
15C4 29C6
15C4 29A6
15C4 29A4
15B4 29A6
15B4 29A4
15B4 29A4
15B4 29A6
15B4 29A6
15B4 29A4
15B4 29A4
15B4 29A6
15B4 29A4

15B4 29A6
15B4 29A6
15B4 29A6
15B4 29A4
15B4 29A4
15B4 29B4
15B4 29A6
15B4 29B6
15B4 29A4
15B4 29A6
15B4 29B4
15B4 29A4
15B4 29B6
15B4 29B4
15B4 29B6
15B4 29B6

15B4 29B4
15A4 29B6
15A4 29B4
15A4 29B6
15A4 29B4
15C2 29D6
15C2 29D6
103

8
@mlb_noldo_lib.MLB_NOLDO
MEM_B_DQS_N<2> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQS_N<3> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQS_N<4> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQS_N<5> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQS_N<6> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQS_N<7> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQS_P<0> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQS_P<1> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQS_P<2> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQS_P<3> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQS_P<4> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQS_P<5> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQS_P<6> @mlb_noldo_lib.MLB_NOLDO
MEM_B_DQS_P<7> @mlb_noldo_lib.MLB_NOLDO
MEM_B_RAS_L @mlb_noldo_lib.MLB_NOLDO
MEM_B_WE_L @mlb_noldo_lib.MLB_NOLDO
MEM_CKE<0> @mlb_noldo_lib.MLB_NOLDO
MEM_CKE<3..0> @mlb_noldo_lib.MLB_NOLDO
MEM_CKE<1> @mlb_noldo_lib.MLB_NOLDO
MEM_CKE<2> @mlb_noldo_lib.MLB_NOLDO
MEM_CKE<3> @mlb_noldo_lib.MLB_NOLDO
MEM_CLK_N<0> @mlb_noldo_lib.MLB_NOLDO
MEM_CLK_N<1> @mlb_noldo_lib.MLB_NOLDO
MEM_CLK_N<2> @mlb_noldo_lib.MLB_NOLDO
MEM_CLK_N<3> @mlb_noldo_lib.MLB_NOLDO
MEM_CLK_P<0> @mlb_noldo_lib.MLB_NOLDO
MEM_CLK_P<1> @mlb_noldo_lib.MLB_NOLDO
MEM_CLK_P<2> @mlb_noldo_lib.MLB_NOLDO
MEM_CLK_P<3> @mlb_noldo_lib.MLB_NOLDO
MEM_CS_L<0> @mlb_noldo_lib.MLB_NOLDO
MEM_CS_L<3..0> @mlb_noldo_lib.MLB_NOLDO
MEM_CS_L<1> @mlb_noldo_lib.MLB_NOLDO
MEM_CS_L<2> @mlb_noldo_lib.MLB_NOLDO
MEM_CS_L<3> @mlb_noldo_lib.MLB_NOLDO
MEM_ISENSE @mlb_noldo_lib.MLB_NOLDO
MEM_ISENSE_R1_N @mlb_noldo_lib.MLB_NOLDO
MEM_ISENSE_R1_P @mlb_noldo_lib.MLB_NOLDO
MEM_ISENSE_R2 @mlb_noldo_lib.MLB_NOLDO
MEM_ISENSE_VCC @mlb_noldo_lib.MLB_NOLDO
MEM_ODT<0> @mlb_noldo_lib.MLB_NOLDO
MEM_ODT<3..0> @mlb_noldo_lib.MLB_NOLDO
MEM_ODT<1> @mlb_noldo_lib.MLB_NOLDO
MEM_ODT<2> @mlb_noldo_lib.MLB_NOLDO
MEM_ODT<3> @mlb_noldo_lib.MLB_NOLDO
MEM_RCOMP @mlb_noldo_lib.MLB_NOLDO
MEM_RCOMP_L @mlb_noldo_lib.MLB_NOLDO
MEM_VREF_A @mlb_noldo_lib.MLB_NOLDO
MEM_VREF_B @mlb_noldo_lib.MLB_NOLDO
MEM_VREF_NB_0 @mlb_noldo_lib.MLB_NOLDO
MEM_VREF_NB_1 @mlb_noldo_lib.MLB_NOLDO
MIC_HI - @mlb_noldo_lib.MLB_NOLDO
MIC_HI_CONN @mlb_noldo_lib.MLB_NOLDO
MIC_HI_F - @mlb_noldo_lib.MLB_NOLDO
MIC_IN - @mlb_noldo_lib.MLB_NOLDO
MIC_LO - @mlb_noldo_lib.MLB_NOLDO
MIC_LO_CONN @mlb_noldo_lib.MLB_NOLDO
MIC_LO_F - @mlb_noldo_lib.MLB_NOLDO
MIC_SHIELD @mlb_noldo_lib.MLB_NOLDO
MIC_SHIELD_F @mlb_noldo_lib.MLB_NOLDO
MIC_SHLD_CONN @mlb_noldo_lib.MLB_NOLDO
MM1573DN_NR @mlb_noldo_lib.MLB_NOLDO
NB_BSEL<0> @mlb_noldo_lib.MLB_NOLDO
NB_BSEL<1> @mlb_noldo_lib.MLB_NOLDO
NB_BSEL<2> @mlb_noldo_lib.MLB_NOLDO

MEM_B_DQS_N<2>
MEM_B_DQS_N<3>
MEM_B_DQS_N<4>
MEM_B_DQS_N<5>
MEM_B_DQS_N<6>
MEM_B_DQS_N<7>
MEM_B_DQS_P<0>

MEM_B_DQS_P<1>
MEM_B_DQS_P<2>
MEM_B_DQS_P<3>
MEM_B_DQS_P<4>
MEM_B_DQS_P<5>
MEM_B_DQS_P<6>
MEM_B_DQS_P<7>
MEM_B_RAS_L
MEM_B_WE_L
MEM_CKE<0>
MEM_CKE<3..0>
MEM_CKE<1>
MEM_CKE<2>
MEM_CKE<3>
MEM_CLK_N<0>
MEM_CLK_N<1>

MEM_CLK_N<2>
MEM_CLK_N<3>
MEM_CLK_P<0>
MEM_CLK_P<1>
MEM_CLK_P<2>
MEM_CLK_P<3>
MEM_CS_L<0>
MEM_CS_L<3..0>
MEM_CS_L<1>
MEM_CS_L<2>
MEM_CS_L<3>
MEM_ISENSE
MEM_ISENSE_R1_N
MEM_ISENSE_R1_P
MEM_ISENSE_R2
MEM_ISENSE_VCC

MEM_ODT<0>
MEM_ODT<3..0>
MEM_ODT<1>
MEM_ODT<2>
MEM_ODT<3>
MEM_RCOMP
MEM_RCOMP_L
MEM_VREF_A
MEM_VREF_B
MEM_VREF_NB_0
MEM_VREF_NB_1
MIC_HI
MIC_HI_CONN
MIC_HI_F
MIC_IN
MIC_LO
MIC_LO_CONN

MIC_LO_F
MIC_SHIELD
MIC_SHIELD_F
MIC_SHLD_CONN
MM1573DN_NR
NB_BSEL<0>
NB_BSEL<1>
NB_BSEL<2>

7
NB_CFG<3>
15C2 29C6
15C2 29C4
NB_CFG<4>
15C2 29A6
15C2 29A4
NB_CFG<5>
15C2 29B4
NB_CFG<6>
15C2 29B6
15C2 29D6
NB_CFG<7>
15C2 29D6
NB_CFG<8>
15C2 29C6
15C2 29C4
NB_CFG<9>
15C2 29A6
NB_CFG<10>
15C2 29A4
15C2 29A4
NB_CFG<11>
15C2 29B6
15B2 29B4 30A6
NB_CFG<12>
15B2 29B6 30A6
14C4 28C6
NB_CFG<13>
30D6
14C4 28C4
NB_CFG<14>
14C4 29C6
14C4 29C4
NB_CFG<15>
14D4 28D4
14D4 28A4
NB_CFG<16>
14D4 29A4
NB_CFG<17>
14D4 29D4
14D4 28D4
NB_CFG<18>
14D4 28A4
NB_CFG<19>
14D4 29A4
NB_CFG<20>
14D4 29D4
NB_CLK100M_GCLKIN_N
14C4 28B4
NB_CLK100M_GCLKIN_P
30D6
NB_CLK_DREFCLKIN_N
14C4 28B6
NB_CLK_DREFCLKIN_P
14C4 29B4
NB_CLK_DREFSSCLKIN_N
14C4 29B6
NB_CLK_DREFSSCLKIN_P
61C2
NB_FSB_VREF
61C3
NB_FSB_XRCOMP
61C3
NB_FSB_XSCOMP
61C2
NB_FSB_XSWING
61C2
NB_FSB_YRCOMP
14C4 28B4
NB_FSB_YSCOMP
30D6
NB_FSB_YSWING
14C4 28B6
NB_ISENSE
14C4 29B4
NB_ISENSE_R1_N
14C4 29B6
NB_ISENSE_R1_P
14C4
NB_ISENSE_R2
14C4
NB_ISENSE_VCC
28D1 28D7
NB_RIGHT_DOWN_SCREW
29D1 29D7
NB_RST_IN_L_R
14C2 19C7
NB_SB_SYNC_L
14C2 19C6
NB_TV_DCONSEL0
56B3 57A8
56B1 56D3

NB_TV_DCONSEL1

56B2
57A7
56B3 57A8
56B1 56D3

NB_VCCSM_LF1
NB_VCCSM_LF2
NB_VCCSM_LF4

56B2
56B3 57A8

NB_VCCSM_LF5

56B2

NB_VTTLF_CAP1

56B1 56D3

NB_VTTLF_CAP2

19C3

NB_VTTLF_CAP3

14C6 33C7

ODD_PWR_EN_SLOW_STAR
T
ODD_PWR_EN_SLOW_STAR
T_L
ODD_PWR_EN_SLOW_STAR
T_L_R

14C6 33B7
14C6 33B7

NB_CFG<3> @mlb_noldo_lib.MLB_NOLDO
TP_NB_CFG3 @mlb_noldo_lib.MLB_NOLDO
NB_CFG<4> @mlb_noldo_lib.MLB_NOLDO
TP_NB_CFG4 @mlb_noldo_lib.MLB_NOLDO
NB_CFG<5> @mlb_noldo_lib.MLB_NOLDO
NB_CFG<6> @mlb_noldo_lib.MLB_NOLDO
TP_NB_CFG6 @mlb_noldo_lib.MLB_NOLDO
NB_CFG<7> @mlb_noldo_lib.MLB_NOLDO
NB_CFG<8> @mlb_noldo_lib.MLB_NOLDO
TP_NB_CFG8 @mlb_noldo_lib.MLB_NOLDO
NB_CFG<9> @mlb_noldo_lib.MLB_NOLDO
NB_CFG<10> @mlb_noldo_lib.MLB_NOLDO
TP_NB_CFG10 @mlb_noldo_lib.MLB_NOLDO
NB_CFG<11> @mlb_noldo_lib.MLB_NOLDO
TP_NB_CFG11 @mlb_noldo_lib.MLB_NOLDO
NB_CFG<12> @mlb_noldo_lib.MLB_NOLDO
TP_NB_CFG12 @mlb_noldo_lib.MLB_NOLDO
NB_CFG<13> @mlb_noldo_lib.MLB_NOLDO
TP_NB_CFG13 @mlb_noldo_lib.MLB_NOLDO
NB_CFG<14> @mlb_noldo_lib.MLB_NOLDO
TP_NB_CFG14 @mlb_noldo_lib.MLB_NOLDO
NB_CFG<15> @mlb_noldo_lib.MLB_NOLDO
TP_NB_CFG15 @mlb_noldo_lib.MLB_NOLDO
NB_CFG<16> @mlb_noldo_lib.MLB_NOLDO
NB_CFG<17> @mlb_noldo_lib.MLB_NOLDO
TP_NB_CFG17 @mlb_noldo_lib.MLB_NOLDO
NB_CFG<18> @mlb_noldo_lib.MLB_NOLDO
NB_CFG<19> @mlb_noldo_lib.MLB_NOLDO
NB_CFG<20> @mlb_noldo_lib.MLB_NOLDO
NB_CLK100M_GCLKIN_N @mlb_noldo_lib.MLB_NOLDO
NB_CLK100M_GCLKIN_P @mlb_noldo_lib.MLB_NOLDO
NB_CLK_DREFCLKIN_N @mlb_noldo_lib.MLB_NOLDO
NB_CLK_DREFCLKIN_P @mlb_noldo_lib.MLB_NOLDO
NB_CLK_DREFSSCLKIN_N @mlb_noldo_lib.MLB_NOLDO
NB_CLK_DREFSSCLKIN_P @mlb_noldo_lib.MLB_NOLDO
NB_FSB_VREF @mlb_noldo_lib.MLB_NOLDO
NB_FSB_XRCOMP @mlb_noldo_lib.MLB_NOLDO
NB_FSB_XSCOMP @mlb_noldo_lib.MLB_NOLDO
NB_FSB_XSWING @mlb_noldo_lib.MLB_NOLDO
NB_FSB_YRCOMP @mlb_noldo_lib.MLB_NOLDO
NB_FSB_YSCOMP @mlb_noldo_lib.MLB_NOLDO
NB_FSB_YSWING @mlb_noldo_lib.MLB_NOLDO
NB_ISENSE @mlb_noldo_lib.MLB_NOLDO
NB_ISENSE_R1_N @mlb_noldo_lib.MLB_NOLDO
NB_ISENSE_R1_P @mlb_noldo_lib.MLB_NOLDO
NB_ISENSE_R2 @mlb_noldo_lib.MLB_NOLDO
NB_ISENSE_VCC @mlb_noldo_lib.MLB_NOLDO
NB_RIGHT_DOWN_SCREW @mlb_noldo_lib.MLB_NOLDO
NB_RST_IN_L_R @mlb_noldo_lib.MLB_NOLDO
NB_SB_SYNC_L @mlb_noldo_lib.MLB_NOLDO
NB_TV_DCONSEL0 @mlb_noldo_lib.MLB_NOLDO
NB_TV_DCONSEL1 @mlb_noldo_lib.MLB_NOLDO
NB_VCCSM_LF1 @mlb_noldo_lib.MLB_NOLDO
NB_VCCSM_LF2 @mlb_noldo_lib.MLB_NOLDO
NB_VCCSM_LF4 @mlb_noldo_lib.MLB_NOLDO
NB_VCCSM_LF5 @mlb_noldo_lib.MLB_NOLDO
NB_VTTLF_CAP1 @mlb_noldo_lib.MLB_NOLDO
NB_VTTLF_CAP2 @mlb_noldo_lib.MLB_NOLDO
NB_VTTLF_CAP3 @mlb_noldo_lib.MLB_NOLDO
ODD_PWR_EN_SLOW_START @mlb_noldo_lib.MLB_NOLDO
ODD_PWR_EN_SLOW_START_L @mlb_noldo_lib.MLB_NOLDO
ODD_PWR_EN_SLOW_START_L_R @mlb_noldo_lib.MLB_NOLDO

6D4 14C6

ONEWIRE_DCIN_DIV

65C5

6D3

ONEWIRE_EN

65C7

ONEWIRE_DCIN_DIV @mlb_noldo_lib.MLB_NOLDO
ONEWIRE_EN @mlb_noldo_lib.MLB_NOLDO
ONEWIRE_ESD
ONEWIRE_ESD @mlb_noldo_lib.MLB_NOLDO
ONEWIRE_OV
ONEWIRE_OV @mlb_noldo_lib.MLB_NOLDO
ONEWIRE_PU_EN
ONEWIRE_PU_EN @mlb_noldo_lib.MLB_NOLDO
ONEWIRE_PU_EN_L
ONEWIRE_PU_EN_L @mlb_noldo_lib.MLB_NOLDO
ONEWIRE_PWR_EN_L
ONEWIRE_PWR_EN_L @mlb_noldo_lib.MLB_NOLDO
ONEWIRE_PWR_EN_L_DIV ONEWIRE_PWR_EN_L_DIV @mlb_noldo_lib.MLB_NOLDO
P0V52_SMC_LSREF
P0V52_SMC_LSREF @mlb_noldo_lib.MLB_NOLDO
P1V8S0_EN_L_RC
P1V8S0_EN_L_RC @mlb_noldo_lib.MLB_NOLDO
P3V3S0_EN_RC
P3V3S0_EN_RC @mlb_noldo_lib.MLB_NOLDO
P3V3S3_EN_L_RC
P3V3S3_EN_L_RC @mlb_noldo_lib.MLB_NOLDO
P3V42G3H5_BOOST
P3V42G3H5_BOOST @mlb_noldo_lib.MLB_NOLDO
P3V42G3H_FB
P3V42G3H_FB @mlb_noldo_lib.MLB_NOLDO
P5VS0_EN_RC
P5VS0_EN_RC @mlb_noldo_lib.MLB_NOLDO
P5VS3_EN_L_RC
P5VS3_EN_L_RC @mlb_noldo_lib.MLB_NOLDO
PATA_PWR_EN_L
PATA_PWR_EN_L @mlb_noldo_lib.MLB_NOLDO
PBUS_S0_SMC_VSENSE
PBUS_S0_SMC_VSENSE @mlb_noldo_lib.MLB_NOLDO
PBUS_SMC_VSENSE_EN
PBUS_SMC_VSENSE_EN @mlb_noldo_lib.MLB_NOLDO
PBUS_SMC_VSENSE_EN_L PBUS_SMC_VSENSE_EN_L @mlb_noldo_lib.MLB_NOLDO
PCIE_A_D2R_C_N
PCIE_A_D2R_C_N @mlb_noldo_lib.MLB_NOLDO
PCIE_A_D2R_C_P
PCIE_A_D2R_C_P @mlb_noldo_lib.MLB_NOLDO
PCIE_A_D2R_N
PCIE_A_D2R_N @mlb_noldo_lib.MLB_NOLDO
PCIE_A_D2R_P
PCIE_A_D2R_P @mlb_noldo_lib.MLB_NOLDO
PCIE_A_R2D_C_N
PCIE_A_R2D_C_N @mlb_noldo_lib.MLB_NOLDO
PCIE_A_R2D_C_P
PCIE_A_R2D_C_P @mlb_noldo_lib.MLB_NOLDO
PCIE_A_R2D_N
PCIE_A_R2D_N @mlb_noldo_lib.MLB_NOLDO
PCIE_A_R2D_P
PCIE_A_R2D_P @mlb_noldo_lib.MLB_NOLDO
PCIE_B_D2R_N
PCIE_B_D2R_N @mlb_noldo_lib.MLB_NOLDO
PCIE_B_D2R_P
PCIE_B_D2R_P @mlb_noldo_lib.MLB_NOLDO
PCIE_B_R2D_C_N
PCIE_B_R2D_C_N @mlb_noldo_lib.MLB_NOLDO
PCIE_B_R2D_C_P
PCIE_B_R2D_C_P @mlb_noldo_lib.MLB_NOLDO
PCIE_B_R2D_N
PCIE_B_R2D_N @mlb_noldo_lib.MLB_NOLDO
PCIE_B_R2D_P
PCIE_B_R2D_P @mlb_noldo_lib.MLB_NOLDO
PCIE_C_D2R_N
PCIE_C_D2R_N @mlb_noldo_lib.MLB_NOLDO
PCIE_C_D2R_N_SPN @mlb_noldo_lib.MLB_NOLDO
PCIE_C_D2R_P
PCIE_C_D2R_P @mlb_noldo_lib.MLB_NOLDO
PCIE_C_D2R_P_SPN @mlb_noldo_lib.MLB_NOLDO
PCIE_C_R2D_C_N
PCIE_C_R2D_C_N @mlb_noldo_lib.MLB_NOLDO
PCIE_C_R2D_C_N_SPN @mlb_noldo_lib.MLB_NOLDO
PCIE_C_R2D_C_P
PCIE_C_R2D_C_P @mlb_noldo_lib.MLB_NOLDO
PCIE_C_R2D_C_P_SPN @mlb_noldo_lib.MLB_NOLDO
PCIE_D_D2R_N
PCIE_D_D2R_N @mlb_noldo_lib.MLB_NOLDO
PCIE_D_D2R_N_SPN @mlb_noldo_lib.MLB_NOLDO
PCIE_D_D2R_P
PCIE_D_D2R_P @mlb_noldo_lib.MLB_NOLDO
PCIE_D_D2R_P_SPN @mlb_noldo_lib.MLB_NOLDO
PCIE_D_R2D_C_N
PCIE_D_R2D_C_N @mlb_noldo_lib.MLB_NOLDO
PCIE_D_R2D_C_N_SPN @mlb_noldo_lib.MLB_NOLDO
PCIE_D_R2D_C_P
PCIE_D_R2D_C_P @mlb_noldo_lib.MLB_NOLDO
PCIE_D_R2D_C_P_SPN @mlb_noldo_lib.MLB_NOLDO
PCIE_E_D2R_N
PCIE_E_D2R_N @mlb_noldo_lib.MLB_NOLDO
PCIE_E_D2R_N_SPN @mlb_noldo_lib.MLB_NOLDO
PCIE_E_D2R_P
PCIE_E_D2R_P @mlb_noldo_lib.MLB_NOLDO
PCIE_E_D2R_P_SPN @mlb_noldo_lib.MLB_NOLDO
PCIE_E_R2D_C_N
PCIE_E_R2D_C_N @mlb_noldo_lib.MLB_NOLDO
PCIE_E_R2D_C_N_SPN @mlb_noldo_lib.MLB_NOLDO
PCIE_E_R2D_C_P
PCIE_E_R2D_C_P @mlb_noldo_lib.MLB_NOLDO
PCIE_E_R2D_C_P_SPN @mlb_noldo_lib.MLB_NOLDO
PCIE_F_D2R_N
PCIE_F_D2R_N @mlb_noldo_lib.MLB_NOLDO
PCIE_F_D2R_N_SPN @mlb_noldo_lib.MLB_NOLDO
PCIE_F_D2R_P
PCIE_F_D2R_P @mlb_noldo_lib.MLB_NOLDO
PCIE_F_D2R_P_SPN @mlb_noldo_lib.MLB_NOLDO

6D4 14C6
6D3
14C6 20C7
6D4 14C6
6D3
14C6 20C7
6D4 14C6
6D3
14C6 20B7
6D4 14C6
6D3
6D4 14C6
6D3
6D4 14C6
6D3
6D4 14C6
6D3
6D4 14C6
6D3
6D4 14C6
6D3
14C6 20C5
6D4 14C6
6D3
14C6 20B5
14C6 20B5
14B6 20A5
14C4 33B2 33C4
14C4 33C2 33C4
14C4 33B3 33C2
14C4 33B3 33C2
14C4 33A4 33C2
14B4 33A3 33C2
12C4
12A6
12A6
12A6
12A6
12A6
12A6
62A6
62A7
62A7
62A6
62A6
6A8
14B6
14B6 22A6
14D6
14C6
16B4
16B4
16B8
16B8
17A4
17A4
17B4
34C7
34C6
34C5

65C5

PCIE_F_R2D_C_N

PCIE_F_R2D_C_P

65C6
65B7

PCIE_WAKE_L

65C8

PCI_AD<0>

65C7

PCI_AD<1>

65C6

PCI_AD<2>

46D3

PCI_AD<3>

63A5

PCI_AD<4>

63B5

PCI_AD<5>

63C5

PCI_AD<6>

63D2

PCI_AD<7>

5D7 63D2

PCI_AD<8>

63C5

PCI_AD<9>

63D5

PCI_AD<10>

23B3 23C3

PCI_AD<11>

48C6

PCI_AD<12>

48C8

PCI_AD<13>

48C7

PCI_AD<14>

36D6

PCI_AD<15>

36D6

PCI_AD<16>

22D4 36D5

PCI_AD<17>

22D4 36D5

PCI_AD<18>

22D4 36C5

PCI_AD<19>

22D4 36C5

PCI_AD<20>

36C6

PCI_AD<21>

36C6

PCI_AD<22>

22D4 43C7

PCI_AD<23>

22D4 43C7

PCI_AD<24>

22D4 43B7

PCI_AD<25>

22D4 43B7

PCI_AD<26>

43B6

PCI_AD<27>

43B6

PCI_AD<28>

6C4 22D4

PCI_AD<29>

6C3

PCI_AD<30>

6C4 22D4

PCI_AD<31>

6C3

PCI_CLK_FW

6C4 22D4

PCI_CLK_PORT80_LPC

6C3

PCI_CLK_SB

6C4 22D4

PCI_CLK_SMC

6C3

PCI_CLK_TPM

6C4 22D4

PCI_C_BE_L<0>

6C3

PCI_C_BE_L<1>

6C4 22D4

PCI_C_BE_L<2>

6C3

PCI_C_BE_L<3>

6C4 22D4

PCI_DEVSEL_L

6C3

PCI_FRAME_L

6C4 22D4

PCI_GNT3_L

6C3

PCI_IRDY_L

6C4 22C4

PCI_LOCK_L

6C3

PCI_PAR
PCI_PERR_L

6C4 22C4
PCI_PME_FW_L
6C3
PCI_REQ0_L
6C4 22C4
PCI_REQ1_L
6C3
PCI_REQ2_L
6C4 22C4
PCI_REQ3_L
6C3
PCI_RST_L
6C4 22C4
PCI_SERR_L
6C3
PCI_STOP_L
6C4 22C4
PCI_TRDY_L
6C3
PEG_COMP

PCIE_F_R2D_C_N @mlb_noldo_lib.MLB_NOLDO
PCIE_F_R2D_C_N_SPN @mlb_noldo_lib.MLB_NOLDO
PCIE_F_R2D_C_P @mlb_noldo_lib.MLB_NOLDO
PCIE_F_R2D_C_P_SPN @mlb_noldo_lib.MLB_NOLDO
PCIE_WAKE_L @mlb_noldo_lib.MLB_NOLDO
PCI_AD<0> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<1> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<2> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<3> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<4> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<5> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<6> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<7> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<8> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<9> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<10> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<11> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<12> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<13> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<14> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<15> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<16> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<17> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<18> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<19> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<20> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<21> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<22> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<23> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<24> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<25> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<26> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<27> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<28> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<29> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<30> @mlb_noldo_lib.MLB_NOLDO
PCI_AD<31> @mlb_noldo_lib.MLB_NOLDO
PCI_CLK_FW @mlb_noldo_lib.MLB_NOLDO
PCI_CLK_PORT80_LPC @mlb_noldo_lib.MLB_NOLDO
PCI_CLK_SB @mlb_noldo_lib.MLB_NOLDO
PCI_CLK_SMC @mlb_noldo_lib.MLB_NOLDO
PCI_CLK_TPM @mlb_noldo_lib.MLB_NOLDO
PCI_C_BE_L<0> @mlb_noldo_lib.MLB_NOLDO
PCI_C_BE_L<1> @mlb_noldo_lib.MLB_NOLDO
PCI_C_BE_L<2> @mlb_noldo_lib.MLB_NOLDO
PCI_C_BE_L<3> @mlb_noldo_lib.MLB_NOLDO
PCI_DEVSEL_L @mlb_noldo_lib.MLB_NOLDO
PCI_FRAME_L @mlb_noldo_lib.MLB_NOLDO
PCI_GNT3_L @mlb_noldo_lib.MLB_NOLDO
PCI_IRDY_L @mlb_noldo_lib.MLB_NOLDO
PCI_LOCK_L @mlb_noldo_lib.MLB_NOLDO
PCI_PAR - @mlb_noldo_lib.MLB_NOLDO
PCI_PERR_L @mlb_noldo_lib.MLB_NOLDO
PCI_PME_FW_L @mlb_noldo_lib.MLB_NOLDO
PCI_REQ0_L @mlb_noldo_lib.MLB_NOLDO
PCI_REQ1_L @mlb_noldo_lib.MLB_NOLDO
PCI_REQ2_L @mlb_noldo_lib.MLB_NOLDO
PCI_REQ3_L @mlb_noldo_lib.MLB_NOLDO
PCI_RST_L @mlb_noldo_lib.MLB_NOLDO
PCI_SERR_L @mlb_noldo_lib.MLB_NOLDO
PCI_STOP_L @mlb_noldo_lib.MLB_NOLDO
PCI_TRDY_L @mlb_noldo_lib.MLB_NOLDO
PEG_COMP - @mlb_noldo_lib.MLB_NOLDO

6C4 22C4
6C3
6B4 22C4
6B3
23C8 36C6 43C6
22B7 38C5
22B7 38C5

22B7 38C5
22B7 38C5
22B7 38C5
22B7 38C5
22B7 38C5
22B7 38C5
22B7 38C5
22B7 38C5
22B7 38C5
22B7 38C5
22B7 38B5
22B7 38B5
22B7 38B5
22B7 38B5
22B7 38B5
22B7 38B5

22B7 38B5
22A7 38B6
22A7 38B5
22A7 38B5
22A7 38B5
22A7 38B5
22A7 38B5
22A7 38B5
22A7 38B5
22A7 38B5
22A7 38B5
22A7 38B5
22A7 38B5
22A7 38B5
33D6 38A5
5C2 33D6 47C5

22A6 33D6
33D6 45C8
33D6 53C6
22B6 38B5
22B6 38B5
22B6 38B5
22B6 38B5
22A6 26D3 38A5
22A7 26D3 38A5
22B6 38A5
22A6 26D3 38A5
22A6 26D3
22A6 38B5
22A6 26D3 38A5
22B5 38A5
22B6 26C3
22B6 26C3

22B6 26C3
22B6 26C3 38A5
22A6 38A6
22A6 26D3 38A5
22A6 26D3 38A5
22A6 26D3 38A5
13D3
104

8
PEG_D2R_N<0>

PEG_D2R_N<0> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N0_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N<1> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N<2> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N2_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N<3> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N3_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N<4> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N4_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N<5> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N5_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N<6> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N6_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N<7> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N7_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N<8> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N8_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N<9> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N9_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N<10> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N10_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N<11> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N11_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N<12> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N12_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N<13> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N13_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N<14> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N14_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N<15> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_N15_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<0> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P0_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<1> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<2> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P2_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<3> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P3_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<4> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P4_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<5> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P5_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<6> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P6_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<7> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P7_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<8> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P8_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<9> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P9_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<10> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P10_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<11> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P11_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<12> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P12_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<13> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P13_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<14> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P14_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P<15> @mlb_noldo_lib.MLB_NOLDO
PEG_D2R_P15_SPN @mlb_noldo_lib.MLB_NOLDO

PEG_D2R_N<1>
PEG_D2R_N<2>

PEG_D2R_N<3>

PEG_D2R_N<4>

PEG_D2R_N<5>

PEG_D2R_N<6>

PEG_D2R_N<7>

PEG_D2R_N<8>

PEG_D2R_N<9>

PEG_D2R_N<10>

PEG_D2R_N<11>

PEG_D2R_N<12>

PEG_D2R_N<13>

PEG_D2R_N<14>

PEG_D2R_N<15>

PEG_D2R_P<0>

PEG_D2R_P<1>
PEG_D2R_P<2>

PEG_D2R_P<3>

PEG_D2R_P<4>

B
PEG_D2R_P<5>

PEG_D2R_P<6>

PEG_D2R_P<7>

PEG_D2R_P<8>

PEG_D2R_P<9>

PEG_D2R_P<10>

PEG_D2R_P<11>

PEG_D2R_P<12>

A
PEG_D2R_P<13>

PEG_D2R_P<14>

PEG_D2R_P<15>

7
6D6 13D3

PEG_R2D_C_N<0>

6D5

PEG_R2D_C_N<1>

13D3 68B6

PEG_R2D_C_N<2>

6D6 13D3

PEG_R2D_C_N<3>

6D5

PEG_R2D_C_N<4>

6C6 13D3
6C5

PEG_R2D_C_N<5>

6C6 13D3
6C5

PEG_R2D_C_N<6>

6C6 13D3
6C5

PEG_R2D_C_N<7>

6C6 13D3
6C5

PEG_R2D_C_N<8>

6C6 13D3
6C5

PEG_R2D_C_N<9>

6C6 13D3
6C5

PEG_R2D_C_N<10>

6C6 13D3
6C5

PEG_R2D_C_N<11>

6C6 13C3
6C5

PEG_R2D_C_N<12>

6C6 13C3
6C5

PEG_R2D_C_N<13>

6C6 13C3
6C5

PEG_R2D_C_N<14>

6C6 13C3
6C5

PEG_R2D_C_N<15>

6C6 13C3
6C5

PEG_R2D_C_P<0>

6C6 13C3

PEG_R2D_C_P<1>

6C5

PEG_R2D_C_P<2>

6C6 13C3

PEG_R2D_C_P<3>

6C5

PEG_R2D_C_P<4>

13C3 68B6
6C6 13C3

PEG_R2D_C_P<5>

6C5
6C6 13C3

PEG_R2D_C_P<6>

6C5
6C6 13C3

PEG_R2D_C_P<7>

6C5
6C6 13C3

PEG_R2D_C_P<8>

6C5
6C6 13C3

PEG_R2D_C_P<9>

6C5
6C6 13C3

PEG_R2D_C_P<10>

6C5
6C6 13C3

PEG_R2D_C_P<11>

6C5
6C6 13C3

PEG_R2D_C_P<12>

6C5
6C6 13C3

PEG_R2D_C_P<13>

6C5
6C6 13C3

PEG_R2D_C_P<14>

6C5
6C6 13C3

PEG_R2D_C_P<15>

6C5
6C6 13C3

PLT_RST_BUF_L

6C5

PLT_RST_GATED_L

6B6 13C3

PLT_RST_L

6B5
6B6 13C3

PM_BATLOW_L

6B5

PM_BMBUSY_L

PEG_R2D_C_N<0> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N<1> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N<2> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N<3> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N<4> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N4_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N<5> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N5_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N<6> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N6_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N<7> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N7_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N<8> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N8_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N<9> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N9_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N<10> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N10_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N<11> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N11_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N<12> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N12_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N<13> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N13_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N<14> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N14_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N<15> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_N15_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P<0> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P<1> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P<2> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P<3> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P<4> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P4_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P<5> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P5_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P<6> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P6_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P<7> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P7_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P<8> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P8_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P<9> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P9_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P<10> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P10_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P<11> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P11_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P<12> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P12_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P<13> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P13_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P<14> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P14_SPN @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P<15> @mlb_noldo_lib.MLB_NOLDO
PEG_R2D_C_P15_SPN @mlb_noldo_lib.MLB_NOLDO
PLT_RST_BUF_L @mlb_noldo_lib.MLB_NOLDO
PLT_RST_GATED_L @mlb_noldo_lib.MLB_NOLDO
PLT_RST_L @mlb_noldo_lib.MLB_NOLDO
NB_RST_IN_L @mlb_noldo_lib.MLB_NOLDO
PM_BATLOW_L @mlb_noldo_lib.MLB_NOLDO
PM_BMBUSY_L @mlb_noldo_lib.MLB_NOLDO

13C3 68C6

PM_CLKRUN_L

13C3 68C6

PM_DPRSLPVR

13C3 68B6

PM_DPRSLPVR_R

13B3 68B6

PM_EXTTS_L<0>

6B6 13B3
6B5

PM_LAN_ENABLE

6B6 13B3

PM_PWRBTN_L

6B5

PM_RI_L
PM_RSMRST_L

6B6 13B3
PM_SB_PWROK
6B5
PM_SLP_S3
6B6 13B3
PM_SLP_S3BATT
6B5
PM_SLP_S3_L
6B6 13B3
PM_SLP_S3_LS12V6
6B5
PM_SLP_S4_L
6B6 13B3
PM_SLP_S5_L
6B5
PM_STPCPU_L
6B6 13B3
PM_STPPCI_L
6B5
PM_SUS_STAT_L
6B6 13B3
PM_SYSRST_L
6B5
6B6 13B3
PM_THRMTRIP_L
6B5
PM_THRM_L
6B6 13B3
PP0V9_S0
6B5
6B6 13B3
6B5
6B6 13B3
6B5

PP1V2_S0
PP1V2_S3

13B3 68C6
13B3 68C6
13B3 68B6
13B3 68B6
6B6 13B3

PP1V5_S0_DPLL

6B5

PP1V5_S0_NB_3GPLL_F

6B6 13B3

PP1V5_S0_NB_QTVDAC

6B5

PP1V5_S0_NB_VCC3G

6B6 13B3

6B5

PP1V5_S0_NB_VCCA_3GP
LL
PP1V5_S0_NB_VCCA_DPL
LA
PP1V5_S0_NB_VCCA_DPL
LB
PP1V5_S0_NB_VCCA_HPL
L
PP1V5_S0_NB_VCCA_MPL
L
PP1V5_S0_NB_VCCD_QTV
DAC
PP1V5_S0_NB_VCCD_TVD
AC
PP1V5_S0_REG_P

6B6 13B3

PP1V5_S0_SB_VCC1_5_B

6B5

PP1V5_S0_SB_VCCDMIPL
L
PP1V5_S0_SB_VCCDMIPL
L_F
PP1V8_S0

6B5
6B6 13B3
6B5
6B6 13B3
6B5
6B6 13B3

6B6 13B3
6B5
6B6 13A3
6B5
6B6 13A3
6B5

PP1V8_S0_ANALOG_SDVO
_F
PP1V8_S0_TMDS_F

6B6 13A3
6B5

PP1V8_S3
6B6 13A3
6B5
26B3
26A3
22A6 26C3
14B7 26C1
23C1 45B8
14B6 23C5

PM_CLKRUN_L @mlb_noldo_lib.MLB_NOLDO
PM_DPRSLPVR @mlb_noldo_lib.MLB_NOLDO
PM_DPRSLPVR_R @mlb_noldo_lib.MLB_NOLDO
PM_EXTTS_L<0> @mlb_noldo_lib.MLB_NOLDO
DIMM_OVERTEMP_L @mlb_noldo_lib.MLB_NOLDO
PM_LAN_ENABLE @mlb_noldo_lib.MLB_NOLDO
PM_PWRBTN_L @mlb_noldo_lib.MLB_NOLDO
PM_RI_L - @mlb_noldo_lib.MLB_NOLDO
PM_RSMRST_L @mlb_noldo_lib.MLB_NOLDO
PM_SB_PWROK @mlb_noldo_lib.MLB_NOLDO
PM_SLP_S3 @mlb_noldo_lib.MLB_NOLDO
PM_SLP_S3BATT @mlb_noldo_lib.MLB_NOLDO
PM_SLP_S3_L @mlb_noldo_lib.MLB_NOLDO
PM_SLP_S3_LS12V6 @mlb_noldo_lib.MLB_NOLDO
PM_SLP_S4_L @mlb_noldo_lib.MLB_NOLDO
PM_SLP_S5_L @mlb_noldo_lib.MLB_NOLDO
PM_STPCPU_L @mlb_noldo_lib.MLB_NOLDO
PM_STPPCI_L @mlb_noldo_lib.MLB_NOLDO
PM_SUS_STAT_L @mlb_noldo_lib.MLB_NOLDO
PM_SYSRST_L @mlb_noldo_lib.MLB_NOLDO
XDP_DBRESET_L_R @mlb_noldo_lib.MLB_NOLDO
PM_THRMTRIP_L @mlb_noldo_lib.MLB_NOLDO
PM_THRM_L @mlb_noldo_lib.MLB_NOLDO
PP0V9_S0 - @mlb_noldo_lib.MLB_NOLDO
=PP0V9_S0_MEM_TERM @mlb_noldo_lib.MLB_NOLDO
=PP0V9_S0_MEM_REG @mlb_noldo_lib.MLB_NOLDO
=PP0V9_S0_MEM_TERM @mlb_noldo_lib.MLB_NOLDO
=PP0V9_S0_MEM_REG @mlb_noldo_lib.MLB_NOLDO
PP1V2_S0 - @mlb_noldo_lib.MLB_NOLDO
PP1V2_S3 - @mlb_noldo_lib.MLB_NOLDO
=PP1V2_S3_REG @mlb_noldo_lib.MLB_NOLDO
=PP1V2_S3_ENET @mlb_noldo_lib.MLB_NOLDO
=PP1V2_S3_REG @mlb_noldo_lib.MLB_NOLDO
=PP1V2_S3_ENET @mlb_noldo_lib.MLB_NOLDO
PP1V5_S0_DPLL @mlb_noldo_lib.MLB_NOLDO
PP1V5_S0_NB_3GPLL_F @mlb_noldo_lib.MLB_NOLDO
PP1V5_S0_NB_QTVDAC @mlb_noldo_lib.MLB_NOLDO
PP1V5_S0_NB_VCC3G @mlb_noldo_lib.MLB_NOLDO
PP1V5_S0_NB_VCCA_3GPLL @mlb_noldo_lib.MLB_NOLDO
PP1V5_S0_NB_VCCA_DPLLA @mlb_noldo_lib.MLB_NOLDO
PP1V5_S0_NB_VCCA_DPLLB @mlb_noldo_lib.MLB_NOLDO
PP1V5_S0_NB_VCCA_HPLL @mlb_noldo_lib.MLB_NOLDO
PP1V5_S0_NB_VCCA_MPLL @mlb_noldo_lib.MLB_NOLDO
PP1V5_S0_NB_VCCD_QTVDAC @mlb_noldo_lib.MLB_NOLDO
PP1V5_S0_NB_VCCD_TVDAC @mlb_noldo_lib.MLB_NOLDO
PP1V5_S0_REG_P @mlb_noldo_lib.MLB_NOLDO
PP1V5_S0_SB_VCC1_5_B @mlb_noldo_lib.MLB_NOLDO
PP1V5_S0_SB_VCCDMIPLL @mlb_noldo_lib.MLB_NOLDO
PP1V5_S0_SB_VCCDMIPLL_F @mlb_noldo_lib.MLB_NOLDO
PP1V8_S0 - @mlb_noldo_lib.MLB_NOLDO
=PP1V8_S0_TMDS @mlb_noldo_lib.MLB_NOLDO
=PP1V8_S0_FET @mlb_noldo_lib.MLB_NOLDO
=PP1V8_S0_TMDS @mlb_noldo_lib.MLB_NOLDO
=PP1V8_S0_FET @mlb_noldo_lib.MLB_NOLDO
PP1V8_S0_ANALOG_SDVO_F @mlb_noldo_lib.MLB_NOLDO
PP1V8_S0_TMDS_F @mlb_noldo_lib.MLB_NOLDO
PP1V8_S3 - @mlb_noldo_lib.MLB_NOLDO
=PP1V8_S3_1V2S3 @mlb_noldo_lib.MLB_NOLDO
=PP1V8_S3_MEM_NB_SENSE @mlb_noldo_lib.MLB_NOLDO
=PP1V8_S3_MEMVTT @mlb_noldo_lib.MLB_NOLDO
=PP1V8_S3_P1V8S0 @mlb_noldo_lib.MLB_NOLDO
=PP1V8_S3_REG @mlb_noldo_lib.MLB_NOLDO
=PP1V8_S3_MEM @mlb_noldo_lib.MLB_NOLDO
=PP1V8_S3_REG @mlb_noldo_lib.MLB_NOLDO
=PP1V8_S3_P1V8S0 @mlb_noldo_lib.MLB_NOLDO

5C2 23C8 38A5 45D5 47C6


53C6
14B7 23C3 58D8
14B6
6B2 14B7 45B8
6B1 28C4 29C4

PP1V8_S3_MEMVTT_VDDQ

23C3 45D8

PP1V8_S3_R

23C3 45D8

PP2V5_S0_NB_CRTDAC_F

23D5
23C1 45D8

PP2V5_S0_NB_CRTDAC_F
OLLOW
PP2V5_S0_NB_VCCA_CRT
DAC
PP2V5_S3

23C3 26A6
48C8 63B7
60C7
23C3 45C5 63A7 63A7 63B8
63B7
23C3 45C5 60C8 61B8 63D6

PP2V5_S3_ENET_AVDD

23C3 45C5 46D3

PP2V5_S3_ENET_AVDD_F

23C8 32C4

PP3V3_AUDIO_CODEC

23C8 32C4

PP3V3_AVREF_SMC

5C2 23C5 45D5 46D3 47C5


53C6
23C5 26C5 45C8

PP3V3_G3C_SB_RTC_D

26C6

PP3V3_LCDVDD_SW

7C6 14B6 21C2 46B3

PP3V3_LCDVDD_SW_F

23C8 45B8

PP3V3_S0_ANALOG_SDVO
_F
PP3V3_S0_ANALOG_TMDS
_F
PP3V3_S0_AUDIO_F

5A2 64D7
30D4 64D6
31B3 63B2 64D8

PP3V3_S0_AUDIO_SPDIF
30D4 64D6
PP3V3_S0_CK410_VDD48
31B3 63B2 64D8
PP3V3_S0_CK410_VDDA
63B4
5A2 64C4
60B2 63B5 64C6
36A8 36D7 64C3
60B2 63B5 64C6

PP3V3_S0_CK410_VDD_C
PU_SRC
PP3V3_S0_CK410_VDD_P
CI
PP3V3_S0_CK410_VDD_R
EF
PP3V3_S0_IMVP6_3V3

36A8 36D7 64C3


PP3V3_S0_LCD_F
19D5
PP3V3_S0_NB_TVDAC
19A4
PP3V3_S0_NB_TVDAC_F
19A7
17D6 19B2
17D6 19A2
17C6 19D4
17C6 19D4
17C6 19C4
17C6 19C4
17B6 19A5

PP3V3_S0_NB_TVDAC_FO
LLOW
PP3V3_S0_NB_VCCA_TVB
G
PP3V3_S0_NB_VCCA_TVD
ACA
PP3V3_S0_NB_VCCA_TVD
ACB
PP3V3_S0_NB_VCCA_TVD
ACC
PP3V3_S0_PVCC1_TMDS_
F
PP3V3_S0_PVCC2_TMDS_
F
PP3V3_S0_TPM_3VSB

17C6 19A5
PP3V3_S3
62B8
22C1 24D5 25B6
24B5 25A5
25A7
5B2 64C7
64B6 68D6 68D6
63B3 64B8
64B6 68D6 68D6
63B3 64B8
68C4 68D3
68B4 68D3
5A2 64C4
60B5 64C3
61C4 64C3
31C6 64C3
63A5 64C3
61B1 64C6
19C7 19C8 28B2 28D4 28D6
29B2 29D4 29D6 64C3
61B1 64C6
63A5 64C3

=PP1V8_S3_MEM_NB_SENSE @mlb_noldo_lib.MLB_NOLDO
=PP1V8_S3_MEMVTT @mlb_noldo_lib.MLB_NOLDO
=PP1V8_S3_MEM @mlb_noldo_lib.MLB_NOLDO
=PP1V8_S3_1V2S3 @mlb_noldo_lib.MLB_NOLDO
PP1V8_S3_MEMVTT_VDDQ @mlb_noldo_lib.MLB_NOLDO
PP1V8_S3_R @mlb_noldo_lib.MLB_NOLDO
PP2V5_S0_NB_CRTDAC_F @mlb_noldo_lib.MLB_NOLDO
PP2V5_S0_NB_CRTDAC_FOLLOW @mlb_noldo_lib.MLB_NOLDO
PP2V5_S0_NB_VCCA_CRTDAC @mlb_noldo_lib.MLB_NOLDO
PP2V5_S3 - @mlb_noldo_lib.MLB_NOLDO
=PP2V5_S3_REG @mlb_noldo_lib.MLB_NOLDO
=PP2V5_S3_ENET @mlb_noldo_lib.MLB_NOLDO
=PP2V5_S3_REG @mlb_noldo_lib.MLB_NOLDO
=PP2V5_S3_ENET @mlb_noldo_lib.MLB_NOLDO
PP2V5_S3_ENET_AVDD @mlb_noldo_lib.MLB_NOLDO
PP2V5_S3_ENET_AVDD_F @mlb_noldo_lib.MLB_NOLDO
PP3V3_AUDIO_CODEC @mlb_noldo_lib.MLB_NOLDO
PP3V3_AVREF_SMC @mlb_noldo_lib.MLB_NOLDO
PP3V3_G3C_SB_RTC_D @mlb_noldo_lib.MLB_NOLDO
PP3V3_S5_SB_RTC @mlb_noldo_lib.MLB_NOLDO
PP3V3_LCDVDD_SW @mlb_noldo_lib.MLB_NOLDO
PP3V3_LCDVDD_SW_F @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_ANALOG_SDVO_F @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_ANALOG_TMDS_F @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_AUDIO_F @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_AUDIO_SPDIF @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_CK410_VDD48 @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_CK410_VDDA @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_CK410_VDD_CPU_SRC @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_CK410_VDD_PCI @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_CK410_VDD_REF @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_IMVP6_3V3 @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_LCD_F @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_NB_TVDAC @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_NB_TVDAC_F @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_NB_TVDAC_FOLLOW @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_NB_VCCA_TVBG @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_NB_VCCA_TVDACA @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_NB_VCCA_TVDACB @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_NB_VCCA_TVDACC @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_PVCC1_TMDS_F @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_PVCC2_TMDS_F @mlb_noldo_lib.MLB_NOLDO
PP3V3_S0_TPM_3VSB @mlb_noldo_lib.MLB_NOLDO
PP3V3_S3 - @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_PDCISENS @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_FW @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_AIRPORT_AUX @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_RSTGATE @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_PCI @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_SMS @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_TPM @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_2V5S3 @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_ENET @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_BT @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_FET @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_SMBUS_SMC_RMT @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_TPM @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_SMS @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_SMBUS_SMC_RMT @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_RSTGATE @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_PDCISENS @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_PCI @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_FW @mlb_noldo_lib.MLB_NOLDO

61C4 64C3
31C6 64C3
19C7 19C8 28B2 28D4 28D6
29B2 29D4 29D6 64C3
60B5 64C3
31C5
61B2
19D3

19D3
17D6 19D1
5A2 64C4
60C2 64C6
36D3 64C3
60C2 64C6
36D3 64C3
36D5 37D8
37D7
54D6
45D2 46C6
26D4
21D6 24B3 25A4 26D3
67C5
67B2
68C4 68D6
68B1 68B4 68D6

57B3 57C8 57C8 57D8


56B8 56D8
32D5
32C7
32D6
32D5
32C5
58D7
67B3
19C3
19C2
19C3
17C6 19B1
17C6 19C1
17C6 19B1
17C6 19B1

68C4 68C6
68C4 68C7
53C4
5A2 64B4
61C1 64B3
38D5 64B3
43C3 64B3
26B3 64B3
38C5 64B3
46D5 52C7 64B3
46D5 53C2 64B3
60C4 60D6 64B3
36A5 36B4 36B5 36C8 36D6
36D8 64B3
44C6 64B3
63D3 64B6
27D3 64B3

46D5 53C2 64B3


46D5 52C7 64B3
27D3 64B3
26B3 64B3
61C1 64B3
38C5 64B3
38D5 64B3
105

=PP3V3_S3_FET @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_ENET @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_BT @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_AIRPORT_AUX @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S3_2V5S3 @mlb_noldo_lib.MLB_NOLDO
PP3V3_S3_AIRPORT_AUX PP3V3_S3_AIRPORT_AUX_CONN _CONN
@mlb_noldo_lib.MLB_NOLDO
PP3V3_S3_BT_F
PP3V3_S3_BT_F @mlb_noldo_lib.MLB_NOLDO
PP3V3_S3_FW_AVDD
PP3V3_S3_FW_AVDD @mlb_noldo_lib.MLB_NOLDO
PP3V3_S3_ST_ACCEL
PP3V3_S3_ST_ACCEL @mlb_noldo_lib.MLB_NOLDO
PP3V3_S5
PP3V3_S5 - @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_LCD @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_FWLATEVG @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_P3V3S3 @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_P3V3S0 @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_ROM @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_SB_IO @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_SB_VCCSUS3_3_USB @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_SB_PM @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_SB_VCCSUS3_3 @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_REG @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_SB @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_SB_USB @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_SB_VCCSUS3_3_USB @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_SB_VCCSUS3_3 @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_SB_USB @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_SB_PM @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_SB_IO @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_SB @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_ROM @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_REG @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_P3V3S3 @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_P3V3S0 @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_LCD @mlb_noldo_lib.MLB_NOLDO
=PP3V3_S5_FWLATEVG @mlb_noldo_lib.MLB_NOLDO
PP3V3_S5_FWLATEVG
PP3V3_S5_FWLATEVG @mlb_noldo_lib.MLB_NOLDO
PP3V3_S5_FWLATEVG_F PP3V3_S5_FWLATEVG_F @mlb_noldo_lib.MLB_NOLDO
PP3V3_S5_REG_P
PP3V3_S5_REG_P @mlb_noldo_lib.MLB_NOLDO
PP3V42G3H_SW
PP3V42G3H_SW @mlb_noldo_lib.MLB_NOLDO
PP3V42_G3H_LIDSWITCH PP3V42_G3H_LIDSWITCH_F _F
@mlb_noldo_lib.MLB_NOLDO
PP3V42_G3H_SMC_CLK_F PP3V42_G3H_SMC_CLK_F @mlb_noldo_lib.MLB_NOLDO
PP3V42_ONEWIRE
PP3V42_ONEWIRE @mlb_noldo_lib.MLB_NOLDO
PP4V5_AUDIO_ANALOG
PP4V5_AUDIO_ANALOG @mlb_noldo_lib.MLB_NOLDO
PP5V_INV
PP5V_INV - @mlb_noldo_lib.MLB_NOLDO
PP5V_INV_F
PP5V_INV_F @mlb_noldo_lib.MLB_NOLDO
PP5V_S0_AUDIO
PP5V_S0_AUDIO @mlb_noldo_lib.MLB_NOLDO
PP5V_S0_AUDIO_F
PP5V_S0_AUDIO_F @mlb_noldo_lib.MLB_NOLDO
PP5V_S0_AUDIO_PWR
PP5V_S0_AUDIO_PWR @mlb_noldo_lib.MLB_NOLDO
PP5V_S0_DVIPORT
PP5V_S0_DVIPORT @mlb_noldo_lib.MLB_NOLDO
PP5V_S0_DVIPORT_D
PP5V_S0_DVIPORT_D @mlb_noldo_lib.MLB_NOLDO
PP5V_S0_IMVP6_VDD
PP5V_S0_IMVP6_VDD @mlb_noldo_lib.MLB_NOLDO
PP5V_S0_SB_V5REF
PP5V_S0_SB_V5REF @mlb_noldo_lib.MLB_NOLDO
PP5V_S0_TMDS_FUSE
PP5V_S0_TMDS_FUSE @mlb_noldo_lib.MLB_NOLDO
PP5V_S3
PP5V_S3 - @mlb_noldo_lib.MLB_NOLDO
=PP5V_S3_IR @mlb_noldo_lib.MLB_NOLDO
=PP5V_S3_GEYSER @mlb_noldo_lib.MLB_NOLDO
=PP5V_S3_CAMERA @mlb_noldo_lib.MLB_NOLDO
=PP5V_S3_FET @mlb_noldo_lib.MLB_NOLDO
=PP5V_S3_SYSLED @mlb_noldo_lib.MLB_NOLDO
=PP5V_S3_IR @mlb_noldo_lib.MLB_NOLDO
=PP5V_S3_GEYSER @mlb_noldo_lib.MLB_NOLDO
=PP5V_S3_FET @mlb_noldo_lib.MLB_NOLDO
=PP5V_S3_CAMERA -

7
63D3 64B6

@mlb_noldo_lib.MLB_NOLDO
PP5V_S3_CAMERA_F @mlb_noldo_lib.MLB_NOLDO
PP5V_S3_GEYSER_F
PP5V_S3_GEYSER_F @mlb_noldo_lib.MLB_NOLDO
PP5V_S3_SYSLED_F
PP5V_S3_SYSLED_F @mlb_noldo_lib.MLB_NOLDO
PP5V_S3_USB2_EXTA
PP5V_S3_USB2_EXTA @mlb_noldo_lib.MLB_NOLDO
PP5V_S3_USB2_EXTA_F PP5V_S3_USB2_EXTA_F @mlb_noldo_lib.MLB_NOLDO
PP5V_S3_USB2_EXTB
PP5V_S3_USB2_EXTB @mlb_noldo_lib.MLB_NOLDO
PP5V_S3_USB2_EXTB_F PP5V_S3_USB2_EXTB_F @mlb_noldo_lib.MLB_NOLDO
PP5V_S5
PP5V_S5 - @mlb_noldo_lib.MLB_NOLDO
=PP5V_S5_1V8S3 @mlb_noldo_lib.MLB_NOLDO
=PP5V_S5_PATA @mlb_noldo_lib.MLB_NOLDO
=PP5V_S5_USB @mlb_noldo_lib.MLB_NOLDO
=PP5V_S5_P5VS0 @mlb_noldo_lib.MLB_NOLDO
=PP5V_S5_PWRCTL @mlb_noldo_lib.MLB_NOLDO
=PP5V_S5_REG @mlb_noldo_lib.MLB_NOLDO
=PP5V_S5_P5VS3 @mlb_noldo_lib.MLB_NOLDO
=PP5V_S5_SB @mlb_noldo_lib.MLB_NOLDO
=PP5V_S5_USB @mlb_noldo_lib.MLB_NOLDO
=PP5V_S5_SB @mlb_noldo_lib.MLB_NOLDO
=PP5V_S5_REG @mlb_noldo_lib.MLB_NOLDO
=PP5V_S5_PWRCTL @mlb_noldo_lib.MLB_NOLDO
=PP5V_S5_PATA @mlb_noldo_lib.MLB_NOLDO
=PP5V_S5_P5VS3 @mlb_noldo_lib.MLB_NOLDO
=PP5V_S5_P5VS0 @mlb_noldo_lib.MLB_NOLDO
=PP5V_S5_1V8S3 @mlb_noldo_lib.MLB_NOLDO
PP5V_S5_1V51V05S0_IN PP5V_S5_1V51V05S0_INTVCC TVCC
@mlb_noldo_lib.MLB_NOLDO
PP5V_S5_5V3V3S5_INTV PP5V_S5_5V3V3S5_INTVCC CC
@mlb_noldo_lib.MLB_NOLDO
PP5V_S5_REG_P
PP5V_S5_REG_P @mlb_noldo_lib.MLB_NOLDO
PP5V_S5_SB_V5REF_SUS PP5V_S5_SB_V5REF_SUS @mlb_noldo_lib.MLB_NOLDO
PP18V5_DCIN
PP18V5_DCIN @mlb_noldo_lib.MLB_NOLDO
PP18V5_DCIN_F
PP18V5_DCIN_F @mlb_noldo_lib.MLB_NOLDO
PP18V5_DCIN_ONEWIRE PP18V5_DCIN_ONEWIRE @mlb_noldo_lib.MLB_NOLDO
PP18V5_G3H
PP18V5_G3H @mlb_noldo_lib.MLB_NOLDO
=PP18V5_G3H_INRUSH @mlb_noldo_lib.MLB_NOLDO
=PP18V5_G3H_CHGR @mlb_noldo_lib.MLB_NOLDO
=PP18V5_G3H_INRUSH @mlb_noldo_lib.MLB_NOLDO
=PP18V5_G3H_CHGR @mlb_noldo_lib.MLB_NOLDO
PP18V5_S5_CHGR_SW_R PP18V5_S5_CHGR_SW_R @mlb_noldo_lib.MLB_NOLDO
PPBUSA_G3H
PPBUSA_G3H @mlb_noldo_lib.MLB_NOLDO
PPBUSB_G3H
PPBUSB_G3H @mlb_noldo_lib.MLB_NOLDO
=PPBUS_S5_YUKON_CTRL @mlb_noldo_lib.MLB_NOLDO
=PPVIN_S5_IMVP6 @mlb_noldo_lib.MLB_NOLDO
=PPVIN_S5_1V51V05S0 @mlb_noldo_lib.MLB_NOLDO
=PPBUSB_G3H @mlb_noldo_lib.MLB_NOLDO
=PPBUS_S5_INV @mlb_noldo_lib.MLB_NOLDO
=PPBUS_S5_FWPWRSW @mlb_noldo_lib.MLB_NOLDO
=PPVIN_S5_5V3V3S5 @mlb_noldo_lib.MLB_NOLDO
=PPVIN_S5_1V8S3 @mlb_noldo_lib.MLB_NOLDO
=PPVIN_S5_IMVP6 @mlb_noldo_lib.MLB_NOLDO
=PPVIN_S5_5V3V3S5 @mlb_noldo_lib.MLB_NOLDO
=PPVIN_S5_1V8S3 @mlb_noldo_lib.MLB_NOLDO
=PPVIN_S5_1V51V05S0 @mlb_noldo_lib.MLB_NOLDO
=PPBUS_S5_YUKON_CTRL @mlb_noldo_lib.MLB_NOLDO
=PPBUS_S5_INV @mlb_noldo_lib.MLB_NOLDO
=PPBUS_S5_FWPWRSW @mlb_noldo_lib.MLB_NOLDO
=PPBUSB_G3H @mlb_noldo_lib.MLB_NOLDO
=PPBUSA_G3H @mlb_noldo_lib.MLB_NOLDO
PPBUS_ALL_INV_CONN
PPBUS_ALL_INV_CONN @mlb_noldo_lib.MLB_NOLDO
PPBUS_S5_FWPWRSW_F
PPBUS_S5_FWPWRSW_F @mlb_noldo_lib.MLB_NOLDO
PPDCIN_G3H_R
PPDCIN_G3H_R @mlb_noldo_lib.MLB_NOLDO
PPFW_PORT0_VP
PPFW_PORT0_VP @mlb_noldo_lib.MLB_NOLDO
PPFW_PORT0_VP_F
PPFW_PORT0_VP_F @mlb_noldo_lib.MLB_NOLDO
PPFW_SWITCH
PPFW_SWITCH @mlb_noldo_lib.MLB_NOLDO
PP5V_S3_CAMERA_F

36A5 36B4 36B5 36C8 36D6


36D8 64B3
44C6 64B3
43C3 64B3
60C4 60D6 64B3
43C4
44C4
38D3
52B6
5A2 64A4
64A3 67C7
39A8 64A3
63D5 64A3
63C5 64A3
50D4 64A3
24C3 64A3
22C6 64A3
24B3 25D2 64A3
11B5 23D1 26C5 64A3
24A5 24B3 25B6 25D2 64A3
59B8 64A6
23A7 23B7 23D4 23D8 25C8
64A3
22D8 64A3
24B3 25D2 64A3
24A5 24B3 25B6 25D2 64A3
22D8 64A3
11B5 23D1 26C5 64A3
22C6 64A3
24C3 64A3
23A7 23B7 23D4 23D8 25C8
64A3
50D4 64A3
59B8 64A6
63D5 64A3
63C5 64A3
64A3 67C7
39A8 64A3
39A6 39B5
39A7
59B8
63D2
65A7
46A7
65C7
54A3 54D2 57C3 57C5
67D5
5B1 67D3
5D1
55B8 55B8 55C4
5D1
68A6 69B4 69C3
68A8 69C5
58D7
24D5 25D7
69C5
5A2 64B4
41D6 64B3
40D6 64B3
64B3 67A5
63D3 64B6
35B6 46B4 64B3
41D6 64B3
40D6 64B3
63D3 64B6
64B3 67A5

PPVBATT_G3C_RTC @mlb_noldo_lib.MLB_NOLDO
PPVBATT_G3C_RTC_R @mlb_noldo_lib.MLB_NOLDO
PPVBATT_G3H_PRE
PPVBATT_G3H_PRE @mlb_noldo_lib.MLB_NOLDO
PPVBATT_G3H_R
PPVBATT_G3H_R @mlb_noldo_lib.MLB_NOLDO
PPVBAT_G3H_CHGR_OUT PPVBAT_G3H_CHGR_OUT @mlb_noldo_lib.MLB_NOLDO
PPVBAT_G3H_CHGR_REG PPVBAT_G3H_CHGR_REG @mlb_noldo_lib.MLB_NOLDO
PPVCORE_CPU_S0
PPVCORE_CPU_S0 @mlb_noldo_lib.MLB_NOLDO
=PPVCORE_S0_CPU @mlb_noldo_lib.MLB_NOLDO
=PPVOUT_S0_IMVP6_REG @mlb_noldo_lib.MLB_NOLDO
=PPVCORE_S0_CPU @mlb_noldo_lib.MLB_NOLDO
PPVDCIN_G3H_PRE
PPVDCIN_G3H_PRE @mlb_noldo_lib.MLB_NOLDO
PPVIN_S5_1V51V05S0_R PPVIN_S5_1V51V05S0_R @mlb_noldo_lib.MLB_NOLDO
PPVIN_S5_5V3V3S5_R
PPVIN_S5_5V3V3S5_R @mlb_noldo_lib.MLB_NOLDO
PPVIN_S5_IMVP6_VIN
PPVIN_S5_IMVP6_VIN @mlb_noldo_lib.MLB_NOLDO
RSMRST_PWRGD
RSMRST_PWRGD @mlb_noldo_lib.MLB_NOLDO
5V3V3S5_PGOOD @mlb_noldo_lib.MLB_NOLDO
S0PWRGD_0V9_DIV
S0PWRGD_0V9_DIV @mlb_noldo_lib.MLB_NOLDO
S0PWRGD_1V2_DIV
S0PWRGD_1V2_DIV @mlb_noldo_lib.MLB_NOLDO
S0PWRGD_OK
S0PWRGD_OK @mlb_noldo_lib.MLB_NOLDO
SATA_A_D2R_N
SATA_A_D2R_N @mlb_noldo_lib.MLB_NOLDO
SATA_A_D2R_N_SPN @mlb_noldo_lib.MLB_NOLDO
SATA_A_D2R_P
SATA_A_D2R_P @mlb_noldo_lib.MLB_NOLDO
SATA_A_D2R_P_SPN @mlb_noldo_lib.MLB_NOLDO
SATA_A_R2D_C_N
SATA_A_R2D_C_N @mlb_noldo_lib.MLB_NOLDO
SATA_A_R2D_C_N_SPN @mlb_noldo_lib.MLB_NOLDO
SATA_A_R2D_C_P
SATA_A_R2D_C_P @mlb_noldo_lib.MLB_NOLDO
SATA_A_R2D_C_P_SPN @mlb_noldo_lib.MLB_NOLDO
SATA_C_D2R_C_N
SATA_C_D2R_C_N @mlb_noldo_lib.MLB_NOLDO
SATA_C_D2R_C_P
SATA_C_D2R_C_P @mlb_noldo_lib.MLB_NOLDO
SATA_C_D2R_F_N
SATA_C_D2R_F_N @mlb_noldo_lib.MLB_NOLDO
SATA_C_D2R_F_P
SATA_C_D2R_F_P @mlb_noldo_lib.MLB_NOLDO
SATA_C_D2R_N
SATA_C_D2R_N @mlb_noldo_lib.MLB_NOLDO
SATA_C_D2R_P
SATA_C_D2R_P @mlb_noldo_lib.MLB_NOLDO
SATA_C_DET_L
SATA_C_DET_L @mlb_noldo_lib.MLB_NOLDO
SATA_C_PWR_EN_L
SATA_C_PWR_EN_L @mlb_noldo_lib.MLB_NOLDO
SATA_C_R2D_C_N
SATA_C_R2D_C_N @mlb_noldo_lib.MLB_NOLDO
SATA_C_R2D_C_P
SATA_C_R2D_C_P @mlb_noldo_lib.MLB_NOLDO
SATA_C_R2D_F_N
SATA_C_R2D_F_N @mlb_noldo_lib.MLB_NOLDO
SATA_C_R2D_F_P
SATA_C_R2D_F_P @mlb_noldo_lib.MLB_NOLDO
SATA_C_R2D_N
SATA_C_R2D_N @mlb_noldo_lib.MLB_NOLDO
SATA_C_R2D_P
SATA_C_R2D_P @mlb_noldo_lib.MLB_NOLDO
SATA_RBIAS_N
SATA_RBIAS_N @mlb_noldo_lib.MLB_NOLDO
SATA_RBIAS_P @mlb_noldo_lib.MLB_NOLDO
SATA_RBIAS_PN @mlb_noldo_lib.MLB_NOLDO
SATA_RBIAS_P @mlb_noldo_lib.MLB_NOLDO
SB_A20GATE
SB_A20GATE @mlb_noldo_lib.MLB_NOLDO
SB_ACZ_BITCLK
SB_ACZ_BITCLK @mlb_noldo_lib.MLB_NOLDO
SB_ACZ_RST_L
SB_ACZ_RST_L @mlb_noldo_lib.MLB_NOLDO
SB_ACZ_SDATAOUT
SB_ACZ_SDATAOUT @mlb_noldo_lib.MLB_NOLDO
SB_ACZ_SYNC
SB_ACZ_SYNC @mlb_noldo_lib.MLB_NOLDO
SB_CLK14P3M_TIMER
SB_CLK14P3M_TIMER @mlb_noldo_lib.MLB_NOLDO
SB_CLK48M_USBCTLR
SB_CLK48M_USBCTLR @mlb_noldo_lib.MLB_NOLDO
SB_CLK100M_DMI_N
SB_CLK100M_DMI_N @mlb_noldo_lib.MLB_NOLDO
SB_CLK100M_DMI_P
SB_CLK100M_DMI_P @mlb_noldo_lib.MLB_NOLDO
SB_CLK100M_SATA_N
SB_CLK100M_SATA_N @mlb_noldo_lib.MLB_NOLDO
SB_CLK100M_SATA_OE_L SB_CLK100M_SATA_OE_L @mlb_noldo_lib.MLB_NOLDO
SB_CLK100M_SATA_P
SB_CLK100M_SATA_P @mlb_noldo_lib.MLB_NOLDO
SB_GPIO2
SB_GPIO2 - @mlb_noldo_lib.MLB_NOLDO
SB_GPIO3
SB_GPIO3 - @mlb_noldo_lib.MLB_NOLDO
SB_GPIO4
SB_GPIO4 - @mlb_noldo_lib.MLB_NOLDO
SB_GPIO5
SB_GPIO5 - @mlb_noldo_lib.MLB_NOLDO
ODD_PWR_EN_L @mlb_noldo_lib.MLB_NOLDO
SB_GPIO14
SB_GPIO14 @mlb_noldo_lib.MLB_NOLDO
SB_GPIO19
SB_GPIO19 @mlb_noldo_lib.MLB_NOLDO

67A3
40D5
35B8
42C7
42D2 42D3
42C7
42B2 42C3
5A2 64A4
61C7 64A3
34D6 64A3
42C8 64A3
63C5 64A3
63A7 63D6 64A3
59B1 64A6
63D5 64A3
25C8 64A3
42C8 64A3
25C8 64A3
59B1 64A6
63A7 63D6 64A3
34D6 64A3
63D5 64A3
63C5 64A3
61C7 64A3
62A2 62C3 62C6
59A2 59C3 59C6
59A6 59B1
24D5 25C7
65D4
65D7
65C6
5A2 64C1
64C3 65D1
64C1 66D8
64C3 65D1
64C1 66D8
66C4
5A2
5A2 64C1
60C8 64C1
48C7 58C2 58D5 58D8 64C1
62D8 64C1
64C3 66C2
64C1 67D4
39D6 64C1
59D8 63B7 64C1
61C7 64C1
48C7 58C2 58D5 58D8 64C1
59D8 63B7 64C1
61C7 64C1
62D8 64C1
60C8 64C1
64C1 67D4
39D6 64C1
64C3 66C2
64C3 66C2
5B1 67D3
39D6
65D4
39C2
39C3
5B2 39D4

PPVBATT_G3C_RTC

26D6

SB_GPIO21

23D3

PPVBATT_G3C_RTC_R

26D5

SB_GPIO26

23C8

66B3
66B2
5C1 66B5 66C2
66C4
5B2 64D7
8B5 8D7 9B8 48A5 48B3
64D6
58D1 64D8
8B5 8D7 9B8 48A5 48B3
64D6
66D4
62C5
59C5
58D7
45D8 46D6 59A1
59A2
63B2
63A2
63B2
6C4 21B6
6C3
6C4 21B6
6C3
6C4 21B6
6C3
6C4 21B6
6C3
35D7
35C7
35D5
35C5
21B6 35D4
21B6 35C4
23D2 35D2
23A3 23B3
21B6 35D4
21B6 35D4
35D6
35D6
35D7
35D7
21B6 35D2
21B6 35D2
35D3
21B6 35D2
21C4
21C6
21C6
21C6
21C6
23D3 33A6
23D3 33C7
22C2 33B2 33C3
22C2 33B2 33C3
21B6 33B2 33B3
23C3 32B4
21B6 33B2 33B3
22A6
22A6
22A6
22A6
34C8

26C3
23A4 26C3
26C3
26C3 34C8

23A4 23C3
23D3

SB_GPIO21 @mlb_noldo_lib.MLB_NOLDO
SB_GPIO26 @mlb_noldo_lib.MLB_NOLDO
SB_GPIO29
SB_GPIO29 @mlb_noldo_lib.MLB_NOLDO
SB_GPIO30
SB_GPIO30 @mlb_noldo_lib.MLB_NOLDO
SB_GPIO31
SB_GPIO31 @mlb_noldo_lib.MLB_NOLDO
SB_GPIO37
SB_GPIO37 @mlb_noldo_lib.MLB_NOLDO
SB_INTVRMEN
SB_INTVRMEN @mlb_noldo_lib.MLB_NOLDO
SB_RTC_RST_L
SB_RTC_RST_L @mlb_noldo_lib.MLB_NOLDO
SB_RTC_X1
SB_RTC_X1 @mlb_noldo_lib.MLB_NOLDO
SB_RTC_X1_R
SB_RTC_X1_R @mlb_noldo_lib.MLB_NOLDO
SB_RTC_X2
SB_RTC_X2 @mlb_noldo_lib.MLB_NOLDO
SB_RUNTIME_SCI_L
SB_RUNTIME_SCI_L @mlb_noldo_lib.MLB_NOLDO
SB_SM_INTRUDER_L
SB_SM_INTRUDER_L @mlb_noldo_lib.MLB_NOLDO
SB_SPKR
SB_SPKR - @mlb_noldo_lib.MLB_NOLDO
SC_RX_L
SC_RX_L - @mlb_noldo_lib.MLB_NOLDO
SC_TX_L
SC_TX_L - @mlb_noldo_lib.MLB_NOLDO
SDATAIN
SDATAIN - @mlb_noldo_lib.MLB_NOLDO
SDVO_CTRLCLK
SDVO_CTRLCLK @mlb_noldo_lib.MLB_NOLDO
SDVO_CTRLDATA
SDVO_CTRLDATA @mlb_noldo_lib.MLB_NOLDO
SMBUS_BATT_SCL_F
SMBUS_BATT_SCL_F @mlb_noldo_lib.MLB_NOLDO
SMBUS_BATT_SDA_F
SMBUS_BATT_SDA_F @mlb_noldo_lib.MLB_NOLDO
SMB_0_CLK
SMB_0_CLK @mlb_noldo_lib.MLB_NOLDO
SMBUS_SMC_0_SCL @mlb_noldo_lib.MLB_NOLDO
THRM_DIMM1_SMB_CLK @mlb_noldo_lib.MLB_NOLDO
SMBUS_SMC_0_SCL @mlb_noldo_lib.MLB_NOLDO
SMB_0_DATA
SMB_0_DATA @mlb_noldo_lib.MLB_NOLDO
SMBUS_SMC_0_SDA @mlb_noldo_lib.MLB_NOLDO
THRM_DIMM1_SMB_DATA @mlb_noldo_lib.MLB_NOLDO
SMBUS_SMC_0_SDA @mlb_noldo_lib.MLB_NOLDO
SMB_AIRPORT_CONN_CLK SMB_AIRPORT_CONN_CLK @mlb_noldo_lib.MLB_NOLDO
SMB_AIRPORT_CONN_DAT SMB_AIRPORT_CONN_DATA A
@mlb_noldo_lib.MLB_NOLDO
SMB_ALERT_L
SMB_ALERT_L @mlb_noldo_lib.MLB_NOLDO
SMB_BSA_CLK
SMB_BSA_CLK @mlb_noldo_lib.MLB_NOLDO
SMBUS_SMC_BSA_SCL @mlb_noldo_lib.MLB_NOLDO
=SMBUS_BATT_SCL @mlb_noldo_lib.MLB_NOLDO
SMBUS_SMC_BSA_SCL @mlb_noldo_lib.MLB_NOLDO
=SMBUS_BATT_SCL @mlb_noldo_lib.MLB_NOLDO
SMB_BSA_DATA
SMB_BSA_DATA @mlb_noldo_lib.MLB_NOLDO
SMBUS_SMC_BSA_SDA @mlb_noldo_lib.MLB_NOLDO
=SMBUS_BATT_SDA @mlb_noldo_lib.MLB_NOLDO
SMBUS_SMC_BSA_SDA @mlb_noldo_lib.MLB_NOLDO
=SMBUS_BATT_SDA @mlb_noldo_lib.MLB_NOLDO
SMB_BSB_CLK
SMB_BSB_CLK @mlb_noldo_lib.MLB_NOLDO
SMB_BSB_DATA
SMB_BSB_DATA @mlb_noldo_lib.MLB_NOLDO
SMB_LINK_ALERT_L
SMB_LINK_ALERT_L @mlb_noldo_lib.MLB_NOLDO
SMB_MLB_CLK
SMB_MLB_CLK @mlb_noldo_lib.MLB_NOLDO
THRM_DIMM0_SMB_CLK @mlb_noldo_lib.MLB_NOLDO
SMBUS_SMC_MLB_SCL @mlb_noldo_lib.MLB_NOLDO
SMB_THRM_CLK @mlb_noldo_lib.MLB_NOLDO
THRM_DIMM0_SMB_CLK @mlb_noldo_lib.MLB_NOLDO
SMB_THRM_CLK @mlb_noldo_lib.MLB_NOLDO
SMBUS_SMC_MLB_SCL @mlb_noldo_lib.MLB_NOLDO
SMB_MLB_DATA
SMB_MLB_DATA @mlb_noldo_lib.MLB_NOLDO
THRM_DIMM0_SMB_DATA @mlb_noldo_lib.MLB_NOLDO
SMBUS_SMC_MLB_SDA @mlb_noldo_lib.MLB_NOLDO
SMB_THRM_DATA @mlb_noldo_lib.MLB_NOLDO
THRM_DIMM0_SMB_DATA @mlb_noldo_lib.MLB_NOLDO
SMB_THRM_DATA @mlb_noldo_lib.MLB_NOLDO
SMBUS_SMC_MLB_SDA @mlb_noldo_lib.MLB_NOLDO
SMC_AVCC_RC
SMC_AVCC_RC @mlb_noldo_lib.MLB_NOLDO
SMC_BATT_CHG_EN
SMC_BATT_CHG_EN @mlb_noldo_lib.MLB_NOLDO
SMC_BATT_ISENSE
SMC_BATT_ISENSE @mlb_noldo_lib.MLB_NOLDO
SMC_BATT_ISET
SMC_BATT_ISET @mlb_noldo_lib.MLB_NOLDO
SMC_BATT_TRICKLE_EN_ SMC_BATT_TRICKLE_EN_L L
@mlb_noldo_lib.MLB_NOLDO

22C4 22D8
22C4 22D8 36D8
22C4 22D8
23D3
21D6

21D6 26D4
21D6 26C8
26C7
21D6 26C8
23C5
21D6 26D4
23C5
45C5 46B1
45C5 46B1
54C6
14B6 68A6
14B6 68A6
5D1 65B6
5D1 65A6
27D6 45C8
27D5
27D3 49B4
27D5

27D6 45C5
27D5
27C3 49B4
27D5
43B5
43B5
23C5
27C3 45B5
27C2
27C1 65A2
27C2
27C1 65A2
27C3 45B5
27C2
27C1 65A2
27C2

27C1 65A2
27B3 45C5
27B3 45C8
23D5
27C6 45B5
27B3 49C4
5B2 27C5
10B3 27C3
27B3 49C4
10B3 27C3
5B2 27C5
27B6 45B5
27B3 49C4
5B2 27B5
10B3 27B3
27B3 49C4

10B3 27B3
5B2 27B5
45D3
5C1 45D8 46B6 66A4
45D5 66B1
5C1 45B5 66B7
5C1 45D8 46B6 66A3
106

8
SMC_BATT_VSET
SMC_BC_ACOK
SMC_BKLIGHT_ENABLE
SMC_BS_ALRT_L
SMC_BS_ALRT_L_F
SMC_CASE_OPEN
SMC_CPU_ISENSE

SMC_CPU_RESET_3_3_L
SMC_CPU_VSENSE
SMC_DCIN_ISENSE
SMC_DISPLAY_ENABLE
SMC_DISP_BKLT_A
SMC_DISP_BKLT_B
SMC_EXCARD_CP
SMC_EXCARD_PWR_EN
SMC_EXCARD_PWR_OC_L
SMC_EXTAL
SMC_EXTSMI_L
SMC_FAN_0_CTL
SMC_FAN_0_TACH
SMC_FAN_1_CTL
SMC_FAN_1_TACH
SMC_FAN_2_CTL

SMC_FAN_2_TACH
SMC_FAN_3_CTL
SMC_FAN_3_TACH
SMC_FWE
SMC_FWIRE_ISENSE
SMC_GPU_ISENSE
SMC_GPU_VSENSE
SMC_LID
SMC_LID_F
SMC_LRESET_L
SMC_MANUAL_RST_L
SMC_MD1
SMC_MEM_ISENSE
SMC_NB_ISENSE
SMC_NMI
SMC_ODD_DETECT
SMC_ONOFF_L

SMC_P20
SMC_P21
SMC_P22
SMC_P23
SMC_P26
SMC_P27
SMC_P44
SMC_P46
SMC_PB7
SMC_PBUS_VSENSE
SMC_PD3
SMC_PG1
SMC_PM_G2_EN
SMC_PM_G2_EN_L
SMC_PROCHOT
SMC_PROCHOT_3_3_L
SMC_PS_ON
SMC_RCIN_L
SMC_RSTGATE_L
SMC_RST_L
SMC_RUNTIME_SCI_L

SMC_RX_L
SMC_SB_NMI
SMC_SUS_CLK
SMC_SUS_CLK_R
SMC_SYS_ISET
SMC_SYS_KBDLED
SMC_SYS_LED_16B
SMC_SYS_VSET

7
SMC_BATT_VSET @mlb_noldo_lib.MLB_NOLDO
SMC_BC_ACOK @mlb_noldo_lib.MLB_NOLDO
SMC_BKLIGHT_ENABLE @mlb_noldo_lib.MLB_NOLDO
SMC_BS_ALRT_L @mlb_noldo_lib.MLB_NOLDO
SMC_BS_ALRT_L_F @mlb_noldo_lib.MLB_NOLDO
SMC_CASE_OPEN @mlb_noldo_lib.MLB_NOLDO
SMC_CPU_ISENSE @mlb_noldo_lib.MLB_NOLDO
SMC_CPU_RESET_3_3_L @mlb_noldo_lib.MLB_NOLDO
SMC_CPU_VSENSE @mlb_noldo_lib.MLB_NOLDO
SMC_DCIN_ISENSE @mlb_noldo_lib.MLB_NOLDO
SMC_DISPLAY_ENABLE @mlb_noldo_lib.MLB_NOLDO
SMC_DISP_BKLT_A @mlb_noldo_lib.MLB_NOLDO
SMC_DISP_BKLT_B @mlb_noldo_lib.MLB_NOLDO
SMC_EXCARD_CP @mlb_noldo_lib.MLB_NOLDO
SMC_EXCARD_PWR_EN @mlb_noldo_lib.MLB_NOLDO
SMC_EXCARD_PWR_OC_L @mlb_noldo_lib.MLB_NOLDO
SMC_EXTAL @mlb_noldo_lib.MLB_NOLDO
SMC_EXTSMI_L @mlb_noldo_lib.MLB_NOLDO
SMC_FAN_0_CTL @mlb_noldo_lib.MLB_NOLDO
SMC_FAN_0_TACH @mlb_noldo_lib.MLB_NOLDO
SMC_FAN_1_CTL @mlb_noldo_lib.MLB_NOLDO
SMC_FAN_1_TACH @mlb_noldo_lib.MLB_NOLDO
SMC_FAN_2_CTL @mlb_noldo_lib.MLB_NOLDO
SMC_FAN_2_TACH @mlb_noldo_lib.MLB_NOLDO
SMC_FAN_3_CTL @mlb_noldo_lib.MLB_NOLDO
SMC_FAN_3_TACH @mlb_noldo_lib.MLB_NOLDO
SMC_FWE - @mlb_noldo_lib.MLB_NOLDO
SMC_FWIRE_ISENSE @mlb_noldo_lib.MLB_NOLDO
SMC_GPU_ISENSE @mlb_noldo_lib.MLB_NOLDO
SMC_GPU_VSENSE @mlb_noldo_lib.MLB_NOLDO
SMC_LID - @mlb_noldo_lib.MLB_NOLDO
SMC_LID_F @mlb_noldo_lib.MLB_NOLDO
SMC_LRESET_L @mlb_noldo_lib.MLB_NOLDO
SMC_MANUAL_RST_L @mlb_noldo_lib.MLB_NOLDO
SMC_MD1 - @mlb_noldo_lib.MLB_NOLDO
SMC_MEM_ISENSE @mlb_noldo_lib.MLB_NOLDO
SMC_NB_ISENSE @mlb_noldo_lib.MLB_NOLDO
SMC_NMI - @mlb_noldo_lib.MLB_NOLDO
SMC_ODD_DETECT @mlb_noldo_lib.MLB_NOLDO
SMC_ONOFF_L @mlb_noldo_lib.MLB_NOLDO
CONN_GEYSER_ONOFF_L @mlb_noldo_lib.MLB_NOLDO
SMC_P20 - @mlb_noldo_lib.MLB_NOLDO
SMC_P21 - @mlb_noldo_lib.MLB_NOLDO
SMC_P22 - @mlb_noldo_lib.MLB_NOLDO
SMC_P23 - @mlb_noldo_lib.MLB_NOLDO
SMC_P26 - @mlb_noldo_lib.MLB_NOLDO
SMC_P27 - @mlb_noldo_lib.MLB_NOLDO
SMC_P44 - @mlb_noldo_lib.MLB_NOLDO
SMC_P46 - @mlb_noldo_lib.MLB_NOLDO
SMC_PB7 - @mlb_noldo_lib.MLB_NOLDO
SMC_PBUS_VSENSE @mlb_noldo_lib.MLB_NOLDO
SMC_PD3 - @mlb_noldo_lib.MLB_NOLDO
SMC_PG1 - @mlb_noldo_lib.MLB_NOLDO
SMC_PM_G2_EN @mlb_noldo_lib.MLB_NOLDO
SMC_PM_G2_EN_L @mlb_noldo_lib.MLB_NOLDO
SMC_PROCHOT @mlb_noldo_lib.MLB_NOLDO
SMC_PROCHOT_3_3_L @mlb_noldo_lib.MLB_NOLDO
SMC_PS_ON @mlb_noldo_lib.MLB_NOLDO
SMC_RCIN_L @mlb_noldo_lib.MLB_NOLDO
SMC_RSTGATE_L @mlb_noldo_lib.MLB_NOLDO
SMC_RST_L @mlb_noldo_lib.MLB_NOLDO
SMC_RUNTIME_SCI_L @mlb_noldo_lib.MLB_NOLDO
SMC_RX_L - @mlb_noldo_lib.MLB_NOLDO
SMC_SB_NMI @mlb_noldo_lib.MLB_NOLDO
SMC_SUS_CLK @mlb_noldo_lib.MLB_NOLDO
SMC_SUS_CLK_R @mlb_noldo_lib.MLB_NOLDO
SMC_SYS_ISET @mlb_noldo_lib.MLB_NOLDO
SMC_SYS_KBDLED @mlb_noldo_lib.MLB_NOLDO
SMC_SYS_LED_16B @mlb_noldo_lib.MLB_NOLDO
SMC_SYS_VSET @mlb_noldo_lib.MLB_NOLDO

45B5 46C3
5C1 45C5 46B6 65C3 65C7
66A5
45C8
5D1 45C5 46C6 65A2
65A6
45C5 46B3
45D5 48C1
45B5 46C1
5B2 45D5 48B1
45D5 66C2
45C8
45B5
45B5 46C3
45B8 46C3
45B8 46C3
45B8 46D3
45C4 46C7
23B8 45B8
45B8 46C3
45B8 46C3
5D2 45B8 51B4
5D2 45B8 51C4
45B8 46C3
45B8 46C3
45B8 46C3
5A7 45B8 46C3
45B5 46C6
45D5 46B3
45D5 46C6
45D5 46C6
5B2 40C4 45B5 46C6 65A8
65A7
26B1 45C8
5B2 46D8
5C2 45C2 47B6
45A8 46B3 61C1
45B8 46B3 62A5
5C2 45C1 47B5
34B3 45B8
40C8 45C5 46C8 46D6 48C8
40C7
45D8
45D8
45D8
45D8
45D8
45D8
45C8
45C8
45B8
45D5

46C6
46C6
46C6
46C6
46C6
46C6
46C6
46C6
46C6
48C5

45B8 46C3
45B5 46C6
45D5 63C8
63C7
45B5 46B6
45D5 46C1
5C1 39C6 45D5 46B3 65C3
21C3 45C8
26A3 45D8
5C2 45C3 46D7 47C5
23C8 45B8
5C2 45C8 46B2 46D6 47B5
23C3 45D8
45C5 46A6
46A7
45B5 66D7
45C8 46C6
45C8 46A4
45B5 46C3

SMC_TCK
SMC_TDI
SMC_TDO
SMC_THRMTRIP

SMC_TCK - @mlb_noldo_lib.MLB_NOLDO
SMC_TDI - @mlb_noldo_lib.MLB_NOLDO
SMC_TDO - @mlb_noldo_lib.MLB_NOLDO
SMC_THRMTRIP @mlb_noldo_lib.MLB_NOLDO
SMC_TMS
SMC_TMS - @mlb_noldo_lib.MLB_NOLDO
SMC_TPM_GPIO
SMC_TPM_GPIO @mlb_noldo_lib.MLB_NOLDO
SMC_TPM_PP
SMC_TPM_PP @mlb_noldo_lib.MLB_NOLDO
SMC_TPM_PP_R
SMC_TPM_PP_R @mlb_noldo_lib.MLB_NOLDO
SMC_TPM_RESET_L
SMC_TPM_RESET_L @mlb_noldo_lib.MLB_NOLDO
SMC_TRST_L
SMC_TRST_L @mlb_noldo_lib.MLB_NOLDO
SMC_TX_L
SMC_TX_L - @mlb_noldo_lib.MLB_NOLDO
SMC_VCL
SMC_VCL - @mlb_noldo_lib.MLB_NOLDO
SMC_WAKE_SCI_L
SMC_WAKE_SCI_L @mlb_noldo_lib.MLB_NOLDO
SMC_XTAL
SMC_XTAL - @mlb_noldo_lib.MLB_NOLDO
SMLINK<0>
SMLINK<0> @mlb_noldo_lib.MLB_NOLDO
SMLINK<1>
SMLINK<1> @mlb_noldo_lib.MLB_NOLDO
SMS_ACC_SELFTEST
SMS_ACC_SELFTEST @mlb_noldo_lib.MLB_NOLDO
SMS_INT_L
SMS_INT_L @mlb_noldo_lib.MLB_NOLDO
SMS_ONOFF_L
SMS_ONOFF_L @mlb_noldo_lib.MLB_NOLDO
SMS_X_AXIS
SMS_X_AXIS @mlb_noldo_lib.MLB_NOLDO
SMS_Y_AXIS
SMS_Y_AXIS @mlb_noldo_lib.MLB_NOLDO
SMS_Z_AXIS
SMS_Z_AXIS @mlb_noldo_lib.MLB_NOLDO
SPI_ARB
SPI_ARB - @mlb_noldo_lib.MLB_NOLDO
SPI_CE_L
SPI_CE_L - @mlb_noldo_lib.MLB_NOLDO
SPI_HOLD_L
SPI_HOLD_L @mlb_noldo_lib.MLB_NOLDO
SPI_SCLK
SPI_SCLK - @mlb_noldo_lib.MLB_NOLDO
SPI_SCLK_R
SPI_SCLK_R @mlb_noldo_lib.MLB_NOLDO
SPI_SI
SPI_SI - @mlb_noldo_lib.MLB_NOLDO
SPI_SI_R
SPI_SI_R - @mlb_noldo_lib.MLB_NOLDO
SPI_SO
SPI_SO - @mlb_noldo_lib.MLB_NOLDO
SPI_SO_R
SPI_SO_R - @mlb_noldo_lib.MLB_NOLDO
SPI_WP_L
SPI_WP_L - @mlb_noldo_lib.MLB_NOLDO
SPKRAMP_L_N_OUT
SPKRAMP_L_N_OUT @mlb_noldo_lib.MLB_NOLDO
SPKRAMP_L_P_OUT
SPKRAMP_L_P_OUT @mlb_noldo_lib.MLB_NOLDO
SPKRAMP_R_N_OUT
SPKRAMP_R_N_OUT @mlb_noldo_lib.MLB_NOLDO
SPKRAMP_R_P_OUT
SPKRAMP_R_P_OUT @mlb_noldo_lib.MLB_NOLDO
SPKRAMP_SUB_N_OUT
SPKRAMP_SUB_N_OUT @mlb_noldo_lib.MLB_NOLDO
SPKRAMP_SUB_P_OUT
SPKRAMP_SUB_P_OUT @mlb_noldo_lib.MLB_NOLDO
SPKRAMP_SYNC1
SPKRAMP_SYNC1 @mlb_noldo_lib.MLB_NOLDO
SPKRAMP_SYNC2
SPKRAMP_SYNC2 @mlb_noldo_lib.MLB_NOLDO
SPKRAMP_THERMPLANE
SPKRAMP_THERMPLANE @mlb_noldo_lib.MLB_NOLDO
SPKRCONN_L_N_OUT
SPKRCONN_L_N_OUT @mlb_noldo_lib.MLB_NOLDO
SPKRCONN_L_P_OUT
SPKRCONN_L_P_OUT @mlb_noldo_lib.MLB_NOLDO
SPKRCONN_R_N_OUT
SPKRCONN_R_N_OUT @mlb_noldo_lib.MLB_NOLDO
SPKRCONN_R_P_OUT
SPKRCONN_R_P_OUT @mlb_noldo_lib.MLB_NOLDO
SPKRCONN_SUB_N_OUT
SPKRCONN_SUB_N_OUT @mlb_noldo_lib.MLB_NOLDO
SPKRCONN_SUB_P_OUT
SPKRCONN_SUB_P_OUT @mlb_noldo_lib.MLB_NOLDO
SPKR_SHIELD
SPKR_SHIELD @mlb_noldo_lib.MLB_NOLDO
ST_ACCEL_ON_L
ST_ACCEL_ON_L @mlb_noldo_lib.MLB_NOLDO
SUS_CLK_SB
SUS_CLK_SB @mlb_noldo_lib.MLB_NOLDO
SUS_CLK_SB_SPN @mlb_noldo_lib.MLB_NOLDO
SV_SET_UP
SV_SET_UP @mlb_noldo_lib.MLB_NOLDO
SYS_LED_ANODE
SYS_LED_ANODE @mlb_noldo_lib.MLB_NOLDO
SYS_LED_ANODE_L
SYS_LED_ANODE_L @mlb_noldo_lib.MLB_NOLDO
SYS_LED_ILIM
SYS_LED_ILIM @mlb_noldo_lib.MLB_NOLDO
SYS_LED_L
SYS_LED_L @mlb_noldo_lib.MLB_NOLDO
SYS_LED_L_VDIV
SYS_LED_L_VDIV @mlb_noldo_lib.MLB_NOLDO
SYS_ONEWIRE
SYS_ONEWIRE @mlb_noldo_lib.MLB_NOLDO
THRM_ALERT
THRM_ALERT @mlb_noldo_lib.MLB_NOLDO
THRM_ALERT_L
THRM_ALERT_L @mlb_noldo_lib.MLB_NOLDO
THRM_CPU_DX_N
THRM_CPU_DX_N @mlb_noldo_lib.MLB_NOLDO
THRM_CPU_DX_P
THRM_CPU_DX_P @mlb_noldo_lib.MLB_NOLDO
THRM_DIMM0_3V3_UNFIL THRM_DIMM0_3V3_UNFILTERED TERED
@mlb_noldo_lib.MLB_NOLDO
THRM_DIMM0_DXN
THRM_DIMM0_DXN @mlb_noldo_lib.MLB_NOLDO
THRM_DIMM0_DXP1
THRM_DIMM0_DXP1 @mlb_noldo_lib.MLB_NOLDO
THRM_DIMM0_DXP2
THRM_DIMM0_DXP2 @mlb_noldo_lib.MLB_NOLDO
THRM_DIMM1_3V3_UNFIL THRM_DIMM1_3V3_UNFILTERED TERED
@mlb_noldo_lib.MLB_NOLDO
THRM_DIMM1_DXN
THRM_DIMM1_DXN @mlb_noldo_lib.MLB_NOLDO
THRM_DIMM1_DXP1
THRM_DIMM1_DXP1 @mlb_noldo_lib.MLB_NOLDO
THRM_DIMM1_DXP2
THRM_DIMM1_DXP2 -

5C2 45C5 46C6 47C5


5C2 45C5 46C6 47C5
5C2 45C5 46C6 47B6
45B5 46B5

TMDS_EXT_RES
TMDS_EXT_SWING

5C2 45B5 46C6 47C6


45D5 46B2

TMDS_HTPLG
TMDS_HTPLG_R

45C8 53C7
TMDS_I2C_SCL
53C6
TMDS_I2C_SDA
45C8 46D6 53B7
TMDS_INT_N
5C2 45C1 47C6
TMDS_INT_P
5C2 45C8 46B2 46D6 47B6
45D3
23C1 45D5

TMDS_RST_L
TMDS_SDB_N

45C4 46C7
23D5

TMDS_SDB_P

23D5

TMDS_SDC_N

52B6

TMDS_SDC_P

23C3 45B5 46D6

TMDS_SDG_N

45B5 52C7

TMDS_SDG_P

45B8 52C2

TMDS_SDR_N

45B8 52C2

TMDS_SDR_P

45B8 52C2

TMDS_TX<0>

22C6 45D5
22C6 45B5 50C7
50C4

TMDS_TX<1>

22C6 45D5 50C7


50C4

TMDS_TX_CLK

TMDS_TX<2>

TMDS_TX_CLK_N
22C6 45D5 50C1
50C3
22C6 45D5 50C1
50C3
50C4
55B4 55C3

TMDS_TX_CLK_P
TMDS_TX_CONN_CLK_N
TMDS_TX_CONN_CLK_P

55B4 55C3

TMDS_TX_CONN_N<0>

55C3 55C4

TMDS_TX_CONN_N<1>

55C4 55D3

TMDS_TX_CONN_N<2>

55A4 55B3

TMDS_TX_CONN_P<0>

55A4 55B3

TMDS_TX_CONN_P<1>

55A4 55C4

TMDS_TX_CONN_P<2>

55A4 55B4

TMDS_TX_N<0>

55A4 55A4 55B4 55C4

TMDS_TX_N<1>

55C1 56D2

TMDS_TX_N<2>

55C1 56D2

TMDS_TX_P<0>

55C1 56C2

TMDS_TX_P<1>

55D1 56C2

TMDS_TX_P<2>

55B1 56C2

TPM_BADD
TPM_GPIO1

55B1 56C2
TPM_GPIO2
56C2
TPM_LRESET_L
52B6
TPM_RST_L
6B4 23C3
TPM_XTALI
6B3
TPM_XTALO
5C2 23B6 23C3 47B5
TPS73115_NR
5B2 35C5 46A3
TP_AZ_DOCK_EN_L
35C7
TP_AZ_DOCK_RST_L
46A3
TP_CPU_A32_L
46A3
TP_CPU_A33_L
46A3
TP_CPU_A34_L
5C1 45B8 46D6 65C8
TP_CPU_A35_L
10B4
TP_CPU_A36_L
10C4
TP_CPU_A37_L
10B5
TP_CPU_A38_L
10B5
TP_CPU_A39_L
49D4
TP_CPU_APM0_L
40C5 49C6
TP_CPU_APM1_L
40C4 49D6
TP_CPU_CPUSLP_L
49C6
TP_CPU_EXTBREF
49B4
TP_CPU_HFPLL
49B5
TP_CPU_SPARE0
49B5
TP_CPU_SPARE1
49A5

@mlb_noldo_lib.MLB_NOLDO
TMDS_EXT_RES @mlb_noldo_lib.MLB_NOLDO
TMDS_EXT_SWING @mlb_noldo_lib.MLB_NOLDO
TMDS_HTPLG @mlb_noldo_lib.MLB_NOLDO
TMDS_HTPLG_R @mlb_noldo_lib.MLB_NOLDO
TMDS_I2C_SCL @mlb_noldo_lib.MLB_NOLDO
TMDS_I2C_SDA @mlb_noldo_lib.MLB_NOLDO
TMDS_INT_N @mlb_noldo_lib.MLB_NOLDO
TMDS_INT_P @mlb_noldo_lib.MLB_NOLDO
TMDS_RST_L @mlb_noldo_lib.MLB_NOLDO
TMDS_SDB_N @mlb_noldo_lib.MLB_NOLDO
TMDS_SDB_P @mlb_noldo_lib.MLB_NOLDO
TMDS_SDC_N @mlb_noldo_lib.MLB_NOLDO
TMDS_SDC_P @mlb_noldo_lib.MLB_NOLDO
TMDS_SDG_N @mlb_noldo_lib.MLB_NOLDO
TMDS_SDG_P @mlb_noldo_lib.MLB_NOLDO
TMDS_SDR_N @mlb_noldo_lib.MLB_NOLDO
TMDS_SDR_P @mlb_noldo_lib.MLB_NOLDO
TMDS_TX<0> @mlb_noldo_lib.MLB_NOLDO
TMDS_TX<1> @mlb_noldo_lib.MLB_NOLDO
TMDS_TX<2> @mlb_noldo_lib.MLB_NOLDO
TMDS_TX_CLK @mlb_noldo_lib.MLB_NOLDO
TMDS_TX_CLK_N @mlb_noldo_lib.MLB_NOLDO
TMDS_TX_CLK_P @mlb_noldo_lib.MLB_NOLDO
TMDS_TX_CONN_CLK_N @mlb_noldo_lib.MLB_NOLDO
TMDS_TX_CONN_CLK_P @mlb_noldo_lib.MLB_NOLDO
TMDS_TX_CONN_N<0> @mlb_noldo_lib.MLB_NOLDO
TMDS_TX_CONN_N<1> @mlb_noldo_lib.MLB_NOLDO
TMDS_TX_CONN_N<2> @mlb_noldo_lib.MLB_NOLDO
TMDS_TX_CONN_P<0> @mlb_noldo_lib.MLB_NOLDO
TMDS_TX_CONN_P<1> @mlb_noldo_lib.MLB_NOLDO
TMDS_TX_CONN_P<2> @mlb_noldo_lib.MLB_NOLDO
TMDS_TX_N<0> @mlb_noldo_lib.MLB_NOLDO
TMDS_TX_N<1> @mlb_noldo_lib.MLB_NOLDO
TMDS_TX_N<2> @mlb_noldo_lib.MLB_NOLDO
TMDS_TX_P<0> @mlb_noldo_lib.MLB_NOLDO
TMDS_TX_P<1> @mlb_noldo_lib.MLB_NOLDO
TMDS_TX_P<2> @mlb_noldo_lib.MLB_NOLDO
TPM_BADD - @mlb_noldo_lib.MLB_NOLDO
TPM_GPIO1 @mlb_noldo_lib.MLB_NOLDO
TPM_GPIO2 @mlb_noldo_lib.MLB_NOLDO
TPM_LRESET_L @mlb_noldo_lib.MLB_NOLDO
TPM_RST_L @mlb_noldo_lib.MLB_NOLDO
TPM_XTALI @mlb_noldo_lib.MLB_NOLDO
TPM_XTALO @mlb_noldo_lib.MLB_NOLDO
TPS73115_NR @mlb_noldo_lib.MLB_NOLDO
TP_AZ_DOCK_EN_L @mlb_noldo_lib.MLB_NOLDO
TP_AZ_DOCK_RST_L @mlb_noldo_lib.MLB_NOLDO
TP_CPU_A32_L @mlb_noldo_lib.MLB_NOLDO
TP_CPU_A33_L @mlb_noldo_lib.MLB_NOLDO
TP_CPU_A34_L @mlb_noldo_lib.MLB_NOLDO
TP_CPU_A35_L @mlb_noldo_lib.MLB_NOLDO
TP_CPU_A36_L @mlb_noldo_lib.MLB_NOLDO
TP_CPU_A37_L @mlb_noldo_lib.MLB_NOLDO
TP_CPU_A38_L @mlb_noldo_lib.MLB_NOLDO
TP_CPU_A39_L @mlb_noldo_lib.MLB_NOLDO
TP_CPU_APM0_L @mlb_noldo_lib.MLB_NOLDO
TP_CPU_APM1_L @mlb_noldo_lib.MLB_NOLDO
TP_CPU_CPUSLP_L @mlb_noldo_lib.MLB_NOLDO
TP_CPU_EXTBREF @mlb_noldo_lib.MLB_NOLDO
TP_CPU_HFPLL @mlb_noldo_lib.MLB_NOLDO
TP_CPU_SPARE0 @mlb_noldo_lib.MLB_NOLDO
TP_CPU_SPARE1 @mlb_noldo_lib.MLB_NOLDO

68B4
68B3
68A7 69C6
68A7
68B2
68B2
68B5
68B5
26B1 68B5
68B4
68B4
68B4
68B4
68B4
68B4
68B4
68B4
68D2
68D2
68C2
68C2
68B2 68C1 69A2
68B2 68C3 69A2
69B3
69B3
69B3
69B3
69B3
69B3
69B3
69B3
68B2 68D1 69B2
68B2 68D1 69B2
68B2 68C1 69B2
68B2 68D3 69B2
68B2 68D3 69B2
68B2 68C3 69B2
53C3
46B1 53C6
46B1 53C6
26B1 53B7
53B6
53C6
53C6
19D5
23C5
23C5
7C8
7B8
7B8
7B8
7B8
7B8
7B8
7B8
7B8
7B8
21C4
7B6
7B8
7B6
7B6

TP_CPU_SPARE2 @mlb_noldo_lib.MLB_NOLDO
TP_CPU_SPARE3 @mlb_noldo_lib.MLB_NOLDO
TP_CPU_SPARE4
TP_CPU_SPARE4 @mlb_noldo_lib.MLB_NOLDO
TP_CPU_SPARE5
TP_CPU_SPARE5 @mlb_noldo_lib.MLB_NOLDO
TP_CPU_SPARE6
TP_CPU_SPARE6 @mlb_noldo_lib.MLB_NOLDO
TP_CPU_SPARE7
TP_CPU_SPARE7 @mlb_noldo_lib.MLB_NOLDO
TP_LVDS_VBG
TP_LVDS_VBG @mlb_noldo_lib.MLB_NOLDO
TP_NB_TESTIN_L
TP_NB_TESTIN_L @mlb_noldo_lib.MLB_NOLDO
TP_NB_XOR_FSB2_H7
TP_NB_XOR_FSB2_H7 @mlb_noldo_lib.MLB_NOLDO
TP_NB_XOR_LVDS_A34
TP_NB_XOR_LVDS_A34 @mlb_noldo_lib.MLB_NOLDO
TP_NB_XOR_LVDS_A35
TP_NB_XOR_LVDS_A35 @mlb_noldo_lib.MLB_NOLDO
TP_NB_XOR_LVDS_D27
TP_NB_XOR_LVDS_D27 @mlb_noldo_lib.MLB_NOLDO
TP_NB_XOR_LVDS_D28
TP_NB_XOR_LVDS_D28 @mlb_noldo_lib.MLB_NOLDO
TP_PCI_GNT0_L
TP_PCI_GNT0_L @mlb_noldo_lib.MLB_NOLDO
TP_PCI_GNT1_L
TP_PCI_GNT1_L @mlb_noldo_lib.MLB_NOLDO
TP_PCI_GNT2_L
TP_PCI_GNT2_L @mlb_noldo_lib.MLB_NOLDO
TP_PCI_PME_L
TP_PCI_PME_L @mlb_noldo_lib.MLB_NOLDO
TP_SB_ACZ_SDIN1
TP_SB_ACZ_SDIN1 @mlb_noldo_lib.MLB_NOLDO
TP_SB_ACZ_SDIN2
TP_SB_ACZ_SDIN2 @mlb_noldo_lib.MLB_NOLDO
TP_SB_DRQ0_L
TP_SB_DRQ0_L @mlb_noldo_lib.MLB_NOLDO
TP_SB_GPIO6
TP_SB_GPIO6 @mlb_noldo_lib.MLB_NOLDO
TP_SB_GPIO22
TP_SB_GPIO22 @mlb_noldo_lib.MLB_NOLDO
=SB_GPIO22 @mlb_noldo_lib.MLB_NOLDO
SB_GPIO22 @mlb_noldo_lib.MLB_NOLDO
=SB_GPIO22 @mlb_noldo_lib.MLB_NOLDO
TP_SB_GPIO23
TP_SB_GPIO23 @mlb_noldo_lib.MLB_NOLDO
TP_SB_GPIO25_DO_NOT_ TP_SB_GPIO25_DO_NOT_USE USE
@mlb_noldo_lib.MLB_NOLDO
TP_SB_GPIO38
TP_SB_GPIO38 @mlb_noldo_lib.MLB_NOLDO
TP_SB_RCVENIN_L
TP_SB_RCVENIN_L @mlb_noldo_lib.MLB_NOLDO
TP_SB_RSVD9
TP_SB_RSVD9 @mlb_noldo_lib.MLB_NOLDO
TP_SB_SATALED_L
TP_SB_SATALED_L @mlb_noldo_lib.MLB_NOLDO
TP_SB_XOR-AD5
TP_SB_XOR-AD5 @mlb_noldo_lib.MLB_NOLDO
TP_SB_XOR-AD9
TP_SB_XOR-AD9 @mlb_noldo_lib.MLB_NOLDO
TP_SB_XOR-AE5
TP_SB_XOR-AE5 @mlb_noldo_lib.MLB_NOLDO
TP_SB_XOR-AG4
TP_SB_XOR-AG4 @mlb_noldo_lib.MLB_NOLDO
TP_SB_XOR-AH4
TP_SB_XOR-AH4 @mlb_noldo_lib.MLB_NOLDO
TP_SB_XOR-U3
TP_SB_XOR-U3 @mlb_noldo_lib.MLB_NOLDO
TP_SB_XOR-U7
TP_SB_XOR-U7 @mlb_noldo_lib.MLB_NOLDO
TP_SB_XOR-V6
TP_SB_XOR-V6 @mlb_noldo_lib.MLB_NOLDO
TP_SB_XOR-V7
TP_SB_XOR-V7 @mlb_noldo_lib.MLB_NOLDO
TP_SB_XOR-Y1
TP_SB_XOR-Y1 @mlb_noldo_lib.MLB_NOLDO
TP_SB_XOR-Y2
TP_SB_XOR-Y2 @mlb_noldo_lib.MLB_NOLDO
TP_SB_XOR_AE9
TP_SB_XOR_AE9 @mlb_noldo_lib.MLB_NOLDO
TP_SB_XOR_AG8
TP_SB_XOR_AG8 @mlb_noldo_lib.MLB_NOLDO
TP_SB_XOR_AH8
TP_SB_XOR_AH8 @mlb_noldo_lib.MLB_NOLDO
TP_SB_XOR_W1
TP_SB_XOR_W1 @mlb_noldo_lib.MLB_NOLDO
TP_USBN_F
TP_USBN_F @mlb_noldo_lib.MLB_NOLDO
TP_USBP_F
TP_USBP_F @mlb_noldo_lib.MLB_NOLDO
TV_DACA_OUT
TV_DACA_OUT @mlb_noldo_lib.MLB_NOLDO
TV_DACB_OUT
TV_DACB_OUT @mlb_noldo_lib.MLB_NOLDO
TV_DACC_OUT
TV_DACC_OUT @mlb_noldo_lib.MLB_NOLDO
TV_IREF
TV_IREF - @mlb_noldo_lib.MLB_NOLDO
USB2_BT_F_N
USB2_BT_F_N @mlb_noldo_lib.MLB_NOLDO
USB2_BT_F_P
USB2_BT_F_P @mlb_noldo_lib.MLB_NOLDO
USB2_CAMERA_CONN_N
USB2_CAMERA_CONN_N @mlb_noldo_lib.MLB_NOLDO
USB2_CAMERA_CONN_P
USB2_CAMERA_CONN_P @mlb_noldo_lib.MLB_NOLDO
USB2_EXTA_F_N
USB2_EXTA_F_N @mlb_noldo_lib.MLB_NOLDO
USB2_EXTA_F_P
USB2_EXTA_F_P @mlb_noldo_lib.MLB_NOLDO
USB2_EXTB_F_N
USB2_EXTB_F_N @mlb_noldo_lib.MLB_NOLDO
USB2_EXTB_F_P
USB2_EXTB_F_P @mlb_noldo_lib.MLB_NOLDO
USB2_GND_EXTA_F
USB2_GND_EXTA_F @mlb_noldo_lib.MLB_NOLDO
USB2_GND_EXTB_F
USB2_GND_EXTB_F @mlb_noldo_lib.MLB_NOLDO
USB_A_N
USB_A_N - @mlb_noldo_lib.MLB_NOLDO

TP_CPU_SPARE2

7B6

TP_CPU_SPARE3

7B6

7B6
7B6
7B6
7B6
13D5

14D6
14D6
14C6
14C6
14C6
14C6
22B6
22B6
22B6
22A6
21C6
21C6
21D4
23C5
6B1 22B6
6B2 69A6

6B2
6B2 69A6
21D5
23C3
23C3
15B2
22A6
21C6
22A7
22A7
22A7
22A7
22A7
21C6
21C6
21C6

21C6
21C6
21C6
22A6
22A6
22A6
21C6
5C1
5C1
13C5 69B8
13C5 69A8
13C5 69A8
13C5 69C8
44C4
44B4
67A2
67B2

42C2
42C2
42B2
42B2
42C2
42B2
6C1 22C2
107

8
=USB2_EXTA_N @mlb_noldo_lib.MLB_NOLDO
USB2_EXTA_N @mlb_noldo_lib.MLB_NOLDO
=USB2_EXTA_N @mlb_noldo_lib.MLB_NOLDO
USB_A_OC_L @mlb_noldo_lib.MLB_NOLDO
=EXTAUSB_OC_L @mlb_noldo_lib.MLB_NOLDO
EXTAUSB_OC_L @mlb_noldo_lib.MLB_NOLDO
=EXTAUSB_OC_L @mlb_noldo_lib.MLB_NOLDO
USB_A_P - @mlb_noldo_lib.MLB_NOLDO
=USB2_EXTA_P @mlb_noldo_lib.MLB_NOLDO
USB2_EXTA_P @mlb_noldo_lib.MLB_NOLDO
=USB2_EXTA_P @mlb_noldo_lib.MLB_NOLDO
USB_B_N - @mlb_noldo_lib.MLB_NOLDO
=USB2_GEYSER_N @mlb_noldo_lib.MLB_NOLDO
USB2_GEYSER_N @mlb_noldo_lib.MLB_NOLDO
=USB2_GEYSER_N @mlb_noldo_lib.MLB_NOLDO
USB_B_OC_L @mlb_noldo_lib.MLB_NOLDO
USB_B_P - @mlb_noldo_lib.MLB_NOLDO
=USB2_GEYSER_P @mlb_noldo_lib.MLB_NOLDO
USB2_GEYSER_P @mlb_noldo_lib.MLB_NOLDO
=USB2_GEYSER_P @mlb_noldo_lib.MLB_NOLDO
USB_C_N - @mlb_noldo_lib.MLB_NOLDO
=USB2_EXTB_N @mlb_noldo_lib.MLB_NOLDO
USB2_EXTB_N @mlb_noldo_lib.MLB_NOLDO
=USB2_EXTB_N @mlb_noldo_lib.MLB_NOLDO
USB_C_P - @mlb_noldo_lib.MLB_NOLDO
=USB2_EXTB_P @mlb_noldo_lib.MLB_NOLDO
USB2_EXTB_P @mlb_noldo_lib.MLB_NOLDO
=USB2_EXTB_P @mlb_noldo_lib.MLB_NOLDO
USB_D_OC_L @mlb_noldo_lib.MLB_NOLDO
USB_E_N - @mlb_noldo_lib.MLB_NOLDO
TP_USBN_E @mlb_noldo_lib.MLB_NOLDO
USB_E_OC_L @mlb_noldo_lib.MLB_NOLDO
USB_E_P - @mlb_noldo_lib.MLB_NOLDO
TP_USBP_E @mlb_noldo_lib.MLB_NOLDO
USB_F_N - @mlb_noldo_lib.MLB_NOLDO
=USB2_IR_N @mlb_noldo_lib.MLB_NOLDO
USB_IR_N - @mlb_noldo_lib.MLB_NOLDO
=USB2_IR_N @mlb_noldo_lib.MLB_NOLDO
USB_F_P - @mlb_noldo_lib.MLB_NOLDO
=USB2_IR_P @mlb_noldo_lib.MLB_NOLDO
USB_IR_P - @mlb_noldo_lib.MLB_NOLDO
=USB2_IR_P @mlb_noldo_lib.MLB_NOLDO
USB_G_N - @mlb_noldo_lib.MLB_NOLDO
=USB2_BT_N @mlb_noldo_lib.MLB_NOLDO
USB_BT_N - @mlb_noldo_lib.MLB_NOLDO
=USB2_BT_N @mlb_noldo_lib.MLB_NOLDO
USB_G_P - @mlb_noldo_lib.MLB_NOLDO
=USB2_BT_P @mlb_noldo_lib.MLB_NOLDO
USB_BT_P - @mlb_noldo_lib.MLB_NOLDO
=USB2_BT_P @mlb_noldo_lib.MLB_NOLDO
USB_RBIAS_PN @mlb_noldo_lib.MLB_NOLDO
VGA_B - @mlb_noldo_lib.MLB_NOLDO
VGA_G - @mlb_noldo_lib.MLB_NOLDO
VGA_HSYNC @mlb_noldo_lib.MLB_NOLDO
VGA_R - @mlb_noldo_lib.MLB_NOLDO
VGA_VSYNC @mlb_noldo_lib.MLB_NOLDO
VOL_DOWN - @mlb_noldo_lib.MLB_NOLDO
VOL_UP - @mlb_noldo_lib.MLB_NOLDO
VREG_FB - @mlb_noldo_lib.MLB_NOLDO
VR_PWRGD_CK410 @mlb_noldo_lib.MLB_NOLDO
VR_PWRGOOD_DELAY @mlb_noldo_lib.MLB_NOLDO
XDP_BPM_L<0> @mlb_noldo_lib.MLB_NOLDO
XDP_BPM_L<1> @mlb_noldo_lib.MLB_NOLDO
XDP_BPM_L<2> @mlb_noldo_lib.MLB_NOLDO
XDP_BPM_L<3> @mlb_noldo_lib.MLB_NOLDO
XDP_BPM_L<4> @mlb_noldo_lib.MLB_NOLDO
XDP_BPM_L<5> @mlb_noldo_lib.MLB_NOLDO
XDP_DBRESET_L @mlb_noldo_lib.MLB_NOLDO
XDP_TCK - @mlb_noldo_lib.MLB_NOLDO
XDP_TDI - @mlb_noldo_lib.MLB_NOLDO
XDP_TDO - @mlb_noldo_lib.MLB_NOLDO
XDP_TMS - @mlb_noldo_lib.MLB_NOLDO
XDP_TRST_L @mlb_noldo_lib.MLB_NOLDO

USB_A_OC_L

USB_A_P

USB_B_N

USB_B_OC_L
USB_B_P

USB_C_N

USB_C_P

C
USB_D_OC_L
USB_E_N

USB_E_OC_L
USB_E_P

USB_F_N

USB_F_P

USB_G_N

USB_G_P

USB_RBIAS_PN
VGA_B
VGA_G
VGA_HSYNC
VGA_R
VGA_VSYNC
VOL_DOWN
VOL_UP
VREG_FB
VR_PWRGD_CK410
VR_PWRGOOD_DELAY
XDP_BPM_L<0>
XDP_BPM_L<1>
XDP_BPM_L<2>
XDP_BPM_L<3>

XDP_BPM_L<4>
XDP_BPM_L<5>
XDP_DBRESET_L
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST_L

6C2 42C5
6C2
6C2 42C5
6C1 22C4 22D8
6C2 42C8
6C2
6C2 42C8

6C1 22C2
6C2 42C5
6C2
6C2 42C5
6C1 22C2
6C2 40C7
6C2
6C2 40C7
22C4 22D8
6C1 22C2
6C2 40C7
6C2
6C2 40C7
6C1 22C2
6C2 42B5
6C2
6C2 42B5
6C1 22C2
6C2 42B5

6C2
6C2 42B5
22C4 22D8
6C1 22C2
5C1 6C2
22C4 22D8
6C1 22C2
5C1 6C2
6C1 22C2
6C2 41C6
6C2
6C2 41C6
6C1 22C2
6C2 41C6
6C2
6C2 41C6
6B1 22C2
6B2 44C6
6B2
6B2 44C6

6B1 22C2
6C2 44C6
6C2
6C2 44C6
22C2
69B4
69B4
69B4 69C1
69A4
69B4 69C1
54B7 54C7
54B7 54C7
54A4
23C5 26A8
14B6 26B5 58C7
7C6 11B2
7C6 11B2
7C6 11B2
7C6 11B3
7C6 11B2

7C6 11B2
7C6 11B4 26C6
7A8
7B8
7C6
7B8
7C6

7C6 11B2 11B3


7C6 11B3
11B5
7C6 11B2
11B3

108

8
Title:
Design:
Date:

C0607
C0608
C0610
C0611
C0612
C0613
C0614
C0615
C0616
C0617
C0618
C0619
C0630
C0900
C0901
C0902
C0904
C0907
C0908
C0909
C0910
C0911
C0912
C0913
C0918
C0920
C0923
C0924
C0926
C0928
C0929
C0930
C0931
C0934
C0935
C0936
C0937
C0938
C0939
C0940
C0941
C0942
C0943
C0944
C0946
C0950
C0951
C1001
C1002
C1100
C1211
C1226
C1236
C1415
C1416
C1610
C1611
C1612
C1613
C1614
C1615
C1620
C1621
C1711
C1712
C1713
C1900
C1902
C1903
C1904
C1905
C1906
C1907
C1910
C1911
C1912
C1913
C1914
C1915
C1916
C1917
C1918
C1920
C1921
C1922
C1923
C1934
C1935
C1936
C1937
C1940
C1941
C1942
C1950
C1951
C1952
C1953
C1954
C1965
C1966
C1967
C1970
C1971
C1972
C1975
C1976
C1980
C1981
C1985
C1986
C1990
C1991
C1992
C1993
C1994
C1995
C1996
C1997
C1998

Cref Part Report


mlb_noldo
Mar 22 15:44:50 2007

CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_402
CAP_805
CAP_805
CAP_805
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_P_3P_D2T
CAP_P_3P_D2T
CAP_P_3P_D2T
CAP_P_3P_D2T
CAP_P_3P_D2T
CAP_P_3P_D2T
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_603
CAP_402
CAP_402
CAP_402
CAP_P_3P_D2T
CAP_603
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_603
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
FILTER_3P_A_NFM18
CAP_402
FILTER_3P_A_NFM18
CAP_805
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_603
CAP_603
CAP_402
CAP_P_SMB2
CAP_603
CAP_603
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
FILTER_3P_A_NFM18
CAP_603
CAP_402
FILTER_3P_A_NFM18
CAP_402
FILTER_3P_A_NFM18
CAP_402
FILTER_3P_A_NFM18
CAP_402
FILTER_3P_A_NFM18

7
C2500
C2501
C2502
C2503
C2504
C2505
C2506
C2507
C2508
C2509
C2510
C2511
C2512
C2513
C2514
C2515
C2516
C2517
C2518
C2519
C2520
C2521
C2522
C2523
C2524
C2525
C2526
C2527
C2528
C2529
C2530
C2531
C2532
C2533
C2534
C2605
C2607
C2608
C2609
C2610
C2611
C2680
C2800
C2809
C2810
C2811
C2812
C2813
C2814
C2815
C2816
C2817
C2820
C2821
C2822
C2830
C2831
C2832
C2900
C2909
C2910
C2911
C2912
C2913
C2914
C2915
C2916
C2917
C2920
C2921
C2922
C2930
C2931
C2932
C3000
C3001
C3002
C3003
C3004
C3005
C3006
C3007
C3008
C3009
C3010
C3011
C3012
C3013
C3014
C3015
C3016
C3017
C3018
C3019
C3020
C3021
C3022
C3023
C3024
C3025
C3100
C3101
C3102
C3103
C3104
C3105
C3301
C3302
C3303
C3304
C3305
C3306
C3307
C3308
C3309
C3310
C3311
C3312
C3314
C3315
C3316
C3317
C3389
C3390

mlb_noldo[6C7]
mlb_noldo[6C7]
mlb_noldo[6C7]
mlb_noldo[6C7]
mlb_noldo[6A8]
mlb_noldo[6A8]
mlb_noldo[6B7]
mlb_noldo[6B7]
mlb_noldo[6B7]
mlb_noldo[6B7]
mlb_noldo[6A8]
mlb_noldo[6A7]
mlb_noldo[6C7]
mlb_noldo[9B5]
mlb_noldo[9B6]
mlb_noldo[9A5]
mlb_noldo[9A6]
mlb_noldo[9B4]
mlb_noldo[9B6]
mlb_noldo[9B5]
mlb_noldo[9B7]
mlb_noldo[9B7]
mlb_noldo[9A6]
mlb_noldo[9A7]
mlb_noldo[9A7]
mlb_noldo[9A4]
mlb_noldo[9B7]
mlb_noldo[9A7]
mlb_noldo[9B7]
mlb_noldo[9B5]
mlb_noldo[9B4]
mlb_noldo[9A5]
mlb_noldo[9A5]
mlb_noldo[9B7]
mlb_noldo[9B7]
mlb_noldo[9B6]
mlb_noldo[9B6]
mlb_noldo[9B5]
mlb_noldo[9A4]
mlb_noldo[9B5]
mlb_noldo[9A7]
mlb_noldo[9A7]
mlb_noldo[9A6]
mlb_noldo[9A6]
mlb_noldo[9A5]
mlb_noldo[9D7]
mlb_noldo[9D7]
mlb_noldo[10B5]
mlb_noldo[10C4]
mlb_noldo[11B3]
mlb_noldo[12C3]
mlb_noldo[12B6]
mlb_noldo[12A6]
mlb_noldo[14C3]
mlb_noldo[14C2]
mlb_noldo[16B5]
mlb_noldo[16B4]
mlb_noldo[16B4]
mlb_noldo[16B8]
mlb_noldo[16B8]
mlb_noldo[16B6]
mlb_noldo[16B5]
mlb_noldo[16B5]
mlb_noldo[17A3]
mlb_noldo[17A3]
mlb_noldo[17B3]
mlb_noldo[19B8]
mlb_noldo[19B7]
mlb_noldo[19B7]
mlb_noldo[19B6]
mlb_noldo[19B6]
mlb_noldo[19B6]
mlb_noldo[19B5]
mlb_noldo[19B8]
mlb_noldo[19B7]
mlb_noldo[19B8]
mlb_noldo[19B7]
mlb_noldo[19B6]
mlb_noldo[19B6]
mlb_noldo[19B6]
mlb_noldo[19B5]
mlb_noldo[19B5]
mlb_noldo[19A6]
mlb_noldo[19A6]
mlb_noldo[19A6]
mlb_noldo[19A6]
mlb_noldo[19C5]
mlb_noldo[19C5]
mlb_noldo[19C5]
mlb_noldo[19C5]
mlb_noldo[19C4]
mlb_noldo[19C3]
mlb_noldo[19C3]
mlb_noldo[19D6]
mlb_noldo[19D5]
mlb_noldo[19D5]
mlb_noldo[19D4]
mlb_noldo[19C4]
mlb_noldo[19B4]
mlb_noldo[19B4]
mlb_noldo[19B4]
mlb_noldo[19A4]
mlb_noldo[19A3]
mlb_noldo[19A3]
mlb_noldo[19A3]
mlb_noldo[19A3]
mlb_noldo[19D2]
mlb_noldo[19D2]
mlb_noldo[19C2]
mlb_noldo[19D2]
mlb_noldo[19C2]
mlb_noldo[19C2]
mlb_noldo[19C2]
mlb_noldo[19B2]
mlb_noldo[19B2]
mlb_noldo[19B2]
mlb_noldo[19B2]
mlb_noldo[19A2]
mlb_noldo[19A2]

CAP_P_SMB2
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_CASE-C2
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_603
CAP_402
CAP_603
CAP_P_SMC-LF
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_603
CAP_603
CAP_402
CAP_402

C3804
C3805
C3806
C3875
C3876
C3900
C3901
C3902
C3903
C3920
C3921
C3922
C3923
C3950
C4100
C4101
C4102
C4103
C4104
C4105
C4106
C4107
C4110
C4111
C4112
C4113
C4115
C4116
C4117
C4118
C4126
C4127
C4128
C4129
C4130
C4131
C4132
C4133
C4134
C4135
C4136
C4137
C4138
C4139
C4140
C4150
C4151
C4200
C4201
C4202
C4203
C4204
C4205
C4206
C4207
C4210
C4211
C4212
C4411
C4412
C4416
C4417
C4418
C4420
C4422
C4424
C4425
C4426
C4428
C4429
C4430
C4432
C4500
C4501
C4510
C4520
C4521
C4522
C4523
C4524
C4525
C4551
C4552
C4590
C4900
C4910
C5100
C5101
C5102
C5202
C5203
C5206
C5207
C5208
C5209
C5210
C5211
C5212
C5213
C5250
C5251
C5300
C5301
C5304
C5305
C5306
C5307
C5308
C5309
C5310
C5498
C5499
C5802
C5803
C5804
C5805
C5806
C5807
C5820
C5900
C5901
C5910
C5911
C5920

mlb_noldo[25B8]
mlb_noldo[25A6]
mlb_noldo[25D4]
mlb_noldo[25D8]
mlb_noldo[25C8]
mlb_noldo[25B7]
mlb_noldo[25B7]
mlb_noldo[25B7]
mlb_noldo[25A6]
mlb_noldo[25B8]
mlb_noldo[25C1]
mlb_noldo[25D6]
mlb_noldo[25B1]
mlb_noldo[25C6]
mlb_noldo[25C6]
mlb_noldo[25B6]
mlb_noldo[25D3]
mlb_noldo[25D6]
mlb_noldo[25D4]
mlb_noldo[25D3]
mlb_noldo[25B6]
mlb_noldo[25C3]
mlb_noldo[25B3]
mlb_noldo[25B4]
mlb_noldo[25B3]
mlb_noldo[25B3]
mlb_noldo[25A4]
mlb_noldo[25A3]
mlb_noldo[25A3]
mlb_noldo[25A3]
mlb_noldo[25A3]
mlb_noldo[25D1]
mlb_noldo[25C1]
mlb_noldo[25C1]
mlb_noldo[25D1]
mlb_noldo[26D4]
mlb_noldo[26B5]
mlb_noldo[26C7]
mlb_noldo[26C7]
mlb_noldo[26D4]
mlb_noldo[26B8]
mlb_noldo[26B3]
mlb_noldo[28D7]
mlb_noldo[28B2]
mlb_noldo[28B2]
mlb_noldo[28B2]
mlb_noldo[28B1]
mlb_noldo[28B1]
mlb_noldo[28B2]
mlb_noldo[28B2]
mlb_noldo[28B1]
mlb_noldo[28B1]
mlb_noldo[28D7]
mlb_noldo[28A7]
mlb_noldo[28A7]
mlb_noldo[28B2]
mlb_noldo[28B2]
mlb_noldo[28B1]
mlb_noldo[29D7]
mlb_noldo[29B2]
mlb_noldo[29B2]
mlb_noldo[29B2]
mlb_noldo[29B1]
mlb_noldo[29B1]
mlb_noldo[29B2]
mlb_noldo[29B2]
mlb_noldo[29B1]
mlb_noldo[29B1]
mlb_noldo[29D7]
mlb_noldo[29A7]
mlb_noldo[29A7]
mlb_noldo[29B2]
mlb_noldo[29B2]
mlb_noldo[29B1]
mlb_noldo[30D4]
mlb_noldo[30D3]
mlb_noldo[30D4]
mlb_noldo[30D3]
mlb_noldo[30D4]
mlb_noldo[30D3]
mlb_noldo[30C4]
mlb_noldo[30C3]
mlb_noldo[30C4]
mlb_noldo[30C3]
mlb_noldo[30C4]
mlb_noldo[30C3]
mlb_noldo[30B4]
mlb_noldo[30B3]
mlb_noldo[30B4]
mlb_noldo[30B3]
mlb_noldo[30B4]
mlb_noldo[30B3]
mlb_noldo[30B4]
mlb_noldo[30B3]
mlb_noldo[30A4]
mlb_noldo[30A3]
mlb_noldo[30A4]
mlb_noldo[30A3]
mlb_noldo[30A4]
mlb_noldo[30A3]
mlb_noldo[31C4]
mlb_noldo[31B5]
mlb_noldo[31B3]
mlb_noldo[31B5]
mlb_noldo[31C4]
mlb_noldo[31B4]
mlb_noldo[32D6]
mlb_noldo[32D6]
mlb_noldo[32D6]
mlb_noldo[32D6]
mlb_noldo[32D4]
mlb_noldo[32D4]
mlb_noldo[32C4]
mlb_noldo[32D4]
mlb_noldo[32D4]
mlb_noldo[32D3]
mlb_noldo[32C6]
mlb_noldo[32C6]
mlb_noldo[32D8]
mlb_noldo[32D7]
mlb_noldo[32D7]
mlb_noldo[32D4]
mlb_noldo[32C7]
mlb_noldo[32C7]

5
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_1808
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603-1
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_B2
CAP_P_B2
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_603
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402

mlb_noldo[34B5]
mlb_noldo[34B3]
mlb_noldo[34B3]
mlb_noldo[34C7]
mlb_noldo[34C5]
mlb_noldo[35D6]
mlb_noldo[35D5]
mlb_noldo[35C6]
mlb_noldo[35D5]
mlb_noldo[35C7]
mlb_noldo[35C6]
mlb_noldo[35C5]
mlb_noldo[35C6]
mlb_noldo[35B8]
mlb_noldo[36D6]
mlb_noldo[36D6]
mlb_noldo[36D5]
mlb_noldo[36D5]
mlb_noldo[36D5]
mlb_noldo[36D5]
mlb_noldo[36D4]
mlb_noldo[36D4]
mlb_noldo[36D5]
mlb_noldo[36D5]
mlb_noldo[36C5]
mlb_noldo[36C5]
mlb_noldo[36B4]
mlb_noldo[36B4]
mlb_noldo[36B3]
mlb_noldo[36B3]
mlb_noldo[36A8]
mlb_noldo[36A8]
mlb_noldo[36A7]
mlb_noldo[36A7]
mlb_noldo[36A7]
mlb_noldo[36A6]
mlb_noldo[36A6]
mlb_noldo[36A6]
mlb_noldo[36A6]
mlb_noldo[36A5]
mlb_noldo[36A5]
mlb_noldo[36A4]
mlb_noldo[36A4]
mlb_noldo[36A4]
mlb_noldo[36B3]
mlb_noldo[36B6]
mlb_noldo[36B6]
mlb_noldo[37C7]
mlb_noldo[37C6]
mlb_noldo[37C6]
mlb_noldo[37C6]
mlb_noldo[37C7]
mlb_noldo[37C6]
mlb_noldo[37C6]
mlb_noldo[37C6]
mlb_noldo[37A6]
mlb_noldo[37A6]
mlb_noldo[37A5]
mlb_noldo[38C2]
mlb_noldo[38C2]
mlb_noldo[38D4]
mlb_noldo[38D4]
mlb_noldo[38D4]
mlb_noldo[38C3]
mlb_noldo[38D4]
mlb_noldo[38D5]
mlb_noldo[38D3]
mlb_noldo[38D4]
mlb_noldo[38D3]
mlb_noldo[38D3]
mlb_noldo[38D3]
mlb_noldo[38D3]
mlb_noldo[39B5]
mlb_noldo[39A5]
mlb_noldo[39C3]
mlb_noldo[39B4]
mlb_noldo[39B3]
mlb_noldo[39A4]
mlb_noldo[39A3]
mlb_noldo[39A2]
mlb_noldo[39A2]
mlb_noldo[39A7]
mlb_noldo[39A7]
mlb_noldo[39C5]
mlb_noldo[40C4]
mlb_noldo[40C6]
mlb_noldo[41D6]
mlb_noldo[41D6]
mlb_noldo[41B5]
mlb_noldo[42C2]
mlb_noldo[42C2]
mlb_noldo[42B2]
mlb_noldo[42B2]
mlb_noldo[42C6]
mlb_noldo[42B6]
mlb_noldo[42C6]
mlb_noldo[42B6]
mlb_noldo[42C8]
mlb_noldo[42C8]
mlb_noldo[42C8]
mlb_noldo[42B8]
mlb_noldo[43B6]
mlb_noldo[43B6]
mlb_noldo[43D4]
mlb_noldo[43D4]
mlb_noldo[43D4]
mlb_noldo[43C4]
mlb_noldo[43C4]
mlb_noldo[43C3]
mlb_noldo[43C3]
mlb_noldo[44C5]
mlb_noldo[44C5]
mlb_noldo[45D3]
mlb_noldo[45D2]
mlb_noldo[45D2]
mlb_noldo[45D2]
mlb_noldo[45D1]
mlb_noldo[45D2]
mlb_noldo[45C3]
mlb_noldo[46D8]
mlb_noldo[46D8]
mlb_noldo[46A7]
mlb_noldo[46A7]
mlb_noldo[46C6]

C5921
C5951
C5965
C5966
C5967
C5977
C6100
C6101
C6102
C6103
C6104
C6105
C6112
C6150
C6200
C6201
C6202
C6250
C6251
C6252
C6301
C6308
C6309
C6311
C6312
C6604
C6605
C6606
C6620
C6700
C6701
C6702
C6703
C6795
C6796
C6800
C6801
C6802
C6803
C6804
C6805
C6806
C6807
C6810
C6812
C6813
C6821
C6822
C6823
C6825
C6830
C6833
C6835
C6836
C6853
C7200
C7201
C7202
C7203
C7204
C7205
C7206
C7207
C7208
C7209
C7210
C7211
C7220
C7221
C7230
C7231
C7260
C7261
C7270
C7271
C7280
C7281
C7300
C7301
C7302
C7303
C7304
C7305
C7306
C7307
C7308
C7350
C7351
C7352
C7353
C7354
C7355
C7356
C7357
C7370
C7371
C7372
C7400
C7401
C7402
C7404
C7411
C7412
C7414
C7430
C7431
C7432
C7433
C7435
C7440
C7441
C7445
C7446
C7447
C7450
C7451
C7452
C7500
C7501
C7502
C7503
C7504
C7505
C7506

2
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_P_CASE-B3-LF
CAP_P_CASE-B3-LF
CAP_P_SMA-LF
CAP_603
CAP_603
CAP_P_SMA-LF
CAP_P_SMA-LF
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_SMC-LF
CAP_P_CASE-B3-LF
CAP_603
CAP_P_CASE-B3-LF
CAP_603
CAP_P_CASE-B2
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_B2
CAP_P_B2
CAP_805-1
CAP_805-1
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_CASED2E-SM
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402

mlb_noldo[46C6]
mlb_noldo[46A4]
mlb_noldo[46B8]
mlb_noldo[46B7]
mlb_noldo[46B7]
mlb_noldo[46C2]
mlb_noldo[48D3]
mlb_noldo[48C3]
mlb_noldo[48C2]
mlb_noldo[48C3]
mlb_noldo[48D4]
mlb_noldo[48C4]
mlb_noldo[48B2]
mlb_noldo[48C6]
mlb_noldo[49C5]
mlb_noldo[49C5]
mlb_noldo[49D4]
mlb_noldo[49B5]
mlb_noldo[49A5]
mlb_noldo[49B4]
mlb_noldo[50C2]
mlb_noldo[50C5]
mlb_noldo[50C6]
mlb_noldo[50C2]
mlb_noldo[50D3]
mlb_noldo[52B4]
mlb_noldo[52B4]
mlb_noldo[52B4]
mlb_noldo[52C4]
mlb_noldo[53C4]
mlb_noldo[53C4]
mlb_noldo[53C3]
mlb_noldo[53C3]
mlb_noldo[53C6]
mlb_noldo[53B6]
mlb_noldo[54D6]
mlb_noldo[54D6]
mlb_noldo[54D4]
mlb_noldo[54D3]
mlb_noldo[54B4]
mlb_noldo[54B4]
mlb_noldo[54B3]
mlb_noldo[54B3]
mlb_noldo[54B2]
mlb_noldo[54B4]
mlb_noldo[54B3]
mlb_noldo[54C6]
mlb_noldo[54A5]
mlb_noldo[54A5]
mlb_noldo[54A4]
mlb_noldo[54D4]
mlb_noldo[54B2]
mlb_noldo[54D6]
mlb_noldo[54D3]
mlb_noldo[54B4]
mlb_noldo[55D6]
mlb_noldo[55C4]
mlb_noldo[55C4]
mlb_noldo[55B4]
mlb_noldo[55B4]
mlb_noldo[55B4]
mlb_noldo[55B4]
mlb_noldo[55C5]
mlb_noldo[55B5]
mlb_noldo[55A5]
mlb_noldo[55C6]
mlb_noldo[55C5]
mlb_noldo[55B6]
mlb_noldo[55B5]
mlb_noldo[55A6]
mlb_noldo[55A5]
mlb_noldo[55D2]
mlb_noldo[55C2]
mlb_noldo[55C2]
mlb_noldo[55B2]
mlb_noldo[55B2]
mlb_noldo[55B2]
mlb_noldo[56C7]
mlb_noldo[56C5]
mlb_noldo[56C5]
mlb_noldo[56C5]
mlb_noldo[56C5]
mlb_noldo[56C5]
mlb_noldo[56C8]
mlb_noldo[56C6]
mlb_noldo[56C6]
mlb_noldo[56A7]
mlb_noldo[56A7]
mlb_noldo[56A5]
mlb_noldo[56A5]
mlb_noldo[56A5]
mlb_noldo[56A5]
mlb_noldo[56A5]
mlb_noldo[56A8]
mlb_noldo[56A2]
mlb_noldo[56A2]
mlb_noldo[56A1]
mlb_noldo[57B4]
mlb_noldo[57D7]
mlb_noldo[57C7]
mlb_noldo[57C4]
mlb_noldo[57B7]
mlb_noldo[57B6]
mlb_noldo[57C4]
mlb_noldo[57D2]
mlb_noldo[57C2]
mlb_noldo[57B2]
mlb_noldo[57A2]
mlb_noldo[57B1]
mlb_noldo[57A4]
mlb_noldo[57A4]
mlb_noldo[57A3]
mlb_noldo[57A3]
mlb_noldo[57A3]
mlb_noldo[57A6]
mlb_noldo[57A7]
mlb_noldo[57A6]
mlb_noldo[58C4]
mlb_noldo[58C3]
mlb_noldo[58B4]
mlb_noldo[58C2]
mlb_noldo[58B2]
mlb_noldo[58C8]
mlb_noldo[58B8]

109

C7507
C7508
C7509
C7510
C7511
C7512
C7513
C7514
C7515
C7516
C7517
C7518
C7521
C7526
C7527
C7528
C7529
C7530
C7531
C7532
C7533
C7534
C7535
C7590
C7592
C7596
C7599
C7600
C7601
C7602
C7604
C7605
C7607
C7608
C7609
C7621
C7622
C7624
C7625
C7626
C7628
C7629
C7630
C7631
C7632
C7640
C7641
C7650
C7651
C7652
C7661
C7662
C7664
C7665
C7666
C7668
C7669
C7670
C7680
C7681
C7689
C7690
C7691
C7692
C7700
C7701
C7702
C7703
C7704
C7705
C7720
C7721
C7750
C7800
C7801
C7802
C7803
C7804
C7805
C7806
C7807
C7808
C7809
C7810
C7830
C7831
C7840
C7841
C7842
C7843
C7864
C7900
C7901
C7902
C7903
C7904
C7905
C7906
C7907
C7908
C7909
C7921
C7922
C7924
C7925
C7926
C7928
C7929
C7930
C7931
C7932
C7940
C7941
C7950
C7952
C7961
C7962
C7964
C7965
C7966
C7968
C7969
C7970
C7980

CAP_402
CAP_P_CASED2E-SM
CAP_P_CASED2E-SM
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_CASED2E-SM
CAP_603
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_603
CAP_603
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_CASED2E-SM
CAP_603
CAP_805
CAP_805
CAP_P_SMC-LF
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_CASED2E-SM
CAP_603
CAP_402
CAP_805
CAP_805
CAP_P_SMC-LF
CAP_603
CAP_402
CAP_603
CAP_603
CAP_402
CAP_603
CAP_402
CAP_603
CAP_402
CAP_603
CAP_603
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_CASED2E-SM
CAP_603
CAP_805
CAP_805
CAP_P_CASE-D2E-LF
CAP_P_CASE-D2E-LF
CAP_402
CAP_603
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_CASED2E-SM
CAP_603
CAP_805
CAP_P_CASE-D2E-LF
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_CASED2E-SM

7
mlb_noldo[58B7]
mlb_noldo[58C3]
mlb_noldo[58D3]
mlb_noldo[58C8]
mlb_noldo[58B3]
mlb_noldo[58C3]
mlb_noldo[58B7]
mlb_noldo[58B8]
mlb_noldo[58C5]
mlb_noldo[58B4]
mlb_noldo[58D3]
mlb_noldo[58D2]
mlb_noldo[58A6]
mlb_noldo[58D7]
mlb_noldo[58C5]
mlb_noldo[58B5]
mlb_noldo[58B5]
mlb_noldo[58C7]
mlb_noldo[58B5]
mlb_noldo[58B6]
mlb_noldo[58B6]
mlb_noldo[58B5]
mlb_noldo[58D6]
mlb_noldo[58C3]
mlb_noldo[58B3]
mlb_noldo[58D7]
mlb_noldo[58C2]
mlb_noldo[59C4]
mlb_noldo[59A4]
mlb_noldo[59A4]
mlb_noldo[59A2]
mlb_noldo[59A5]
mlb_noldo[59A3]
mlb_noldo[59D2]
mlb_noldo[59D7]
mlb_noldo[59B6]
mlb_noldo[59C5]
mlb_noldo[59C6]
mlb_noldo[59B6]
mlb_noldo[59B6]
mlb_noldo[59B7]
mlb_noldo[59B7]
mlb_noldo[59B5]
mlb_noldo[59C7]
mlb_noldo[59C2]
mlb_noldo[59D6]
mlb_noldo[59D6]
mlb_noldo[59B7]
mlb_noldo[59B8]
mlb_noldo[59B8]
mlb_noldo[59B3]
mlb_noldo[59C4]
mlb_noldo[59C3]
mlb_noldo[59B4]
mlb_noldo[59B3]
mlb_noldo[59B2]
mlb_noldo[59B2]
mlb_noldo[59B4]
mlb_noldo[59D3]
mlb_noldo[59D4]
mlb_noldo[59B4]
mlb_noldo[59B2]
mlb_noldo[59B1]
mlb_noldo[59B1]
mlb_noldo[60C4]
mlb_noldo[60C3]
mlb_noldo[60C3]
mlb_noldo[60C4]
mlb_noldo[60C3]
mlb_noldo[60C3]
mlb_noldo[60B4]
mlb_noldo[60B3]
mlb_noldo[60C6]
mlb_noldo[61C5]
mlb_noldo[61C6]
mlb_noldo[61C5]
mlb_noldo[61B2]
mlb_noldo[61C2]
mlb_noldo[61C2]
mlb_noldo[61B7]
mlb_noldo[61B6]
mlb_noldo[61B6]
mlb_noldo[61C4]
mlb_noldo[61B4]
mlb_noldo[61C4]
mlb_noldo[61C4]
mlb_noldo[61B3]
mlb_noldo[61B3]
mlb_noldo[61B3]
mlb_noldo[61B2]
mlb_noldo[61C2]
mlb_noldo[62C4]
mlb_noldo[62A4]
mlb_noldo[62A4]
mlb_noldo[62A6]
mlb_noldo[62A2]
mlb_noldo[62A5]
mlb_noldo[62A6]
mlb_noldo[62A3]
mlb_noldo[62D2]
mlb_noldo[62C7]
mlb_noldo[62B6]
mlb_noldo[62C5]
mlb_noldo[62C6]
mlb_noldo[62B6]
mlb_noldo[62B6]
mlb_noldo[62B7]
mlb_noldo[62B7]
mlb_noldo[62B5]
mlb_noldo[62C7]
mlb_noldo[62C2]
mlb_noldo[62C6]
mlb_noldo[62C6]
mlb_noldo[62B8]
mlb_noldo[62B8]
mlb_noldo[62B3]
mlb_noldo[62C4]
mlb_noldo[62C3]
mlb_noldo[62B3]
mlb_noldo[62B3]
mlb_noldo[62B2]
mlb_noldo[62B2]
mlb_noldo[62B4]
mlb_noldo[62C4]

C7981
C7989
C7990
C7991
C7992
C7999
C8000
C8005
C8010
C8015
C8025
C8060
C8061
C8062
C8090
C8091
C8092
C8093
C8202
C8203
C8205
C8206
C8209
C8211
C8215
C8217
C8218
C8220
C8221
C8230
C8300
C8301
C8302
C8303
C8304
C8305
C8306
C8307
C8308
C8309
C8310
C8311
C8312
C8313
C8316
C8317
C8318
C8320
C8321
C8322
C8323
C8324
C8325
C8326
C8327
C8328
C8340
C8341
C8370
C8371
C8372
C8375
C8381
C9400
C9401
C9402
C9403
C9408
C9409
C9410
C9411
C9412
C9413
C9414
C9415
C9416
C9459
C9500
C9501
C9502
C9503
C9504
C9505
C9506
C9507
C9508
C9509
C9510
C9511
C9512
C9513
C9514
C9519
C9520
C9521
C9522
C9523
C9524
C9525
C9526
C9527
C9530
C9531
C9532
C9533
C9534
C9535
C9536
C9537
C9538
C9539
C9540
C9541
C9542
C9543
C9544
C9545
C9546
C9547
C9548
C9804
C9808
C9809
C9812

CAP_603
CAP_402
CAP_805
CAP_805
CAP_P_CASE-D2E-LF
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_1206-1
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_1206-1
CAP_1206-1
CAP_1206-1
CAP_P_CASED2E-SM
CAP_P_6.3X5.5SM1
CAP_P_CASED2E-SM
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402

mlb_noldo[62C4]
mlb_noldo[62B4]
mlb_noldo[62A7]
mlb_noldo[62A7]
mlb_noldo[62B1]
mlb_noldo[62A6]
mlb_noldo[63D4]
mlb_noldo[63C4]
mlb_noldo[63C4]
mlb_noldo[63B4]
mlb_noldo[63A4]
mlb_noldo[63B3]
mlb_noldo[63B2]
mlb_noldo[63B2]
mlb_noldo[63C3]
mlb_noldo[63D2]
mlb_noldo[63D1]
mlb_noldo[63D1]
mlb_noldo[65D7]
mlb_noldo[65C7]
mlb_noldo[65A5]
mlb_noldo[65A4]
mlb_noldo[65A5]
mlb_noldo[65A5]
mlb_noldo[65A4]
mlb_noldo[65C2]
mlb_noldo[65C4]
mlb_noldo[65A7]
mlb_noldo[65A7]
mlb_noldo[65C6]
mlb_noldo[66C7]
mlb_noldo[66C7]
mlb_noldo[66C7]
mlb_noldo[66C4]
mlb_noldo[66C5]
mlb_noldo[66C4]
mlb_noldo[66C3]
mlb_noldo[66C3]
mlb_noldo[66B4]
mlb_noldo[66B3]
mlb_noldo[66B3]
mlb_noldo[66C7]
mlb_noldo[66C5]
mlb_noldo[66C6]
mlb_noldo[66B4]
mlb_noldo[66B5]
mlb_noldo[66B4]
mlb_noldo[66B5]
mlb_noldo[66B5]
mlb_noldo[66B4]
mlb_noldo[66A5]
mlb_noldo[66A4]
mlb_noldo[66C7]
mlb_noldo[66C7]
mlb_noldo[66D7]
mlb_noldo[66B6]
mlb_noldo[66C7]
mlb_noldo[66B8]
mlb_noldo[66C3]
mlb_noldo[66C2]
mlb_noldo[66B1]
mlb_noldo[66B3]
mlb_noldo[66B3]
mlb_noldo[67C3]
mlb_noldo[67C3]
mlb_noldo[67C3]
mlb_noldo[67C3]
mlb_noldo[67A3]
mlb_noldo[67B2]
mlb_noldo[67A3]
mlb_noldo[67B5]
mlb_noldo[67B5]
mlb_noldo[67B6]
mlb_noldo[67D5]
mlb_noldo[67A3]
mlb_noldo[67A4]
mlb_noldo[67C5]
mlb_noldo[68D5]
mlb_noldo[68D4]
mlb_noldo[68D4]
mlb_noldo[68D4]
mlb_noldo[68D4]
mlb_noldo[68B2]
mlb_noldo[68C7]
mlb_noldo[68D5]
mlb_noldo[68D5]
mlb_noldo[68D4]
mlb_noldo[68D4]
mlb_noldo[68D4]
mlb_noldo[68D3]
mlb_noldo[68D3]
mlb_noldo[68D7]
mlb_noldo[68B6]
mlb_noldo[68B6]
mlb_noldo[68B3]
mlb_noldo[68D2]
mlb_noldo[68D2]
mlb_noldo[68C2]
mlb_noldo[68C2]
mlb_noldo[68C3]
mlb_noldo[68C1]
mlb_noldo[68D7]
mlb_noldo[68D7]
mlb_noldo[68C7]
mlb_noldo[68C7]
mlb_noldo[68C7]
mlb_noldo[68C7]
mlb_noldo[68D7]
mlb_noldo[68D7]
mlb_noldo[68D7]
mlb_noldo[68D7]
mlb_noldo[68D6]
mlb_noldo[68B5]
mlb_noldo[68B5]
mlb_noldo[68B5]
mlb_noldo[68B5]
mlb_noldo[68B5]
mlb_noldo[68B4]
mlb_noldo[68B4]
mlb_noldo[68B4]
mlb_noldo[69C4]
mlb_noldo[69C5]
mlb_noldo[69B5]
mlb_noldo[69B5]

C9820
C9821
C9824
C9834
C9839
C9842
C9843
C9860
D1986
D2502
D2600
D4520
D4521
D4550
D4590
D4591
D4900
D5200
D5201
D7500
D7501
D7624
D7664
D7820
D7921
D7924
D7961
D7964
D8200
D8201
D8201
D8300
D8322
D9500
DZ7300
DZ7301
DZ7350
DZ7351
F8200
F8300
F9804
FL4520
FL4521
FL4590
FL9800
FL9801
FL9802
GV3901
GV3902
GV3903
GV3904
GV3905
GV3906
GV3907
GV3908
J1102
J2600
J2801
J2901
J3801
J3901
J4200
J4500
J4900
J5200
J5201
J5300
J5400
J6000
J6250
J6251
J6501
J7300
J7301
J7302
J7303
J7350
J8200
J8250
J9400
J9401
J9801
L1922

CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
DIODE_SCHOT_6PB_SOT363
DIODE_SCHOT_6PB_SOT363
DIODE_SCHOT_6PB_SOT363
DIODE_DUAL_6P_SOT-36
3
DIODE_DUAL_6P_SOT-36
3
ZENER_SOT23
DIODE_SCHOT_SMB
DPAK3P_SOT-363
DIODE_SCHOT_3P_A_SC75
DIODE_SCHOT_3P_A_SC75
DIODE_SCHOT_3P_A_SC75
DIODE_SCHOT_SMB
DIODE_SCHOT_SMB
DIODE_SCHOT_SOD-323
DIODE_SCHOT_SOD-323
DIODE_SCHOT_SMB
DIODE_SMB
DIODE_SCHOT_SOD-323
DIODE_SMB
DIODE_SCHOT_SOD-323
RCLAMP2402B_SC-75
DPAK3P_SOT-363
DPAK3P_SOT-363
DIODE_SCHOT_SOD-123
DPAK3P_SOT-363
DIODE_DUAL_6P_SOT-36
3
SUPPR_TRANSIENT_4P1_
0405
SUPPR_TRANSIENT_4P1_
0405
SUPPR_TRANSIENT_4P1_
0405
SUPPR_TRANSIENT_4P1_
0405
FUSE_1206
FUSE_1206
FUSE_SM-LF
FILTER_4P_2012
FILTER_4P_2012
FUSE_MINISMDC
FILTER_LC_SM-220MHZLF
FILTER_LC_SM-220MHZLF
FILTER_LC_SM-220MHZLF
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
CON_F30STSM_5047_SM1
CON_F2RT_S2MT_SM_F-R
T-SM
CON_F200RT_DDR2DIMM_
TH1_F-RT-TH2
CON_F200RT_DDR2DIMM_
TH1_F-RT-TH2
CON_M50ST_D2MT_SM_MST-SM
CON_F19ST_S2MT_SM_FST-SM
CON_RJ45_8RT_S2MT_SM
_F-RT-SM
CON_F6RT_S2MT_TH_F-R
T-TH1
CON_F10ST_D_SMA_F-ST
-SM
CON_F4RT_USB_S2MT_TH
_F-RT-TH-M42
CON_F4RT_USB_S2MT_TH
_F-RT-TH-M42
CON_F52RT_D2MT_SM_FST-SM
CON_F4ST_S2MT_SM_F-S
T-SM
CON_F30STSM_5047_SM1
CON_M2RT_S2MT_SM_M-R
T-SM
CON_M2RT_S2MT_SM_M-R
T-SM
CON_F4ST_S2MT_SM_F-S
T-SM
CON_F8RT_2MT_AUDIOOU
T_TH_F-RT-TH
CON_M3RT_S2MT_SM_M-R
T-SM1
CON_F2ST_S2MT_SM_F-S
T-SM
CON_F4ST_S2MT_SM_F-S
T-SM
CON_F8RT_2MT_AUDIOIN
_TH_F-RT-TH
CON_M5RT_S_SM_M-RT-S
M
CON_F20ST_D_SM_F-STSM1
CON_F4ST_S2MT_SM_F-S
T-SM
CON_F22RT_S4MT_SM_FRT-SM
CON_DVI_30RT_Q4MT_TH
1_RT-TH
IND_0603

mlb_noldo[69A4]
mlb_noldo[69A3]
mlb_noldo[69B5]
mlb_noldo[69A4]
mlb_noldo[69B7]
mlb_noldo[69C1]
mlb_noldo[69C1]
mlb_noldo[69C2]
mlb_noldo[19C2 19D2]
mlb_noldo[25C8 25D8]
mlb_noldo[26D5 26D5]
mlb_noldo[39B4 39B3]
mlb_noldo[39A4 39A3]
mlb_noldo[39A6]
mlb_noldo[39D4]
mlb_noldo[39C5 39C5 39C5]
mlb_noldo[40C6]
mlb_noldo[42C3]
mlb_noldo[42A3]
mlb_noldo[58C3]
mlb_noldo[58B3]
mlb_noldo[59C6]
mlb_noldo[59C3]
mlb_noldo[61B4]
mlb_noldo[62B7]
mlb_noldo[62C6]
mlb_noldo[62B2]
mlb_noldo[62C3]
mlb_noldo[65C7]
mlb_noldo[65D4]
mlb_noldo[66B3]
mlb_noldo[66C5]
mlb_noldo[66C8 66A5 66A6]
mlb_noldo[68A7 68B7]
mlb_noldo[56C6]
mlb_noldo[56C6]
mlb_noldo[56A6]
mlb_noldo[56A6]
mlb_noldo[65D6]
mlb_noldo[66C3]
mlb_noldo[69C5]
mlb_noldo[39B3]
mlb_noldo[39B3]
mlb_noldo[39D5]
mlb_noldo[69B5]
mlb_noldo[69A5]
mlb_noldo[69A5]
mlb_noldo[35C2]
mlb_noldo[35C2]
mlb_noldo[35C2]
mlb_noldo[35C2]
mlb_noldo[35B2]
mlb_noldo[35B2]
mlb_noldo[35B2]
mlb_noldo[35B2]
mlb_noldo[11B2]
mlb_noldo[26D6]
mlb_noldo[28D6]
mlb_noldo[29D5]
mlb_noldo[34C4]
mlb_noldo[35D8]
mlb_noldo[37C2]
mlb_noldo[39B2]
mlb_noldo[40C4]
mlb_noldo[42D1]
mlb_noldo[42B1]
mlb_noldo[43C5]
mlb_noldo[44C4]
mlb_noldo[47C6]
mlb_noldo[49C6]

L1934
L1936
L1970
L1975
L1985
L1990
L2500
L2507
L3301
L3302
L3901
L3902
L3912
L4100
L4250
L4400
L4510
L4550
L4900
L4901
L4902
L5200
L5201
L5202
L5203
L5204
L5205
L5400
L5410
L5411
L5910
L6800
L6801
L7200
L7210
L7211
L7220
L7230
L7300
L7301
L7302
L7303
L7304
L7305
L7306
L7307
L7350
L7351
L7352
L7353
L7354
L7355
L7356
L7357
L7370
L7371
L7372
L7373
L7374
L7375
L7390
L7400
L7500
L7501
L7620
L7680
L7820
L7920
L7960
L8090
L8201
L8202
L8203
L8204
L8205
L8207
L8208
L8209
L8300
L9400
L9401
L9402
L9403
L9404
L9405
L9407
L9408
L9500
L9501
L9503
L9504
L9505
L9506
L9804
L9805
L9806
L9807
L9844
Q2680

IND_0603
IND_0603
IND_1210
IND_0805
IND_0603
IND_0603
IND_SM-3
IND_1206
IND_0402-LF
IND_0402-LF
FILTER_4P_2012H
FILTER_4P_2012H
IND_0402
IND_0402-LF
IND_0402-LF
IND_0402
IND_SM
IND_SM-1
IND_0402
FILTER_4P_SM
IND_0402
FILTER_4P_SM
FILTER_4P_SM
IND_0402-LF
IND_0402-LF
IND_0402-LF
IND_0402-LF
FILTER_4P_SM
IND_0402-LF
IND_0402-LF
IND_0603
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402-LF
IND_0402-LF
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
IND_SM
IND_SM
IND_L812HW
IND_SM
IND_3P_SM
IND_SM
IND_3P_SM
IND_CDPH4D19F-SM
IND_SM-LF
IND_0402-LF
IND_0402-LF
IND_0402-LF
IND_SM-LF
IND_0402
IND_0402
IND_0402
IND_3P_SM
IND_0402-LF
IND_0402-LF
IND_0402-LF
IND_0402-LF
IND_0402-LF
IND_0402-LF
FILTER_4P_SM
IND_0402-LF
IND_0402-LF
IND_0402-LF
IND_0402-LF
IND_0402-LF
IND_0402-LF
IND_0402-LF
FILTER_4P_SM1
FILTER_4P_2012H
FILTER_4P_2012H
FILTER_4P_2012H
IND_SM-1
TRA_SINGLE_MOSFET_NC
HN_SOT23
TRA_FDC638P_SM-LF
TRA_2N7002DW_SOT-363
TRA_FDC638P_SM-LF
TRA_2N7002_SOT23-LF
TRA_2N7002DW_SOT-363
TRA_2N3906_SOT23-LF
TRA_2N7002_SOT23-LF
TRA_SI3446DV_TSOP-LF
TRA_2N7002DW_SOT-363
TRA_TP0610_S0T23-3
TRA_2N7002_SOT23-LF
TRA_TP0610_S0T23-3
TRA_TP0610_S0T23-3
TRA_BC846BM3T5G_NPN_
SOT732-3
TRA_2N7002_SOT23-LF
TRA_2N7002_SOT23-LF
TRA_TP0610_S0T23-3
TRA_2N7002DW_SOT-363
TRA_2N7002DW_SOT-363
TRA_2N7002DW_SOT-363
TRA_HAT2168H_LFPAK
TRA_HAT2165H_LFPAK
TRA_HAT2168H_LFPAK

mlb_noldo[49A6]
mlb_noldo[51C3]
mlb_noldo[56C8]
mlb_noldo[56D1]
mlb_noldo[56D1]
mlb_noldo[56C1]
mlb_noldo[56B8]
mlb_noldo[65D7]
mlb_noldo[65B6]
mlb_noldo[67D2]
mlb_noldo[67B1]
mlb_noldo[69B4]
mlb_noldo[19A7]

Q3810
Q3875
Q4590
Q4591
Q5901
Q5950
Q5952
Q6100
Q6101
Q6150
Q6151
Q6152
Q6153
Q6200
Q6560
Q6650
Q6651
Q7400
Q7401
Q7402
Q7500
Q7501
Q7502

mlb_noldo[19C5]
mlb_noldo[19C5]
mlb_noldo[19B4]
mlb_noldo[19A4]
mlb_noldo[19D3]
mlb_noldo[19C3]
mlb_noldo[25B8]
mlb_noldo[25A7]
mlb_noldo[32D7]
mlb_noldo[32D3]
mlb_noldo[35D6]
mlb_noldo[35D5]
mlb_noldo[35C6]
mlb_noldo[36D3]
mlb_noldo[37D7]
mlb_noldo[38D4]
mlb_noldo[39C3]
mlb_noldo[39A7]
mlb_noldo[40D5]
mlb_noldo[40C6]
mlb_noldo[40C5]
mlb_noldo[42C4]
mlb_noldo[42B4]
mlb_noldo[42D4]
mlb_noldo[42C4]
mlb_noldo[42C3]
mlb_noldo[42A3]
mlb_noldo[44B5]
mlb_noldo[44C5]
mlb_noldo[44B5]
mlb_noldo[46A7]
mlb_noldo[54A5]
mlb_noldo[54D6]
mlb_noldo[55C7]
mlb_noldo[55C7]
mlb_noldo[55A7]
mlb_noldo[55B7]
mlb_noldo[55A7]
mlb_noldo[56D6]
mlb_noldo[56D4]
mlb_noldo[56D6]
mlb_noldo[56C6]
mlb_noldo[56C4]
mlb_noldo[56C6]
mlb_noldo[56C4]
mlb_noldo[56C6]
mlb_noldo[56B6]
mlb_noldo[56B4]
mlb_noldo[56B6]
mlb_noldo[56B6]
mlb_noldo[56B4]
mlb_noldo[56B6]
mlb_noldo[56B4]
mlb_noldo[56A6]
mlb_noldo[56B2]
mlb_noldo[56B1]
mlb_noldo[56B2]
mlb_noldo[56B1]
mlb_noldo[56B2]
mlb_noldo[56B1]
mlb_noldo[56D8]
mlb_noldo[57B4]
mlb_noldo[58D2]
mlb_noldo[58B2]
mlb_noldo[59B7]
mlb_noldo[59B2]
mlb_noldo[61B3]
mlb_noldo[62B7]
mlb_noldo[62B2]
mlb_noldo[63D1]
mlb_noldo[65A3]
mlb_noldo[65A3]
mlb_noldo[65A3]
mlb_noldo[65A3]
mlb_noldo[65A3]
mlb_noldo[65A7]
mlb_noldo[65A7]
mlb_noldo[65A7]
mlb_noldo[66C4]
mlb_noldo[67D4]
mlb_noldo[67C4]
mlb_noldo[67D4]
mlb_noldo[67D4]
mlb_noldo[67B4]
mlb_noldo[67A4]
mlb_noldo[67A4]
mlb_noldo[67B4]
mlb_noldo[68D5]
mlb_noldo[68D5]
mlb_noldo[68D8]
mlb_noldo[68C8]
mlb_noldo[68C8]
mlb_noldo[68D8]
mlb_noldo[69A2]
mlb_noldo[69B2]
mlb_noldo[69B2]
mlb_noldo[69B2]
mlb_noldo[69C4]
mlb_noldo[26A3]

mlb_noldo[34C5]
mlb_noldo[34C6 34C7]
mlb_noldo[39D5]
mlb_noldo[39C5]
mlb_noldo[46B4 46B5]
mlb_noldo[46A3]
mlb_noldo[46A3]
mlb_noldo[48A5]
mlb_noldo[48A6 48A7]
mlb_noldo[48C6]
mlb_noldo[48C7]
mlb_noldo[48C7]
mlb_noldo[48C8]
mlb_noldo[49B6]

mlb_noldo[51B3]
mlb_noldo[52B6]
mlb_noldo[52B6]
mlb_noldo[57C7 57D7]
mlb_noldo[57D5 57D6]
mlb_noldo[57B7 57C5]
mlb_noldo[58D3]
mlb_noldo[58D4]
mlb_noldo[58C3]
110

8
Q7503
Q7504
Q7505
Q7620
Q7621
Q7660
Q7661

Q7750
Q7820
Q7821
Q7920
Q7921
Q7960
Q7961
Q8000
Q8005
Q8010
Q8015

Q8025
Q8030
Q8031
Q8059
Q8060
Q8061
Q8062
Q8063
Q8210
Q8220
Q8240
Q8250
Q8298
Q8299
Q8300
Q8301
Q8302
Q8320
Q8321
Q8322
Q8324
Q8340
Q8350
Q9403
Q9404
Q9405
Q9406
Q9801
R0610
R0611
R0612
R0621
R0702
R0703
R0704
R0705
R0706
R0707
R0712
R0716
R0717
R0718
R0719
R0720
R0721
R0722
R0730
R0802
R0803
R0921
R0922
R0923
R0924
R0925
R0926
R0927
R1001
R1002
R1005
R1006
R1100
R1101
R1102
R1103
R1104
R1106
R1210
R1211
R1220
R1221
R1225
R1226
R1230
R1231
R1235
R1236
R1310
R1410
R1411
R1420
R1421
R1422
R1430
R1440
R1441
R1950
R1951
R1975
R1985
R1986
R1987
R1988
R1989
R1990
R2058
R2059
R2060
R2075
R2077
R2079

TRA_HAT2165H_LFPAK
TRA_HAT2165H_LFPAK
TRA_HAT2165H_LFPAK
TRA_STL8NH3LL_COMBO_
PWRFLT-3P3X3P3
TRA_STL8NH3LL_COMBO_
PWRFLT-3P3X3P3
TRA_STL8NH3LL_COMBO_
PWRFLT-3P3X3P3
TRA_STL8NH3LL_COMBO_
PWRFLT-3P3X3P3
TRA_2N7002DW_SOT-363
TRA_IRF7821_SO-8
TRA_IRF7832_SO-8
TRA_IRF7821_SO-8
TRA_IRF7832_SO-8
TRA_IRF7821_SO-8
TRA_IRF7832_SO-8
TRA_FDC638P_SM-LF
TRA_STL8NH3LL_COMBO_
PWRFLT-3P3X3P3
TRA_FDC638P_SM-LF
TRA_STL8NH3LL_COMBO_
PWRFLT-3P3X3P3
TRA_SI3447BDV_SOT-6
TRA_2N7002DW_SOT-363
TRA_2N7002DW_SOT-363
TRA_2N7002DW_SOT-363
TRA_2N7002_SOT23-LF
TRA_2N7002DW_SOT-363
TRA_2N7002_SOT23-LF
TRA_2N7002_SOT23-LF
TRA_2N7002DW_SOT-363
TRA_2N7002DW_SOT-363
TRA_TP0610_S0T23-3
TRA_SI4405DY_SO-8
TRA_TP0610_S0T23-3
TRA_2N7002_SOT23-LF
TRA_SI4405DY_SO-8
TRA_HAT2168H_LFPAK
TRA_HAT2165H_LFPAK
TRA_SI4405DY_SO-8
TRA_SI4405DY_SO-8
TRA_2N7002DW_SOT-363
TRA_2N7002DW_SOT-363
TRA_IRLML5203_SM
TRA_2N7002_SOT23-LF
TRA_FDC638P_SM-LF
TRA_2N7002_SOT23-LF
TRA_TP0610_S0T23-3
TRA_2N7002_SOT23-LF
TRA_2N7002DW_SOT-363
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402

7
mlb_noldo[58B4]
mlb_noldo[58D3]
mlb_noldo[58B3]
mlb_noldo[59C7]

R2085
R2100
R2101
R2105
R2107
R2108
R2110
R2194
R2195
R2196
R2197
R2198
R2199
R2200
R2203
R2204
R2205
R2206
R2207
R2208
R2211
R2223
R2225
R2226
R2250
R2251
R2255
R2299
R2300
R2302
R2303
R2305
R2306
R2307
R2308
R2309
R2310
R2311
R2312
R2313
R2314
R2315
R2316
R2317
R2318
R2319
R2320
R2323
R2326
R2327
R2343
R2388
R2389
R2390
R2395
R2396
R2397
R2398
R2399
R2500
R2501
R2502
R2600
R2606
R2607
R2609
R2610
R2611
R2612
R2622
R2636
R2637
R2638
R2639
R2640
R2641
R2642
R2643
R2680
R2681
R2682
R2683
R2684
R2685
R2687
R2688
R2689
R2696
R2697
R2698
R2700
R2701
R2750
R2751
R2760
R2761
R2770
R2771
R2780
R2781
R2782
R2783
R2800
R2801
R2900
R2901
R2902
R3001
R3009
R3011
R3025
R3035
R3100
R3104
R3300
R3301
R3302
R3303
R3304
R3400
R3401
R3402
R3403
R3404

mlb_noldo[59B7]
mlb_noldo[59C3]
mlb_noldo[59B3]
mlb_noldo[60C6 60C7]
mlb_noldo[61C4]
mlb_noldo[61B4]
mlb_noldo[62C6]
mlb_noldo[62B6]
mlb_noldo[62C3]
mlb_noldo[62B3]
mlb_noldo[63D4]
mlb_noldo[63C4]
mlb_noldo[63D4]
mlb_noldo[63C4]
mlb_noldo[63A4]
mlb_noldo[63A6 63B6]
mlb_noldo[63D6 63A6]
mlb_noldo[63C7 63C7]
mlb_noldo[63C8]
mlb_noldo[63B7 63B7]
mlb_noldo[63B8]
mlb_noldo[63B4]
mlb_noldo[65C6 65C3]
mlb_noldo[65C7 65C6]
mlb_noldo[65C5]
mlb_noldo[65D2]
mlb_noldo[65C7]
mlb_noldo[65C7]
mlb_noldo[66D5]
mlb_noldo[66C4]
mlb_noldo[66B4]
mlb_noldo[66B3]
mlb_noldo[66B3]
mlb_noldo[66A4 66A4]
mlb_noldo[66A3 66A4]
mlb_noldo[66C8]
mlb_noldo[66A6]
mlb_noldo[67B6]
mlb_noldo[67B7]
mlb_noldo[67D5]
mlb_noldo[67D6]
mlb_noldo[69D6 69D6]
mlb_noldo[6A7]
mlb_noldo[6A8]
mlb_noldo[6A8]
mlb_noldo[6A7]
mlb_noldo[7D5]
mlb_noldo[7C5]
mlb_noldo[7C5]
mlb_noldo[7B4]
mlb_noldo[7B4]
mlb_noldo[7A4]
mlb_noldo[7A4]
mlb_noldo[7B2]
mlb_noldo[7B2]
mlb_noldo[7B2]
mlb_noldo[7B2]
mlb_noldo[7B7]
mlb_noldo[7B7]
mlb_noldo[7A7]
mlb_noldo[7A4]
mlb_noldo[8B6]
mlb_noldo[8A7]
mlb_noldo[9D2]
mlb_noldo[9D2]
mlb_noldo[9C2]
mlb_noldo[9C2]
mlb_noldo[9C2]
mlb_noldo[9C2]
mlb_noldo[9C2]
mlb_noldo[10B6]
mlb_noldo[10B6]
mlb_noldo[10C4]
mlb_noldo[10C3]
mlb_noldo[11B5]
mlb_noldo[11C5]
mlb_noldo[11B4]
mlb_noldo[11C5]
mlb_noldo[11B5]
mlb_noldo[11A3]
mlb_noldo[12C3]
mlb_noldo[12C3]
mlb_noldo[12B7]
mlb_noldo[12B7]
mlb_noldo[12B7]
mlb_noldo[12B7]
mlb_noldo[12A7]
mlb_noldo[12A7]
mlb_noldo[12A7]
mlb_noldo[12A7]
mlb_noldo[13D3]
mlb_noldo[14C2]
mlb_noldo[14C2]
mlb_noldo[14C6]
mlb_noldo[14C6]
mlb_noldo[14B6]
mlb_noldo[14B6]
mlb_noldo[14D6]
mlb_noldo[14D6]
mlb_noldo[19D5]
mlb_noldo[19D5]
mlb_noldo[19A4]
mlb_noldo[19D3]
mlb_noldo[19C6]
mlb_noldo[19C6]
mlb_noldo[19C7]
mlb_noldo[19C7]
mlb_noldo[19C3]
mlb_noldo[20B4]
mlb_noldo[20B4]
mlb_noldo[20A4]
mlb_noldo[20C7]
mlb_noldo[20B7]
mlb_noldo[20B7]

RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_603
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402

mlb_noldo[20C4]
mlb_noldo[21C3]
mlb_noldo[21C4]
mlb_noldo[21D6]
mlb_noldo[21C2]
mlb_noldo[21C2]
mlb_noldo[21C2]
mlb_noldo[21D4]
mlb_noldo[21C6]
mlb_noldo[21C6]
mlb_noldo[21C6]
mlb_noldo[21C6]
mlb_noldo[21C3]
mlb_noldo[22D7]
mlb_noldo[22C2]
mlb_noldo[22C2]
mlb_noldo[22C6]
mlb_noldo[22C5]
mlb_noldo[22C5]
mlb_noldo[22D5]
mlb_noldo[22B3]
mlb_noldo[22D6]
mlb_noldo[22D7]
mlb_noldo[22D5]
mlb_noldo[22D7]
mlb_noldo[22D6]
mlb_noldo[22D7]
mlb_noldo[22B5]
mlb_noldo[23C7]
mlb_noldo[23D3]
mlb_noldo[23D3]
mlb_noldo[23D3]
mlb_noldo[23B7]
mlb_noldo[23A7]
mlb_noldo[23B7]
mlb_noldo[23A7]
mlb_noldo[23A7]
mlb_noldo[23A7]
mlb_noldo[23A3]
mlb_noldo[23A7]
mlb_noldo[23A7]
mlb_noldo[23A3]
mlb_noldo[23D7]
mlb_noldo[23D7]
mlb_noldo[23D7]
mlb_noldo[23D2]
mlb_noldo[23D7]
mlb_noldo[23D5]
mlb_noldo[23D6]
mlb_noldo[23D6]
mlb_noldo[23D1]
mlb_noldo[23B2]
mlb_noldo[23A4]
mlb_noldo[23B3]
mlb_noldo[23D7]
mlb_noldo[23D6]
mlb_noldo[23D6]
mlb_noldo[23D8]
mlb_noldo[23C1]
mlb_noldo[25A8]
mlb_noldo[25C8]
mlb_noldo[25D8]
mlb_noldo[26D4]
mlb_noldo[26D5]
mlb_noldo[26D5]
mlb_noldo[26C7]
mlb_noldo[26C7]
mlb_noldo[26B5]
mlb_noldo[26A5]
mlb_noldo[26A5]
mlb_noldo[26C2]
mlb_noldo[26C2]
mlb_noldo[26C2]
mlb_noldo[26C2]
mlb_noldo[26C2]
mlb_noldo[26C2]
mlb_noldo[26C2]
mlb_noldo[26C2]
mlb_noldo[26B3]
mlb_noldo[26B2]
mlb_noldo[26A2]
mlb_noldo[26B2]
mlb_noldo[26B2]
mlb_noldo[26B2]
mlb_noldo[26B2]
mlb_noldo[26A3]
mlb_noldo[26A2]
mlb_noldo[26C6]
mlb_noldo[26C5]
mlb_noldo[26C5]
mlb_noldo[27D7]
mlb_noldo[27D7]
mlb_noldo[27D4]
mlb_noldo[27D4]
mlb_noldo[27C4]
mlb_noldo[27C4]
mlb_noldo[27D2]
mlb_noldo[27D2]
mlb_noldo[27C2]
mlb_noldo[27C2]
mlb_noldo[27B2]
mlb_noldo[27B2]
mlb_noldo[28D2]
mlb_noldo[28D2]
mlb_noldo[29A4]
mlb_noldo[29D2]
mlb_noldo[29D2]
mlb_noldo[30D4]
mlb_noldo[30D4]
mlb_noldo[30C4]
mlb_noldo[30C4]
mlb_noldo[30B4]
mlb_noldo[31C5]
mlb_noldo[31C5]
mlb_noldo[32B6]
mlb_noldo[32B7]
mlb_noldo[32D4]
mlb_noldo[32C4]
mlb_noldo[32C7]
mlb_noldo[33C1]
mlb_noldo[33C7]
mlb_noldo[33C1]
mlb_noldo[33C1]
mlb_noldo[33D1]

R3405
R3406
R3407
R3408
R3409
R3410
R3411
R3412
R3413
R3414
R3415
R3416
R3417
R3418
R3419
R3420
R3421
R3422
R3423
R3426
R3427
R3428
R3429
R3430
R3431
R3432
R3433
R3434
R3435
R3436
R3437
R3438
R3439
R3440
R3441
R3442
R3450
R3451
R3452
R3453
R3454
R3463
R3465
R3466
R3467
R3468
R3469
R3470
R3471
R3472
R3473
R3474
R3475
R3476
R3477
R3478
R3480
R3481
R3482
R3490
R3824
R3825
R3851
R3853
R3858
R3859
R3865
R3876
R3877
R3900
R3901
R3950
R4101
R4102
R4103
R4104
R4105
R4106
R4107
R4117
R4118
R4119
R4120
R4122
R4123
R4124
R4130
R4131
R4200
R4201
R4202
R4203
R4400
R4420
R4431
R4432
R4452
R4500
R4501
R4502
R4503
R4504
R4550
R4590
R4591
R4593
R4594
R4595
R4910
R5100
R5250
R5251
R5301
R5302
R5303
R5801
R5802
R5803
R5809
R5898
R5899
R5900
R5901
R5905

RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_603
RES_402

mlb_noldo[33C1]
mlb_noldo[33B1]
mlb_noldo[33B1]
mlb_noldo[33C1]
mlb_noldo[33C1]
mlb_noldo[33C1]
mlb_noldo[33D4]
mlb_noldo[33D4]
mlb_noldo[33D4]
mlb_noldo[33D4]
mlb_noldo[33D4]
mlb_noldo[33D4]
mlb_noldo[33C7]
mlb_noldo[33B4]
mlb_noldo[33B4]
mlb_noldo[33A4]
mlb_noldo[33A4]
mlb_noldo[33C4]
mlb_noldo[33C4]
mlb_noldo[33C4]
mlb_noldo[33C4]
mlb_noldo[33C4]
mlb_noldo[33D8]
mlb_noldo[33D7]
mlb_noldo[33B1]
mlb_noldo[33D7]
mlb_noldo[33D8]
mlb_noldo[33D4]
mlb_noldo[33C4]
mlb_noldo[33B1]
mlb_noldo[33B1]
mlb_noldo[33D1]
mlb_noldo[33D1]
mlb_noldo[33D1]
mlb_noldo[33D1]
mlb_noldo[33C1]
mlb_noldo[33C7]
mlb_noldo[33B7]
mlb_noldo[33B7]
mlb_noldo[33B7]
mlb_noldo[33B7]
mlb_noldo[33D7]
mlb_noldo[33C4]
mlb_noldo[33A7]
mlb_noldo[33A7]
mlb_noldo[33C7]
mlb_noldo[33C7]
mlb_noldo[33C7]
mlb_noldo[33B7]
mlb_noldo[33B7]
mlb_noldo[33B7]
mlb_noldo[33B8]
mlb_noldo[33B7]
mlb_noldo[33A7]
mlb_noldo[33B4]
mlb_noldo[33B4]
mlb_noldo[33C7]
mlb_noldo[33B1]
mlb_noldo[33B1]
mlb_noldo[33A4]
mlb_noldo[34C4]
mlb_noldo[34C5]
mlb_noldo[34C4]
mlb_noldo[34C3]
mlb_noldo[34B5]
mlb_noldo[34B4]
mlb_noldo[34C6]
mlb_noldo[34C7]
mlb_noldo[34C6]
mlb_noldo[35D3]
mlb_noldo[35C3]
mlb_noldo[35B7]
mlb_noldo[36D8]
mlb_noldo[36C8]
mlb_noldo[36B4]
mlb_noldo[36B4]
mlb_noldo[36B4]
mlb_noldo[36B5]
mlb_noldo[36D8]
mlb_noldo[36B3]
mlb_noldo[36B3]
mlb_noldo[36B3]
mlb_noldo[36B4]
mlb_noldo[36A3]
mlb_noldo[36A2]
mlb_noldo[36A2]
mlb_noldo[36B6]
mlb_noldo[36B6]
mlb_noldo[37A6]
mlb_noldo[37A5]
mlb_noldo[37A5]
mlb_noldo[37A5]
mlb_noldo[38C3]
mlb_noldo[38C2]
mlb_noldo[38A6]
mlb_noldo[38A6]
mlb_noldo[38C3]
mlb_noldo[39B6]
mlb_noldo[39B6]
mlb_noldo[39B5]
mlb_noldo[39B5]
mlb_noldo[39A5]
mlb_noldo[39A7]
mlb_noldo[39C5]
mlb_noldo[39C5]
mlb_noldo[39C6]
mlb_noldo[39C6]
mlb_noldo[39C5]
mlb_noldo[40C6]
mlb_noldo[41C6]
mlb_noldo[42C8]
mlb_noldo[42C8]
mlb_noldo[43B4]
mlb_noldo[43B4]
mlb_noldo[43C4]
mlb_noldo[45D1]
mlb_noldo[45C1]
mlb_noldo[45C1]
mlb_noldo[45D2]
mlb_noldo[45C2]
mlb_noldo[45D3]
mlb_noldo[46D7]
mlb_noldo[46D8]
mlb_noldo[46D4]

R5906
R5910
R5911
R5918
R5919
R5920
R5922
R5923
R5924
R5925
R5926
R5927
R5928
R5929
R5930
R5931
R5932
R5933
R5934
R5935
R5936
R5937
R5938
R5939
R5940
R5941
R5942
R5943
R5944
R5945
R5946
R5947
R5948
R5949
R5950
R5951
R5952
R5953
R5954
R5955
R5970
R5971
R5972
R5973
R5976
R5977
R5980
R5981
R5982
R5983
R5984
R5985
R5986
R5987
R5988
R5989
R5990
R5991
R5992
R5993
R5994
R5995
R5996
R5997
R5998
R5999
R6100
R6102
R6103
R6105
R6106
R6107
R6108
R6112
R6140
R6141
R6142
R6143
R6144
R6150
R6151
R6152
R6153
R6200
R6201
R6203
R6251
R6252
R6301
R6302
R6303
R6306
R6307
R6308
R6309
R6560
R6561
R6565
R6621
R6650
R6652
R6700
R6702
R6703
R6704
R6705
R6798
R6799
R6800
R6801
R6802
R6807
R6808
R6809
R6810
R6811
R6850
R6851
R6852
R6853
R6854
R7201
R7202
R7210

RES_402
RES_603
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_1206
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_805
RES_805
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402

mlb_noldo[46D4]
mlb_noldo[46C8]
mlb_noldo[46A6]
mlb_noldo[46C5]
mlb_noldo[46C5]
mlb_noldo[46C5]
mlb_noldo[46C5]
mlb_noldo[46C5]
mlb_noldo[46C4]
mlb_noldo[46C5]
mlb_noldo[46C4]
mlb_noldo[46C5]
mlb_noldo[46D4]
mlb_noldo[46C5]
mlb_noldo[46C5]
mlb_noldo[46C4]
mlb_noldo[46C4]
mlb_noldo[46C4]
mlb_noldo[46C5]
mlb_noldo[46C4]
mlb_noldo[46C5]
mlb_noldo[46C4]
mlb_noldo[46C5]
mlb_noldo[46C4]
mlb_noldo[46C5]
mlb_noldo[46C4]
mlb_noldo[46C5]
mlb_noldo[46B4]
mlb_noldo[46B4]
mlb_noldo[46C4]
mlb_noldo[46C4]
mlb_noldo[46B4]
mlb_noldo[46C5]
mlb_noldo[46C4]
mlb_noldo[46A3]
mlb_noldo[46A3]
mlb_noldo[46A3]
mlb_noldo[46D5]
mlb_noldo[46B5]
mlb_noldo[46B5]
mlb_noldo[46D3]
mlb_noldo[46D3]
mlb_noldo[46C7]
mlb_noldo[46C5]
mlb_noldo[46D1]
mlb_noldo[46C1]
mlb_noldo[46D5]
mlb_noldo[46D5]
mlb_noldo[46D5]
mlb_noldo[46C5]
mlb_noldo[46C5]
mlb_noldo[46C5]
mlb_noldo[46C5]
mlb_noldo[46C5]
mlb_noldo[46B5]
mlb_noldo[46D5]
mlb_noldo[46B2]
mlb_noldo[46B2]
mlb_noldo[46B2]
mlb_noldo[46B2]
mlb_noldo[46D5]
mlb_noldo[46D5]
mlb_noldo[46B4]
mlb_noldo[46B4]
mlb_noldo[46C4]
mlb_noldo[46C4]
mlb_noldo[48D3]
mlb_noldo[48C2]
mlb_noldo[48C3]
mlb_noldo[48D4]
mlb_noldo[48C4]
mlb_noldo[48D4]
mlb_noldo[48C4]
mlb_noldo[48B2]
mlb_noldo[48A7]
mlb_noldo[48A7]
mlb_noldo[48A6]
mlb_noldo[48A4]
mlb_noldo[48A6]
mlb_noldo[48C6]
mlb_noldo[48B6]
mlb_noldo[48C7]
mlb_noldo[48B7]
mlb_noldo[49C5]
mlb_noldo[49C5]
mlb_noldo[49D3]
mlb_noldo[49A5]
mlb_noldo[49B3]
mlb_noldo[50D4]
mlb_noldo[50D4]
mlb_noldo[50C3]
mlb_noldo[50C2]
mlb_noldo[50C5]
mlb_noldo[50D3]
mlb_noldo[50C5]
mlb_noldo[51C3]
mlb_noldo[51B4]
mlb_noldo[51C3]
mlb_noldo[52A5]
mlb_noldo[52B6]
mlb_noldo[52B7]
mlb_noldo[53C7]
mlb_noldo[53C4]
mlb_noldo[53C4]
mlb_noldo[53C2]
mlb_noldo[53C3]
mlb_noldo[53B6]
mlb_noldo[53B6]
mlb_noldo[54C6]
mlb_noldo[54B5]
mlb_noldo[54A5]
mlb_noldo[54D7]
mlb_noldo[54D3]
mlb_noldo[54C3]
mlb_noldo[54A4]
mlb_noldo[54A4]
mlb_noldo[54B7]
mlb_noldo[54B7]
mlb_noldo[54B7]
mlb_noldo[54A7]
mlb_noldo[54B4]
mlb_noldo[55C4]
mlb_noldo[55A4]
mlb_noldo[55A7]

111

R7260
R7261
R7270
R7271
R7280
R7281
R7300
R7301
R7320
R7321
R7322
R7349
R7350
R7351
R7380
R7382
R7391
R7401
R7402
R7403
R7404
R7405
R7406
R7411
R7412
R7413
R7414
R7415
R7430
R7431
R7432
R7433
R7434
R7435
R7436
R7437
R7438
R7439
R7440
R7450
R7451
R7452
R7453
R7454
R7460
R7461
R7500
R7501
R7502
R7503
R7504
R7505
R7506
R7507
R7508
R7509
R7510
R7511
R7512
R7513
R7514
R7515
R7516
R7517
R7518
R7519
R7520
R7521
R7522
R7523
R7524
R7525
R7526
R7527
R7530
R7531
R7543
R7545
R7600
R7603
R7604
R7606
R7607
R7621
R7624
R7625
R7626
R7627
R7628
R7629
R7630
R7661
R7664
R7665
R7666
R7667
R7668
R7669
R7670
R7720
R7721
R7750
R7751
R7752
R7753
R7800
R7801
R7802
R7803
R7804
R7805
R7806
R7807
R7808
R7810
R7821
R7822
R7860
R7861
R7863
R7900
R7901
R7902
R7903

RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_603
RES_603
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_805
RES_805
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
THERMISTER_402
RES_402
RES_402
THERMISTER_0603-LF
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_1206
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_603
RES_402
RES_402
RES_402
RES_402
RES_1206
RES_402

7
mlb_noldo[55D2]
mlb_noldo[55C2]
mlb_noldo[55C2]
mlb_noldo[55C2]
mlb_noldo[55B2]
mlb_noldo[55B2]
mlb_noldo[56C4]
mlb_noldo[56C4]
mlb_noldo[56B5]
mlb_noldo[56D7]
mlb_noldo[56B7]
mlb_noldo[56B7]
mlb_noldo[56A4]
mlb_noldo[56A4]
mlb_noldo[56C2]
mlb_noldo[56B2]
mlb_noldo[56C7]
mlb_noldo[57D8]
mlb_noldo[57D7]
mlb_noldo[57C7]
mlb_noldo[57C4]
mlb_noldo[57D5]
mlb_noldo[57D6]
mlb_noldo[57C8]
mlb_noldo[57B7]
mlb_noldo[57C6]
mlb_noldo[57C4]
mlb_noldo[57C5]
mlb_noldo[57C3]
mlb_noldo[57B3]
mlb_noldo[57B3]
mlb_noldo[57A3]
mlb_noldo[57C2]
mlb_noldo[57C2]
mlb_noldo[57B2]
mlb_noldo[57B2]
mlb_noldo[57C2]
mlb_noldo[57B2]
mlb_noldo[57A5]
mlb_noldo[57A7]
mlb_noldo[57A7]
mlb_noldo[57A7]
mlb_noldo[57A7]
mlb_noldo[57A7]
mlb_noldo[57C6]
mlb_noldo[57C7]
mlb_noldo[58C2]
mlb_noldo[58C2]
mlb_noldo[58B3]
mlb_noldo[58D3]
mlb_noldo[58C1]
mlb_noldo[58B2]
mlb_noldo[58C7]
mlb_noldo[58B1]
mlb_noldo[58B8]
mlb_noldo[58B8]
mlb_noldo[58B6]
mlb_noldo[58B8]
mlb_noldo[58D7]
mlb_noldo[58B7]
mlb_noldo[58B8]
mlb_noldo[58B5]
mlb_noldo[58B4]
mlb_noldo[58B5]
mlb_noldo[58B5]
mlb_noldo[58C7]
mlb_noldo[58D7]
mlb_noldo[58D8]
mlb_noldo[58A5]
mlb_noldo[58A6]
mlb_noldo[58D5]
mlb_noldo[58C5]
mlb_noldo[58C7]
mlb_noldo[58C8]
mlb_noldo[58B4]
mlb_noldo[58B4]
mlb_noldo[58B2]
mlb_noldo[58C7]
mlb_noldo[59C5]
mlb_noldo[59A3]
mlb_noldo[59A3]
mlb_noldo[59A3]
mlb_noldo[59A3]
mlb_noldo[59C7]
mlb_noldo[59C6]
mlb_noldo[59B6]
mlb_noldo[59C7]
mlb_noldo[59B7]
mlb_noldo[59B7]
mlb_noldo[59C7]
mlb_noldo[59C5]
mlb_noldo[59C2]
mlb_noldo[59C3]
mlb_noldo[59B4]
mlb_noldo[59C2]
mlb_noldo[59B2]
mlb_noldo[59B2]
mlb_noldo[59C2]
mlb_noldo[59C4]
mlb_noldo[60B3]
mlb_noldo[60A3]
mlb_noldo[60C6]
mlb_noldo[60C7]
mlb_noldo[60C7]
mlb_noldo[60B7]
mlb_noldo[61C4]
mlb_noldo[61B2]
mlb_noldo[61C3]
mlb_noldo[61C2]
mlb_noldo[61C7]
mlb_noldo[61B7]
mlb_noldo[61B7]
mlb_noldo[61C5]
mlb_noldo[61B6]
mlb_noldo[61B4]
mlb_noldo[61B2]
mlb_noldo[61B2]
mlb_noldo[61C3]
mlb_noldo[61C2]
mlb_noldo[61C2]
mlb_noldo[62C5]
mlb_noldo[62B1]
mlb_noldo[62A7]
mlb_noldo[62A3]

R7904
R7905
R7906
R7907
R7921
R7924
R7925
R7926
R7927
R7928
R7929
R7930
R7961
R7964
R7965
R7966
R7967
R7968
R7969
R7970
R7990
R7991
R7992
R8000
R8005
R8010
R8015
R8025
R8030
R8031
R8032
R8033
R8050
R8056
R8057
R8058
R8059
R8061
R8062
R8063
R8064
R8065
R8091
R8092
R8200
R8201
R8202
R8203
R8204
R8205
R8206
R8207
R8208
R8209
R8210
R8211
R8213
R8214
R8231
R8232
R8233
R8296
R8297
R8298
R8299
R8300
R8301
R8302
R8303
R8304
R8305
R8306
R8308
R8309
R8310
R8311
R8312
R8320
R8322
R8323
R8324
R8325
R8330
R8331
R8340
R8341
R8342
R8343
R8344
R8350
R8351
R8352
R8360
R8361
R8362
R8363
R8364
R8365
R8367
R8370
R8371
R8381
R8397
R9400
R9401
R9402
R9408
R9409
R9413
R9414
R9415
R9416
R9423
R9428
R9500
R9501
R9502
R9503
R9504
R9505
R9506
R9507
R9508
R9509

RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_603
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_805
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_805
RES_402
RES_402
RES_0612
RES_402
RES_402
RES_402
RES_402
RES_2525
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_603
RES_0612
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402

R9510
R9537
R9538
R9539
R9540
R9821
R9822
R9850
R9851
R9852
R9853
R9854
R9855
R9856
R9859
R9860
R9861
R9862
R9863
R9864
R9868
R9869
R9870
R9871
RP2300
RP2600
RP2601
RP2602
RP3000
RP3001
RP3002
RP3003
RP3004
RP3005
RP3006
RP3007
RP3008
RP3009
RP3010
RP3011
T4201

mlb_noldo[62A3]
mlb_noldo[62A6]
mlb_noldo[62A3]
mlb_noldo[62A3]
mlb_noldo[62C7]
mlb_noldo[62C6]
mlb_noldo[62B6]
mlb_noldo[62C7]
mlb_noldo[62B8]
mlb_noldo[62B8]
mlb_noldo[62C7]
mlb_noldo[62C5]
mlb_noldo[62C2]
mlb_noldo[62C3]
mlb_noldo[62B3]
mlb_noldo[62C2]
mlb_noldo[62B2]
mlb_noldo[62B2]
mlb_noldo[62C2]
mlb_noldo[62C4]
mlb_noldo[62A6]
mlb_noldo[62A6]
mlb_noldo[62A7]
mlb_noldo[63D5]
mlb_noldo[63C5]
mlb_noldo[63C5]
mlb_noldo[63B5]
mlb_noldo[63A5]
mlb_noldo[63B6]
mlb_noldo[63B6]
mlb_noldo[63D6]
mlb_noldo[63D6]
mlb_noldo[63A6]
mlb_noldo[63C8]
mlb_noldo[63C8]
mlb_noldo[63B8]
mlb_noldo[63B8]
mlb_noldo[63B1]
mlb_noldo[63B1]
mlb_noldo[63A1]
mlb_noldo[63A1]
mlb_noldo[63B2]
mlb_noldo[63D1]
mlb_noldo[63C1]
mlb_noldo[65B7]
mlb_noldo[65C5]
mlb_noldo[65C5]
mlb_noldo[65C6]
mlb_noldo[65C6]
mlb_noldo[65D4]
mlb_noldo[65C4]
mlb_noldo[65C4]
mlb_noldo[65C4]
mlb_noldo[65C4]
mlb_noldo[65C4]
mlb_noldo[65C6]
mlb_noldo[65C2]
mlb_noldo[65C2]
mlb_noldo[65C5]
mlb_noldo[65C6]
mlb_noldo[65C5]
mlb_noldo[65B7]
mlb_noldo[65C3]
mlb_noldo[65C8]
mlb_noldo[65C7]
mlb_noldo[66C6]
mlb_noldo[66C7]
mlb_noldo[66C5]
mlb_noldo[66C5]
mlb_noldo[66B2]
mlb_noldo[66C5]
mlb_noldo[66C7]
mlb_noldo[66C3]
mlb_noldo[66B6]
mlb_noldo[66C5]
mlb_noldo[66B7]
mlb_noldo[66C7]
mlb_noldo[66B3]
mlb_noldo[66A3]
mlb_noldo[66A3]
mlb_noldo[66A4]
mlb_noldo[66A5]
mlb_noldo[66B4]
mlb_noldo[66A4]
mlb_noldo[66C8]
mlb_noldo[66B8]
mlb_noldo[66C8]
mlb_noldo[66B8]
mlb_noldo[66B8]
mlb_noldo[66B5]
mlb_noldo[66B6]
mlb_noldo[66B5]
mlb_noldo[66D7]
mlb_noldo[66C7]
mlb_noldo[66B7]
mlb_noldo[66B6]
mlb_noldo[66B6]
mlb_noldo[66B6]
mlb_noldo[66C6]
mlb_noldo[66C2]
mlb_noldo[66B2]
mlb_noldo[66B4]
mlb_noldo[66C4]
mlb_noldo[67D6]
mlb_noldo[67D6]
mlb_noldo[67C7]
mlb_noldo[67B5]
mlb_noldo[67B5]
mlb_noldo[67A6]
mlb_noldo[67B7]
mlb_noldo[67B7]
mlb_noldo[67B7]
mlb_noldo[67B6]
mlb_noldo[67C5]
mlb_noldo[68A7]
mlb_noldo[68B6]
mlb_noldo[68B6]
mlb_noldo[68A4]
mlb_noldo[68B2]
mlb_noldo[68B2]
mlb_noldo[68B1]
mlb_noldo[68D2]
mlb_noldo[68D2]
mlb_noldo[68C2]

T4202
U0700
U0700
U1001
U1200
U1200
U1200
U1200
U1200
U1200
U1200
U1900
U1901
U2100
U2100
U2100
U2100
U2601
U2603
U2680
U3100
U3301
U4101
U4102
U4400
U5100
U5200
U5800
U5900
U5910
U5977
U6100
U6200
U6250
U6301
U6620
U6650
U6700
U6800
U7210
U7220
U7230
U7400
U7500
U7600
U7700
U7701
U7720
U7800
U7801
U7900
U7901
U8070
U8080
U8090
U8200
U8250
U8290
U8300
U8370
U8375
U9453
U9500
U9801
U9804
VR5965
VR6800
XW5800
XW7200
XW7300

RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
XFR_1000BT_82400275_
XFR-SM
XFR_1000BT_82400275_
XFR-SM
CPU_YONAH_BGA
CPU_YONAH_BGA
ADT7461_MSOP
NB_945GM_BGA
NB_945GM_BGA
NB_945GM_BGA
NB_945GM_BGA
NB_945GM_BGA
NB_945GM_BGA
NB_945GM_BGA
LREG_TPS73115_SOT235
MM157_SOT23-5-LF
SB_ICH7M_BGA
SB_ICH7M_BGA
SB_ICH7M_BGA
SB_ICH7M_BGA
MC74VHC1G08_SC70
MC74VHC1G00_SC70-5
MC74VHC1G08_SC70
LREG_BD3533FVM_MSOP8
CLK_SYN_SLG8LP436_QF
N
88E8053_QFN
EEPROM_M24C08_SO8
FW32306_BGA_BGA
CY8C24794_MLF
SWI_TPS2042B_MSOP
SMC_H8S2116_BGA
VDET_RN5VD_SOT23-5
OSC_12P_SG-3040LC-SM
COMPARATOR_LMC7211_S
M-LF
OPAMP_LMV2011_SOT235
MAX6695_UMAX1
MAX6695_UMAX1
FLASH_SST25VF016B_SO
I_SOI
KXM52_QFN
LIS3L02AL_LGA
TPM_TSSOP
AUDIO_STAC92204XR_LQ
FP
MAX9705_TDFN1
MAX9705_TDFN1
MAX9705_TDFN1
MAX9890_UCSP1
ISL6262_QFN
LTC3728L_QFN
MAX8887_SOT23-5
MAX8887_SOT23-5
LREG_MAX8516_SOP
ISL6269_QFN
AMP_INA326_MSOP
LTC3728L_QFN
AMP_INA326_MSOP
LTC2908_LLP
MC74VHC1G08_SC70
LT3470_TSOT23-8
COMPARATOR_LMC7211_S
M-LF
MC74VHC1G08_SC70
COMPARATOR_LM397_SOT
23-5
ISL6255_QFN
INA193_SOT23-5
INA193_SOT23-5
MC74VHC1G08_SC70
SIL1362_LQFP
VIDEO_TS3V330_SOP
SN74LVC2G125_US
VREF_ISL6000233_SOT2
3-3
LREG_TPS79501_SOT223
-6
SHORT_SM
SHORT_SM
SHORT_SM

mlb_noldo[68C2]
mlb_noldo[68D1]
mlb_noldo[68D1]
mlb_noldo[68C1]
mlb_noldo[68C1]
mlb_noldo[69D7]
mlb_noldo[69D6]
mlb_noldo[69B8]
mlb_noldo[69B8]
mlb_noldo[69A8]
mlb_noldo[69A8]
mlb_noldo[69A8]
mlb_noldo[69A8]
mlb_noldo[69B6]
mlb_noldo[69A6]
mlb_noldo[69C3]
mlb_noldo[69C3]
mlb_noldo[69C5]
mlb_noldo[69C5]
mlb_noldo[69A6]
mlb_noldo[69C8]
mlb_noldo[69C8]
mlb_noldo[69C1]
mlb_noldo[69C1]
mlb_noldo[23D5]
mlb_noldo[26D2]
mlb_noldo[26D2]
mlb_noldo[26C2]
mlb_noldo[30B4 30C4
mlb_noldo[30C4 30A4
mlb_noldo[30A4 30A4
mlb_noldo[30C4 30C4
mlb_noldo[30C4 30C4
mlb_noldo[30B4 30A4
mlb_noldo[30B4 30B4
mlb_noldo[30C4 30C4
mlb_noldo[30C4 30C4
mlb_noldo[30B4 30B4
mlb_noldo[30B4 30B4
mlb_noldo[30B4 30A4
mlb_noldo[37C6]

XW7301
XW7302
XW7303
XW7304
XW7305
XW7400
XW7500
XW7600
XW7620
XW7660
XW7800
XW7900
XW7920
XW8101
XW8102
XW8300
Y2600
Y3301
Y4101

SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
JUMPER_OPEN-SAWTOOTH
JUMPER_OPEN-SAWTOOTH
SHORT_SM
SHORT_SM
JUMPER_OPEN-SAWTOOTH
SHORT_SM
SHORT_SM
SHORT_SM
CRYSTAL_4PIN_SM-LF
CRYSTAL_5X3.2-SM
CRYSTAL_4PIN_SM-3.2X
2.5MM
CRYSTAL_4PIN_SM-3.2X
2.5MM
CRYSTAL_5X3.2-SM
CRYSTAL_4PIN_SM-LF
MTGHOLE
MTGHOLE
PCB_STANDOFF
PCB_STANDOFF
PCB_STANDOFF
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
PCB_STANDOFF
PCB_STANDOFF
PCB_STANDOFF
SPRING_CLIP_1P_EMI_C
LIP-SM-M42
CLIP_SM

Y4403

30D4 30D4]
30A4 30D4]
30A4 30D4]
30C4 30D4]
30D4]
30A4 30D4]
30A4 30D4]
30C4 30C4]
30C4 30C4]
30C4 30C4]
30B4 30B4]
30B4 30B4]

Y5920
Y6795
Z0601
Z0602
Z0603
Z0604
Z0605
Z0606
Z0607
Z0608
Z0609
Z0610
Z0611
Z0612
Z0613
Z0621
ZS0620
ZS0621

mlb_noldo[56B4]
mlb_noldo[56C2]
mlb_noldo[56C2]
mlb_noldo[56B2]
mlb_noldo[56B7]
mlb_noldo[57A7]
mlb_noldo[58A6]
mlb_noldo[59A5]
mlb_noldo[59B8]
mlb_noldo[59B1]
mlb_noldo[61B5]
mlb_noldo[62A5]
mlb_noldo[62B8]
mlb_noldo[64B2]
mlb_noldo[64B2]
mlb_noldo[66B4]
mlb_noldo[26C7]
mlb_noldo[32C7]
mlb_noldo[36B6]

mlb_noldo[38C2]
mlb_noldo[46C7]
mlb_noldo[53B6]
mlb_noldo[6B8]
mlb_noldo[6C6]
mlb_noldo[6A8]
mlb_noldo[6A6]
mlb_noldo[6A8]
mlb_noldo[6D6]
mlb_noldo[6C6]
mlb_noldo[6C6]
mlb_noldo[6B7]
mlb_noldo[6B6]
mlb_noldo[6B7]
mlb_noldo[6A6]
mlb_noldo[6A5]
mlb_noldo[6A6]
mlb_noldo[6D7]
mlb_noldo[6D6]

mlb_noldo[37B6]
mlb_noldo[7C3 7D7]
mlb_noldo[8D8 8D4]
mlb_noldo[10C5]
mlb_noldo[12D5]
mlb_noldo[13D4]
mlb_noldo[14D5]
mlb_noldo[15D3 15D7]
mlb_noldo[16D2 16C8]
mlb_noldo[17D5]
mlb_noldo[18D4 18D7]
mlb_noldo[19D6]

mlb_noldo[19C4]
mlb_noldo[21D6]
mlb_noldo[22B7 22D3]
mlb_noldo[23D4]
mlb_noldo[24D4 24D7]
mlb_noldo[26A5]
mlb_noldo[26A7]
mlb_noldo[26B3]
mlb_noldo[31C4]
mlb_noldo[32C5]
mlb_noldo[36D6]
mlb_noldo[36A3]
mlb_noldo[38C5]
mlb_noldo[41C5]
mlb_noldo[42C7]
mlb_noldo[45A8 45C3 45C7 45D7]
mlb_noldo[46D7]
mlb_noldo[46A7]
mlb_noldo[46C2]

mlb_noldo[48C3]
mlb_noldo[49D4]
mlb_noldo[49B4]
mlb_noldo[50D3]
mlb_noldo[52C5]
mlb_noldo[52B5]
mlb_noldo[53C5]
mlb_noldo[54D5]
mlb_noldo[55C5]
mlb_noldo[55B5]
mlb_noldo[55A5]
mlb_noldo[57C2]
mlb_noldo[58C6]
mlb_noldo[59C5]
mlb_noldo[60D4]
mlb_noldo[60C4]
mlb_noldo[60B3]
mlb_noldo[61C5]
mlb_noldo[61C2]
mlb_noldo[62C5]
mlb_noldo[62A6]
mlb_noldo[63B2]
mlb_noldo[63B1]
mlb_noldo[63D3]
mlb_noldo[65C4]
mlb_noldo[65C3]
mlb_noldo[65C5]

mlb_noldo[66C6]
mlb_noldo[66C3]
mlb_noldo[66B2]
mlb_noldo[67C5]
mlb_noldo[68B4]
mlb_noldo[69B7]
mlb_noldo[69C2 69C2]
mlb_noldo[46C7]
mlb_noldo[54A5]
mlb_noldo[45C3]
mlb_noldo[55A5]
mlb_noldo[56C4]
112