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100tap Digital
Potentiometer (POT)
Description
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SOIC8
V SUFFIX
CASE 751BD
MSOP8
Z SUFFIX
CASE 846AD
PDIP8
L SUFFIX
CASE 646AA
TSSOP8
Y SUFFIX
CASE 948AL
PIN CONFIGURATIONS
INC
U/D
RH
GND
Features
Applications
VCC
CS
RL
RWB
RL
RWB
GND
RH
TSSOP (Y)
(Top Views)
PIN FUNCTION
Pin Name
Function
INC
Increment Control
U/D
Up/Down Control
RH
GND
Ground
RW
Wiper Terminal
RL
CS
Chip Select
VCC
Supply Voltage
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
CAT5113
DEVICE MARKING INFORMATION
PDIP
RL4A
CAT5113LT
YMXXXX
SOIC
RL4A
CAT5113VT
YMXXXX
MSOP
TSSOP
AARR
YMP
A3RL
4YMXXX
R = Resistance:
AARR = CAT5113ZI10T3
AARC = CAT5113ZI50T3
0 = 1 kW
AARG = CAT5113ZI00T3
2 = 10 kW
Y = Production Year (Last Digit)
4 = 50 kW
M = Production Month (19, A, B, C)
5 = 100 kW
P = Product Revision
L = Assembly Location
4 = Lead Finish NiPdAu
A = Product Revision (Fixed as A)
CAT5113L = Device Code (PDIP)
CAT5113V = Device Code (SOIC)
T = Temperature Range (Industrial)
Y = Production Year (Last Digit)
M = Production Month (19, A, B, C)
XXXX = Last Four Digits of Assembly Lot Number
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A3 = Device Code
R = Resistance:
2 = 10 kW
4 = 50 kW
5 = 100 kW
L = Assembly Location
4 = Lead Finish NiPdAu
Y = Production Year (Last Digit)
M = Production Month (19, A, B, C)
XXX = Last Three Digits of
XXX = Assembly Lot Number
CAT5113
Functional Diagram
VCC
U/D
INC
CS
5Bit
Up/Down
Counter
INC
CS
Control
and
Memory
Power On
Recall
GND
RW
RH
30
RH
U/D
RH
31
29
5Bit
Nonvolatile
Memory
28
1 of 32
Decoder
Transfer
Gates
Resistor
Array
RW
2
RL
VCC
GND
Store and
Recall
Control
Circuitry
1
0
RL
RW
Figure 1. General
Figure 2. Detailed
RL
Figure 3. Electronic
Potentiometer
Implementation
Device Operation
The CAT5113 operates like a digitally controlled
potentiometer with RH and RL equivalent to the high and low
terminals and RW equivalent to the mechanical
potentiometers wiper. There are 100 available tap positions
including the resistor end points, RH and RL. There are 99
resistor elements connected in series between the RH and RL
terminals. The wiper terminal is connected to one of the 100
taps and controlled by three inputs, INC, U/D and CS. These
inputs control a sevenbit up/down counter whose output is
decoded to select the wiper position. The selected wiper
position can be stored in nonvolatile memory using the INC
and CS inputs.
With CS set LOW the CAT5113 is selected and will
respond to the U/D and INC inputs. HIGH to LOW
transitions on INC will increment or decrement the wiper
(depending on the state of the U/D input and seven-bit
counter). The wiper, when at either fixed terminal, acts like
its mechanical equivalent and does not move beyond the last
position. The value of the counter is stored in nonvolatile
memory whenever CS transitions HIGH while the INC input
is also HIGH. When the CAT5113 is powered-down, the last
stored wiper counter position is maintained in the
nonvolatile memory. When power is restored, the contents
of the memory are recalled and the counter is set to the value
stored.
With INC set low, the CAT5113 may be de-selected and
powered down without storing the current wiper position in
nonvolatile memory. This allows the system to always
power up to a preset value stored in nonvolatile memory.
Pin Description
INC: Increment Control Input
The INC input moves the wiper in the up or down direction
determined by the condition of the U/D input.
U/D: Up/Down Control Input
The U/D input controls the direction of the wiper movement.
When in a high state and CS is low, any hightolow
transition on INC will cause the wiper to move one
increment toward the RH terminal. When in a low state and
CS is low, any high-to-low transition on INC will cause the
wiper to move one increment towards the RL terminal.
RH: High End Potentiometer Terminal
RH is the high end terminal of the potentiometer. It is not
required that this terminal be connected to a potential greater
than the RL terminal. Voltage applied to the RH terminal
cannot exceed the supply voltage, VCC or go below ground,
GND.
RW: Wiper Potentiometer Terminal
RW is the wiper terminal of the potentiometer. Its position on
the resistor array is controlled by the control inputs, INC,
U/D and CS. Voltage applied to the RW terminal cannot
exceed the supply voltage, VCC or go below ground, GND.
RL: Low End Potentiometer Terminal
RL is the low end terminal of the potentiometer. It is not
required that this terminal be connected to a potential less
than the RH terminal. Voltage applied to the RL terminal
cannot exceed the supply voltage, VCC or go below ground,
GND. RL and RH are electrically interchangeable.
CS: Chip Select
The chip select input is used to activate the control input of
the CAT5113 and is active low. When in a high state, activity
on the INC and U/D inputs will not affect or change the
position of the wiper.
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CAT5113
Table 1. OPERATION MODES
INC
CS
U/D
Operation
High to Low
Low
High
Wiper toward H
High to Low
Low
Low
Wiper toward L
High
Low to High
Low
Low to High
High
Standby
Ratings
Supply Voltage
VCC to GND
0.5 to +7
Inputs
CS to GND
Units
V
V
INC to GND
U/D to GND
H to GND
L to GND
W to GND
0 to 70
Industrial (I suffix)
40 to +85
Junction Temperature
+150
Storage Temperature
65 to 150
+300
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Parameter
VZAP (Note 1)
ESD Susceptibility
2000
Latch-Up
JEDEC Standard 17
100
mA
Data Retention
100
Years
Endurance
1,000,000
Stores
ILTH (Notes 1, 2)
TDR
NEND
Test Method
Min
Typ
1. This parameter is tested initially and after a design or process change that affects the parameter.
2. Latch-up protection is provided for stresses up to 100 mA on address and data pins from 1 V to VCC + 1 V
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Max
Units
V
CAT5113
Table 4. DC ELECTRICAL CHARACTERISTICS (VCC = +2.5 V to +6 V unless otherwise specified)
Parameter
Min
Typ
Max
Units
2.5
6.0
VCC = 6 V, f = 1 MHz, IW = 0
100
mA
50
mA
Programming, VCC = 6 V
1000
mA
VCC = 3 V
500
mA
CS = VCC 0.3 V
U/D, INC = VCC 0.3 V or GND
0.01
mA
IIH
VIN = VCC
10
mA
IIL
VIN = 0 V
10
mA
VIH2
2.5 V VCC 6 V
VCC x 0.7
VCC + 0.3
VIL2
0.3
VCC x 0.2
Symbol
Conditions
POWER SUPPLY
VCC
ICC1
ICC2
ISB1 (Note 3)
LOGIC INPUTS
POTENTIOMETER CHARACTERISTICS
RPOT
Potentiometer Resistance
01 Device
10 Device
10
50 Device
50
00 Device
100
kW
20
VRH
Voltage on RH pin
VCC
VRL
Voltage on RL pin
VCC
Resolution
INL
IW 2 mA
0.5
LSB
DNL
IW 2 mA
0.25
0.5
LSB
RWI
Wiper Resistance
VCC = 5 V, IW = 1 mA
400
VCC = 2.5 V, IW = 1 mA
IW
Wiper Current
TCRPOT
TC of Pot Resistance
TCRATIO
Ratiometric TC
VN
CH/CL/CW
fc
Noise
(Note 4)
4.4
4.4
mA
300
ppm/C
20
Potentiometer Capacitances
Frequency Response
1000
Passive Attenuator, 10 kW
8/24
nV/Hz
8/8/25
pF
1.7
MHz
3. Latch-up protection is provided for stresses up to 100 mA on address and data pins from 1 V to VCC + 1 V
4. This parameter is not 100% tested.
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ppm/C
CAT5113
Table 5. AC TEST CONDITIONS
VCC Range
2.5 V VCC 6 V
10 ns
0.5 VCC
Table 6. AC OPERATING CHARACTERISTICS (VCC = +2.5 V to +6.0 V, VH = VCC, VL = 0 V, unless otherwise specified)
Parameter
Symbol
Min
Typ (Note 5)
Max
Units
100
ns
tCI
CS to INC Setup
tDI
50
ns
tID
100
ns
tIL
250
ns
tIH
250
ns
tIC
ms
tCPH
100
ns
tCPH
10
ms
ms
ms
500
ms
ms
Store Cycle
10
ms
tIW
tCYC
tR, tF (Note 6)
tPU (Note 6)
tWR
tCI
tIL
tCYC
tIC
tIH
(store)
tCPH
90%
INC
90%
10%
tDI
tID
tF
U/D
tR
MI(3)
tIW
RW
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CAT5113
APPLICATIONS INFORMATION
(c) twoport
R3
R4
+5 V
8
Digital
POT
2
1
7
+5 V
4A
9
3
10
8
+
11
R2
R1
R2
2
1
7
+5 V
8
Digital
POT
+5 V
R1
RA
VO
RB
6
5
R4
R3
7
0.01 mF
0.01 mF
+5 V +200 mV
8
0.01 mF
0.003 mF
Digital
POT
10 kW
IC3A
74HC132
2
1
7
555
+2.5 V
A1 = A2 = A3 = 1/4 LM6064
R2 = R3 = R4 = 5 kW
RPOT = 10 kW
OSC
R2
1/
4
5 (1p)R
POT
4
CAT5113/5114
V2 (+)
pRPOT
20 kW
IC1B
499 kW
CS
CAT5111/5112
IC2
+5 V
4
11 IC1A
Sensor
5 V
499 kW
499 kW
VSENSOR = 1 V 50 mV
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VREF = 1 V
499 kW
VCORR
V1 ()
VOUT = 1 V 1 mV
CAT5113
VOUT
R1
11 kW
2952
SHUTDOWN
SD
GND
1.23 V
FB
6
2
3
R3
10 kW
6
CAT5113/5114
IS
IC1
393
IC2
74HC132
OSC
CLO
CHI 7
Digital
POT
0.1 mF
IC3
CAT5111/5112
+5 V
8
2
10 kW
1
7
10 kW
VS
+2.5 V
A1
C1
0.001 mF
R2
1 mF
+5 V
VUL
2
1
7
50 kW
+5 V
8
+5 V
7
A2
AI
IC4
+2.5 V
VO
0.001 mF
R2
10 kW
R3
100 kW
+5 V
2
7
R1
100 kW
+5 V
R1
100 kW
VS
+
+2.5 V
R1
100 kW
CAT5111/5112
+5 V
R
2.5 kW
4
11
IS
R1
100 kW
7
A2
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A1
Serial
Bus
VO
+2.5 V
0 VS 2.5 V
+5 V
VO
CAT5113/5114
4
0 VO 2.5 V
C2
R1
VS
R3
10 k
+5 V
6
R1
VLL
+5 V
7
1 MW
330 W
LT1097
pR (1p)R
330 W
Digital
POT
0.1 mF 6.8 mF
R2
820 W
1 mF
+5 V
8
2
1
7
VO (REG)
CAT5113/5114
Digital
POT
VIN (UNREG)
2
1
7
+5 V
8
Digital
POT
100 kW
5
+2.5 V
6
A1 = A2 = LMC6064A
CAT5113
Table 7. ORDERING INFORMATION
Orderable Part Number
Resistance (kW)
CAT5113LI01G
CAT5113LI10G
10
CAT5113LI50G
50
CAT5113LI00G
100
CAT5113VI01GT3
CAT5113VI10GT3
10
CAT5113VI50GT3
50
CAT5113VI00GT3
100
CAT5113YI01GT3
CAT5113YI10GT3
10
CAT5113YI50GT3
50
CAT5113YI00GT3
100
CAT5113ZI01T3
CAT5113ZI10T3
10
CAT5113ZI50T3
50
CAT5113ZI00T3
100
Lead Finish
PackagePins
Shipping
NiPdAu
PDIP8
(Pb-Free)
50 Units / Rail
NiPdAu
SOIC8
(Pb-Free)
NiPdAu
TSSOP8
(Pb-Free)
Matte-Tin
MSOP8
(Pb-Free)
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
8. All packages are RoHS-compliant (Pb-Free, Halogen-Free).
9. The standard lead finish is NiPdAu, except MSOP package is Matte-Tin.
10. Contact factory for Matte-Tin finish availability for PDIP, SOIC and TSSOP packages.
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CAT5113
PACKAGE DIMENSIONS
PDIP8, 300 mils
CASE 646AA
ISSUE A
SYMBOL
MIN
NOM
E1
5.33
A1
0.38
A2
2.92
3.30
4.95
0.36
0.46
0.56
b2
1.14
1.52
1.78
0.20
0.25
0.36
9.02
9.27
10.16
7.62
7.87
8.25
E1
6.10
6.35
7.11
e
PIN # 1
IDENTIFICATION
MAX
2.54 BSC
eB
7.87
2.92
10.92
3.30
3.80
TOP VIEW
E
A2
A1
c
b2
L
eB
b
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters.
(2) Complies with JEDEC MS-001.
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CAT5113
PACKAGE DIMENSIONS
SOIC 8, 150 mils
CASE 751BD
ISSUE O
E1
SYMBOL
MIN
1.35
1.75
A1
0.10
0.25
0.33
0.51
0.19
0.25
4.80
5.00
5.80
6.20
E1
3.80
MAX
4.00
1.27 BSC
PIN # 1
IDENTIFICATION
NOM
0.25
0.50
0.40
1.27
TOP VIEW
A1
c
e
L
END VIEW
SIDE VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MS-012.
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CAT5113
PACKAGE DIMENSIONS
MSOP 8, 3x3
CASE 846AD
ISSUE O
SYMBOL
MIN
NOM
MAX
1.10
A1
0.05
0.10
0.15
A2
0.75
0.85
0.95
0.22
0.38
0.13
0.23
2.90
3.00
3.10
4.80
4.90
5.00
E1
2.90
3.00
3.10
E1
0.65 BSC
e
L
0.60
0.40
0.80
L1
0.95 REF
L2
0.25 BSC
TOP VIEW
A2
A1
DETAIL A
SIDE VIEW
END VIEW
q
L2
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-187.
L
L1
DETAIL A
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CAT5113
PACKAGE DIMENSIONS
TSSOP8, 4.4x3
CASE 948AL
ISSUE O
SYMBOL
MIN
NOM
1.20
E1
MAX
A1
0.05
A2
0.80
0.19
0.15
0.90
1.05
0.30
0.09
2.90
3.00
3.10
6.30
6.40
6.50
E1
4.30
4.40
4.50
0.20
0.65 BSC
e
L
1.00 REF
L1
0.50
0.60
0.75
TOP VIEW
D
A2
q1
A1
L1
SIDE VIEW
L
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-153.
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
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limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customers technical experts. SCILLC
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CAT5113/D