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PDIP/SOIC
A0
A1
A2
Vss
24C02C
Vcc
WP
SCL
SDA
TSSOP
A0
A1
A2
VSS
1
2
3
4
24C02C
Package Types
8
7
6
5
VCC
WP
SCL
SDA
Block Diagram
A0 A1 A2
WP
HV Generator
Description
The Microchip Technology Inc. 24C02C is a 2K bit
Serial Electrically Erasable PROM with a voltage range
of 4.5V to 5.5V. The device is organized as a single
block of 256 x 8-bit memory with a 2-wire serial
interface. Low current design permits operation with
typical standby and active currents of only 10 A and 1
mA respectively. The device has a page write capability
for up to 16 bytes of data and has fast write cycle times
of only 1 mS for both byte and page writes. Functional
address lines allow the connection of up to eight
24C02C devices on the same bus for up to 16K bits of
contiguous EEPROM memory. The device is available
in the standard 8-pin PDIP, 8-pin SOIC (150 mil) and
TSSOP packages.
I/O
Control
Logic
Memory
Control
Logic
XDEC
EEPROM
Array
SDA SCL
Vcc
Vss
Write-Protect
Circuitry
YDEC
Sense Amp.
R/W Control
DS21202D-page 1
24C02C
1.0
ELECTRICAL CHARACTERISTICS
TABLE 1-1:
DC CHARACTERISTICS
Min.
Max.
Units
Conditions
VIH
0.7 VCC
VIL
0.3 VCC
VHYS
0.05 VCC
(Note)
VOL
0.40
ILI
ILO
CIN, COUT
10
pF
Operating current
ICC Read
mA
ICC Write
mA
VCC = 5.5V
ICCS
50
Standby current
Note:
DS21202D-page 2
24C02C
TABLE 1-2:
AC CHARACTERISTICS
Parameter
Symbol
-40C TA +85C
Min.
Max.
Min.
Max.
Units
Remarks
Clock frequency
Clock high time
Clock low time
SDA and SCL rise time
SDA and SCL fall time
Start condition hold time
FCLK
THIGH
TLOW
TR
TF
THD:STA
4000
4700
4000
100
1000
300
600
1300
600
400
300
300
kHz
ns
ns
ns
ns
ns
TSU:STA
4700
600
ns
THD:DAT
TSU:DAT
TSU:STO
TAA
TBUF
0
250
4000
4700
3500
0
100
600
1300
900
ns
ns
ns
ns
ns
250
20 + 0.1 CB
250
ns
(Note 2)
Time the bus must be free
before a new transmission
can start
(Note 1), CB 100 pF
50
50
ns
(Note 3)
1M
1.5
1M
TOF
Output fall time from VIH
minimum to VIL maximum
Input filter spike suppression TSP
(SDA and SCL pins)
Write cycle time
TWR
Endurance
Note 1:
2:
3:
4:
TF
TR
TSU:STA
TLOW
SDA
IN
FIGURE 1-1:
SCL
(Note 1)
(Note 1)
After this period the first
clock pulse is generated
Only relevant for repeated
Start condition
(Note 2)
TSP
THD:DAT
TSU:DAT
TSU:STO
THD:STA
TAA
TBUF
SDA
OUT
DS21202D-page 3
24C02C
2.0
PIN DESCRIPTIONS
TABLE 2-1:
Name
Function
Vss
Ground
SDA
Serial Data
SCL
Serial Clock
VCC
A0, A1, A2
Chip Selects
WP
Hardware Write-Protect
2.1
3.0
FUNCTIONAL DESCRIPTION
2.2
2.3
A0, A1, A2
2.4
WP
2.5
Noise Protection
DS21202D-page 4
24C02C
4.0
BUS CHARACTERISTICS
4.1
4.5
4.2
4.3
Note:
FIGURE 4-1:
SCL
(A)
4.4
Acknowledge
(B)
(C)
(D)
Start
Condition
Address or
Acknowledge
Valid
(C)
(A)
SDA
FIGURE 4-2:
Stop
Condition
Data
Allowed
to Change
ACKNOWLEDGE TIMING
Acknowledge
Bit
SCL
SDA
DS21202D-page 5
24C02C
5.0
DEVICE ADDRESSING
DS21202D-page 6
FIGURE 5-1:
Control Code
A2
A1
A0 R/W ACK
Slave Address
Start Bit
5.1
Acknowledge Bit
24C02C
6.0
WRITE OPERATIONS
6.1
Byte Write
6.2
Note:
Page Write
The write control byte, word address and the first data
byte are transmitted to the 24C02C in the same way as
in a byte write. But instead of generating a Stop
condition, the master transmits up to 15 additional data
bytes to the 24C02C which are temporarily stored in
the on-chip page buffer and will be written into the
memory after the master has transmitted a Stop
condition. After the receipt of each word, the four lower
order address pointer bits are internally incremented by
one. The higher order four bits of the word address
remains constant. If the master should transmit more
than 16 bytes prior to generating the Stop condition, the
address counter will roll over and the previously
received data will be overwritten. As with the byte write
FIGURE 6-1:
S
T
A
R
T
SDA Line
Control
Byte
Word
Address
S
T
O
P
Data
P
A
C
K
Bus Activity
FIGURE 6-2:
SDA Line
WRITE PROTECTION
BYTE WRITE
Bus Activity
Master
Bus Activity
Master
6.3
A
C
K
A
C
K
PAGE WRITE
S
T
A
R
T
Control
Byte
Word
Address (n)
Data n
Data n +1
S
T
O
P
Data n + 15
Bus Activity
P
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
DS21202D-page 7
24C02C
7.0
ACKNOWLEDGE POLLING
FIGURE 7-1:
ACKNOWLEDGE
POLLING FLOW
8.0
8.1
Send Start
YES
Next
Operation
Random Read
Send Stop
Condition to
Initiate Write Cycle
Did Device
Acknowledge
(ACK = 0)?
The 24C02C contains an address counter that maintains the address of the last word accessed, internally
incremented by one. Therefore, if the previous read
access was to address n, the next current address read
operation would access data from address n + 1. Upon
receipt of the slave address with the R/W bit set to one,
the 24C02C issues an acknowledge and transmits the
eight bit data word. The master will not acknowledge
the transfer but does generate a Stop condition and the
24C02C discontinues transmission (Figure 8-1).
8.2
Send
Write Command
READ OPERATIONS
NO
8.3
Sequential Read
DS21202D-page 8
24C02C
FIGURE 8-1:
S
T
A
R
T
SDA line
Control
Byte
P
A
C
K
Bus Activity
FIGURE 8-2:
S
T
A
R
T
Control
Byte
S
T
A
R
T
Word
Address (n)
SDA line
Control
Byte
S
T
O
P
Data (n)
S
A
C
K
A
C
K
Bus Activity
Bus Activity
Master
N
O
A
C
K
RANDOM READ
Bus Activity
Master
FIGURE 8-3:
S
T
O
P
Data
A
C
K
N
O
A
C
K
SEQUENTIAL READ
Control
Byte
Data n
Data n + 1
Data n + 2
S
T
O
P
Data n + X
SDA line
Bus Activity
A
C
K
A
C
K
A
C
K
A
C
K
N
O
A
C
K
DS21202D-page 9
24C02C
APPENDIX A:
REVISION HISTORY
Revision D
Corrections to Section 1.0, Electrical Characteristics.
DS21202D-page 10
24C02C
ON-LINE SUPPORT
Microchip provides on-line support on the Microchip
World Wide Web site.
The web site is used by Microchip as a means to make
files and information easily available to customers. To
view the site, the user must have access to the Internet
and a web browser, such as Netscape or Microsoft
Internet Explorer. Files are also available for FTP
download from our FTP site.
DS21202D-page 11
24C02C
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
To:
RE:
Reader Response
From: Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
Application (optional):
Would you like a reply?
Device: 24C02C
N
Literature Number: DS21202D
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
DS21202D-page 12
24C02C
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
/XX
XXX
Device
Temperature
Range
Package
Pattern
Device
Temperature Range
Blank
I
E
=
0C to +70C
= -40C to +85C
= -40C to +125C
Package
P
SN
ST
=
=
=
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
DS21202D-page 13
24C02C
NOTES:
DS21202D-page 14
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as unbreakable.
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break microchips code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE and PowerSmart are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
AmpLab, FilterLab, microID, MXDEV, MXLAB, PICMASTER,
SEEVAL and The Embedded Control Solutions Company are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Application Maestro, dsPICDEM, dsPICDEM.net, ECAN,
ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
PICkit, PICDEM, PICDEM.net, PowerCal, PowerInfo,
PowerMate, PowerTool, rfLAB, rfPIC, Select Mode,
SmartSensor, SmartShunt, SmartTel and Total Endurance are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
2003, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
DS21202D-page 15
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DS21202D-page 16
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07/28/03