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# Practice Paper-I

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(A)
(C)
11
12
(B)
96

Electronic Devices

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(C)
13
2.3

## Electric Devise & Circuits 1

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(D)
(A)
(B)
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15
(C)
(B)

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(C)

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(D)

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(B)

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(C)

Practice Paper-I

Electronic Devices

SOLUTIONS
SOL 1

## Option (A) is correct.

s = qni ^me + mh h,
s
1
=
q ^me + mh h rq ^me + mh h
1
=
-19
0.47 # 1.6 # 10 # ^0.39 + 0.19h
= 2.29 # 1019 /m3

ni =

SOL 2

1.

## Option (C) is correct.

MOSFETS can not be fabricated on gaAs because GaAs has no native oxide. Hence
high electron mobility cannot be exploited.

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2.

MOSFET has lower switching speed owing to its very high input capacitance (at the
gate).

3.

Depletion mode PMOS with metal gate cannot be fabricated because every component of threshold voltage becomes negative for metal gate PMOS.

4.

SOL 3

SOL 4

## Option (D) is correct.

R\r

m
1
and also n = Dn = 50
nmn + pmp
mp D p
1
ND mn
R1 =
1
0.2R1
ND mn + NA mp
NA = 250ND
R\

SOL 5

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a

## Option (A) is correct.

Ec - EFn = kT ln b NC l
ND

NC = 4.82 # 1015 b mn T l
m
3/2
= 4.82 # 1015 b 0.65 # 300 l
m
6mn = 0.65m, T = 300 K@
22
ND = 4.41 #7 10 = 4.41 # 1015
10
3
Phosphorous atoms/cm , EC - EFn = 77.38 eV
3/2

SOL 6

## Option (B) is correct.

VDS^on h = VGS - VP =- 3 + 5 = 2V

Practice Paper-I

Electronic Devices

SOL 7

## Option (D) is correct.

22
NA = 4.41 #8 10 = 4.41 # 1014 atoms/cm3
10
3
`
ND = 10 NA = 4.41 # 1017 atoms/cm3
ni = 2.5 # 1013 atoms/cm3
At room temperature
VT = 26 mV
D
Vbi = VT ln NA N
n i2
^4.41 # 1014 # 4.41 # 1017h
= 26 # 10-3 ln
2
^2.5 # 1013h
= 0.3287 V
SOL 8

## Option (C) is correct.

I = I 0 ^eV/hV - 1h

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I ^150h
I 0 ^150h e0.4/2 # 8.62 # 10
=
I ^25h
I 0 ^25h e0.4/2 # 8.62 # 10

-5

# ^150 + 273h

-5

# ^25 + 273h

= 580

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a

SOL 9

## Option (B) is correct.

! !
C 0x = sio 0
t 0x
10-12 = 3.4515 10-3 F/m2
F/m2 = 3.9 # 8.85 #-10
#
100 # 10
16
fF = KT ,n Na = 0.026 # ,n 10 10 = 0.348V
q
ni
1.5 # 10
Maximum deplection width occurs when gate potential is 2fF .
After that, deplection width does not change.
-12
2dd
si 0 .2fF
`
Wmax =
= 2 11.8 # 8.85-19# 10 16 # 0.348
qNa
1.6 # 10 # 10 # 106
= 0.301 # 10-6 m
` Deplection capacitance at this condition,
-12
Cd = dsi # d0 = 11.8 # 8.85 # -10
6
Wmax
0.301 # 10
4
= 3.47 # 10 F/m2
Cgatel max = Cox = 3.4515 # 10-3 F/m2 = 345.15 nF/cm2

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min

Caget,. min = Cox .Cd min = 0.315 # 10-3 F/m2 = 31.5 nF/cm2
Cox + Cd min
SOL 10
Option (C) is correct.
The circuit is a buffer, But PMOS is passing 0 and NMOS is passing 1. Hence logic level
will be degraded by an amount equal to threshold voltage of corresponding MOSes
`
V1,out = 5 - VTn = 5 - 1 = 4V
V0,out = 0 + VTP = 0.1 = 1V
SOL 11

## IE (bipolar) = gm Vin , a ^bipolarh = Ic

IE

Practice Paper-I

Electronic Devices
Ic = IE a = gm Vin a
gm (overall) = Ic = gm a = 4 # 10-3 # 0.99
Vin
= 3.96 mA/V

SOL 12

a = 0.98 = 49
1 - a 1 - 0.98
= ^1 + b h ICBO
= 50 # 10 = 500 nA
= 0.98 + 0.98 # 1% = 0.9898

b =
ICEO
anew

0.9898 = 97.0392 - 97
1 - 0.9898
= ^b + 1h ICBO = 98 # 10 nA = 980 nA

bnew =
ICEO^new h

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## Percentage change = 980 - 500 # 100 = 480 # 100 & 96%

500
500
SOL 13

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1036
= 0.933 V
2.25 # 1020
Since Nd 22 Na most of the depletion width is in the p-side,
At zero-bias,
1/2
XPS = <2eV0 F = 0.35 mm
qNa
2e ^V0 + VD h 1/2
XPD = =
G
qNa
V0 = 0.259 ln

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## Punch-through occurs when

XPD = L - xPS = 0.65 mm

&
SOL 14

## ^0.65 # 10-4h2 ^1.6 # 10-3h

0.933 + VD =
2 # 11.8 # 8.85 # 10-14
VD = 2.3 V
Option (C) is correct.
dp
J p^diffusionh =- qD p
dx
=- 1.6 # 10-19 # 12 #

^1012 - 0h
0 - 10-3

= 1.92 mA/cm2
SOL 15

## Option (B) is correct.

J = rV
-3
V = J = 121.92 # 10 -19
nq 10 # 1.6 # 10
= 12 # 103 cm/ sec