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Multiple-Choice
(Some of the following questions have more than one correct answer. Circle all correct answers.)
1. A program that combines object files into an executable program is called a
_________.
a. compiler
b. loader
c. linker
d. assembler
2. A computer directly executes programs written in its _______ language.
a. system
b. native
c. interpreted
d. machine
3. Is the expression X (Y Z) equivalent to (X Y) (X Z) for all possible inputs
of X, Y, and Z?
a. yes
b. no
4. The following C++ expression can be written using only two lines of assembly
language code:
X = (Y + 4) * 3;
a. true
b. false
5. A single hexadecimal digit can be used to represent 5 binary bits.
a. true
b. false
6. The most significant bit in a binary byte is numbered bit 7.
a. true
b. false
7. A quadword is 8 bytes.
a. true
b. false
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15. The three most basic operators in Boolean algebra are AND, OR, and NOT.
a. true
b. false
16. The integer range of standard ASCII codes is:
a. 128 to +127
b. 0 to 127
c. 0 to 270
d. 0 to 65,535
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25. Which language (or virtual machine) uses short mnemonics such as ADD and SUB
to identify instructions?
a. conventional machine language
b. ISA-level language
c. assembly language
d. microcode interpreter
26. What is the largest unsigned integer that may be stored in 16 bits?
a. 32767
b. 65536
c. 65535
d. 32768
27. What is the largest signed integer that may be stored in 32 bits?
a. 232 1
b. 232
c. 231 1
d. 231
c
28. The two's complement of an integer is formed by doing which of the following?
a. reversing (inverting) the bits and adding 1
b. adding 1 and reversing the bits
c. calculating the integer's additive inverse
d. changing the highest bit to a 1
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Multiple-Choice
35. What is the name of the lowest 8 bits of the EDX register?
a. DL
b. DH
c. DX
d. none of the above
36. How much memory can be addressed in Real-address mode?
a. 640 K
b. 1 MB
c. 16 MB
d. 4 GB
37. How much memory can be addressed in Protected mode?
a. 640 K
b. 1 MB
c. 16 MB
d. 4 GB
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38. Which of the following linear addresses matches the segment-offset address
08F0:0200?
a. 09100h
b. 09200h
c. 0AF0h
d. 08F2h
39. If you wanted to turn a device on and off using computer software, which type of
port interface would be best?
a. USB
b. keyboard
c. serial
d. parallel
40. What is the name of the bus architecture commonly used with Pentium processors?
a. ISA
b. PCI
c. EISA
d. RAM-BUS
41. Segment-offset addressing is used in which processor mode(s)?
a. Protected
b. Virtual-8086
c. Real-address
d. System management
42. How is Virtual-8086 mode similar to Real-address mode?
a. permits the use of virtual memory (paging)
b. uses a segment descriptor table to track memory usage
c. uses only 16-bit registers for input-output
d. simulates 8086-based computer running in Real-address mode
43. High-speed memory that reduces the frequency of access by the CPU to
conventional memory is called
a. local memory
b. cache memory
c. system memory
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d. virtual memory
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44. Why are device drivers needed, given that BIOS programs can do the same task?
a. device drivers allow for the introduction of new devices
b. device drivers have faster performance than BIOS programs
c. BIOS programs are only used by the operating system in Real-address mode
d. device drivers have more direct access to hardware than BIOS programs
45. An interpreter program inside the CPU is written in a language called a(n) _______.
a. machine language interpreter
b. digital driver program
c. microprogram
d. system decoder
46. In regard to multitasking, a task's state consists of which three elements?
a. status flags, program counter, register contents
b. register contents, task variables, program counter
c. task variables, segment descriptor, register contents
d. segment descriptor, status flags, task variables
47. Within the CPU, all calculations and logic operations take place inside the
___________ .
a. registers
b. ALU
c. CU
d. MBU
48. The three types of buses connected to the CPU are:
a. data, address, control
b. data, system, address
c. address, control, memory
d. fetch-decode, control, execution
49. During which phase of the instruction execution cycle is the program counter
incremented?
a. decode
b. execute
c. operand fetch
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d. fetch
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54. What are the six stages, or units involved in executing a single IA-32 instruction?
a. code prefetch, instruction decode, execution, segment, paging, memory store
b. bus interface, instruction decode, parallel analysis, execution, segment, paging
c. bus interface, code prefetch, instruction decode, execution, segment, paging
d. bus interface, code prefetch, instruction decode, execution, address translation, paging
55. Which flag is set when an unsigned value is too large to fit into a destination
operand?
a. Sign
b. Carry
c. Overflow
d. Auxiliary Carry
56. In a 4-stage non-pipelined processor, how many clock cycles are required to execute
3 instructions? (Assume that each stage executes in a single clock cycle.)
a. 12
b. 8
c. 6
d. cannot be determined
57. In a 4-stage single-pipelined processor, how many clock cycles are required to
execute 3 instructions? (Assume that each stage executes in a single clock cycle.)
a. 12
b. 8
c. 6
d. cannot be determined
58. In a 6-stage dual-pipelined processor, how many clock cycles are required to execute
5 instructions? (Assume that stage 4 requires two clock cycles, and that stage 4 has
two pipelines.)
a. 10
b. 11
c. 12
d. 15
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59. Which of the following correctly describes the sequence of reading from memory
during a single clock cycle?
a.
Read line set low; Address placed on bus; Operand placed on data bus by memory
controller; Read line set high, indicating that data bus contains the requested data.
b.
Address placed on bus; Operand placed on data bus by memory controller; Read
line set low; Read line set high, indicating that data bus contains the requested
data.
c.
Address placed on bus; Read line set low; Read line set high, indicating that data
bus contains the requested data; Operand placed on data bus by memory
controller.
d.
Address placed on bus; Read line set low; Operand placed on data bus by
memory controller; Read line set high, indicating that data bus contains the
requested data.
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c. .STACK
d. .PROG
69. Which directive(s) are used when defining both signed and unsigned 64-bit integers?
a. QWORD and SQWORD
b. DWORD
c. QWORD
d. DWORD and SDWORD
70. Which of the following are valid data definition statements that create an array of
unsigned bytes containing decimal 10, 20, and 30, named myArray.
a. myArray BYTE 10, 20, 30
b. BYTE myArray 10, 20, 30
c. BYTE myArray[3]: 10, 20,30
d. myArray BYTE DUP (3) 10,20,30
71. In the following data definition, assume that List2 begins at offset 2000h. What is
the offset of the third value (5)?
List2 WORD 3,4,5,6,7
a. 20008h
b. 2002h
c. 2000h
d. 2004h
72. Which letter choice shows the memory byte order, from low to high address, of the
following data definition?
BigVal DWORD 12345678h
a. 56h, 78h,12h,34h
b. 12h,34h,56h,78h
c. 78h,56h,34h,12h
d. 34h,12h,78h,56h
73. The following is a valid identifier: AB62$
a. True
b. False
74. The following is a valid data definition statement:
str1 \
BYTE "This string is quite long!",0
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a. True
b. False
75. The following are both valid data definition statements:
List1 BYTE 10,20
BYTE 30,40
a. True
b. False
(Some of the following questions have more than one correct answer. Circle all correct
answers.)
76. Which of the following are true about assembly language instructions and directives?
a. a directive is executed at runtime
b. an instruction is executed at runtime
c. a directive is executed at assembly time
d. an instruction is executed at assembly time
77. The basic parts of an instruction, in order from left to right, are:
a. label, mnemonic, operand(s), comment
b. comment, label, mnemonic, operand(s)
c. label, mnemonic, comment
d. mnemonic, operand(s), comment
78. Operands may be any of the following:
a. constant or constant expression
b. reserved word
c. register name
d. variable name (memory)
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L
I
I
L
82. Indicate the hexadecimal value of the destination operand next to each instruction.
Use the letter I to indicate that a particular instruction is illegal:
a. mov dx,word3
b. movsx eax,byte1
c. movdh,al
d. movbx,dx
83. Write an instruction that moves the 32-bit address of word1 into the ESI register
(assume 32-bit Protected mode).
mov esi,OFFSET word1
84. Write an instruction that moves the lower 16 bits of dword1 into the BX register
(hint: use PTR).
mov bx,WORD PTR dword1
85. Write an instruction that moves the lower 8 bits of word2 into the AL register.
mov al, BYTE PTR word2
86. Write an instruction that moves EBX to location word1:
mov DWORD PTR word1,abx
87. What is the value of the expression (TYPE word1)?
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sub eax,ecx
92. Implement the following expression in assembly language, using 32-bit integers
(you may modify any registers you wish):
eax = -dword1 + (edx - ecx) + 1
sub edx,ecx
mov eax,dword1
neg eax
add eax,edx
inc eax
; eax = -dword1
Multiple-Choice
93. The MOV instruction does not permit an immediate value to be moved to a segment
register.
a. true
b. false
94. The MOVSX instruction sign-extends an integer into a larger operand.
a. true
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b. false
95. Select the answer choice that best implements the following expression. Do not
permit dword1, ECX, or EDX to be modified:
eax = -dword1 + (edx - ecx) + 1
a.
mov eax,dword1
negeax
subedx,ecx
addeax,edx
inceax
b.
mov eax,dword1
negeax
movebx,edx
subebx,ecx
addeax,ebx
inceax
c.
neg dword1
movebx,edx
subebx,ecx
addeax,ebx
inceax
d.
mov eax,dword1
movedx,ebx
subebx,ecx
addeax,ebx
inceax
Some of the following questions have more than one correct answer. Circle all correct
answers:
Use the following data definitions until notified otherwise:
byte1 BYTE 0FFh,1,2
byte2 BYTE 14h
word1 WORD 0FFFFh,1,2
word2 WORD 3
word3 SWORD 7FFFh,8000h
word4 SWORD 9000h
dword1 DWORD 10h,20h,30h,40h
dArray DWORD 10 DUP(?)
96. What is the hexadecimal value of AX when this code executes?
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movesi,OFFSET word1
add esi,4
mov ax,[esi]
a. 1
b. 2
c. FFFFh
d. 3
97. What is the final hexadecimal value of AX when this code executes?
movebx,OFFSET dword1
sub ebx,2
mov ax,[ebx]
a. 0000h
b. 0010h
c. 9000h
d. 0020h
98. What is the final hexadecimal value of AL when this code executes?
movebx,OFFSET byte1
mov al,[ebx+3]
a. 1
b. 2
c. 14h
d. 3
99. What is the final hexadecimal value of EAX when this code executes?
mov edx,8
mov eax,dword1[edx]
a. 00000010h
b. 20000000h
c. 00300000h
d. 00000030h
100. In Protected mode, which of the following define(s) a pointer variable containing
the offset of word1?
a. ptr1 DWORD word1
b. word1 DWORD ptr1
c. ptr2 DWORD PTR word1
d. ptr2 DWORD OFFSET word1
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Use the following data for the remaining questions in this section:
word1 WORD 1000h,2000h,3000h,4000h,5000h
dword1 DWORD 10000h,20000h,30000h,40000h
101. What is the final value of AX after this code has executed?
movesi,OFFSET word1
mov ecx,5
mov eax,100h
L1: add ax,[esi]
add ax,16
addesi,TYPE word1
Loop L1
a. F150h
b. 0150h
c. F016h
d. 0016h
102. What is the final value of AX after this code has executed?
movedx,OFFSET word1+8
mov ecx,2
mov ax,0
L1: mov ax,[edx]
add ax,20h
sub edx,4
Loop L1
a. 8040h
b. 9040h
c. 4020h
d. 3020h
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