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# 2014

## Simulation of Inverter and Rectifier

under different fault conditions for NXAPL UPS

VIKALP DHIMAN
EMERSON NETWORK POWER
INDIA

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PROJECT REPORT
ON

## SIMULATION OF INVERTER &

RECTIFIER UNDER DIFFERENT FAULT
CONDITIONS FOR NX-APL UPS

BY
VIKALP DHIMAN

GUIDED BY

MENTOR

## Mr. KAMLESH KEHARIA

Mr. VASUDEVAN R

SPECIAL THANKS TO
Mr. SUPRIYA GHORAI
Mr. NITISH KUMAR

ENGINEERING DEPARTMENT
EMERSON NETWORK POWER INDIA
THANE

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INTRODUCTION ......................................................................................... 3
TYPE OF INVERTER ................................................................................... 4
CONTROL CIRCUIT .................................................................................... 5

## WORKING OF THREE LEVEL INVERTER ................................................... 8

POWER CIRCUIT ...................................................................................... 10
o

o

## INTEGRATED SIMULATION MODEL........................................................ 15

FAULT ANALYSIS ..................................................................................... 16

o

## L-G FAULT .................................................................................................................18

L-L FAULT.................................................................................................................. 19

## FAULT CONTROL CIRCUIT ...................................................................... 21

CONCLUSION ........................................................................................... 22

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INTRODUCTION

## Uninterruptible Power Supply is an electrical apparatus that provides emergency power

to a load when the input power source fails.
Main components of UPS are:

Rectifier
Inverter
Battery
Maintenance bypass
Static Switches

## Fig.1 Block Diagram of UPS

At any type of power disturbances, any part of UPS doesnt work properly. High
magnitude and peaky nature of currents during fault can demolish the each component
and hence UPS. So special protection against faults are mandatory and should be
implemented in UPS.
To apply these protections against faults, behavior of each component of UPS must be
understood during fault. Hence simulating each part under different fault conditions can
describe the behavior of UPS during fault.
However aim of our project is to examine the behavior of Inverter & Rectifier only under
different fault conditions with the help of MATLAB simulation.

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TYPE OF INVERTER
(Neutral point-clamped three-level inverter)

Multi-level inverter type inverters provide an output waveform that exhibits multiple
steps at several voltage levels. Hence no need of transformers. Multilevel converters can
operate at both fundamental switching frequency and high switching frequency PWM.
Lower switching frequency usually means lower switching loss and higher efficiency.
Multi-level inverter provides multiple voltage levels through connection of the phases to
a series bank of capacitors. The concept can be extended to any number of levels by
increasing the number of capacitors. Early descriptions of this topology were limited to
three-levels where two capacitors are connected across the dc bus resulting in one
additional level. Here we are using three-level inverter. Two levels are provided by two
capacitors and one level by neutral point which is clamped between capacitors and diodes.

## Fig.2 Power circuit of three-level inverter

Three phase three level inverter has three legs having four IGBTs which are connected
with anti-parallel diode. To provide pulses to the IGBTs control circuit is used.

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CONTROL CIRCUIT
(Sinusoidal pulse width modulation scheme)

Control circuit is used to provide pulses to the corresponding IGBTs in power circuit.
Pulses are generated with the help of PWM generator.
PWM GENERATION
PWM generator consists of:

## Three sinusoidal reference signals having phase difference of 120*.

A triangular modulating signal of higher frequency.

The reference signal (Uref input), also called the modulating signal, is naturally sampled
and compared with two symmetrical level-shifted triangle carriers.

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## Fig.4 Simulation diagram

Three reference signals which are 120* out of phase and two carrier signals.
Modulation Index to control the amplitude of the fundamental component of the
output voltage of the converter. The modulation index must be greater than 0 and lower
than or equal to 1.
[Peak magnitude of reference signal] / [Peak magnitude of carrier signal]
= 0.85
Carrier wave frequency = 20 KHz
Note: Higher the modulation index, higher will be total harmonic distortion in output.
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## SIMULATION RESULT OF PWM GENERATOR

There are 12 IGBTs in power circuit and each IGBT triggers with a PWM pulse. Output
of PWM generator consists of twelve PWM pulses.

## Fig.5 Twelve IGBT pulses waveform

The PWM Generator (3-Level) block generates pulses for carrier-based pulse-width
modulation (PWM) converters using three-level topology. The block can control
switching devices (IGBTs) of three-phase Bridge (three arms). The converter arm can
have three states: +1, 0, or 1. When the reference signal is greater than the positive
carrier, the state of the arm is +1; when the reference signal is smaller than the negative
carrier, the state of the arm is 1.Otherwise, the state is 0.
One reference signal is required to generate the four pulses of an arm. For a single-phase
full-bridge converter, a second reference signal is required to generate the four pulses of
the second arm. This signal is internally generated by phase-shifting the original reference
signal by 180 degrees. For a three-phase bridge, three reference signals are required to
generate the 12 pulses.

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The

## inverter is controlled in open loop. PWM Generator blocks generates sets of 12

pulses. For one inverter module:
An m level inverter leg requires 2(m-1) switching devices and
(m-1)*(m-2) clamping diodes. For a three-level inverter, m=3, so it needs four switching
devices and two clamping diodes per leg.

## Fig.6 Inverter circuit

Table.1

State condition 1 means the switch is ON, and state 0 means the switch is OFF. Table.1
is showing switching states and correspondingly voltage level for A phase. It is also
mentioned that switch pair (1, 3) and (2, 4) are complementary.
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Thus, if one of the complementary switch pairs is turned ON, the other of the same pair
must be OFF. Two switches are always turned ON at the same time. For m-level Diode
Clamped inverter, each switching device is only required to block a voltage level of
Vdc/(m-1). Unequal conduction duty requires different current ratings for switching
devices. Therefore, if the inverter design uses the average duty cycle to find the device
ratings, the upper switches may be over sized, and the lower switches may be undersized.

## Fig.7 Output voltage waveform

From Fig.7 we can see that there are three levels of output voltage.
A diode clamped inverter is mostly used because control method is simple. Also, when the
number of levels is high enough, the harmonic content is low enough to avoid the need
for filters. But, it is limited by the increase in number of clamping diodes as the number
of levels increases. Also, it is difficult to control the real power flow of the individual
converter in multi-converter systems.

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POWER CIRCUIT
(BLOCK DIAGRAM)

Power circuit includes three modules of Inverter, connected in parallel followed by filter
circuits. DC supply to inverters is provided by rectifier. Block diagram for power circuit is
shown below:

## Fig.8 Block diagram of power circuit

DATA:
Rating of each inverter module = 150 KVA
DC supply voltage = 760 V

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## UNFILTERED OUTPUT VOLTAGE WAVEFORMS

Fig.9 Unfiltered Output phase voltage (A, B, C) waveform of a inverter module simulation

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Fig.10 Unfiltered Output line voltage (AB, BC, CA) waveform of a inverter module simulation

## Peak magnitude of phase voltage = (m*Vdc)

(M is modulation index)

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FILTER CIRCUIT
In fig.9 and fig.10 we have seen that output voltage are not sinusoidal. To achieve
sinusoidal waveforms we use LC low-pass filter circuits.

## Fig.11 Simulation diagram

Inductance value = 63 H
Capacitance value = 200 F

## FILTERED OUTPUT VOLTAGE WAVEFORMS

Fig.12 Filtered Output phase voltage (A, B, C) waveform of a inverter module simulation
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Fig.11 Filtered Output line voltage (AB, BC, CA) waveform of a inverter module simulation

A low pass filter is a filter that passes signals with a frequency lower than a
certain cutoff frequency and attenuates signals with frequencies higher than the
cutoff frequency. The amount of attenuation for each frequency depends on the
filter design. Basically, an electrical filter is a circuit that can be designed to modify,
reshape or reject all unwanted frequencies of an electrical signal and accept or pass
only those signals wanted by the circuits designer. In other words they filter-out
unwanted signals and an ideal filter will separate and pass sinusoidal input signals
based upon their frequency.

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Fig.12

## All modules must be in o Frequency synchronization.

o Amplitude synchronization.
o Phase synchronization.
Parallel operation of voltage source inverters with other inverters or with the grid,
are sensitive to disturbances from the load or other sources and can easily be
damaged by overcurrent.

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FAULT ANALYSIS

In an electric power system, a fault is any abnormal electric current. For example, a short
circuit is a fault in which current bypasses the normal load. An open-circuit fault occurs
if a circuit is interrupted by some failure. In three phase systems, a fault may involve one
or more phases and ground, or may occur only between phases. In a "ground fault" or
"earth fault", charge flows into the earth. The prospective short circuit current of a fault
can be calculated for power systems. In power systems, protective devices detect fault
conditions and operate circuit breakers and other devices to limit the loss of service due
to a failure.

TYPES OF FAULT:
Angle delay in PWM generation
Neutral Missing
L-G fault
L-L fault
Short circuiting of IGBT leg

We generated the all faults with the help of MATLAB simulation and analyze the effect of
each fault on DC bus bar, output current and output load current. Outcomes after
generating the each fault are given below. We also provided a controlling circuitry to
control the effect of particular fault.
Below given table is a brief overview of fault effects and type of fault.

Table.2
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## OUTPUT CURRENT OF HIGH MAGNITUDE

NEUTRAL MISSING :

## When there is a sudden loss of neutral connection, neutral

point shifts and output voltage waveform distorts. Neutral missing type fault can be only

NEUTRAL MISSING

OUTPUT CURRENT

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## DC BUS BAR CURRENT

NOTE: Magnitude of current varies according to corresponding load.

L-G FAULT :
Fault between phase A and neutral

Phase A to Neutral

OUTPUT CURRENT

## DC BUS BAR CURRENT

NOTE: High magnitude of current flows as expected.

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L-L FAULT :
Fault between phase A and phase B.

PHASE A to PHASE B

OUTPUT CURRENT

## DC BUS BAR CURRENT

NOTE: High magnitude of current flows through output terminals of inverter and DC

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OUTPUT CURRENT

## DC BUS BAR CURRENT

During above all faults, a circulating current flows through corresponding faulty phase
and through DC bus bar. It is a current of high magnitude (in thousands).

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## FAULT CONTROL CIRCUIT

The circulating current can damage power electronics devices used in power circuit. To
prevent this damage fault control circuit is used. This circuit detects the particular fault
point and disconnect that source from rest of the circuit.

## Fig.14 Fault control circuit

NOTE: Iabc1, Iabc2, Iabc3 are circulating current. These currents first should be rectified and
then allow to flow through relay circuit, relay output would be zero if value of current is
not within the limits of relay.
A1, A2, A3 are connected to PWM Generator 1
B1, B2, B3 are connected to PWM Generator 2
C1, C2, C3 are connected to PWM Generator 3
Three currents Iabc1, Iabc2, Iabc3 are detected by this control circuit and corresponding
Inverter module turns off.

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CONCLUSION
We understand the effects of several possible faults by this Inverter simulation and
according to that effects, we provide a fault controlling circuit to prevent damage
of power electronics devices by fault current.

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