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Review of Pre-requisites-2
Analysis of any transistor amplier circuit proceeds with the following steps:
DC analysis: Open all capacitors, short all inductors and calculate DC parameters of interest such as IC , ID and VGS VT . The ac voltage source must be
short circuited and ac current sources must be open circuited. Assertain that
the circuit is operating in forward active mode for BJT and saturation region
for MOSFET. This should enable you to nd the parameters of small signal
analysis such as gm , r and ro .
AC analysis has the following steps:
1. Step 1: Short all DC voltage sources and open all DC current sources.
2. Step 2: Short all capacitors and open all inductors.
3. Step 3: Replace the transistor with its own small signal equivalent.
In doing all the steps see if you can bring any simplication.
1.1
Solved Problems
+5V
165k
7k
vo
vi
35k
500
-5V
Figure 1: Problem 1
VG =
(1)
(2)
+5V
7k
-3.25V
500
-5V
(3)
(4)
(5)
(6)
Eq.(6) has two solutions namely VGS1 = 1.503V and VGS2 = 1.903V. We
discard the second solution as VGS2 < VT , implying that the device is in o
condition which is false. The drain current is:
2
(7)
Applying KVL over the drain source loop, we obtain the VDS = 6.25V. Now, we
can see that VDS VGS VT , asserting that the device is in saturation region.
The transconductance of the MOSFET is gm = 2Kn (VGS VT ) = 1.4mS and
ro = as = 0. Having obtained these parameters, we obtain the small signal
model using the steps outlined above. After applying the step 1, the circuit
appears as shown in Fig.(3).
165k
7k
vo
vi
35k
500
(8)
vi = vgs + vs
= vgs + gm RS vgs
= vgs (1 + gm RS )
vi
vgs =
1 + gm RS
(9)
(10)
(11)
We also have,
(12)
G
+
vi
28.875k
vo
7k
vgs
gmvgs
S
500
AV =
vo
gm RD
1.4 7
= 5.76
=
=
vi
1 + gm RS
1 + 1.4 0.5
(13)
2. For the circuit in Fig.(5), let = 100, VBE(on) 0.7V and VA = 100V. Determine
the small-signal voltage gain. Determine the input resistance seen by the signal
source and the output resistance looking back into the output terminal. Assume
that the capacitors are innite.
V+=10V
RC 10k
vo
500
vi
RB=100k
RE
20k
V-=-10V
Figure 5: Problem 2
Treating the capacitors as open circuit, the DC equivalent will contain the
reistors RB , RC and RE . Applying KVL around the base-emitter loop, we get:
4
0 = IB RB + VBE(on) + IE RR + VEE
0 = IB RB + (1 + )IB RE + VEE + VBE(on)
VEE + VBE(on)
IB =
RB + (1 + )RE
10 + 0.7
= 4.387A
IB =
100k + (1 + 100)20k
(14)
(15)
(16)
(17)
500
vi
B
r
RB=100k
+
v
-
gmv
vo
ro
RC=10k
vo = gm (RC ro )v
RB r
vi
v =
500 + RB r
vo
RB r
= gm (RC ro )
Av =
vi
500 + RB r
= 148V V.
(18)
(19)
(20)
(21)
The input impedance is Ri = 500 + 100k r = 6.09k and the output resistance is Ro = Rc ro = 9.58k. Note in calculating the output impedance we
must nd the Thevinin resistance looking from the output terminals.
3. Determine the small-signal voltage gain of a circuit (shown in Fig.(7)) biased
with a constant-current source and incorporating s source bypass capacitor. The
transistor parameters are: VT = 0.8V, Kn = 1mAV 2 and = 0. Assume that
the capacitors are innite.
5
+5V
RD=7k
vo
RG=200k
vi
0.5mA
-5V
Figure 7: Problem 3
Let us assume that the transistor is biased in saturation region and hence by
denition:
ID = Kn (VGS VT )2
ID
VGS =
+ VT = 1.507V
Kn
(22)
(23)
VD
VGS
VS
VDS
=
=
=
=
(24)
(25)
(26)
(27)
We notice that the condition for saturation VDS VGS VT is satised. The
small signal equivalent circuit can be deduced from
the sequence of steps and
is shown in Fig.(9). The transconductance is gm = 2 Kn ID = 1.414mS.
We notice that vgs = vi and vo = gm vgs RD and hence the gain is,
6
+5V
RD=7k
D
S
0.5mA
-5V
Figure 8: Problem 3: DC equivalent circuit
vi
RG
G
+
vgs
-
D
S
vo
gmvgs
RD
Av =
vo
= gm RD = 1.414 7 = 9.9
vi
(28)