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Nonideal
Transistor
Theory
Outline
Nonideal Transistor Behavior
High Field Effects
Mobility Degradation
Velocity Saturation
Channel Length Modulation
Threshold Voltage Effects
Body Effect
Drain-Induced Barrier Lowering
Short Channel Effect
Leakage
Subthreshold Leakage
Gate Leakage
Junction Leakage
Process and Environmental Variations
4: Nonideal Transistor Theory
Vds
I ds Vgs Vt
=
2
Vgs Vt )
(
Vgs < Vt
V V < V
ds
ds
dsat
cutoff
linear
saturation
Ideal
1200
1000
Ion = 747 mA @
Channel length modulation: V = V = V
DD
ds
gs
Saturation current increases
with Vds
Vgs = 1.0
800
Vgs = 0.8
600
Velocity saturation & Mobility degradation:
Saturation current increases less than
quadratically with Vgs
400
Vgs = 0.8
Vgs = 0.6
200
Vgs = 0.6
Vgs = 0.4
Vds
0
0.2
0.4
0.6
0.8
Ids (A)
1000
Ion = 747 mA @
Vgs = Vds = VDD
800
Vgs = 1.0
600
Vgs = 0.8
400
Vgs = 0.6
200
Vgs = 0.4
0
Vds
0
0.2
0.4
0.6
0.8
Mobility Degradation
High Evert effectively reduces mobility
Collisions with oxide interface
Velocity Saturation
At high Elat, carrier velocity rolls off
Carriers scatter off atoms in silicon lattice
Velocity reaches vsat
Electrons: 107 cm/s
Holes: 8 x 106 cm/s
Better model
=
I ds Cox
=
Vgs Vt )
(
L
2
2
2
10
-Power Model
I ds
Vds
I
dsat
Vdsat
I dsat
Vgs < Vt
cutoff
linear
saturation
=
I dsat Pc
V
(
2
gs
Vt )
=
Vdsat Pv (Vgs Vt )
/2
11
DD
eff
12
V
(
2
gs
Vt ) (1 + Vds )
2
13
14
Body Effect
Body is a fourth transistor terminal
Vsb affects the charge required to invert the channel
Increasing Vs or decreasing Vb increases Vt
Vt = Vt 0 +
s + Vsb s
NA
ni
tox
2q si N A
=
ox
2q si N A
Cox
15
16
DIBL
Electric field from drain affects channel
More pronounced in small transistors where the
drain is closer to the channel
Drain-Induced Barrier Lowering
VVV
Drain voltage also affect Vt
ttds
Vt Vds
Vt=
High drain voltage causes current to increase.
17
18
Leakage
What about current in cutoff?
Simulated results
What differs?
Current doesnt
go to 0 in cutoff
19
Leakage Sources
Subthreshold conduction
Transistors cant abruptly turn ON or OFF
Dominant source in contemporary transistors
Gate leakage
Tunneling through ultrathin gate dielectric
Junction leakage
Reverse-biased PN junction diode current
20
Subthreshold Leakage
Subthreshold leakage exponential with Vgs
Vgs Vt 0 +Vds k Vsb
I ds
I ds 0 e
nvT
Vds
1 e vT
n is process dependent
typically 1.3-1.7
Rewrite relative to Ioff on log scale
21
Gate Leakage
Carriers tunnel thorough very thin gate oxides
Exponentially sensitive to tox and VDD
22
Junction Leakage
Reverse-biased p-n junctions have some leakage
Ordinary diode leakage
Band-to-band tunneling (BTBT)
Gate-induced drain leakage (GIDL)
p+
n+
n+
p+
p+
n+
n well
p substrate
23
Diode Leakage
Reverse-biased p-n junctions have some leakage
VvD
T
=
I D I S e 1
24
Band-to-Band Tunneling
Tunneling across heavily doped p-n junctions
Especially sidewall between drain & channel
when halo doping is used to increase Vt
Increases junction leakage to significant levels
25
26
Temperature Sensitivity
Increasing temperature
Reduces mobility
Reduces Vt
ION decreases with temperature
IOFF increases with temperature
I ds
increasing
temperature
Vgs
27
So What?
So what if transistors are not ideal?
They still behave like switches.
But these effects matter for
Supply voltage choice
Logical effort
Quiescent power consumption
Pass transistors
Temperature of operation
28
Parameter Variation
fast
FF
pMOS
SF
TT
slow
slow
FS
SS
fast
29
Environmental Variation
VDD and T also vary in time and space
Fast:
VDD: high
T: low
Corner
Voltage
Temperature
1.98
0C
1.8
70 C
1.62
125 C
30
Process Corners
Process corners describe worst case variations
If a design works in all corners, it will probably
work for any variation.
Describe corner with four letters (T, F, S)
nMOS speed
pMOS speed
Voltage
Temperature
31
Important Corners
Some critical simulation corners include
Purpose
nMOS
pMOS
VDD
Temp
Cycle time
Power
Subthreshold
leakage
32