IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 17, NO.

4, APRIL 2007

295

A 3.110.6 GHz Ultra-Wideband Low Noise

Amplifier With 13-dB Gain, 3.4-dB Noise Figure,
and Consumes Only 12.9 mW of DC Power
Chao Fang, Student Member, IEEE, Choi L. Law, Senior Member, IEEE, and James Hwang, Fellow, IEEE

AbstractA 3.110.6 GHz ultra-wideband two-stage pseudomorphit high electron mobility transistor low noise amplifier is
presented. The first stage of the amplifier employs a resistive
shunt feedback topology and two T-network sections to provide
wideband input matching to a 50- antenna. The current-sharing
dc bias topology is used to ensure the low power consumption
under fixed 3-V battery operation. The amplifier exhibits state of
the art performance consuming only 12.9 mW of dc power with
a power gain of 12.5 dB, 0.5 dB gain flatness, and 3.44.0 dB
noise figure. Input match is better than 12.0 dB, output match is
better than 15 dB, and group delay is 184 pS 28 pS.

Index TermsCurrent sharing, feedback, low noise amplifier (LNA), pseudomorphic high electron mobility transistor
(pHEMT), ultra-wideband (UWB).

I. INTRODUCTION
LTRA-WIDEBAND (UWB) has received considerable
interest recently for the following reasons: 1) multipath
resistance hence resulting in better power transmission efficiency [1], 2) very low average power spectral density and
hence causes less interference to other services sharing the
same band, and 3) precise location positioning capabilities
[2]. The 3.110.6 GHz band is the first band to be utilized
moving to higher frequencies in later phases. Recently, a
couple of companies offering UWB location systems have
emerged (Multispectral Solutions, Inc; www.multispectral.com
and Ubisense; www.ubisence.net). It is expected that more
companies will offer these types of products when the current
standardization group (IEEE802.15.4a) finalizes the standard
(expected within the next two years).
Study shows that an improvement of 2.0 dB in the noise
figure (NF) of the receiver results in a range increase of around
1.6 times. Hence, in order to increase the UWB location system
coverage, a high gain and low noise amplifier (LNA) becomes
a crucial design task.
Table I summarizes the performance of this LNA, with
comparison to previous state-of-art low power CMOS design,

Manuscript received November 1, 2006; revised December 14, 2006. This

work was supported by Singapore DSO National Laboratories and by ASTAR
SERC under Grant 052-121-0086.
C. Fang and C. L. Law are with the PWTC Center, Nanyang Technological
University, Singapore 639815 (e-mail: fang0010@ntu.edu.sg).
J. Hwang is with Lehigh University, Bethlehem, PA 18015 USA.
Color versions of one or more of the figures in this letter are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/LMWC.2007.892984

SiGe design, and 0.15- m pseudomorphic high electron mobility transistor (pHEMT) design [4], [6]. This 3.110.6 GHz
0.15- m pHEMT monolithic microwave integrated circuit
(MMIC) amplifier has state of the art performance consuming
only 12.9 mW of power. The power gain is 12.5 dB with a
gain flatness of 0.5 dB, and the NF is below 4.0 dB. It has
excellent input and output return loss of better than 12 and
15 dB, respectively, except at the high end of the band. Group
delay is around 184 pS 28 pS resulting in very good pulse
response.
This letter focuses on the design and implementation of low
noise amplifier with very low power consumption in a 0.15- m
pHEMT technology. The letter is organized as follows. In
Section II, the design challenges are indicated and proposed
solutions are presented. In Section III, the effectiveness of the
current sharing topology, input matching and tradeoff between
power consumption, gain and noise performance are discussed.
Experiments carried out on the fabricated LNA are reported in
Section IV.
II. DESIGN CHALLENGES AND PROPOSED SOLUTION
Broadband systems have traditionally employed distributed
amplifier topology. The problem of achieving a broadband
match to the transistor input and output impedance is overcome
by incorporating the input and output capacitances of a number
of transistors into artificial transmission-line structures.
But recently, for UWB system, the low power consumption
requirement imposes a great challenge on low power distributed
amplifier design. And also for distributed amplifier, there is a
50- termination resistor in front of the first stage of the amplifier; this will degrade the noise performance of the distributed
amplifier substantially.
In the proposed solution, shown in Fig. 1, the input stage of
the LNA was designed by employing a resistive shunt feedback
topology together with two T-network sections to match to a
50- antenna. At the same time this topology will improve the
noise performance compared to the distributed input stage. The
second stage is implemented in common source configuration
to achieve the higher gain compared to common gate configuration. Current sharing design of the two stages is employed to reduce the power consumption of the proposed LNA under fixed
3-V battery [5]. The output matching is achieved by a single
transistor distributed amplifier topology, which means that the
absorb the output capacitance of the second
inductors ,
pHEMT to form an artificial transmission line terminated by
to drive an external 50- load.
50-

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IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 17, NO. 4, APRIL 2007

TABLE I
SUMMARY OF LNA PERFORMANCE AND COMPARISON WITH PREVIOUS STATE-OF-ART DESIGN

Fig. 2. NF and gain versus power consumption under three bias scenarios.

Fig. 1. Simplified schematic of the wideband LNA.

III. CIRCUIT ANALYSIS

In order to optimize the power consumption performance and
noise performance, the number of the stages of the amplifier and
the bias current are determined carefully. To make sure the transistor operates in the linear region, the drain bias voltage of the
transistor is at least 1.0 V. Hence with fixed 3 V battery supply,
we have three scenarios; a 1) one-stage amplifier design with the
drain bias at 3.0 V, 2) two-stage amplifier design with current
sharing bias topology and drain bias voltage of each transistor
at 1.5 V as shown in Fig. 1, and 3) a three-stage design, which
is similar with Fig. 1 except that we add one more stage into
the design and end up with the drain of each transistor biased
at 1.0 V. We assume perfect inter-stage matching between two
transistors and plot the gain and NF performance versus power
consumption of the three different scenarios at 10.6 GHz, the
highest end frequency of the UWB band.
From Fig. 2, we can see that the two-stage and three-stage design are much better than one-stage design after considering the
gain, noise performance and the amount of power consumption.
Further comparison between the two-stage and three-stage design shows that the NF of the two-stage design is slightly lower
and the gain of the three-stage design is higher. After considering that the input 1-dB compression point will be lowered by
the high gain design and also 1.0-V drain bias voltage is close
to the triode region of the transistor, we decided to choose the

Fig. 3. Input return loss S

T-network sections.

without two T-network sections and S

with two

two-stage design with current sharing topology shown in Fig. 1.

The drain bias current of 4.3 mA, which is indicated in Fig. 2,
is chosen.
The first stage of the LNA employs a resistive shunt feedback topology and two T-network sections to match to 50antenna over the frequency range of 3.1 to 10.6 GHz. The resistive shunt feedback network, which is formed by
and
shown in Fig. 1, is designed to provide wideband input matching
better than 12 dB from 3.1 to 6.2 GHz. Fig. 3 shows the
(indicated in Fig. 1) without the two T-netinput return loss
work sections and the input return loss
with the two T-network sections. The resistive matching technique is employed for
inter-stage matching while the output matching is achieved by
using a single transistor distributed amplifier topology.

FANG et al.: 3.110.6 GHZ UWB LNA

297

Fig. 4. Microphotograph of the fabricated LNA.

Fig. 7. Measured and simulated group delay and NF of the fabricated LNA.

Fig. 5. Measured and simulated S , S

of the fabricated LNA.

high end of the band. Fig. 6 shows the measured and simulated
and
. The measured
power gain and reverse isolation,
is 12.5 dB, and 0.5 dB gain flatness and
is better
than 32 dB. The group delay and the spot NF are shown in
Fig. 7. The group delay decreases from 192 ps to 156 ps from
3.1 to 5.5 GHz and then increases from 156 to 212 ps from 5.5
to 10.6 GHz. The maximum group delay variation is 28 ps.
The minimum NF is as low as 3.4 dB, and the highest NF in 3.1
to 10.6 GHz band is 4.0 dB. For the UWB system, the average
NF is a better figure of merit than the spot NF [3]. The average
NF for a fabricated UWB LNA is 3.6 dB.
V. CONCLUSION
We have presented the design and implementation of a
low power UWB LNA in 0.15- m pHEMT technology. The
good input and output matching and low noise performance
are achieved for the whole frequency band of interest. The
power gain as high as 13 dB is achieved, the gain flatness is
12.5 0.5 dB, and it consumes only 12.9 mW power. From
the authors best knowledge, the presented design is the first
proposed UWB pHEMT LNA which is designed to operate
under a very low dc power supply.

Fig. 6. Measured and simulated S , S

of the fabricated LNA.

IV. MEASUREMENT RESULTS

The designed UWB LNAs have been fabricated in a 0.15- m
pHEMT process. A microphotograph of the fabricated UWB
LNA is shown in Fig. 4. Die size including the dc pads is
0.9 mm 2.5 mm 2.25 mm . The following measurement
results are done under a 3-V power supply and the measured
supply current is 4.3 mA. The parameters were measured
on five different fabricated UWB LNAs and the maximum
observed spread of the parameters is less than 1 dB.
Fig. 5 shows the measured and simulated input and output
,
for fabricated UWB LNA.
reflection coefficients
is lower than 12 dB and
is lower than 15 dB except at the

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