IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS, VOL. 9, NO.

2, MAY 2013

609

A Comparison of Carrier-Based and Space Vector

PWM Techniques for Three-Level Five-Phase Voltage
Source Inverters
Obrad Dordevic, Student Member, IEEE, Martin Jones, and Emil Levi, Fellow, IEEE

AbstractMultilevel inverter supplied multiphase variable-speed drive systems have in recent times started attracting
more attention, due to various advantages that they offer when
compared to the standard three-phase two-level drives. For proper
functioning of such systems good pulsewidth modulation (PWM)
strategy is of crucial importance. Control complexity of multiphase multilevel inverters increases rapidly with an increase in
the number of phases and the number of levels. This paper deals
with a three-level neutral point clamped (NPC) inverter supplied
five-phase induction motor drive and analyses five PWM strategies: three are carrier-based (CBPWM) and two are space vector
based (SVPWM). The aim is to provide a detailed comparison and
thus conclude on pros and cons of each solution, providing a guideline for the selection of the most appropriate PWM technique.
Experimental results are provided for all analysed PWM methods.
The comparison of the PWM techniques is given in terms of the
voltage and current waveforms and spectra, as well as the total
harmonic distortion (THD) in a whole linear modulation index
range, which is used as the global figure of merit. Properties of the
common mode voltage (CMV) are also investigated. Complexity of
the algorithms, in terms of the computational time requirements
and memory consumption, is addressed as well. It is shown that
the performance of the PWM techniques is very similar and that
one CBPWM and one SVPWM technique are characterised with
identical performance. However, using the algorithm complexity
as the main criterion, space vector techniques are more involved.
Index TermsCarrier-based pulsewidth modulation (PWM),
multilevel inverters, multiphase machines, space vector PWM.

I. INTRODUCTION
HE advantages of multiphase machines with respect to
their three-phase counterparts are well documented [1].
Also, standard topologies of the multilevel inverters, their advantages with respect to two-level inverters, pulsewidth modulation (PWM) control strategies, and applications are nowadays well understood [2], [3]. Individual advantages of multiphase machines and multilevel inverters can be conveniently
combined by realising multilevel multiphase drive structure [1].

Manuscript received December 02, 2011; revised March 07, 2012 and May
10, 2012; accepted June 09, 2012. Date of publication September 24, 2012;
date of current version January 09, 2013. This work was supported by NPRP
Grant 4-152-02-053 from the Qatar National Research Fund (a member of Qatar
Foundation). The statements made herein are solely the responsibility of the
authors. Paper no. TII-11-0968.
O. Dordevic, M. Jones, and E. Levi are with the School of Engineering, Technology, and Maritime Operations, Liverpool John Moores University, Liverpool
L3 3AF, U.K. (e-mail: o.dordevic@2009.ljmu.ac.uk; m.jones2@ljmu.ac.uk;
e.levi@ljmu.ac.uk).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TII.2012.2220553

For proper control of multiphase machines supplied from

multilevel inverters, modulation strategy is the key issue.
Carrier-based modulation strategies can be easily extended
from two-level to multilevel structures, as discussed in [4] for
the three-phase case, and they are nowadays well-established
for multilevel three-phase systems [5]. Also, carrier-based
approach is independent of the number of phases, so that its
extension to multiphase systems presents no difficulties. Nevertheless, there is little evidence of any machine performance
analysis when carrier-based PWM (CBPWM) techniques are
utilized for multiphase multilevel structure. Indeed, in the
load is used and the emphasis
existing works [6], [7] an
is on the capacitor voltage balancing.
Situation regarding space vector based approaches is somewhat different and the problem of generalization still exists.
Space vector strategies deal with switching states of the inverter
that should be applied in each switching period to obtain the
desired references on average. The source of the problem
for generalization is exponential increase of the number of
(where is the number of
switching states, which equals
phases, while is the number of inverter levels). Having more
switching states means more possible solutions. For three-phase
multilevel case, because of the symmetry and possibility of
forming equilateral triangles, situation is simpler. However,
an additional problem that appears in multiphase case is the
presence of more than one plane [1] and decrease in symmetry.
Consequently, the majority of existing multiphase multilevel
space vector based PWM (SVPWM) algorithms are for the
specific cases.
One of the first ideas [8], applied to a five-phase three-level
topology, followed three-phase three-level SVPWM algorithm
of [9] and divided sectors into triangles. The consequence was
that only three instead of five space vectors were applied in
a switching period. Hence the second plane of the five-phase
system was not controlled, meaning that it was not possible to
obtain sinusoidal output voltages. The same principle was followed in [10], where the same algorithm was applied for control
of two five-phase series-connected induction machines supplied
from a three-level neutral point clamped (NPC) inverter. Similarly, insufficient number of space vectors during the switching
plane, is used in [11], [12]
period, without considering the
where five-phase three-level topology was again considered.
A different approach to SVPWM of multiphase multilevel
inverters, which recognizes that the number of applied vectors
in a switching period must equal the number of phases, was
developed in [13][16]. A universal solution for any number of
phases and levels is provided, using multidimensional space as

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TABLE I
COMPARED MODULATION STRATEGIES

the basis for the analysis. The general implementation of the

algorithm of [13] by creating VHDL module for an arbitrary
number of phases and levels is given in [17]. However, the used
approach is in essence level-shifted CBPWM method, and the
analysis is not conducted by considering vector projections in
2-D planes as is customary when vector space decomposition
(VSD) is used. An alternative method, which again does not rely
on VSD and per-plane analysis, is utilization of single-phase
modulator for each phase in a multiphase system [18].
The first complete SVPWM solution, based on VSD approach, is provided for a five-phase three-level topology in
[19]. This is the supply structure discussed here as well, in
conjunction with an induction motor drive. The VSD approach
is used and decomposition of the variables into 2-D orthogonal
planes is conducted, following the methodology introduced
in [20] and predominantly used in conjunction with two-level
multiphase inverter control strategies. This approach defines
the mutually perpendicular planes of a multidimensional space
and is one of the basic concepts for SVPWM control strategy
development. An extension of the algorithm of [19] from
five-phase to seven-phase three-level NPC inverter structure is
reported in [21].
This paper builds on [22], where an initial attempt to compare the three-level five-phase PWM techniques was described.
The study in [22] was purely simulation-based and restricted to
consideration of the voltages. In contrast to this, the work described here verifies experimentally theoretical analysis using
a laboratory prototype of the five-phase induction motor drive
supplied from a three-level NPC inverter. Load phase voltage
and current, as well as the CMV, are encompassed by the experimental work. Last but not least, the complexity of the studied
algorithms is analyzed as well, in terms of memory requirements
and the algorithm execution time.
As a benchmark in comparison, pure sinusoidal CBPWM
strategy (without any injection, denoted further on as
CBPWM0) is used (this is an addition with respect to
[22]). Two other analyzed carrier-based modulation strategies are: sinusoidal reference CBPWM with single minmax
injection (denoted as CBPWM1) and CBPWM with double
zero-sequence injection (CBPWM2). Two SVPWM strategies,
investigated here, are the algorithm of [19], denoted further as
SVPWM1, and a modified version of that algorithm, labelled
SVPWM2. The PWM techniques, compared in the paper,
are summarised in Table I. The chosen carrier disposition is
level-shifted phase disposition (PD-CBPWM) for all discussed
CBPWM strategies. The implementation of all compared PWM

techniques does not include additional means for capacitor

voltage balancing.
It should be noted that a carrier-based disposition of
PD-CBPWM type is also used in [18], where it is formalized
into a computer algorithm form using a flow chart diagram.
All CBPWM strategies analyzed here can be implemented
using formalized form of [18] and reference signals with an
appropriate injection. Hence the single-phase modulator of
[18] is not included in the comparison as a separate method;
however, it is revisited in Section II-A where some additional
considerations are given.
The paper is organized as follows. In Section II all the analyzed modulation strategies are introduced. Importance of the
comparison of the modulation strategies and choice of the carrier disposition are also addressed. Section III presents experimental results and associated discussion. Algorithm complexity
is studied since this is an important consideration for real-time
implementation. Section IV summarizes conclusions.
II. THE ANALYZED PWM TECHNIQUES
Topology of a five-phase induction machine with sinusoidally
distributed windings, supplied from an NPC voltage source inverter (VSI), is shown in Fig. 1. Since induction machine is with
sinusoidally distributed windings, the task of the PWM is to
realize sinusoidal output voltages. Standard notation for multilevel inverter output leg voltages is used. It is based on the
normalized form, so that the lowest leg voltage value is 0 while
for an -level VSI. The step of the
the highest value is
output voltage is constant, hence voltages on capacitors are bal. Thus,
anced and each capacitor carries voltage of
for the studied inverter structure of Fig. 1, the leg voltages can
and
, which in normalised form become
take values
0, 1, and 2, respectively.
The comparison of space vector and carrier-based PWM
methods is important, since it reveals similarities and differences, thus enabling the selection of the best technique
for a given application. As already mentioned, in this paper
PD-CBPWM is adopted. This choice is good for comparison
with space vector strategies for NPC topology and has already
been used in three-phase case related comparisons in [23], [24].
The actual reason why PD-CBPWM is the most suitable for
comparison with SVPWM is the following. During the construction of the space vector sequence it is normally assumed
that each leg increases (decreases) its level during the first
half-period of the switching period , and then each leg decreases (increases) its level in the second half-period. Increase
and decrease are usually for one level to minimise switching
losses. Let us consider the most common multilevel techniques,
with carriers in phase disposition (PD), phase opposition disposition (POD), and alternatively in phase opposition disposition
(APOD), which are shown in Fig. 2. For the shown three-level
case APOD and POD are identical, Fig. 2(b) (this does not affect the generality of the example). Also, in the shown example,
for the sake of clarity, only two phases (legs) are shown. One
can see that the only method in which all legs always change
its level in the same direction (all increase or all decrease
their level) in each half-period of the switching period is PD,
Fig. 2(a). Thus, this is the actual reason why PD-CBPWM is

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611

Fig. 1. Topology of a three-level five-phase NPC inverter supplied induction motor drive, studied in the paper.

Fig. 2. Choice of CBPWM that is suitable for comparison with SVPWM techniques: (a) PD-PWM. (b) POD and APOD for three-level case.

the most suitable carrier-based PWM strategy for comparison

with SVPWM methods for the NPC VSI topology.
When PD-PWM strategy is used, the gating signals can be obtained using a single carrier. Graphically, this can be explained
as follows: all reference signals can be shifted to the common
carrier band (two-level zone) and times of application of applied multilevel switching states can be obtained as in two-level
operation with the single carrier. For correct reconstruction of
the leg voltages, information regarding the earlier carrier zone
must be saved for each leg. This problem can be also presented
mathematically. If normalized voltages are in use, then shifting
of the leg voltages to common carrier band represents the fractional part of the references. Also, for correct reconstruction of
leg voltages, the integer part must be saved. The signal shifting
to the common carrier band (by taking the fractional part) can
be then easily done by the modulus function [24]. This is a standard way for practical implementation of the PD-CBPWM.
A. CBPWM0 and CBPWM1
As noted, CBPWM0 and CBPWM1 stand for the basic
CBPWM technique with pure sinusoidal references, and
method with sinusoidal references and addition of the min-max
injection, respectively. Carrier-based PWM is always the easiest
technique for implementation on any digital platform. Finding
the equivalent injection that leads to the same operation as a

space vector algorithm is therefore useful to simplify practical

implementation of the developed space vector strategy.
It is shown in [4] that the level-shifted PD-CBPWM approach
leads to the minimum phase voltage harmonic distortion. This
result is given for a three-phase load, but is also valid for multiphase case since single-leg output was analysed. The result
comes as a consequence of the fact that significant harmonics of
the output leg voltage, located at the multiples of the switching
frequency, will have the same magnitude and phase in all legs,
so that they will not be present in the phase voltages, regardless of the number of phases. This further supports previously
given argument, that PD-CBPWM is the most suitable CBPWM
method for comparison with SVPWM techniques.
If modulating signals are pure sinusoidal signals, as in
CBPWM0, the maximum modulation index (defined as the
ratio of the maximum fundamental peak phase voltage to one
half of the dc-link voltage) in the linear PWM region is limited
to 1. It is shown in [18] that the formalized PD-PWM algorithm
with no injection is equivalent to the algorithm of [13] (where
CMV does not exist due to the nonisolated neutral point of the
load). This reveals that the algorithm of [13] actually comes
from PD-PWM. This is also clear from the detailed analysis
of the matrix equations in [13]. The simplest solution for
extending the modulation index range in the linear modulation
region with CBPWM is the addition of the zero-sequence
injection, according to the minmax principle (CBPWM1)
(1)
where
and
stand for the minimum and maximum
value, respectively, of the sinusoidal phase voltage references.
This increases the maximum modulation index of the five-phase
system in the linear PWM region to 1.0515, as with a two-level
VSI [25].
Minmax injection has a universal validity, since it does not
depend on either the number of phases or on the shape of the
modulating signals [25]. It is a solution to the problem of centring signals within dc-bus rails in each instant of time, as shown
of
in Figs. 3(a) and (b). In Fig. 3, one switching period
the reference leg voltages for the five-phase three-level inverter
is depicted. The illustration is given for the modulation index
, and angle of
. Since signals are centred
, displacement of (1) can be expressed in an alteraround
native manner, in terms of reference leg voltages, as

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Fig. 3. Principle of centring of the signals showing (a) CBPWM0 sampled signals (not centred), (b) CBPWM1 centred signals between dc-bus rails, (c) signals
referred to the common carrier band, (d) CBPWM2 centred signals within the common carrier band. One switching period (T ) is shown.

(2)
and
stand for the minimum and maximum
where
value, respectively, of the reference leg voltages, Fig. 3(a). Note
that, in the notation used, capital letters in subscripts denote leg
while lowercase letters stand for phase voltages. With this injection (inj1 in Fig. 3) modulation index range is extended to
the maximum value for any number of phases, since reference
, Fig. 3(b).
leg voltages are always centred in between 0 and
Shifting to the common carrier band is shown in Fig. 3(c). It
is clear that the dwell times remain unchanged, and, as already
mentioned, this method in conjunction with comparison with
the single carrier was used for practical implementation of all
PD-CBPWM algorithms.
B. CBPWM2
This method was introduced in [26] for three-phase systems,
with the aim of harmonic distortion reduction. The same construction of the injection has been used later in [23], for comparison of the carrier-based and space vector modulation strategies
for three-phase three-level inverters. Also, the same principle
was applied in [24], where the aim was to generate the injection
that produces the same output as the optimized space vector algorithm of [9]. In this paper the same principle is applied to the
five-phase, three-level topology and the strategy is denoted as
CBPWM2.
The importance of this strategy is highlighted in [24] where it
is shown that simple carrier-based method with proper injection
can give the same performance as an optimized SVPWM algorithm. In general, the algorithm of [9] is widely accepted as the
reference three-phase multilevel SVPWM. In [24] an optimization of the space vector sequence, based on minimum number
of transitions, is given at first as a supplement to the algorithm
of [9]. Further optimization is based on the flux trajectory concept. It is shown that for the three-phase case the optimal space
vector algorithm, which leads to the minimum flux distortion,
is the one in which the total time of application of redundant
switching states is equally shared between two states.

Sharing of the redundant switching states is a good starting

point for construction of the injection and for the comparison
of SVPWM with CBPWM strategies. If in the space vector
algorithm during one switching period all legs change their
level only for one step (to minimize losses), it can be said
that during one switching period inverter operates in two-level
mode around certain working point. Hence, the times of application of two-level mode determine the times of application
for corresponding multilevel switching states. The reflection
of this in the PD-CBPWM approach is the already mentioned
shifting to the common carrier band (two-level zone) with
the single carrier. The reference signals must already contain
minmax injection, inj1 (as in CBPWM1) in order to increase
the modulation index range.
Moving of all reference signals (with one minmax injection) to common carrier band is shown in Fig. 3(c). The first
and the last switching state with fractional part of normalized
and
, Fig. 3(c), are redundant.
leg voltages,
A leg voltage can be obtained by adding saved integer part of
the reference to the corresponding fractional part. For optimization of the flux trajectory their times of application should be
the same, so signals from Fig. 3(c) should be again centred inside one carrier band. Once more this graphical centring is obtained mathematically with min-max injection for signals from
(i.e., 0.5 in the normalized form).
Fig. 3(c), now around
This injection is denoted with inj2 in Fig. 3. Leg reference signals after double centring are shown in Fig. 3(d). Finally, construction of CBPWM2 involves two injections (inj1 and inj2)
of the type used in CBPWM1, where the second injection is
applied after all reference signals (that already include the first
zero-sequence injection) are shifted to the common carrier band.
The second centring does not change modulation index range,
so that the maximum modulation index for CBPWM2 technique
is the same as for the CBPWM1. Described CBPWM2 strategy
is here directly applied to the five-phase topology without any
modification.
C. SVPWM1
The method is the one of [19] and it is based on decomposition of the space vectors into two 2-D planes. For sinusoidal
output, reference voltage is in the first plane, while the reference

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613

TABLE II
SWITCHING SEQUENCES FOR SUBSECTORS OF FIG. 4

Fig. 4. First sector subsectors for both space vector PWM techniques.

in the second plane is zero. Hence the algorithm has to zero the
average voltage in the second plane in each switching period.
The technique at first eliminates some of the switching states.
It is shown that leg voltages follow the same order as the reference phase voltages. As a consequence, eliminated switching
states are those that do not follow the ordering of the reference
phase voltages in the time domain. The number of switching
states is reduced in this manner from 243 to 113. The next step
is development of switching sequences that are characterized
with single-level transitions in each inverter leg. For three-level
five-phase case there are 32 possible switching sequences. Some
of the sequences correspond to the groups of the same space
vectors, i.e., they yield the same pattern. There are therefore 16
different patterns. Some of these cannot achieve zero average
voltage in the second plane, so that they have to be eliminated.
The final result is 10 patterns per sector, which are able to generate pure sinusoidal output voltages. The next step is determination of subsector borders, i.e., regions of application of certain
patterns. Each group of space vectors in a pattern, to which more
than one switching sequence can correspond, has the same application time for a space vector under consideration. With the
simple rule, that the time of application must be in the range 0
to , partition of the sectors into subsectors can be done. Subsectors A-K, inside the first sector, are shown in Fig. 4. The final
choice of the sequences for each pattern is done in such a manner
to minimize the number of transitions and to improve balancing
of the capacitor voltages. For better capacitor voltage balancing,
switching sequences with more states that are governed by the
middle point of the dc capacitor bank are preferable. Switching
sequences A-K are given in Table II. Finally, a simple method
for determination of the reference voltage position and thus subsector identification is presented in [19].
D. SVPWM2
This represents a modification of the SVPWM1 algorithm.
The basic idea of the modification was to reduce variations of the
common mode voltage (CMV). The symmetry around the eighteen degree line in the first sector is utilized to introduce an additional subdivision of each sector into two halves and reorganize
the switching patterns accordingly. Namely, in the first sector,
which occupies the first 36 of the reference signal period in the
five-phase system, the fifth phase reference voltage has a zero
crossing, and is positive in the first 18 and negative between
18 and 36 . The proposed switching sequence, taking as the
example small values of the modulation index

when the reference is in the subsector A (see Fig. 4), contains at

the fifth positions only ones and twos (shown in bold in Table II).
That means that the fifth leg voltage is boosted, i.e., that CMV is
) in the first sector. Further,
always greater than one (i.e.,
in the second sector the third phase changes sign from the negative to the positive. The algorithm gives only zeros and ones in
the appropriate sequence for the third leg, so CMV is less than
). The same happens for higher values of the
one (i.e.,
modulation index. On average, during the whole fundamental
). With the proposed subperiod, value of CMV is 1 (i.e.,
division of the sectors into two equal parts, it is possible to ob) during
tain average value of the CMV equal to one (i.e.,
the time interval which corresponds to each sector. The maximum value of the CMV voltage alternating part is reduced in
this way. After modification, original subsectors A, B, E, and
H (see Fig. 4) are additionally divided into lower and upper
parts. This produces four additional subsectors, so that the total
number of subsectors per sector in the modified algorithm is 14.
Switching sequences for the upper subsectors are different than
in the original algorithm, while they remain the same for the
lower parts of the four subsectors that have undergone further
subdivision. The first to the fifth switching states of the lower
subsector sequence become the second to the sixth switching
states of the upper sequence, while the first is the redundant
switching state that corresponds to the same space vector as the
sixth. Also, the same rule must be applied to the original sequence of the subsector D. Sequences for subsectors J and K remain the same. In this way all switching sequences in the upper
half of the sector will have the same starting switching state
and thus minimize the number of additional transitions (losses).
Switching sequences for corresponding 14 subsectors are given
in Table II. The increase of the number of subsectors from 10 to
14 within the original 36 sectors slightly increases complexity
and memory consumption for the implementation.
III. EXPERIMENTAL RESULTS
In what follows, experimental results are presented. Parameters of the machine are:
mH,
mH,
mH. Used dc-bus voltage is
V and switching frequency of the inverter is chosen
to be
kHz. Inverter dead time is
s. At rated

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comparison. The cleanest spectra result with the CBPWM0 and

CBPWM1 methods.
Under ideal conditions no lower order harmonics should be
present in the phase voltage spectrum. However, in the shown
experimental results in Fig. 7 it is evident that there are some
small values of the third harmonic (at 60 Hz), caused by the inverter dead time [27] as well as a nonnegligible 15th harmonic
Hz). This is a zero-sequence harat 300 Hz (
monic in a perfectly symmetrical machine and it is believed that
its existence is due to the rotor slotting and nonideal construction of the machine.
Study of the type shown in Fig. 7 has been conducted, using
both experiments and simulations, for the whole linear PWM region. Simulation model is based on PLECS Simulink block-set
and all the parameters are the same as in the experimental setup
(including the inverter dead time). For the CBPWM0 method
, while it is up to 1.0515 for all
the linear region is up to
other modulation strategies. Simulations are done for the modulation index values from 0.05 up to 1.05 (i.e., 1 for CBPWM0),
with the step of 0.025, while experiments are done with the doubled step, 0.05.
On the basis of the FFT results, THD has been calculated up
to 21 kHz, according to
Fig. 5. Experimental setup.

(4)
motor frequency of 50 Hz, the voltage is 300 V (peak value) and
. Moduthe machine is controlled using
is the peak fundamental of the
lation index is defined as (
reference phase voltage)
(3)
Experimental setup is shown in Fig. 5. For the real-time implementation of the code, dSpace ds1006 hardware has been
used. Three-level five-phase NPC inverter is custom-made. External dc source Sorensen SGI 600/25 has been employed as
dc-bus supply.
Waveforms produced by investigated modulation strategies
are very similar and become even more similar with the increase of the modulation index value. In order to highlight
has been
the differences, a small modulation index
chosen. The differences in waveforms are marginal, as can be
seen from Fig. 6 where leg voltage, phase voltage, and motor
current are shown for all five considered PWM techniques. The
difference between strategies is more evident in the harmonic
spectra, which are shown in Fig. 7 for all considered strategies
for the phase voltage [see Fig. 7(a)(e)]. One can see that
there are a lot of similarities between compared modulation
strategies. All strategies achieve required fundamental output
voltage with hardly any low-order harmonics in the phase
voltage. The observable differences that appear in the spectra
are predominantly related to the side-bands around multiples
of the switching frequency. One interesting conclusion is that
two of the methods, namely CBPWM2 and SVPWM2, show
identical performance [see Fig. 7(c) and (e)]. This conclusion
is valid for the whole investigated linear modulation index
range from 0 to 1.0515. This will be proven further by THD

represents the
where stands for phase voltage or current,
-th component in the spectrum and determines harmonic
order closest to 21 kHz. Since switching frequency is
kHz, harmonics that belong to the first 10 side-bands are taken
for THD calculation in this way. Comparison of simulation and
experimental THD results, for all five analyzed strategies, for
the phase voltage and current THDs is given in Figs. 8 and
9, respectively. From Fig. 8 it can be seen that for the given
modulation index range all modulation strategies produce essentially the same phase voltage THD value. Also, very good
agreement between simulation and experimental results is visible. The small difference between simulation and experimental
results for low modulation indices is believed to originate from
inaccurate knowledge of the dead time, which impacts on the
results more in the low modulation index region.
Current THD analysis, illustrated in Fig. 9, confirms again
that the CBPWM2 and SVPWM2 yield identical performance.
Experimental results show, in general, somewhat higher current
THD than simulations. This is caused by the assumption that
leakage inductances are constant and equal at all frequencies in
the simulations, which is in reality not satisfied [28]. However,
regardless of the differences in the numerical values (which are,
it should be stressed, rather small), the trend of all curves and
their mutual position is the same in both simulations and experiments. The noticeable difference between strategies exists
for medium to high modulation index values; clearly, CBPWM2
and SVPWM2 can be characterized as being the best. These two
strategies equally share redundant vector application time, and
in three-phase case they were proven as optimal according to the
flux harmonic distortion [24], [26]. The findings reported here

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615

m = 0 :4

Fig. 7. Experimental results for modulation index

showing phase
voltage spectrum for the: (a) CBPWM0, (b) CBPWM1, (c) CBPWM2, (d)
SVPWM1, and (e) SVPWM2 modulation strategy.
Fig. 6. Oscilloscope recording of the leg and phase voltage, and motor current
, for all considered PWM strategies: (a) CBPWM0, (b) CBPWM1,
at
(c) CBPWM2, (d) SVPWM1, and (e) SVPWM2 modulation strategy (M-leg
voltage, 260 V/div; Ch3-phase voltage, 250 V/div; Ch4-phase current, 2 A/div;
ms/div).

m = 0:4

time = 10

prove that these PWM strategies offer the lowest current THD
in the five-phase case as well.

Consider the operation with the modulation index of

from Fig. 7. A five-phase system is characterised with two
planes and the voltage/current harmonics map into one of the
two planes, according to the certain rules [28]. The mapping of
the harmonics is very important since the equivalent impedance
is not the same in the two planes [28]. Equivalent inductances in
the first (torque/flux producing) and the second (nonflux/torque

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IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS, VOL. 9, NO. 2, MAY 2013

Fig. 8. Phase voltage THD comparison for all five modulation strategies (simulations and experiments), for full linear range of the modulation index [
to 1.05 (i.e., 1 for CBPWM0)].

0:05

m=
Fig. 10. Zoomed extracts from phase voltage and current spectra: experimental
. (a) Phase voltage spectrum. (b) Motor current
results for CBPWM1,
spectrum.

m = 0:4

Fig. 9. Motor current THD comparison for all five modulation strategies (simulations and experiments), for full linear range of the modulation index [
to 1.05 (i.e., 1 for CBPWM0)].

0:05

m=

producing) plane are governed by

and
, respectively [28], where the symbols stand for the stator and rotor
leakage inductances. CBPWM1 strategy is taken as an example
for further analysis. Phase voltage spectrum of Fig. 7 and current spectrum, obtained experimentally, are shown in Fig. 10
(note the -axis scaling). Mapping of the significant harmonics
is defined with numbers 1 and 2. Number 1 stands for
harmonics that map into the first plane, while 2 denotes harmonics that map into the second plane [see Fig. 10(a) and (b)].
For all five compared modulation strategies, the most significant harmonics of the phase voltage in the second side-band are
greater than the most significant harmonics in the first side-band
(see Fig. 7). However, according to the mapping of the harmonics and Fig. 10, one can see that the most significant harmonics in the first side-band map into the second plane (that has
lower impedance), while those highest in the second side-band
map into the first plane (that has higher impedance). This means
that, in the current spectrum, the highest harmonics from the
second side-band will have much smaller influence than those
from the first side-band [see Fig. 10(a) and (b)]. In Figs. 7(a)(e)
the smallest harmonics in the first side-band are present for the
CBPWM2 and SVPWM2 modulation strategies [see Fig. 7(c)
and (e)], while those in the second side-band are all similar. It

is therefore obvious that these two modulation strategies have

smaller current THD value than the other strategies, as confirmed by the THD in Fig. 9 for the considered modulation index
.
of
One can see in Fig. 10(b) that small amounts of harmonics
are present at low frequencies (3rd, 7th, etc.) in the phase current spectrum. This is a consequence of the dead-time effect
[27], which is in the current hardware around 6 s, and which is
not compensated. The drive is controlled in open-loop manner,
without closed current control loops, leading to appearance of
these small current harmonics.
As noted already, at higher modulation indices, waveforms
of voltages and currents are practically the same for all PWM
methods. As an example, Fig. 11 illustrates oscilloscope recordfor the
ings of the phase voltage and motor current at
SVPWM2.
Variation of the CMV has been at first analysed by examining the amount of the fifth harmonic in it as a function of the
modulation index, for all PWM techniques. This is illustrated
in Fig. 12. As expected, CBPWM0 has practically zero value
of the fifth harmonic throughout the linear modulation region.
For CBPWM1 the 5th harmonic magnitude increases with modpractically linearly. Other modulation strateulation index
gies have different dependences, as is evident in Fig. 12. One
can see that the SVPWM2 modulation strategy is characterized
with a smaller 5th harmonic, when compared to SVPWM1, in
the whole modulation index range (as noted, this was the basic
idea for developing SVPWM2, [22]).
Harmonic distortion (HD) of the CMV is analyzed as well.
HD is calculated using
(5)
where

represents the -th harmonic of the CMV, and

is the magnitude of the fundamental leg voltage. Param-

DORDEVIC et al.: COMPARISON OF CARRIER-BASED AND SPACE VECTOR PWM TECHNIQUES

Fig. 11. Experimentally recorded phase voltage (a) and current (b) for
. Scales: 150 V/div and 0.5 A/div.
SVPWM2 at

m=1

617

Fig. 13. Experimental results: variation of HD for CMV against the modulation
index for considered five PWM strategies.

TABLE III
AN APPROXIMATE ALGORITHM COMPLEXITY COMPARISON BY THE NUMBER
OF OPERATIONS

Fig. 12. Experimental results: variation of the fifth harmonic in the CMV
against modulation index for considered five PWM strategies.

eter again limits HD calculation to the first 10 side-bands (up

to 21 kHz). All modulation strategies have very similar CMV
HD values, as can be seen in Fig. 13. It is interesting to note
that SVPWM2 modulation strategy, which was originally developed to reduce CMV variations and which has the lower fifth
harmonic value than SVPWM1, has actually higher HD in the
whole modulation index range.
Complexity of the algorithms has been analyzed by comparing the estimated number of different operations per
switching cycle and through the measurement of the execution
time on dSpace using dSpace Profiler tool. Comparison of
the arithmetic operation number is shown in Table III (logical
operations are not included) up to the stage at which reference
leg voltages are created. The data in Table III correspond to
how the algorithms have been implemented and should not be
taken as benchmark values, since different ways of realization
may result in a different number of operations. Nevertheless, it
is obvious from the given data that the algorithm complexity
increases in the order in which the PWM techniques are listed.
The same conclusion is arrived at by measuring the algorithm execution time on the real-time hardware dSpace ds1006

with Profiler tool. The execution time of all carrier-based strategies is very similar and is around 0.7 s in each switching period. Execution time for the two SVPWM strategies is also similar, around 1.65 s. Thus the analysed SVPWM strategies ask
for around 2.3 times higher execution time than CBPWM, on
average. Another important issue is the memory consumption.
Carrier-based strategies do not require any memory storage. On
the other hand, SVPWM1 and SVPWM2 strategies require 600
integer and 500 real variables, and 840 integer and 700 real variables, respectively, to be stored in the memory. In the actual
realization of the SVPWM algorithms, memory consumption is
deliberately sacrificed to achieve a reduction in the computation
time of the algorithm.
Finally, Table IV provides a comparison of the major characteristics of all the considered modulation strategies. As expected, carrier-based techniques are more favorable for the realworld implementation. Also, an extension to higher numbers of
levels and phases is straightforward, which is in huge contrast
to SVPWM strategies where each pair of the number of levels
and number of phases has to be considered separately.
IV. CONCLUSION
A comprehensive analysis of the five modulation strategies
for a five-phase three-level variable-speed drive system is given
in the paper. Three carrier-based and two space vector modulation strategies are compared. The reason for choosing the
level-shifted carriers with carriers in phase (PD-CBPWM), for

618

IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS, VOL. 9, NO. 2, MAY 2013

TABLE IV
MAIN CHARACTERISTICS OF THE COMPARED MODULATION STRATEGIES

comparison with space vector strategies, is explained. Simulation and experimental results are shown to be in excellent agreement. Identical output characteristics are obtained for one carrier-based strategy (CBPWM2) and one space vector modulation strategy (SVPWM2). However, the execution time of the
space vector strategy, even after minimization of the number of
calculations by storing as many as possible data in the memory,
is still more than two times higher than for the carrier-based
method. All analyzed strategies are characterized with the same
phase voltage THD in the whole linear modulation index range.
Comparison of the current THD shows that the two already mentioned modulation strategies, CBPWM2 and SVPWM2 (that
equally share the time of application of the redundant space
vector), have the smallest current THD. Hence, taking all relevant aspects into consideration, CBPWM2 is the best for realworld applications.
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DORDEVIC et al.: COMPARISON OF CARRIER-BASED AND SPACE VECTOR PWM TECHNIQUES

Obrad Dordevic (S11) received the Dipl. Ing.

degree from the University of Belgrade, Belgrade,
Serbia, in 2008.
From 2008 to 2009, he was with the Digital Drive
Control Laboratory of the University of Belgrade.
Since 2009, he has been with the Liverpool John
Moores University, Liverpool, U.K., as a Ph.D.
student. His main research interests are in the areas
of power electronics, electrostatic precipitators, and
advanced variable speed drives.

Martin Jones received the B.Eng. (First Class

Honors) and Ph.D. degrees from the Liverpool John
Moores University, Liverpool, U.K., in 2001 and
2005, respectively.
He was a Research Student at the Liverpool John
Moores University from September 2001 to 2005. He
is currently a Reader at the same university.
Dr. Jones was a recipient of the IEE Robinson Research Scholarship for his Ph.D. studies.

619

Emil Levi (S89M92SM99F09) received the

M.Sc. and Ph.D. degrees from the University of Belgrade, Belgrade, Serbia, in 1986 and 1990, respectively.
From 1982 until 1992, he was with the Department
of Electric Engineering, University of Novi Sad. He
joined Liverpool John Moores University, Liverpool,
U.K., in May 1992, and has been a Professor of Electric Machines and Drives since September, 2000.
Dr. Levi serves as Coeditor-in-Chief of the IEEE
TRANSACTIONS ON INDUSTRIAL ELECTRONICS, as an
Editor of the IEEE TRANSACTIONS ON ENERGY CONVERSION, and as Editor-inChief of the IET Electric Power Applications. He is the recipient of the Cyril
Veinott Award of the IEEE Power and Energy Society for 2009.