64 (2010) 774 -- 778

Int. J. Electron. Commun. (AEU)

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Int. J. Electron. Commun. (AEU)

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LETTER

A new CMOS dual-X second generation current conveyor (DXCCII) with an FDNR circuit
application
F. Kacara , B. Metinb, , H. Kuntmanc
a

Department of Electrical and Electronics Engineering, Istanbul University, Istanbul, Turkey

Department of Management and Information Systems, Bogazii University, 34342 Bebek, Istanbul, Turkey
c
Department of Electronics and Communication Engineering, Istanbul Technical University, Istanbul, Turkey
b

A R T I C L E

I N F O

Article history:
Received 1 September 2008
Accepted 1 May 2009

Keywords:
Dual-X second generation current conveyor
DXCCII
FDNR
MOSFET-C
Frequency dependent negative resistance

A B S T R A C T

In this paper, a new CMOS high performance dual-X second-generation current conveyor (DXCCII) is
presented. The proposed DXCCII provides good linearity, high output impedance at Z terminals, and
excellent outputinput current gain accuracy. Besides the proposed DXCCII circuit operating at a supply
voltage of 1.5 V. Moreover, a tunable novel lossless frequency-dependent negative resistance (FDNR)
circuit employing only a single active element and three passive components is firstly proposed in this
study. The applications of the DXCCII and FDNR to realize a current-mode fifth-order elliptic filter are
given. The proposed DXCCII and its applications are simulated using CMOS 0.35 m technology.
2009 Elsevier GmbH. All rights reserved.

1. Introduction
The current-mode active building blocks like second-generation
current conveyors (CCII), current-feedback op-amps (CFOA) [14]
received considerable attention due to their larger dynamic range
and wider bandwidth. In addition, different additional types currentmode active elements like first-generation current-conveyor (CCI),
differential voltage current conveyor (DVCC), differential difference
current conveyor (DDCC), third-generation current-conveyor (CCIII),
four terminal floating nullor (FTFN) and DXCCII are presented in the
literature [416]. In this paper, we propose a new implementation
of DXCCII that provides high output resistance at terminals Zp and Zn
is presented using active-feedback cascode current mirror (IAFCCM)
[17]. The proposed DXCCII is compared with the classical DXCCII
[16]. The resistances at terminals Zp and Zn of the proposed DXCCII
are calculated and compared with the classical DXCCII, theoretically.
The CCII has received great interest in integrated continuous-time
filter design since it was first proposed [14]. Integrated continuoustime filters require tuning so as to compensate for deviations due
to process tolerances, parasitics, temperature, aging, etc. Some CCII
based filters can achieve electronic tunability using controlled CCII
(CCCII) [13]. However, the DXCCII also provides tunability with aid of
a triode MOSFET, while keeping large-signal linearity high different
from CCCII [15,16].
Corresponding author. Tel.: +90 212 359 4506, +90 212 359 4507.
E-mail addresses: fkacar@istanbul.edu.tr (F. Kacar), bilgin.metin@boun.edu.tr
(B. Metin), kuntman@itu.edu.tr (H. Kuntman).
1434-8411/$ - see front matter 2009 Elsevier GmbH. All rights reserved.
doi:10.1016/j.aeue.2009.05.007

The FNDRs are useful elements for the synthesis and design of
active filters. The second generation current-conveyors are very attractive for the realization of FDNRs [1826] as a result of their wider
signal bandwidths, greater linearity and larger dynamic range of operation. In this study, to demonstrate circuit synthesis capability of
the DXCCII, a tunable lossless FDNR circuit is proposed employing
minimum number of active and passive element components. Unlike
from other minimal realization [27], the proposed circuit provides
electronic tunability using a triode MOSFET transistor. The performance of the FDNR is demonstrated on an example of fifth-order
elliptic filter design. The theoretical results are verified on the fifthorder elliptic filter with PSPICE simulations.
2. Dual-X second generation current conveyor
The DXCCII is conceptually a combination of the regular CCII [14]
and the inverting current conveyor (ICCII) [9]. The DXCCII symbol is
illustrated in Fig. 1. It has two X terminals, namely Xp (non-inverting
X terminal) and Xn (inverting X terminal). The Xp and Xn terminal
currents are reflected to the respective Z terminals, namely Zp and
Zn . (It is worth emphasizing that, for this device, there is no direct
relation between the Zp and Zn terminal currents.)
The terminal relationship of the DXCCII shown in Fig. 1 can be
characterized with the following equations:
VXp = 1 VY ,
IZn = n IXn ,

VXn = 2 VY ,
IZp = p IXp ,

IY = 0,
(1)

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775

where ideally 1 = 2 = 1, n = p = 1 and they represent the voltage

or current transfer ratios of the DXCCII.

of this DXCCII is much higher. The output resistance at terminal Z

of the proposed high performance DXCCII shown in Fig. 3 can be
calculated as

3. Proposed CMOS realization

RZn = [gm24 gm22 rds23 rds32 (rds22 //rds20 )]//

The CMOS realization of the classical DXCCII is shown in Fig. 2

[15,16]. The Zn output resistance of the DXCCII can be found as
RZn = (rds14 )//(rds20 ).

(2)

The classical DXCCII is expected to have a suitable current and

voltage transfer accuracy in most applications. However the output
resistance of DXCCII can further be improved to enable easy cascading of DXCCII based circuits in current-mode operation.
To increase the output resistance a new DXCCII based on using
improved active-feedback cascode current mirror (IAFCCM) [17] in
the output stages of the conveyor is proposed. The proposed high
performance DXCCII is shown in Fig. 3. A major advantage of IAFCCM
circuit is that the output conductance and the feedback capacitance
are 100 times lower than the standard current mirror circuit [17].
Although the number of transistors used in the structure of the proposed DXCCII is larger than the classical one, the output resistance

[gm32 gm30 rds31 rds32 (rds30 //rds28 )].

(3)

4. Simulation results
The performance of the proposed DXCCII is verified and compared
with classical DXCCII using the SPICE simulation program. The MOS
transistors are simulated using TSMC CMOS 0.35 m process model
parameters. The aspect ratios of the transistors are given in Table 1.
The supply voltages are given by VDD =VSS =1.5 V. The main DC and
AC characteristics of the classical and proposed high performance
DXCCIIs, such as plots of VX against VY , plots of IZ against VY , frequency responses of VX /VY and IZ /IX are obtained. The DC transfer
characteristics of VX against VY for classical and proposed DXCCIIs
are shown in Fig. 4. The input voltage is applied on terminal Y. The
output voltage is then obtained on terminal X, with an infinite load

Table 1
Transistors aspect ratios for the proposed circuit.
Transistors
M1 M2
M3 , M7 M8
M4 M5
M6 , M9 M10
M11 M48

W (m)

L (m)

1.4
2.8
2.4
4.8
9.6

0.7
0.7
0.7
0.7
0.7

Fig. 1. The symbol of the DXCCII.

Fig. 2. Classical dual-X second generation current conveyor [15].

Fig. 4. Relation between VY and VX for classical and proposed DXCCII.

Fig. 3. The proposed high performance dual-X second generation current conveyor.

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Fig. 5. Relation between IX and IZ for classical and proposed DXCCII.

Fig. 8. Frequency response of the output impedance at Zp terminal for classical and
proposed DXCCII.

Table 2
Circuit performances of the classical and proposed DXCCII.
Parameter

Classical DXCCII

Proposed DXCCII

Linear VX range
Linear IZ range
VX /VY gain ()
IZ /IX gain ()
f3 dB (VX /VY ) (GHz)
Output resistance (RZ ) (6)

360 mV, +400 mV

90 A, +110 A
0.95
0.97
0.58
0.18

500 mV, +600 mV

100 A, +125 A
0.95
0.98
1.05
5.83

Fig. 6. Frequency response of VX /VY for classical and proposed DXCCII.

Fig. 9. Proposed FDNR realization using a single DXCCII.

Fig. 7. Frequency response of IZ /IX for classical and proposed DXCCII.

resistance connected at the X; output Z being grounded. The voltage

clipping limits at terminal X for the proposed DXCCII are obtained
as: VX max = 600 mV and VX min = 500 mV.
Fig. 5 shows IX IZ DC characteristics of the cascode and proposed
DXCCII for short-circuited terminals X and Z. The lower and upper
boundaries of the current IZ for the proposed DXCCII are determined
as IZp max = 125 A and IZp min = 100 A for positive Z terminal and
negative Z terminal. The frequency responses of the voltage gain
VX /VY and current gain IZ /IX are shown in Figs. 6 and 7. The f3 dB
frequencies for the proposed DXCCII are found as 1.05 and 10.35 GHz
for VX /VY and IZ /IX , respectively. The lower f3 dB frequency for the
voltage and current gains in the proposed DXCCII stems from the
higher output resistance at terminal Z. Also, Figs. 6 and 7 illustrate
that the voltage and current gains for the proposed DXCCII are closer
to unity, hence giving higher accuracy. The frequency responses of

the output impedances at terminals Z for classical and proposed of

DXCCII are shown in Fig. 8. The output resistances for the proposed
DXCCII at terminals Z (impedances at sufficiently low frequencies)
were found to be 5.83 G. The performance comparison of the classical and proposed DXCCII are summarized in Table 2. It can be seen
that the output resistances for the proposed DXCCII are much higher
than classical DXCCII.
5. FDNR element realization
This article is expected to present a new approach to the FDNR
implementation using dual-X current conveyor. The frequencydependent negative resistances (FNDRs) are useful elements for
the synthesis and design of active filters. Many FDNR circuits have
been presented in the literature such as [1827]. However, the presented FDNR active realization has the advantage of using a single
active element and tunability. The proposed frequency-dependent
negative resistor simulator is shown in Fig. 9. The tunable version
of the presented FDNR using MOSFET-C technique is shown in
Fig. 10. The impedance transfer function is given for the ideal case

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777

Fig. 10. Proposed tunable MOSFET-C FDNR realization using a single DXCCII.

Fig. 12. Transformation of low-pass filter for FDNR realization: (a) the LC elliptic
ladder filter and (b) the prototype circuit.

Fig. 11. Frequency response of the tunable MOSFET-C FDNR.

(1 = 2 = 1 and n = p = 1) for C1 = C2 = C as follows:

[Z] =

2
1
= 2 2 .
s2 Deq
s C R

(4)

Considering non-ideal current and voltage relations in (1), the

modified input transfer function can be calculated as follows:
[Z] =

sCR + p ((1 + sCR)1 + 2 )

.
sC(n (1 + 2 ) + p ((1 + sCR)1 + 2 ))

Fig. 13. Simulation results of the passive prototype filter and active FDNR filter.

(5)

Electronic tunability of the proposed FDNR in Fig. 10 is shown in

Fig. 11. As it can be observed from Fig. 11 the value of the resistor
decreases with the frequency. It means that the circuit operates perfect between 200 kHz and 20 MHz. When the control voltage VC was
swept through 0.91.5 V, the impedance of FDNR changed through
roughly 3339 k.
6. Design of the tuning circuitry for the proposed elliptic ladder
filter
The functionality of the proposed circuit is demonstrated on the
fifth-order elliptic filter design example shown in Fig. 12 [28]. In
this figure the presented circuit replaces the FDNR. The fifth-order
elliptic low-pass filter in [28] is modified as explained above and is
simulated using SPICE TSMC CMOS 0.35 m process model parameters. In the simulations, we have used the FDNRs in Fig. 9, which are
supplied under VDD = VSS = 1.5 V. The capacitor values are chosen
as CD21 = CD22 = 90 pF, CD41 = CD42 = 55 pF, CS = CL = 100 pF. The resistors have the following values: R1 = 1562 , R2 = 836 , R3 = 1554 ,
R4 = 3320 , R5 = 886 , R01 = 1.6 k  and R02 = 1.9 k . The fifthorder elliptic filter function designed as explained above has a cutoff frequency of 1.59 MHz and a pass-band ripple of 1 dB. PSPICE
simulation result of the filter is given in Fig. 13. The deviations in
the cut-off frequency from theoretical values are caused by the nonidealities of the DXCCIIs such as current and voltage tracking errors,

Fig. 14. Dependence of output current harmonic distortion on input current amplitude of the elliptic filter.

finite output and input impedances. The dependence of the output

harmonic distortion on the input signal amplitude of 200 A(p-p) is
illustrated in Fig. 14.

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7. Conclusions
A new high performance dual-X DXCCII is presented. The proposed device avails tunability with the aid of triode MOSFETs, while
keeping large-signal linearity high. Besides linearity enhancement,
the dual-X structure of the active device brings interesting features,
which help to reduce the required number of active devices and
MOSFET resistors in a MOSFET-C continuous-time filter. The proposed circuit uses improved active-feedback cascode current mirrors,
which increases output resistance at terminal Z of the DXCCII. A novel
lossless frequency-dependent negative resistance circuit employing
only a single DXCCII and three passive components is proposed. The
performance of the FDNR is demonstrated on the fifth-order elliptic
filter. The theoretical results are verified on the fifth-order elliptic
filter with PSPICE simulations. The proposed implementations can be
used for realizing electronically tunable large values of capacitances
and resistances as well as FDNRs required for designing integrated
circuit active filters.

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Acknowledgments
This work was supported by Istanbul University Research Fund
with the project code 2873. The authors would like to thank Istanbul
University Research Fund for this financial support.
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F. Kacar received his B.Sc., M.Sc. and Ph.D. degrees

from Istanbul University in 1998, 2001 and 2005,
respectively. He is currently an assistant professor at Istanbul University, Department of Electrical
and Electronic Engineering. His research interest includes analog integrated circuit design, electronic
device modeling and hot-carrier effect on MOS transistor. Dr. Kacar has authored many publications on
modeling and simulation of electron devices and
electronic circuits for computer-aided design, analog VLSI design and active circuit design.

B. Metin received the B.Sc. degree in electronics

and communication engineering from Istanbul Technical University, Istanbul, Turkey, in 1996 and the
M.Sc. and Ph.D. degrees in electrical and electronics engineering from Bogazici University, Istanbul,
Turkey, in 2001 and 2007, respectively. He is currently an assistant professor in the Management
Information Systems Department of Bogazici University. His research interests include continuous
time filters, analog signal processing applications,
current-mode circuits, computer networks and network security. He was given the best student paper
award of ELECO'2002 Conference in Turkey. He has
over 30 publications in scientific journals or conference proceedings.
H. Kuntman received his B.Sc., M.Sc. and Ph.D. degrees from Istanbul Technical University in 1974,
1977 and 1982, respectively. In 1974 he joined the
Electronics and Communication Engineering Department of Istanbul Technical University. Since 1993 he
is a professor of electronics in the same department.
His research interest include design of electronic
circuits, modeling of electron devices and electronic
systems, active filters, design of analog IC topologies. Dr. Kuntman has authored many publications
on modeling and simulation of electron devices and
electronic circuits for computer-aided design, analog VLSI design and active circuit design. He is the
author or the coauthor of 88 journal papers published or accepted for publishing in
international journals, 132 conference papers presented or accepted for presentation
in international conferences, 134 Turkish conference papers presented in national
conferences and 10 books related to the above mentioned areas. Furthermore he
advised and completed the work of nine Ph.D. students and 38 M.Sc. students.
Currently, he acts as the advisor of five Ph.D. students. Dr. Kuntman is a member
of the Chamber of Turkish Electrical Engineers (EMO).