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UG CONSULTANTS

DSP Practice Using TMS320C6x


Course Content
UNIT 1
DSP Algorithms and Processors
Overview of DSP Algorithms
Algorithm Definition
DSP Systems
Analog to Digital Conversion
Niquist Criteria
Aliasing
Anti Aliasing Filter
Sample Rate and Processor Speed
Digital to Analog Conversion
Multirate Applications
Introduction to Filters
FIR filter and their Characteristics
FIR Filters as Moving Averages
Hardware Implementation
Basic Software Implementation
Design and Implementation of FIR Filters
Basic FIR Optimizations for DSP Devices
IIR Filters
IIR Fiter Design
IIR Trade-Offs
DSP Architecture Optimization for Filter Implementation
Time Vs Frequency
DFT & FFT
Butterfly Structure
Forms of FFT Algorithm
FFT Implementation Issues
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UG CONSULTANTS
DSP Practice Using TMS320C6x
DSP Architectures
Fast, Specialized Arithmetic
MAC Unit
Parallel ALUs
Numeric Representations
High Bandwidth Memory Architectures
Data and Instruction Memories
Memory Options
High Speed Registers
Memory Interleaving
Bank Switching
Caches for DSPs
Execution Time Predictability
Direct Access Memory (dMA)
DMA Example
Pipelined Processing
Limitations
Resource Conflicts
Pipeline Control
Specialized Instructions and Addrss Modes
Circular Addressing
Bit Reversed Addressing
Examples of DSP Architecture
Low Cost Accumulator Based Architecture
Low Power DSP Architectures
Event Driven Loop Applications
A DSP with Idle Modes
High Performance DSP
VLIW Load and Store DSP

UG CONSULTANTS
DSP Practice Using TMS320C6x

UNIT 2
Code Composer Studio (Version 3 .1and 4.1)
Software Development Tools for C6x: Code Composer Studio (CCS)
Developing a Simple Program
o

Create/Open a new project

Adding the required files to the project

Build, Load Program and Run the project

Execution: Run, Halt, Step into, Step over etc

Debugging a project using CCS


o

Add/remove Breakpoint

Viewing variables and changing their values by using watch window

View Memory and CPU Registers

View Disassembly

Viewing the Call Stack

Additional features of CCS


o

Adding a probe point for File I/O

Displaying Graphs

Creating a Library Project

Profiling the program

UNIT 3
Fixed Point and Floating Point Data Formats
Data Formats and Computational Accuracy in DSP Implementations
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Signed twos complement integer representation of data

Fixed Point and Floating Point data formats

Fixed Point Arithmetic


o

Fixed Point Addition (Numbers with same Q format)

Fixed Point Subtraction (Numbers with same Q format)

UG CONSULTANTS
DSP Practice Using TMS320C6x

Fixed Point Addition (Numbers with same different format)

Fixed Point Multiplication (Numbers with same Q format)

Q Values in the Watch Window of CCS.

Fixed Point and Floating Point Processors


Dynamic Range and Precision
DSP Algorithms and their Fixed Point C Implementation
DSP Algorithms and their C Implementation (Fixed Point and Floating Point
Implementations) on Code Composer Studio (Simulator Mode)
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Fixed Point C Coding and Issues

To determine the impulse response of a system

To implement difference Equations

Convolution & Correlation

DFT & FFT

Decimation and Interpolation

IIR and FIR Filters: Design (Using MATLAB and Fixed C implementation)

UNIT 4
Architectural Details, Addressing Modes and Instruction Set
Introduction
TMS320C6x Architecture
Buses
On-Chip Memories
Interrupts and Interrupt Vector
TMS320C67x Peripherals
External Memory Interface
Direct Memory Access
Enhanced Host-Port Interface
Multi-Channel Buffered Serial Ports
Clock Generator and Timers
General Purpose Input/Output Port
Functional Units
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UG CONSULTANTS
DSP Practice Using TMS320C6x

Fetch and Execute Packets


Pipelining
Registers

Linear and Circular Addressing Modes


o

Direct Addressing Modes

Indirect Addressing Modes

Absolute Addressing Modes

Memory-Mapped Register Addressing Mode

Register Bits Addressing Mode

Circular Addressing Mode

TMS320C6x Instruction Set


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Assembly Code Format

Types of Instructions

Assembler Directives
Linear Assembly
ASM Statement within C
C-Callable Assembly Function
Timers
Interrupts
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Interrupt Control Registers

Interrupt Acknowledgement

Multichannel Buffered Serial Ports


Direct Memory Access
Memory Considerations
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Data Allocation

Data Alignment

Pragma Directives

Memory Models

Code Improvement
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Intrinsic Functions

Trip Directive for Loop Count


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UG CONSULTANTS
DSP Practice Using TMS320C6x

Cross Paths

Software pipelining

Constraints
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Memory constraints

Cross-Path Constraints

Load/store Constraints

Pipelining Effects with More Than One EP within an FP

UNIT 5
Introduction to DSP BIOS
Real-Time System Concepts
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Define the topology common to most DSP systems

List factors involved in design of a real-time system

Compare and contrast tradeoffs in R/T system design

Identify where various BIOS elements apply to DSP systems

Describe the startup sequence of a BIOS based system

Hardware Interrupts (HWI)


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Describe the concepts of foreground / background processing

List details of the Idle (IDL) thread

Compare Hardware Interrupts (HWI) to ISRs

Demonstrate how to invoke Interrupt Preemption

Describe the purpose of the Interrupt Monitor

Create an HWI object using CCS Gconf tool

Add an idle thread to a given CCS project

Lab: Observe performance of HWI threads using CCS tools

Software Interrupts (SWI)


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Describe the basic concepts of SWIs

Demonstrate how to post a SWI

Describe the SWI object

List several SWI posting options

Define the benefit of each SWI posting method


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UG CONSULTANTS
DSP Practice Using TMS320C6x

Lab: Add a SWI to an HWI-based system

Tasks and Semaphores (TSK, SEM)


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Describe the fundamental concepts of tasks

Demonstrate the use of semaphores in tasks

Author TSK code using simple data block pointers

Create a TSK with the CCS GUI

Describe the TSK object

Explain the value of double buffers in DSP systems

Lab: Modify SWI based code to employ TSK

Multi-Threaded Systems (CLK, PRD)


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Describe the way BIOS can implement a time base

Setup a time base via the BIOS CLK module

Describe the results of invoking various BIOS CLK API

Set functions to run at a periodic rate via the PRD module

Describe how to implement delayed one-shot functions

Describe how the scheduler can be managed via BIOS API

List various BIOS scheduler management API

Lab: scheduler management API for system performance

Inter-Thread Communication (MSGQ ...)


o

Become familiar with signaling/data transfer methods in DSP/BIOS:

ATM Atomic Fxns

SEM Semaphore

LCK Lock

MBX Mailbox

QUE Queue

SCOM Synchronized Comm.

MSGQ Message Queue

BIOS Instrumentation (LOG, STS, SYS, TRC)


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Demonstrate statistical data on variables without halting the DSP

Describe why printf() is unsuitable for real-time systems

Describe how LOG_printf() overcomes this problem


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UG CONSULTANTS
DSP Practice Using TMS320C6x

Demonstrate how to use LOG_printf() in debugging

Describe how to implement trace control

Demonstrate how to perform real-time graphing

Describe the various API for responding to system errors

Lab: Incorporate/ observe R/T instrumentation into lab solution

UNIT 6
Optimization Methods
Optimizing DSP Implementation
What is Optimization
The Process
Making the Common Case Fast
Make the Common Case Fast DSP Architectures
Make the Common Case Fast DSP Algorithms
Make the Common Case Fast DSP Compilers
DSP Optimization Techniques
Direct Memory Access
Using DMA
Staging Data
Pending Vs Polling
Managing Internal Memory
Loop Unrolling
Filling The Execution Units
Reducing Loop Overhead
Fitting The Loop To Register Space
Trade-Off
Software Pipelining and an Example
A Serial Implementation
A Minimally Parallel Implementation
Compiler Generated Pipeline
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UG CONSULTANTS
DSP Practice Using TMS320C6x

An Implementation with Restrict Keyword


Enabling Software Pipelining
Interrupts and Pipelined Code
DSP Compilers and Optimization
Compiler Architecture and Flow
Compiler Optimizations
Instruction Selection
Latency and Instruction Scheduling
Register Allocation
Compiler Time Options
Programmer Helping Out the Compiler
Intrinsic functions
Keywords & In-lining
Reducing Stack Access Time
Compilers Helping Out the Programmer
Summary of Coding Guidelines
Profile based Compilation
Advantages
Issues with Debugging Optimized Code

Summary of the Code Optimization Process

UNIT 7
Lab Experiments : (Simple Programming Examples Using C and ASM Codes)
Sine generation using eight points with DIP switch control.
Generation of the sinusoid and plotting with CCS
Dot product of two arrays
Loop Program Using Interrupt
Loop Program Using Polling
Sine Generation Using Polling
Sine Generation with Two Sliders for Amplitude and Frequency Control
Loop Program with Input Data Stored in Memory Buffer
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UG CONSULTANTS
DSP Practice Using TMS320C6x

Loop with Data in Buffer Printed to File

Square-Wave Generation Using Lookup Table


Ramp Generation Using Lookup Table
Ramp Generation without a Lookup Table
Echo (echo)
Echo Using Two Interrupts with Control for Different Effects
Sine Generation with Table Values Generated within Program
Sine Generation with Table Created by MATLAB
Amplitude Modulation (AM)
Sweep Sinusoid Using Table with 8000 Points
Pseudorandom Noise Sequence Generation (noise_gen)
Efficient dot product
Sum of n + (n - 1) + (n - 2) + . . . + 1 Using C Calling Assembly Function
Factorial of a number using C program calling ASM function.
Dot product using assembly program calling assembly function
Dot product using C function calling linear assembly function
Factorial using C calling linear assembly function
FIR filter implementation: Bandstop and Bandpass
Effects on Voice using Three FIR Lowpass Filters
Implementation of four different filters: LPF, HPF, BPF and BSF.
FIR implementation with pseudorandom noise sequence as input to filter.
FIR filter with frequency response plot using CCS
FIR filter with internally generated pseudo random noise as input to filter and output
stored in memory.
Two notch filters to recover corrupted input voice
FIR implementation using four different methods
Voice scrambler using filtering and modulation
Illustration of Aliasing effects with downsampling
Implementation of an inverse FIR filter
FIR implementation using C calling ASM function
FIR implementation using C calling faster ASM function.
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UG CONSULTANTS
DSP Practice Using TMS320C6x

FIR implementation using C calling ASM function implementing circular buffer.


FIR implementation using C calling ASM function implementing circular buffer in
external memory
IIR filter implementation using second order stages in cascade
Generation of two tones using two second order difference equations
Sine generation using a Difference equation.
generation of a swept sinusoid using a difference equation
IIR inverse filter
DFT of a sequence of real numbers with output from CCS window
FFT of a real time input signal using an FFT function in C
FFT of a sinusoidal signal from a table using TIs C callable FFT function.
Fast convolution with overlap-add for FIR implementation using TIs floating point FFT
functions
Graphic Equalizer
Adaptive Filter C implementation
Adaptive filter for noise cancellation
Adaptive FIR filter for system ID of Fixed FIR
Adaptive FIR filter for system ID of Fixed FIR with weights of adaptive filter initialized as
FIR bandpass.
Adaptive FIR for system identification of fixed IIR.
Adaptive predictor for cancellation of narrowband interference added to desired
wideband signal.
Sum of products with word-wide data access for fixed point implementation using C
code
Separate sum of products with C intrinsic functions using C code
Sum of products with word-wide data access for fixed point implementation using linear
ASM code
Sum of products with Double-Word load for floating point implementation using linear
ASM code
Dot product with no parallel instructions for fixed-point implementation using ASM
code.
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UG CONSULTANTS
DSP Practice Using TMS320C6x

Dot product with parallel instructions for Fixed-Point implementation using ASM code.
Two Sums of Products with Word-Wide (32-bit) Data for Fixed-Point Implementation
Using ASM Code
Dot Product with No Parallel Instructions for Floating-Point Implementation Using ASM
Code
Dot Product with Parallel Instructions for Floating-Point Implementation Using ASM
Code
Two Sums of Products With Double-Word-Wide (64-bit) Data for Floating-Point
Implementation Using ASM Code
Dot Product Using Software Pipelining for a Fixed-Point Implementation
Dot Product Using Software Pipelining for a Floating-Point Implementation.

UNIT 8
Simple Project:
Acoustic Echo Cancellation using NLMS Algorithm
Background Noise Suppression using Spectral Subtraction Method

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