Documente Academic
Documente Profesional
Documente Cultură
UG CONSULTANTS
DSP Practice Using TMS320C6x
DSP Architectures
Fast, Specialized Arithmetic
MAC Unit
Parallel ALUs
Numeric Representations
High Bandwidth Memory Architectures
Data and Instruction Memories
Memory Options
High Speed Registers
Memory Interleaving
Bank Switching
Caches for DSPs
Execution Time Predictability
Direct Access Memory (dMA)
DMA Example
Pipelined Processing
Limitations
Resource Conflicts
Pipeline Control
Specialized Instructions and Addrss Modes
Circular Addressing
Bit Reversed Addressing
Examples of DSP Architecture
Low Cost Accumulator Based Architecture
Low Power DSP Architectures
Event Driven Loop Applications
A DSP with Idle Modes
High Performance DSP
VLIW Load and Store DSP
UG CONSULTANTS
DSP Practice Using TMS320C6x
UNIT 2
Code Composer Studio (Version 3 .1and 4.1)
Software Development Tools for C6x: Code Composer Studio (CCS)
Developing a Simple Program
o
Add/remove Breakpoint
View Disassembly
Displaying Graphs
UNIT 3
Fixed Point and Floating Point Data Formats
Data Formats and Computational Accuracy in DSP Implementations
o
UG CONSULTANTS
DSP Practice Using TMS320C6x
IIR and FIR Filters: Design (Using MATLAB and Fixed C implementation)
UNIT 4
Architectural Details, Addressing Modes and Instruction Set
Introduction
TMS320C6x Architecture
Buses
On-Chip Memories
Interrupts and Interrupt Vector
TMS320C67x Peripherals
External Memory Interface
Direct Memory Access
Enhanced Host-Port Interface
Multi-Channel Buffered Serial Ports
Clock Generator and Timers
General Purpose Input/Output Port
Functional Units
4
UG CONSULTANTS
DSP Practice Using TMS320C6x
Types of Instructions
Assembler Directives
Linear Assembly
ASM Statement within C
C-Callable Assembly Function
Timers
Interrupts
o
Interrupt Acknowledgement
Data Allocation
Data Alignment
Pragma Directives
Memory Models
Code Improvement
o
Intrinsic Functions
UG CONSULTANTS
DSP Practice Using TMS320C6x
Cross Paths
Software pipelining
Constraints
o
Memory constraints
Cross-Path Constraints
Load/store Constraints
UNIT 5
Introduction to DSP BIOS
Real-Time System Concepts
o
UG CONSULTANTS
DSP Practice Using TMS320C6x
SEM Semaphore
LCK Lock
MBX Mailbox
QUE Queue
UG CONSULTANTS
DSP Practice Using TMS320C6x
UNIT 6
Optimization Methods
Optimizing DSP Implementation
What is Optimization
The Process
Making the Common Case Fast
Make the Common Case Fast DSP Architectures
Make the Common Case Fast DSP Algorithms
Make the Common Case Fast DSP Compilers
DSP Optimization Techniques
Direct Memory Access
Using DMA
Staging Data
Pending Vs Polling
Managing Internal Memory
Loop Unrolling
Filling The Execution Units
Reducing Loop Overhead
Fitting The Loop To Register Space
Trade-Off
Software Pipelining and an Example
A Serial Implementation
A Minimally Parallel Implementation
Compiler Generated Pipeline
8
UG CONSULTANTS
DSP Practice Using TMS320C6x
UNIT 7
Lab Experiments : (Simple Programming Examples Using C and ASM Codes)
Sine generation using eight points with DIP switch control.
Generation of the sinusoid and plotting with CCS
Dot product of two arrays
Loop Program Using Interrupt
Loop Program Using Polling
Sine Generation Using Polling
Sine Generation with Two Sliders for Amplitude and Frequency Control
Loop Program with Input Data Stored in Memory Buffer
9
UG CONSULTANTS
DSP Practice Using TMS320C6x
UG CONSULTANTS
DSP Practice Using TMS320C6x
UG CONSULTANTS
DSP Practice Using TMS320C6x
Dot product with parallel instructions for Fixed-Point implementation using ASM code.
Two Sums of Products with Word-Wide (32-bit) Data for Fixed-Point Implementation
Using ASM Code
Dot Product with No Parallel Instructions for Floating-Point Implementation Using ASM
Code
Dot Product with Parallel Instructions for Floating-Point Implementation Using ASM
Code
Two Sums of Products With Double-Word-Wide (64-bit) Data for Floating-Point
Implementation Using ASM Code
Dot Product Using Software Pipelining for a Fixed-Point Implementation
Dot Product Using Software Pipelining for a Floating-Point Implementation.
UNIT 8
Simple Project:
Acoustic Echo Cancellation using NLMS Algorithm
Background Noise Suppression using Spectral Subtraction Method
12