A POWER DRIVE CONTROL FOR PIEZOELECTRIC ACTUATORS

Gunnar Gnad 1), Roland Kasper 2)

1+2

Institute of Mechatronics and Drive Systems

Otto-von-Guericke-University
Magdeburg, Universittsplatz 2
39106, Germany
1
Phone (+49) 391 6712952 Fax (+49) 391 6712656 E-Mail Gunnar.Gnad@mb.uni-magdeburg.de
2
Phone (+49) 391 6718607 Fax (+49) 391 6712656 E-Mail Roland.Kasper@mb.uni-magdeburg.de
1+2
www.uni-magdeburg.de, http://imat.mb.uni-magdeburg.de
Abstract - This article presents a new switching amplifier circuit
for piezoelectric multilayer actuators, which allows a fast and
precise driving as well as the recovery of energy from the
actuator. The design of a digital controller, which was
considerably facilitated by a mixed analog digital simulation, is
presented. A model of the piezoelectric actuator is part of this
simulation. Results from simulations and measurements are
presented in this paper.

INTRODUCTION
One emerging application of power electronics is the
driving of piezoelectric actuators. These actuators can be
used for various kinds of application [1]. They are
employed for micro- and nano-positioning tasks as well as
in hydraulic and pneumatic valves, where they replace
magnetic control elements. Piezoelectric actuators have
some specific advantages such as a high resolution of the
displacement, excellent dynamic properties and an energy
consumption near zero for static or very low frequency
applications. Apart from this, they may be considered as
energy storages, i.e. the energy applied to a piezoelectric
actuator to obtain a certain displacement can be reclaimed
when the actuator is discharged.

AMPLIFIER OPERATION
From the electrical point of view, a piezoelectric actuator
can be considered as a non-linear capacitive load with
hysteresis. An appropriate drive circuit should be able to
make use of the precisely controllable displacement as well
as of the high achievable switching frequencies.
Different concepts for switching amplifiers, which allow
energy recovery from the piezoelectric actuator, were
presented in [2] and [3]. Tough both this concepts either
use a table of switching times [3] or a model of a specific
actuator [2].
Based on [2] a new drive circuit for piezoelectric actuators
has been developed. This circuit was designed for
multilayer actuators with operating voltages up to 200 V
[4].
The architecture of the switching amplifier is presented in
Fig. 1. It is composed of two separate charge pump circuits
which both can be used to transfer energy from the storage
capacitor into the actuator and vice versa.
While a transistor is switched on, the current through the
associated coil increases, transferring energy
either from the storage capacitor or from the
actuator into this coil. During the following
switch off time the energy transfer from the
coil into the actuator or the storage capacitor
respectively takes place by driving the current
through a body diode.

Fig. 1: Topology of the switching amplifier

The two coils have different inductivities as

well as different admissible maximum currents.
This results in a difference of the amount of
energy which can be stored and transferred
within a certain time. In consequence there is
one circuit dedicated to a rapid energy transfer
between storage capacitor and actuator and
another circuit for a sensitive change of the
actuator voltage. Nevertheless both circuits

may be operated simultaneously since they may both

contribute to a fast loading and unloading of the actuator.
The accuracy depends on the actuators capacity as well as
on the transistors. These cannot be switched for arbitrary
short pulses, but are opened for at least about 1 s.
With this amplifier design, challenging demands
concerning a fast and exact adjustment of the actuator
voltage and the recovery of energy from the actuator can
be met. Multilayer actuators in the capacity range of 1 F
to 10 F can be loaded from 0 to 200 V within about
100 s and 1 ms respectively. The voltage can be
controlled with an accuracy of less than 0.5 V even at
actuators with the small 1 F capacity.
As can be seen easily from Fig. 1, the potentials at the
junction of a coil to its two transistors are connected either
to the ground or the actuator potential in the case a
transistor is switched on or a body diode is conducting.
Otherwise they are only connected by the coils to the
storage capacitor. An evaluation of the voltage differences
between this potentials and the supply voltage by means of
comparators delivers the information whether a body diode
is conducting after a transistor has been switched off, i.e. if
the current through a coil has become zero. This method is
by far easier and more reliable than a direct measuring of
the currents. Consequently, a calculation of the switch off
times for the transistors can be avoided.
After the current through a body diode has become zero,
the potential between the two transistors starts oscillating
between the actuator voltage and ground before it finally
approaches to the supply voltage. This oscillation depends
on the inductivity of the coils as well as on the
capacitances of the MOSFET transistors and is damped by
an appropriate RCD-snubber circuit. It is possible to make
use of this oscillation in order to achieve a switching of the
transistors at voltage differences close to zero in order to

Fig. 2: General Composition of the amplifier system

reduce interference effects to a minimum. Since the

frequency of the oscillations and the behaviour of the
comparators are known through the simulation and
practical measurements, it is sufficient to choose a certain
lag time. The transistor will be switched on again, after the
comparator signal indicates that the current through the
coil has become zero and this lag time has passed.
CONTROLLER DESIGN
The control of the actuator voltage requires sample rates up
to 20 MHz. A FPGA (Field Programmable Gate Array),
operated at a 40 MHz clock, was selected for the controller
implementation. In [5] a library is presented which offers
very simple and fast processing elements for most common
functions. The HDL-code (Hardware Description
Language) can be hidden in a block diagram editor. Based
on these elements and state machines, HDL-code can be
generated from the control algorithm. This generated code
is used for the synthesis on the FPGA.
The actual task of the FPGA is the generation of the gate
driver signals for the four power transistors (Fig. 2). These
signals depend on the zero-current recognition for the 2
coils, since a coil is blocked until its current has become
zero. Furthermore, an enabling signal for a coil is
generated only when it is to be used for the energy transfer.
This is not necessarily the case, because small amounts of
energy are usually transported by only one of the two coils.
Depending on the difference between actual and target
actuator voltage, a decision is made which coil is to be
used. Additionally, a determination of the switch-on time
coils is required. The maximum time is predetermined by
the coils maximum admissible current. Because of the
quadratic relation between energy and coil current, the
coils should be operated at the maximum current as long as
this does not lead to an overrun or underrun of the actuator
voltage final value. The control algorithm demands a
calculation of the energy quantity which is to be
transferred into or out of the actuator. The
calculated energy difference is needed for several
comparisons. The results of these comparisons are
used as input signals for a state machine which is
applied to generate the enabling signals for the
coils. The actual gate driver signals depend on the
enable signals for the coils as well as on counters
of the switch-on time and are generated in single
small state machines for each transistor.
A comparison of the online calculated energy
difference and the energy transferred within a
certain delay time allows the transistor to be
switched off exactly at the right moment to
achieve the target voltage. In the case of loading,
the energy stored in a coil at this moment is

Fig. 3: Loading procedure state machine

included in this comparison. In the case of unloading an

extrapolation of the voltage drop into a certain time
interval required to close the opened transistor is more
adequate.
Furthermore in the case of loading the calculated energy
difference is elevated to select an operation mode, i.e. to
decide if both coils are to be used simultaneously or to
select which one is be used to reach the final value. For the
unloading process it is sufficient to evaluate voltage
differences.
The state machine which controls the load procedure is
presented in Fig. 3. It is desirable to let the coil which is
dedicated to rapid energy transfer effect pulses of maximal
length and to reduce the switch-on time of the other coil
adequately. The maximum energy quantities which can be
stored in each of the two coils are known. These are used
for a few comparisons with the calculated energy
difference. Changes in the comparison results may cause
transitions between states. The states S1 to S4 of the
loading procedure state machine each represent a maximal
pulse length for the second coil. Depending on the results
of the comparisons, the next switch-on time for the second
coil is reduced to avoid an overrun of the target voltage.

The transitions between the states S1 to S4 stand for

alterations of the enabling signals and maximum allowable
switch-on times, respectively. A reduction of the maximum
switch-on time or an abrogation of the enabling signal do
not affect a switched on transistor. These changes apply
only to the next pulse.
The states S5 and S6, which come in operation for the
approach to the final actuator voltage, represent the single
coil operation. Whenever one of these states is left the
associated transistor is stopped immediately. This is the
case when the associated comparators indicated that the
energy stored in the coil at the time plus a certain delay is
sufficient to reach the target voltage.
The state machine for the unloading procedure is less
complex, because the process of unloading is easier to
control than of loading. Since the voltage drop occurs
while a transistor is opened, for the selection of coils not
more than three states are required. It is only to decide
whether both the coils are operated simultaneously or
which one of the coils is to be used. The switching times,
which depend on the actuator voltage, are determined
outside of the state machine.

MODEL OF THE PIEZOELECTRIC ACTUATOR

The behaviour of the piezoelectric actuator can be well
reproduced by a model in VHDL-AMS.
The relation between voltage and charge of the
piezoelectric actuator are subject to a hysteresis. The
voltage-charge-relation and the voltage-elongation-relation
can be considered equivalent in the case of a prestressed

Fig. 7: Characterisation of a hysteresis curve by specified points

actuator, which is usually the fact

Charge of the actuator can be calculated by an integration
of the current. By the use of an appropriate model, the
actuator voltage can be determined by this charge.
Fig.4: Measured hysteresis curves of a piezoelectric element

Fig. 5: Measured hysteresis curve

In the modelling the major loops which limit the hysteresis

area are characterised by a polynomial approach of 3rd
order. This requires the use of four points for the
description of each loop. Two of these are the upper and
the lower endpoint of the hysteresis area. For the loading
and the unloading loop two more characteristic points
need to be arbitrarily selected. This set of points delivers
the description of the loops of the modelled piezoelectric
actuator. Such a set of points is illustrated in Fig. 7. The
specification of the major loops by four points allows an
easy adaptation of the model to different actuators.
Since the actuator is not necessarily always completely
charged and discharged the major hysteresis loop has to be
modelled as well as the inner or minor loops within the
area of the major loop. The best approach for the
calculation of minor loops is a downscaling of the major
loops, because all the loops are quite similar in their shape
as can be seen in Fig. 4 and Fig. 5.
A minor loop is calculated by downscaling of major loop
between the endpoints of the actual loop, which are the
turning points where the changes in direction between
loading and unloading occur. This method can be applied
for the calculation of each loop within the hysteresis area.

Fig. 6: Measured hysteresis curve

This results in closed loops, i.e. the loops are calculated in

a way that they go back though the last turning point, as it
is the case in the behaviour of the actuators as it can be
seen in Fig. 5.

If loops have been removed from the storage due to the

limitation to eight points, the transfer between the most
inner loop and the second minor loop is done with the
same polynomial approach as for the calculation of loops
between stored endpoints is applied. Instead of the
endpoints of the removed loops, the endpoints of the two
loops that are to be connected are used. This has only a
very slight effect on the accuracy of the model.

Fig. 8: Loops within the hysteresis area

Depending on the shape of a loop, a small inner loop may

intersect a larger outer loop. For a minor loop and the
major loop this is illustrated in Fig. 6. In this case the inner
loop is truncated at the outer one, it can not exceed the
outer loop. This is true as well for smaller loops within
other minor loops; it is not only the major loop which is
applied for truncation.
The turning points of the loops in the charging procedure
need to be stored for the calculation of the loops in the
opposite direction. In the case of a sequence of loop
becoming smaller and smaller an unlimited number of
turning points would have to be stored to ensure that the
way back though the endpoints of these minor loops could
be calculated.
In practise it is desirable to limit the number of stored
points. This is particularly true concerning the
manipulation of the storage when loops are exceeded. A
loop which has been exceeded or truncated at an outer one
does not need to be stored anymore. The storage is
manipulated adequately.
Though, at least only six points are indeed indispensable
for a modelling of the piezoelectric actuator hysteresis. The
endpoints of the major loop are required at any rate. Since
it is desired to obtain closed loops, the endpoints of the
most inner loop have to be kept too. In addition, the loop
which comprises the transition from the major loop to the
minor loops within the hysteresis area should be kept. So,
two points for this first minor loop are required. The
accuracy of the model can be improved by adding two
points for the second minor loop. Thus, finally eight points
are stored. In Fig. 8 such a set of points is illustrated.
Pup_0 and Pdown_0 are the endpoints of the major loop.
Pup_3 and Pdown_3 belong to the most inner minor loop.
The other two pairs of points describe the first and second
minor loop.

The implementation of the model in VHDL-AMS requires

further on, a recognition of changes between loading and
unloading. Oscillations of the actuator voltage of only
some millivolts are not intended to be stored as new loops.
Nevertheless, in order to avoid discontinuities, each change
of direction at first needs to be considered as the beginning
of a new loop. Therefore, after a change of direction the
storage is provisionally modified, though the old storage
values are kept. In cases where the next change of direction
occurs at a certain minimal distance to the last turning
point, a new loop is established and the new storage values
are approved. Otherwise the storage is revoked and for the
return to the rejected turning point a small polynomial is
used.
OPERATION OF THE AMPLIFIER SYSTEM
The control algorithm was tested in a mixed analog digital
simulation of the controller and the driver circuit.
In the design process of the control algorithm it is essential
to perform a simulation of the complete system, i.e. to
simulate the digital controller together with the analog
power electronic part. Therefore modelling of the
electronic part, particularly of the MOSFET transistors, is
required. The transistors models were made using the
approach presented in [6].
An appropriate modeling of the analog part also includes
the measurement of the voltages. Consequently, the
operational amplifiers filters and Analog Digital
Converters make part of the description of the analog part,
which is written in SPICE language. The controller
algorithm consists of synthesizable VHDL code. The
SPICE and the VHDL part are joined with the presented
polynomial based VHDL-AMS model of the actuator in a
mixed mode simulation [7], [8].
Fig. 9 presents the simulation results of the loading and an
unloading procedure of an actuator with a capacity of
about 2 F. The input voltage is 100 V and the actuator is
loaded from 10 V to 195 V and down to 40 V
subsequently. The diagram includes the actuator voltage,
the currents through the two coils, the driver signals for the
transistors as well as the digital signals in the controller
( FPGA ).

Fig.9: Mixed analog digital simulation

Both coils are operated to its individual maximum current.

As long as the energy difference is big enough, both coils
are operated simultaneously. Since the coil Lk is dedicated
to rapid energy transfer, the operation of the other coils Lg
is aborted first. This one is then used for the final approach
to the target voltage.
Due to zero-current-recognition by means of comparators,
a coil can be switched on again immediately, after its
current has become zero.
The generated driver signals Txx_gate_on cause the
dedicated transistors to switch on.
The signals compar_1 to compar_4 are associated to the
states S1 to S4 of the loading procedure state machine.
Compar_wLk_min and Compar_wLg_min indicate that the
energy difference is big enough for a pulse with the coils

Lk or Lg, respectively. Compar_ul_lk indicates that the

unloading is to be done using both coils.
The evaluation of the compar_x_prev_x signals allows the
transistor to be switched off exactly at the right moment to
achieve the target voltage. These signals are the results of
the comparisons of the energy difference and the energy
stored in a coil in the case of loading, or the interpolation
of the voltage drop in the case of unloading.
The simulation of the amplifier has been a key to the
design of an efficient control algorithm, because a good
understanding of the behavior of the analog circuit is
essential for the design of the controller.
Measuring of an alternation between loading and unlading
of a capacitive load of 10 F, which is part of the
amplifiers setting-up operation, is represented in Fig. 10.

Fig. 10 : Oscillogram

The oscillogram includes the actuator voltage, respectively

voltage on the capacitive load and the voltages at the
potentials between the two transistors associated to one
coil. The potential V_TT1 belongs to the coil Lk and the
potential V_TT2 to the other coil Lg. These potentials can
be connected to the actuator as well as to ground by a
switched-on transistor or by a current through the body
diode of a transistor. In consequence, these potentials
deliver information about the operation of the transistors
and the currents through the coils.
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Kasper, R., Heinemann, W., Wagner, A.:

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