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Figure 5.1:
Figure 5.2:
5.1.2.5 Polling
Technique/approach to taking care of peripheral devices.
Microprocessor checking each device in rotation at frequent intervals to see if it need
service.
The computer time spent in polling is largely wasted.
Not efficient when the processor needs to perform other tasks.
Need better system that allow processor to be free to continue normal sequential
execution and only stop to deal with a peripheral when it specially needed attention.
So that, interrupt system has been design to satisfy the requirement for external input
control and freeing the CPU from waiting for events to occur.
5.2 Interrupt
Peripheral devices demand the attention of microprocessor at various and predictable times
during normal program execution. The best example of the random need for attention is the
use of the keyboard on a computer. Every time a key is pressed, the microprocessor must
deal with an activity. Other peripheral devices such as disk drives, CRTs and printers also
need to interact with the microprocessor. Just how the microprocessor accomplishes the
task of working these devices is the subject of this device
Interrupt is a call for the microprocessor to interact or service the interrupting unit.
The interrupt will cause the computer to suspend the program being executed and jump
into a special interrupt processing program.
There are many circumstances under which it would be desirable to interrupt the normal
flow of a program in the computer to react to special event.
Example:
User command from keyboard
Command from other external input
Abnormal situation power failure
Execution of an illegal instruction
Completion signaling of an I/O task
5.2.2 Interrupt Terms
Interrupt lines (hardware)
One or more special control lines to the CPU
Interrupt request
Interrupt handlers
Program that services the interrupt
Also known as an interrupt routine or device driver
5.2.3 Interrupt Capability
Allow computer to take special actions when required.
Used to time-share the CPU between several different programs at once.
Satisfy the requirement for external input control.
Provides the desirable feature of freeing the CPU from waiting for events to occur.
Provides one or more special control lines to the central processor know as interrupt
lines.
Printer
Mouse
IRQ
IRQ
CPU
IRQ
IRQ
Keyboard
Disk Drive
Figure 5.3:
Interrupt Request
The messages sent to the computer on these IRQ lines also known as interrupt
5.2.4 Interrupt Servicing
Lower priority interrupts are held until higher priority interrupts are complete
Suspend program in progress
Save context, including last instruction executed and data values in registers, in the PCB
or the stack area in memory
Branch to interrupt handler program
Interrupt handler program action taken by the processor when an interrupt occurs.
Also known as interrupt routine.
When interrupt occurs, the processor will then execute the interrupt routine called for.
The process of determining the appropriate course of action by the interrupt handler
program (interrupt routine) is known as servicing the interrupt.
There are 4 distinct steps that microprocessor takes after an interrupt.
1. The microprocessor finished the current instruction, until the end of an instruction
cycle.
The interrupt signal will not be acknowledge until the current instruction is carried
out.
All the pertinent information about the program being suspended is saved /
preserved in a known part of memory. Either in a special area associated with
the program (process control block) or in a part of memory known as stack area.
Values of data in various registers that contain pieces of information relate to the
algorithm being carried out when the interrupt occurred.
The contents of the registers and the status of microprocessor in general must be
preserved so that it can again resume operation when the interrupt has been
serviced.
3. The microprocessor jumps to the location in memory where the interrupt service
routine has been stored and executes the routine. The address of the routine may
be fixed in the microprocessor design.
4. When interrupt routine complete its task, it would return control to the interrupted
program.
The processor returns from an interrupt. The return includes restoring the
microprocessor to its exact condition before the interrupt occurred.
All registers were restored to their original values. The information they
contained must be retrieved from memory and placed back in their respective
registers.
Finally, the program counter (PC) is loaded with retrieval address of instruction
that would have been executed if an interrupt had not occurred.
The original program would resume execution exactly where it left off.
Figure 5.4:
Servicing an Interrupt
Interrupt
Normal Execution
Suspend Operation
Store registers
Figure 5.5:
Real-time or time-sensitive
As a completion signal.
Time sharing
Figure 5.6:
Keyboard input can be processed using a combination of programmed I/O and interrupt.
Suppose a key is struck on the keyboard. This causes an interrupt to occur. The current
program is suspended, and control is transferred to the keyboard interrupt handler
program. The keyboard interrupt handler first inputs the character, using programmed
I/O, and determines what character has been received. It would next determine if the
input is one that requires special action. If so, it would perform the required action, for
example, suspending the program or freezing the data on the screen. Otherwise, it would
pass data to the program expecting input from that keyboard. Normally, the input
character would be stored in a known memory location; ready for the program to use
when it is reactivated.
When the action is complete, that is, when the interrupt has been serviced, the computer
normally restores the register values and returns control to the suspended program,
unless the interrupt specifies a different course of action. This program would be case,
for example, if the user typed a command to suspend the program being run.
5.2.5.2 Interrupt As A Completion Signal
Controlling the flow of data to an output device.
Interrupt serves to notify the computer of completion of a particular course of action.
Example:
Printer
Printer is a slow output device. The computer capable of outputting characters to the
printer much faster than the printer can handle them.
Interrupt can be used to control the flow of characters to the printer in an efficient way.
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Interrupt capability prevents the loss of output and allows the printer to control the flow of
characters to a rate that printer can accept.
Allows the CPU to perform other tasks while it waits for the printer to complete its
printing.
Figure 5.7 shows this application.
Figure 5.7:
The computer sends one or more characters at a time to the printer, depending on the
type of printer. When the printer is ready to accept more characters, it sends an interrupt
to the computer. This interrupt indicates that the printer has completed printing the
characters previously received and is ready for more characters.
In this case, the interrupt capability prevents the loss of output, since it allows the printer
to control the flow of characters to a rate that the printer can accept. Without the interrupt
capability, it would be necessary to output characters at a very slow rate to assure that
the computer did not exceed the ability of the printer to accept output. The use of an
interrupt also allows the CPU to perform other tasks while it waits for the printer to
complete its printing.
5.2.5.3 Interrupt As A Means Of Allocating CPU Time
Interrupt is used as a method of allocating CPU time to different programs that are
sharing the CPU.
The CPU can only execute one program at a time.
Time share multiple programs implies that the computer system must share the CPU by
allocating small segments of time to each program, in rapid rotation among them.
Each program is allowed to execute some instructions.
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After a certain period of time, that program is interrupted and relinquishes control to a
dispatcher program within the operating system (OS) that allocates the next block of time
to another program.
Figure 5.8 shows this application.
Figure 5.8:
The computer system provides an internal clock that sends an interrupt periodically to
the CPU.
The time between interrupt pulses is known as a quantum.
When the interrupt clock occurs, the interrupt routine returns control to the OS. OS
determines which program will receive CPU time next.
This is effective method for allowing the OS to share CPU resources among several
programs at once.
Divide by zero
Nonexistent op code
One obvious example of an external event requiring special computer action is power
failure.
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Most computers provide enough internal power storage to save the work that being
performed and to shut down gracefully, provided that the computer has quick
notification of the power failure. A power line monitor that connects to the interrupt
facility provides this capability.
The interrupt routine will save the status of programs that are in memory, close open
files, and perform other housekeeping operations that will allow the computer to
restart without loss any data. It will then halt the computer.
Another important application is when a program attempt to execute an illegal instruction
such as a divided by 0 or a nonexistent op code or when a hardware error is detected,
such as parity error.
When the error occurs it is not possible to complete the executing program.
System will attempt to recover from the error and that the appropriate personnel are
notified.
Interrupt routine can notify the user of the error and return control of the CPU to the
operating system program. You should notice that these interrupt are actually
generated from inside the CPU, whereas the other interrupt that we have discussed
so far are generated externally.
Internal interrupts are sometimes called traps or exceptions.
5.2.6 Interrupt Processing Methods
Two different processing methods are used to determine which device initiated the interrupt.
Vectored interrupt
Address of interrupting device is included in the interrupt
Requires additional hardware to implement
Polling
Identifies interrupting device by polling each device
General interrupt is shared by all devices
5.2.7 Multiple interrupts
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Figure 5.9:
Multiple Interrupts
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Addressing
Control signals
Power (sometimes)
5.4.1 Bus Characteristics
Number of separate conductors
Data width in bits carried simultaneously
Addressing capacity
Lines on the bus are for a single type of signal or shared
Throughput - data transfer rate in bits per second
Distance between two endpoints
Number and type of attachments supported
Type of control required
Defined purpose
Features and capabilities
5.4.2 Bus Categories
Parallel vs. serial buses
Direction of transmission
Simplex unidirectional
Half duplex bidirectional, one direction at a time
Full duplex bidirectional simultaneously
Method of interconnection
Point-to-point single source to single destination
Serial
1 bit transmitted at a timed
Single data line pair and a few control
lines
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length
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Plate stacked
First plate in
Stack of plate illustrating First In Concept
Plate taken off stacked
The first plate put on the stack is at the bottom. The last plate off the stack is the last
plate placed of the stack.
Stack operates by LIFO (Last In First Out)
The last byte put on the stack will be the first byte retrieved from the stack, when an
interrupt is completed, for instance.
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Stack instructions use assembly language mnemonics like PUSH, to push byte onto the
stack and PULL or POP to take a byte off the stack.
The stack builds downward.
Directions of occupied address are moving toward lower address.
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