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Lecture Notes On

Memory Management
Operating System

Saroj Kanta Misra


Assistant Proffessor

Department of Information & Technology


Gandhi Institute of Engineering & Technology
Gunupur-765 022, Odisha, India

Contents
1

Memory Management
1.1 Memory Protection . . . . . . . . . . . . . . . . . . . .
1.2 Logical versus Physical Address Space . . . . . . . . . .
1.3 Swapping . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 Memory Allocation . . . . . . . . . . . . . . . . . . . .
1.4.1 Multiple-Partition Allocation . . . . . . . . . . .
1.5 Paging . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.5.1 Paging with Translation Look-aside Boffer (TLB)
1.5.2 Protection in Paging . . . . . . . . . . . . . . .
1.5.3 shared Pages in Paging . . . . . . . . . . . . . .
1.6 Segmentation . . . . . . . . . . . . . . . . . . . . . . .

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Chapter 1
Memory Management
Memory is central to the operation of a modern computer system. Memory is a large array of
words or bytes, each with its own address.
A program resides on a disk as a binary executable file. The program must be brought
into memory and placed within a process for it to be executed Depending on the memory
management in use the process may be moved between disk and memory during its execution.
The collection of processes on the disk that are waiting to be brought into memory for execution
forms the input queue. i.e. selected one of the process in the input queue and to load that process
into memory.

1.1

Memory Protection

We can provide protection by using two registers,


Base register holds the smallest legal physical memory address.
Limit register specifies the size of the range of the process.

Figure 1.1: A pair of base and limit registers define the logical address space
For example, if the base register holds 300040 and the limit register is 120900, then the
program can legally access all addresses from 300040 through 420939(inclusive).

1.2. LOGICAL VERSUS PHYSICAL ADDRESS SPACE

Figure 1.2: Hardware address protection with Base and Limit Registers

1.2

Logical versus Physical Address Space

An address generated by the CPU is commonly referred to as a logical address, whereas an


address seen by the memory unit is commonly referred to as a physical address.

Figure 1.3: Dynamic relocation using a relocation register


The set of all logical addresses generated by a program is referred to as a logical address
space; the set of all physical addresses corresponding to these logical addresses is referred to
as a physical address space. The run-time mapping from virtual to physical addresses is done
by the memory management unit (MMU), which is a hardware device.

Memory Management Unit (MMU) is a runtime mapping for logical to physical address.

1.3. SWAPPING

1.3

Swapping

A process, can be swapped temporarily out of memory to a backing store, and then
brought back into memory for continued execution.
Switching a process from main memory to backing store is called swap out. Switching
a process from disk to main memory is called swap in.
The swap out and swap in process is called as swapping.
Swapping increases context switch.

Figure 1.4: Swapping of two processes using a disk as a blocking store

1.4

Memory Allocation

The main memory must accommodate both the operating system and the various user
processes. The memory is usually divided into two partitions, one for the resident operating
system, and one for the user processes. Memory allocation takes place in any of the fallowing
ways.
1. Single-Partition Allocation
2. Multiple-Partition Allocation
Single-Partition Allocation: If the operating system is residing in low memory, and the
user processes are executing in high memory.

1.4.1

Multiple-Partition Allocation

Multiple-Partition Allocation can be done in any of the fallowing two ways.


1. Fixed multiple partition.
2. Dynamic multiple partition

1.5. PAGING

Fixed multiple partition


One of the simplest schemes for memory allocation is to divide memory into a number of
fixed-sized partitions. Each partition may contain exactly one process. Thus, the degree of
multiprogramming is bound by the number of partitions. When a partition is free, a process is
selected from the input queue and is loaded into the free partition. When the process terminates,
the partition becomes available for another process.
Internal Fragmentation
When the allocated memory for a process is slightly larger than requested memory of the process, then this is called as Internal fragmentation.
Dynamic Storage-Allocation Problem
Initially the entire user space is created as a big hole, as processes are loaded and removed, it
may create number of holes.
When a process arrives and needs memory any of the following statergy is used to select a
free hole from the list of holes.
1. First-fit: Allocate the first hole that is big enough. Searching can start either at the
beginning of the set of holes or where the previous first-fit search ended. We can stop
searching as soon as we find a free hole that is large enough.
2. Best-fit: Allocate the smallest hole that is big enough. We must search the entire list,
unless the list is kept ordered by size. This strategy-produces the smallest leftover hole.
3. Worst-fit: Allocate the largest hole. Again, we must search the entire list unless it is
sorted by size. This strategy produces the largest leftover hole which may be more useful
than the smaller leftover hole from a best approach.
External Fragmentation
As processes are loaded and removed from memory, the free memory space is broken into
little pieces. External fragmentation exists when enough to the memory space exists to satisfy
a request, but it is not contiguous; storage is fragmented into a large number of small holes.
External fragmentation can be reduced by compaction: relocate free memory to be together in
one block

1.5

Paging

Paging is a memory-management scheme that permits the physical address space of a process
to be noncontiguous. External fragmentation is avoided by using paging.
Basic Method of Paging
The physical memory is broken into blocks of the same size called pages. The logical
memory breaks into blocks of same size called pages.
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1.5. PAGING

Figure 1.5: Paging Model of Logical and Physical Memory


When a process is to be executed, its pages are loaded into any available memory frames.
Every address generated by the CPU is divided into any two parts: a page number(p) and
a page offset(d). The page number is used as an index into a page table.
The page table contains the page number and the respective frame number.

Figure 1.6: Paging Hardware

1.5.1

Paging with Translation Look-aside Boffer (TLB)

The TLB contains only a few of the page-table entries. When a logical address is generated by the CPU, its page number is presented to the TLB.
If the page number is found, its frame number is immediately available and is used to
access memory. Finding a page number in TLB is known as TLB Hit.
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1.5. PAGING

Figure 1.7: Paging hardware with TLB


If the page number is not found in the TLB it is known as a TLB miss, and the page
number is searched in the page table and then it is added in the TLB.

1.5.2

Protection in Paging

Figure 1.8: Paging with valid and invalid bit


Memory protection in a paged environment is accomplished by protection bits associated
with each frame. When protection bit value is set to "valid," the cpu can access the respective
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1.6. SEGMENTATION

frame. When the bit is set to"invalid," the cpu cant access the respective frame.

1.5.3

shared Pages in Paging

When more then one process can share the same code (same pages), it is called sa shared pages.
Reentrant code It is non self modifying code. It never changes during execution. Hence
reentrant code can be shared among various processes.

Figure 1.9: Sharing of code in Paging

1.6

Segmentation

Every program is a collection of various segments like code, global variable, stack used,
standard library, user defined unctions, etc.
Segmentation is a memory-management scheme that supports this user view of memory.
A logical address space is a collection of segments.The logical address is consist of two
parts: segment id and an offset.
The segment table consist of segment base and a segment limit. The segment base contains the starting physical address where the segment resides in memory, whereas the
segment limit specifies the length of the segment.

1.6. SEGMENTATION

Figure 1.10: Segmentation Example

Figure 1.11: Segmentation Hardware