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VDSS
RDS(on)
ID
Pw
600 V
< 8.5
0.3 A
2W
TYPICAL RDS(on) = 8
EXTREMELY HIGH dv/dt CAPABILITY
100% AVALANCHE TESTED
GATE CHARGE MINIMIZED
NEW HIGH VOLTAGE BENCHMARK
SO-8
DESCRIPTION
The SuperMESH series is obtained through an
extreme optimization of STs well established stripbased PowerMESH layout. In addition to pushing
on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the
most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmesh products.
APPLICATIONS
SWITCH MODE LOW POWER SUPPLIES
(SMPS)
LOW POWER, LOW COST CFL (COMPACT
FLUORESCENT LAMPS)
LOW POWER BATTERY CHARGERS
ORDERING INFORMATION
SALES TYPE
MARKING
PACKAGE
PACKAGING
STS1HNK60
S1HNK60
SO-8
August 2003
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STS1HNK60
ABSOLUTE MAXIMUM RATINGS
Symbol
VDS
VDGR
VGS
Parameter
Value
Unit
600
600
30
ID
0.3
ID
0.19
1.2
IDM ()
PTOT
dv/dt (1)
Tj
Tstg
0.016
W/C
V/ns
-65 to 150
62.5
C/W
THERMAL DATA
Rthj-amb
2/8
Parameter
Test Conditions
Drain-source
Breakdown Voltage
ID = 1 mA, VGS = 0
IDSS
IGSS
Gate-body Leakage
Current (VDS = 0)
VGS = 30 V
VGS(th)
RDS(on)
Static Drain-source On
Resistance
VGS = 10 V, ID = 0.5 A
V(BR)DSS
Min.
Typ.
Max.
600
2.25
Unit
V
1
50
A
A
100
nA
3.7
8.5
STS1HNK60
ELECTRICAL CHARACTERISTICS (CONTINUED)
DYNAMIC
Symbol
gfs (1)
Ciss
Coss
Crss
Parameter
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
Test Conditions
Min.
Typ.
Max.
Unit
156
23.5
3.8
pF
pF
pF
SWITCHING ON
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
td(on)
tr
6.5
5
ns
ns
Qg
Qgs
Qgd
VDD = 480 V, ID = 1 A,
VGS = 10V, RG = 4.7
7
1.1
3.4
10
nC
nC
nC
Typ.
Max.
Unit
SWITCHING OFF
Symbol
Parameter
Test Conditions
Min.
td(off)
tf
19
25
ns
ns
tr(Voff)
tf
tc
24
25
44
ns
ns
ns
Parameter
ISD
ISDM (2)
Source-drain Current
Source-drain Current (pulsed)
VSD (1)
trr
Qrr
IRRM
Test Conditions
Forward On Voltage
Min.
Typ.
Max.
Unit
0.3
1.2
A
A
1.6
229
377
3.3
V
ns
C
A
3/8
STS1HNK60
Safe Operating Area
Thermal Impedance
Output Characteristics
Transfer Characteristics
Transconductance
4/8
STS1HNK60
Gate Charge vs Gate-source Voltage
Capacitance Variations
5/8
STS1HNK60
Fig. 1: Unclamped Inductive Load Test Circuit
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STS1HNK60
DIM.
MIN.
TYP.
A
a1
MIN.
TYP.
1.75
0.1
0.003
0.009
1.65
0.65
MAX.
0.068
0.25
a2
a3
inch
MAX.
0.064
0.85
0.025
0.033
0.35
0.48
0.013
0.018
b1
0.19
0.25
0.007
0.010
0.25
0.5
0.010
0.019
4.8
5.0
0.188
0.196
5.8
6.2
0.228
0.244
c1
45 (typ.)
1.27
0.050
e3
3.81
0.150
3.8
4.0
0.14
0.157
0.4
1.27
0.015
0.050
M
S
0.6
0.023
8 (max.)
0016023
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STS1HNK60
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
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