PIC Architecture & Assembly

Language Programming

Hsiao-Lung
H
i L
Chan
Ch
Dept Electrical Engineering
Chang Gung University, Taiwan
chanhl@mail cgu edu tw
chanhl@mail.cgu.edu.tw

Working
g register
g
(WREG)
(
)

MOVLW instruction

MOVLW K

; move literal value K into WREG

MOVLW 25H
MOVLW 7F2H ; illegal 7F2H > 8 bits (FFH), become F2H
Instruction format
16 bits

ADDLW instruction

ADDLW K
MOVLW 25H
ADDLW 34H

; ADD literal value K to WREG

OP code

Literal value

WREG register
g
and ALU using
g literal value

PIC18 memoryy access

Inside the
c chipp

up to 2 MB of
program memory

4096 registers

Program
P
Memory
Space
(a portion
of this
space is on
the c
chip)

21-bit progam address

Program
counter
(PC)

12-bit register address

PIC18
CPU
16-bit instruction bus

8-bit data bus

Data
Memory
Space
(Special
function
registers and
general
purpose
RAM))

Fi
Figure
1.3
1 3 The
Th PIC18 memory spaces
4

File register
g
(data
(
RAM))

Special functional registers (SFRs)

ALU status, timers, serial communication, I/O ports, ADC, etc

General-purpose registers (GPRs)

Data storage
g

SFRs in PIC18

File registers
g
of PIC12, PIC16, and PIC18

File register
g
allocation in PIC18

PIC18 banks and access bank

PIC18 banks and access bank (cont.)

(
)

PIC18 banks

Bank switching

4096 registers are divided into 16 banks.

Only one bank is active at a time.

When operating on a register in a different bank, bank

switching is needed.

Access bank

is created to minimize the problems of bank switching.

10

Instructions with default access bank

MOVWF instruction

F stands for a location in file register

Ex. 1
MOVLW 55H
MOVWF PORTB

; copy WREG contents to port B

Ex. 2
MOVLW 99H
MOVWF 12H

; copy WREG contents to location 12h

default
f
11

More instructions involving

g WREG and access bank

ADDWF fileReg, D

Add the contents of WREG and a file register

If D=0,, result is placed
p
in WREG
If D=1, result is placed in file register

Ex1
MOVLW
MOVWF
MOVLW
ADDWF
(ADDWF

28H
5H
56H
5H, 0
or ADDWF 5H, 1
5H, W or ADDWF 5H, F)
12

WREG, fileReg,
g and ALU in PIC18

13

ALU instructions using

g WREG and fileReg
g

14

File register
g
instructions

15

COMF instruction

Complements (inverts) the content of file register

Ex1
MOVLW 55H
MOVWF PORTB
COMF
PORTB, F

; 55H (01010101) AAH (10101010H)

Write a program to toggle PORTB continuously forever

Ans:

B1

MOVLW 55H
MOVWF PORTB
COMF
PORTB
GOTO
B

16

DECF instruction

Subtract one from the content of fileReg

Ex1
MOVLW
MOVWF
DECF
DECF

3
20H
0x20, F ; loc 20H has 2
0x20, W ; loc 20H still has 2 but WREG = 1

17

MOVF instruction

MOVF

filereg, D

Copy the content of fileReg to WREG or itself

Write a program to read data from PortB and send to

PORTC continuously
Ans:
AGAIN MOVF
MOVWF
O
GOTO

PORTB, W
PORTC
O
AGAIN

18

MOVFF instruction

Move data directly among fileReg locations

32-bit instruction

19

MOVFF instruction (cont.)

(
)

Write a program to read data from PortB and send to

PORTC continuously
Ans:
AGAIN MOVFF
GOTO

PORTB, PORTC
AGAIN

MOVFF (32-bit instruction)

20

GOTO instruction

32-bit
32
bit instruction

PIC16 has 2M of ROM space

The LSB is 0, making sure even address

21

PIC18 status register

g

(Carry from D7 bit during an ADD or SUB operation)

(Carry from D3 to D4 bit)
(Binary coded decimal (BCD) operation)
(for signed number operation)
(for signed number operation)

22

Status register
g
example
p

23

Status register
g
example
p (cont.)
(
)

24

Instruction that affect flag

g bits

25

Branch instruction using

g flag
g bits

26

Assembling
g and linking
g a PIC program
p g

27

List file

28

von Neumann vs. Harvard acrchitecture

29

Program
g
ROM width for PIC18

30

PIC on-chip
p program
p g
ROM address range
g

31

PIC18 Program
g
ROM space
p

Wake up at memory address

0000 when PIC is powered up

32

Reference

M.A. Mazidi, R.D. Mckinlay, D Causey, PIC Microcontroller

and Embedded Systems Using Assembly and C for PIC18,
Pearson Education Inc., 2008.
Han-Way Huang, PIC Microcontroller: An Introduction to
Software and Hardware Interfacing, Thomson Delmar
L
Learning,
i
2005.
2005

33