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I.
INTRODUCTION
When designing new power electronics converter two
different models are often used: time discrete model and
average model. In time discrete model current and voltage
waveforms are mathematically represented for each interval.
This model is mainly used for detailed converter analysis.
However, mathematical expressions can sometimes become
complicated and, since the model is nonlinear, it is not suitable
for the development of the control algorithm. For this reason,
a linear frequency domain model is used and an averaging is
done to get an average model. A control design engineer will
usually spend a lot of time and work hours on the
development, testing and optimization of a new design and/or
algorithm while working with one of the previously
mentioned off-line models. Furthermore, extensive
experiments and tests on target converter, which can often be
time and money consuming, can lead to new problems.
One promising alternative is using a digital real-time
simulator that is capable of emulating power electronics
hardware. Hardware-in-the-loop (HIL) simulation enables
testing of control software and hardware for power electronics
by replacing the real electrical system with a real-time
emulator. Analog and digital signals are replaced and
emulated using a virtual model. This accelerates the
development of control algorithms. Some of the advantages of
using hardware-in-the-loop simulators include safe testing
environment, ability to test the full operating range, including
failures test, repeatable testing, flexible reconfiguration and
automated testing [1]. Hardware-in-the-loop simulators are
already used in industries like automotive, aerospace, power
Vn0*
S7
S1
S3
S5
VDC/2
Lf
L1
a
+
VDC
Lf
Vab
Lf
Vbc
c
Cf
VDC/2
S8
S2
(1)
where:
Vmin = min (Van, Vbn, Vcn), and
Vmax = max (Van, Vbn, Vcn).
Vmax
Vmin 0
2 ,
V
min ,
Vmax 0
2
V
V
min
max
, otherwise
S4
Cf
Vca
L2
L3
Cf
S6
Ln
a2
1
a
a
a2
1
a
a2
a
a 2 va
1
1
a va
a 2
LPF
LPF
Figure 2. Implementation of operator a in time domain
LPF
in
in
vc T
vb
a vin
vabc zero
a 2
a va
vin
vabc negative
a
1
a2
vabc positive
a2
a
1
a
2
a
vb
vc T
vb
vc
(2)
Figure 3. Implementation of LPF in time domain
in2
s in 2
(3)
vabc
a
a2
L1
L2
L3
1
a
a2
VDC
Load
PI
PI
vd neg*
vq neg*
PI
PI
+
C
vq load vd load
+
+
vq pos*
vd pos*
iq load id load
iq inv id inv
+
+
+
+
vq load vd load
Vd pos
Vq pos
vd load vq load
id inv
iq inv
Va pos
Vb pos
Vc pos
Va pos
Va neg
Va zero
Sequence
composition
dq control loop
Vd neg
Vq neg
dq/
abc
Vabc
PWM
Equ. 4
dq control loop
ic load
ib load
ia load
ic inv
ib inv
ia inv
vc load
vb load
va load
dq/
abc
Va neg
Vb neg
Vc neg
dq control loop
Vd zero
Vq zero
dq/
abc
Va zero
Vb zero
Vc zero
abc/dq
abc/dq
abc/dq
abc/dq
abc/dq
abc/dq
abc/dq
abc/dq
abc/dq
abc/dq
abc/dq
abc/dq
Sequence
decomposition
Sequence
decomposition
Sequence
decomposition
vabc pos*
vabc neg*
vabc zero*
Sequence
decomposition
Equ. 2
Equ. 2
Equ. 2
Equ. 2
ia inv
ib inv
ic inv
va load
vb load
vc load
ia load
ib load
ic load
va*
vb*
vc*
(4)
1
s
Gc s K P K I K R 2
s
s 02
(5)
where:
0 = 2 for d and q frame, and
0 = for 0 frame.
V.
va load
400
vc load
vb load
Voltage, V
200
200
400
0,0
0,5
1,0
1,5
Time, ms
60
ia load ib load
40
Current, A
ic load
20
0
20
40
60
0,0
0,5
1,0
1,5
Time, ms
va load
400
vc load
vb load
Voltage, V
200
200
400
0,0
0,5
1,0
1,5
1,0
1,5
Time, ms
60
ic load
Current, A
40
20
0
20
40
60
0,0
0,5
Time, ms
va load
400
Table 1.
vc load
vb load
no
1
2
3
4
5
Voltage, V
200
200
400
0,0
0,5
1,0
1,5
Execution time
process
Sequence decomposition
Coordinate transformation
Control
Coordinate transformation
Sequence composition
Total (1+2+3+4+5)
PI control
50,88 s
9,36 s
18,36 s
2,88 s
7,41 s
88,89 s
PIR control
4,84 s
19,37 s
1,35 s
25,56 s
Time, ms
60
Current, A
ic load
ia load ib load
40
20
0
20
40
60
0,0
0,5
1,0
1,5
Time, ms
va load
400
vc load
vb load
Voltage, V
200
200
400
0,0
0,5
1,0
1,5
1,0
1,5
Time, ms
60
ic load
Current, A
40
20
0
20
40
60
0,0
0,5
Time, ms
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VII. CONCLUSION
In this paper a new way of developing control algorithm
using hardware-in-the-loop has been investigated. Two
different control strategies have been implemented and tested.
Special emphasis is given to measuring the execution time.
PIR controller has the advantage compared to PI controller
mainly due to lack of sequence (de)composition calculation
and less coordinate transformation calculations.
Using this way of design, the process of prototyping and
testing of complex control systems is simplified. Control is
coded on the same TI controlCARD used in the target
converter. This enables user to easy implement desired control
strategy, test various control algorithms, compare overall
exection time and load and, if necessary, further optimize
algorithm, all before actually beginning to work on a target
model.
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LITERATURE
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Hardware-in-the-loop Platform for Rapid Prototyping of Power
Electronics Systems, 2010 IEEE Conference on Innovative
Technologies for an Efficient and Reliable Electricity Supply
(CITRES), Sept. 2729, 2010, Waltham, MA, pp. 420424.
[2] Gregoire,L., Al-Haddad, K. and Nanjundaiah, G.: Hardware-in-theLoop (HIL) to reduce the development cost of power electronic
converters, 2010 International Conference on Power Electronics
(IICPE), Jan. 2830, 2011, New Delhi, pp. 16.
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