Documente Academic
Documente Profesional
Documente Cultură
2000
&
PROJECTS
01
VOLUME
IDEAS
2001
Contents
JANUARY 2001
CIRCUIT IDEAS
2001
1)
2)
3)
4)
5)
6)
CONSTRUCTION PROJECTS
1)
2)
FEBRUARY 2001
CIRCUIT IDEAS
1)
2)
3)
4)
5)
CONSTRUCTION PROJECTS
1)
2)
3)
MARCH 2001
CIRCUIT IDEAS
1)
2)
3)
4)
5)
6)
CONSTRUCTION PROJECTS
1)
2)
APRIL 2001
CIRCUIT IDEAS
1)
2)
3)
4)
5)
6)
CONSTRUCTION PROJECTS
1)
2)
Contents
MAY 2001
CIRCUIT IDEAS
2001
1)
2)
3)
4)
5)
CONSTRUCTION PROJECTS
1)
2)
JUNE 2001
CIRCUIT IDEAS
1)
2)
3)
4)
5)
6)
CONSTRUCTION PROJECTS
1)
2)
JULY 2001
CIRCUIT IDEAS
1)
2)
3)
4)
5)
CONSTRUCTION PROJECTS
1)
2)
AUGUST 2001
CIRCUIT IDEAS
1)
2)
3)
4)
5)
CONSTRUCTION PROJECTS
1)
2)
SEPTEMBER 2001
CIRCUIT IDEAS
1)
Contents
2001
2)
3)
4)
CONSTRUCTION PROJECTS
1)
2)
OCTOBER 2001
CIRCUIT IDEAS
1)
2)
3)
4)
5)
6)
CONSTRUCTION PROJECTS
1)
2)
NOVEMBER 2001
CIRCUIT IDEAS
1)
2)
3)
4)
5)
6)
CONSTRUCTION PROJECTS
1)
2)
DECEMBER 2001
CIRCUIT IDEAS
1)
2)
3)
4)
5)
6)
CONSTRUCTION PROJECTS
1)
2)
January
2001
Circuit Ideas
2001
C I R C U I T
I D E A S
ELECTRONIC STARTER
FOR SINGLE-PHASE MOTORS
SARAT CHANDRA DAS
EDI
DWIV
S.C.
lay RL2 latches even if switch S1 is subsequently opened. The other N/O contacts RL2(b) of relay RL2, on
energisation, connect the voltage developed across capacitor C2 to relay RL3,
which thus energises and completes the
supply to the motor, as long as current
passing through primary of transformer
X1 is within limits (for a 1HP motor).
When the current drawn by motor
exceeds the limit (approx. 5A), the voltage developed across the secondary of
transformer X2 is sufficient to energise
relay RL1 and trip the supply to relays
RL2 and RL3, which was passing via
the N/C contact of relay RL1. As a result, the supply to the motor also trips.
The contact rating for relays RL1
and RL2 should be 5 amperes, while
C I R C U I T
I D E A S
EDI
DWIV
S.C.
C I R C U I T
I D E A S
ften you need to connect output from more than one source
(preamplifier) such as tape recorder/player and CD (compact disc)
player to audio power amplifier. This
needs disconnecting/connecting wires when you
want to change the source,
which is quite cumbersome and irritating.
Here is a circuit that
helps you choose between
two stereo sources by
simple touch of your hand.
This circuit is so compact
that it can be fixed within
the audio power amplifier
cabinet and can use the
same power supply source.
The circuit uses just
two CMOS ICs and a few
other componenets. The
ICs used are MC14551/CD4551 (quad 2channel analogue multiplexer) and
CD4011 (quad 2-input NAND gate). When
touch-plate S1 is touched (its two plates
are to be bridged using a fingertip), gate
EDI
DWIV
S.C.
C I R C U I T
PRECISION ATTENUATOR
WITH DIGITAL CONTROL
I D E A S
EDI
DWIV
S.C.
ANANTHA NARAYAN
gain selection resistors for proper calibration to required accuracy. However, for
testing
or
trials,
use
1
per cent 100ppm MFR resistors. The
expected errors will be around 1 per cent.
To keep parts count (hence cost) to a
minimum, the common or ground is used
as the positive input terminal and one
end of resistor R1 as the negative. This is
so because the op-amp inverts the polarity as it is used in inverting configuration. This does not matter as the equipment will be isolated by the power supply
transformer and all polarities are relative. In case you want the common to be
the negative, you will have to add some
stages (IC4 and IC5 circuitry shown in
precision amplifier circuit described later).
The OP07 pinout is based on standard single op-amp 741. Any other
op-amp like CA3140, TLO71, or LF351
can be used but with offset errors in excess of 1 per cent, which is not tolerable
in precision instrumentation.
The OP07 has equivalent ICs like
A714 and LM607 having ultra-low offset voltage (<100V), low input bias
current (<10nA), and high input impedance (>100M), which are the key requirements for a good instrumentation op-amp
for use with DC inputs.
ELECTRONICS FOR YOU JANUARY 2001
2. All resistors are metal film resistors (MFR) with 1% tolerance, unless
specified otherwise.
3. C2 and C3 are ceramic disk capacitors of 0.1F = 100n value.
C I R C U I T
PRECISION AMPLIFIER
WITH DIGITAL CONTROL
I D E A S
EDI
DWIV
S.C.
ANANTHA NARAYAN
C I R C U I T
RANDOM NUMBER
GENERATOR BASED GAME
I D E A S
NA
ANJA
RUP
K. UDHAYA KUMARAN
ing frequency gradually drops and finally it stops oscillating. Thus, pin 3 of
IC4 becomes low.
Second part of the circuit comprises
three cascaded ICs, IC1 through IC3
ELECTRONICS FOR YOU JANUARY 2001
Construction
2001
C O N S T R U C T I O N
RA
UND
N. K
length of the cable provided for interconnections to the motherboard or addon cards has to be taken into account, as
there must be some slack after these are
installed and connected.) This will improve the cooling and reduce the chances of electromagnetic interference between them.
The motherboard contains sensitive components,
which can be easily damaged by static electricity.
Therefore the motherboard
should remain in its original antistatic envelope un-
Precautions
Before starting the actual assembly of
the PC system, the following precautions would help you to avoid any mishap during the assembly process:
While the motherboard has to be
fitted at a fixed place inside the PC cabinet, the locations of add-on cards (as and
when used) and the drives (hard disk
drive, floppy disk drive, and CD-ROM
drive) within the drives bay of the cabinet can be changed within certain limits. But it is better to place them far
away from each other. (Of course, the
The authors represent a combined team from
EFY and IT Solutions (India) Pvt Ltd, New Delhi
C O N S T R U C T I O N
parts list, modify the guidelines mentioned here as per the directions given in
the users manual (which is supplied with
the motherboard you may be using), since
there would be some differences between
any two makes of the motherboard.
Start the assembly only after going through this article at least once.
Only when you feel at ease, start the
assembly of your machine as per the
guidelines included in this article and
the applicable users manuals.
ELECTRONICS FOR YOU JANUARY 2001
C O N S T R U C T I O N
The motherboard
TABLE I
JP1, JP2System Bus Frequency
JP1
1
Open
JP2
1
Open
Open
1-2
Close*
1-2*
Auto*
JP15
Close*
1
Function
Unlocked*
JP4
1
1-2*
Function
Normal
Locked
2-3
CMOS Clear
Open
JP34
JP29
1
1-2*
2-3
Function
1-2*
2-3
Function
Powered by +5V*
Powered by +5V Standby
(Allows Keyboard Power On)
* Default settings
JP35
1
1
1-2*
JP36
1
2-3* (S)#
Function
AC97 Sound Enable*
2-3
1-2 (P)#
# P = Primary AMR,
S = Secondary AMR
While the processor is the most important part of the motherboard, the
motherboard itself is the most important part of the computer system. Together with the chipset, it forms the
brain of your computer.
The modern motherboards do away
with the large number of controller chips
and cards that were used in the older XT
and AT versions, such as clock generator, bus controller, timer/counter, monitor/printer adopter, FDD and HDD controllers, multi-I/O or super IDE controller card, and DMA controller. All the functions performed by these controllers/
cards (and others) are now performed by
just two or three chips and that too at
much higher speed.
The motherboard based on Intels
810/810E chipset (being used in the
present system) combines the advantage
of a multimedia (full-screen, full-motion
video with realistic graphics) and enhanced Internet performance at a budget price. With this motherboard, one
does not need separate sound, video, or
graphics enhancement cards. A block
diagram of a motherboard employing
810E chipset is shown in Fig. 1.
Key features. The main features of
the PC Partner motherboard used in this
project are shown in the accompanying
box. A layout diagram showing the relative position of the jumpers, connectors,
major components, PCI slots, and DIMM
and CPU sockets is shown in Fig. 2.
Jumper settings. Positions of various jumpers within the motherboard are
shown in Fig. 3. The jumper settings
for enabling various functions are shown
in Table I. Default settings are shown
with an asterisk mark. (Note. Leave all
these jumpers in their default setting
positions for the present project. The processor speed setting is to be done through
CMOS setup as indicated later.)
C O N S T R U C T I O N
measures approx.180mm
(width) x 330mm (height)
x 360mm (depth). The
drive bays comprise two
133.35mm (5.25-inch) exposed, one 89mm (3.5-inch)
exposed, and two 89mm
(3.5-inch) internal bays.
It has 200W SMPS of
VESTA make pre-installed
(+5V @16A, +12V @6A, 5V @0.5A, and 12V @0.5A). LEDs with
2-pin SIP connectors are provided for
power on (green and white twisted
(a)
(b)
(c)
(d)
Checking SMPS. The control console on the cabinet also has a DPDT pushbutton switch to switch on the mains
(230V AC) to SMPS of the computer and
a parallel-wired 3-pin AC socket on
SMPS for connecting AC power to the
monitor used with the PC. At this stage,
slide the shielded connectors of the four
power supply wires of the SMPS into
the corresponding connectors on the
DPDT switch as per the diagram provided on the SMPS case (top side). The
same is reproduced in Fig. 4. The white
and black wires have a return path via
blue and brown wires, respectively, when
the power supply switch is flipped on.
Connect the 3-pin power cord provided
with the cabinet to the socket at the back
of SMPS and plug 3-pin plug into the
socket of the mains supply or the UPS,
as appropriate.
Switch on the SMPS. The fan blower
inside the SMPS should start running,
C O N S T R U C T I O N
other,
this
forms
a
12-pin
Item Description
Make
AT power supAT cabinet with SMPS, power cord,
ply connector
power switch, reset switch, speaker,
with orange
LEDs, complete with connectors and
installation hardware packet.
IMIL, Chennai wire (carrying
Motherboard with Intels 810
power good
chipset PC Partner, USA along with
signal) emausers manual, CD (containing
nating from
drivers for onboard devices) and
pin 1.
headers for motherboard connectors.
The volt* (refer check-list)
PC Partner
Pentium PIII-700 Processor
Intel
ages on vari64MB (PC 100)SDRAM (168-pin DIMM)
Alpha
ous pins of
HDD (hard disk drive)
Seagate
this joint 12FDD (floppy disk drive) 3.5
Sony
pin connector
CD-ROM drive 52X with audio cable
Samsung
Keyboard
Logitech
with
their
Mouse(3-button)
Logitech
colour codes
Colour Monitor 14
LG
are shown in
USB connector bracket with 2 headers Table
II.
*list of connectors/brackets forming part of motherboard.
Check the corHeader (connectors with cables) for HDD (40-pin twin)
- one
rectness
of
Header for FDD (34-pin twin)
- one
these voltages
Header for PS/2 mouse
- one
within
the
Port bracket set with headers for:
(a) VGA (15-pin D connector ending into 16-pin FRC and
range as given
parallel port (25-pin D ending into 26-pin FRC)
- one
in Table II.
(b) Com1 and Com2 (two 9-pin D ending into 10-pin FRC) - two
Then switch
(c) Onboard AC97 sound codec (line-in, line-out, mic-in and
off the power
MIDI/game port ending into 26-pin FRC)
- one
supply and
take out the 3indicating availability of +12V supply pin plug from the mains socket. If the
to the fan. Now verify all DC outputs of AT power connector voltages are correct, you can safely assume that voltthe SMPS as follows.
There are two distinct 6-pin Molex ages in all other power connectors [4female power connectors with projection pin Molex, carrying +12V (yellow wire)
in the middle. If these are held such followed by two black wires (ground) and
that all black wires are adjacent to each +5V (red wire)] meant for various drives
TABLE IV
PARTS LIST
TABLE II
At Power Connector Pin Voltages
Pin
Voltage
Range
Wire
Pin
Voltage
Colour
1
*P. G.
4.5V (min)
Orange
7
Ground
2
+5V
+5%/-4%
Red
8
Ground
3
+12V
+5%/-4%
Yellow
9
-5V
4
-12V
+10%/-9%
Blue
10
+5V
5
Ground
Black
11
+5V
6
Ground
Black
12
+5V
*P. G. = Power good signal which is +5V (delayed, 100ms 500ms).
Range
+10%/-8%
+5%/-4%
+5%/-4%
+5%/-4%
Wire
Colour
Black
Black
White
Red
Red
Red
TABLE III
VGA VGA Out Connector CN34*
Pin Signal Name Pin Signal Name
1
Red signal
9
NC
2
Green signal
10
GND
3
Blue signal
11
NC
4
NC
12
Display data channel data
5
GND
13
Horizontal sync
6
GND
14
Vertical sync
7
GND
15
Display data channel clock
8
GND
*This connector is for the VGA display port. Connect a
VGA or higher resolution display monitor to it.
ELECTRONICS FOR YOU JANUARY 2001
Signal Name
Pin
Signal Name
1
2
3
4
5
6
7
8
9
10
11
12
13
StrobeData bit 0
Data bit 1
Data bit 2
Data bit 3
Data bit 4
Data bit 5
Data bit 6
Data bit 7
ACK
Busy
PE
SLCT
14
15
16
17
18
19
20
21
22
23
24
25
26
AFD
Error
INIT
SLCTIN
GND
GND
GND
GND
GND
GND
GND
GND
GND
C O N S T R U C T I O N
TABLE V
COM1/COM2 Serial Connectors CN4*, CN5*
Pin
Signal Name Pin
Signal Name
1
DCD
6
DSR
2
SIN
7
RTS
3
SOUT
8
CTS
4
DTR
9
RI
5
GND
10
NC
*These connectors are for the serial port
bracket. Both connectors have the same pinouts.
TABLE VI
Audio & Game Port Pin Header CN341*
Pin
Signal Name
Pin
Signal Name
Pin
Signal Name
Pin
Signal Name
1
2
3
4
5
6
7
VCC
VCC
SWC
SWA
XTC
XTA
MSOUT
8
9
10
11
12
13
14
GND
XTD
GND
SWB
XTB
MSIN
SWD
15
16
17
18
19
20
21
NC
VCC
Line-out
Line-out
GND
GND
MIC-in
22
23
24
25
26
MIC-in
NC
GND
Line-in
Line-in
*This header is for the audio port bracket. It connects audio ports-stereo line-out, stereo line-in
and microphoneand a game port (for a joystick or MIDI device) to your system.
TABLE VIII
IDE Connector Pin Definitions (J18, J19)
Pin Function
Pin Function
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
Reset IDE
Host data 7
Host data 6
Host data 5
Host data 4
Host data 3
Host data 2
Host data 1
Host data 0
GND
DRQ3
I/O WriteI/O ReadIOCHRDY
DACK3IRQ14
Addr 1
Addr 0
Chip select 0
Activity
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
GND
Host data 8
Host data 9
Host data 10
Host data 11
Host data 12
Host data 13
Host data 14
Host data 15
Key
GND
GND
GND
BALE
GND
IOCS16GND
Addr 2
Chip select 1GND
C O N S T R U C T I O N
TABLE IX
Floppy Connector Pin Definitions (JP26)
Pin Function
Pin Function
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
GND
GND
Key
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
FDHDIN
Reserved
FDEDIN
IndexMorot enable
Drive select BDrive select AMotor enable
DIRSTEPWrite dataWrite gateTrack 00Write protectRead dataSide 1 selectDiskette
TABLE X
PS/2 Mouse Connector*
Pin
Description
Pin
Description
1
Mouse data
2
NC
3
Ground
4
+5V
5
Mouse clock
6
NC
*This connector is for the optional PS/2 mouse
port bracket.
have a notch and the corresponding projection, which serves as a key so that
they can go only the correct way. The
cables used for the drives have an additional connector in the middle (for slave
in case of HDD and drive B in case of
FDD, which will be explained later). Using the tips given here, you can install
the motherboard end of the following
cables:
16-pin VGA connector CN34 (refer Table III).
26-pin parallel-port connector CN6
(refer Table IV).
10-pin serial/com ports 1 and 2,
CN4 and CN5 (refer Table V).
26-pin sound cable connector CN31
(refer Table VI).
8-pin USB connector CN7 (refer
Table VII).
40-pin IDE-1 connector for HDD/
CD-ROM drive CN1 (refer Table VIII).
34-pin FDD connector CN3 (refer
Table IX).
6-pin PS/2 mouse connector CN8
(refer Table X).
Stay tuned for the concluding part in next issue
CONSTRUCTION
NA
ANJA
RUP
&
I
ED
DWIV
S.C.
REJO G. PAREKKATTU
sually, when we enter our room triggered first and then activates an up/
in darkness, we find it difficult down counter accordingly. The BCD outto locate the wall-mounted put of the counter, at any time, represwitchboard to switch on the light. For a sents the number of persons inside the
stranger, it is tougher still as he has no room. The output of the up/down counter
knowledge of the correct switch to be is decoded by 7-segment decoder/driver
turned on. Here is a reliable circuit that and displayed on 7-sement display. Sitakes over the task of switching on and multaneously, the output of counter is
switching off of the light(s) automatically compared by 4-bit magnitude comparawhen somebody enters or leaves the room tor.
during darkness. This circuit has the folThe output of comparator remains
lowing salient features:
high as long as BCD output of counter is
It turns on the room light when- greater than zero. A logic gate is used to
ever a person enters the room, provided initiate energisation of a relay to switch
that the room light is insufficient. If more on the light when comparator output is
than one person enters the room, say, one high and it is dark outside.
after the other, the light remains on.
The light turns off only when the
The circuit
room is vacant, or, in other words, when
all the persons who entered the room have The detailed section-wise description of
left.
the circuit shown in Fig. 2 is as follows:
IR transmitter. The IR transmitter
A 7-segment display shows the numcircuit consists of an astable multivibrator
ber of persons currently inside the room.
The circuit is resistant to noise and built around NE555 timer IC1. The outerrors since the detection is based on in- put of IC1 at pin 3 is a rectangular waveform of around 36kHz frequency. This outfrared light beams.
The circuit uses commonly avail- put is used to drive two IR LEDs, which
able components and is easy to build and transmit modulated IR light at 36kHz frequency. Modulating frequency of 36 kHz
test.
The functional block diagram of the is used because the IR receiver modules
circuit is shown in Fig.1. It comprises used in this circuit respond to IR signals
36kHz IR transmitter, two IR detector modulated at 36kHz frequency. The
modules, two monostable multivibrators, multivibrator frequency can be correctly
up/down-counter, 4-bit magnitude com- adjusted with the help of preset VR1 (10
kilo-ohm). Resistor R3 is a current limitparator, 7-segment decoder display,
light sensor, and relay driver.
Two pairs of IR transceivers are
employed in order to detect whether
the person is entering or leaving the
room. When a person enters the room,
IR detector 1 gets triggered, followed
by triggering of IR detector 2. Conversely, when a person leaves the
room, IR detector 2 gets triggered, followed by triggering of IR detector 1.
A priority detector circuit determines which of the two detectors is Fig. 1: Block diagram of automatic room light
ELECTRONICS FOR YOU JANUARY 2001
CONSTRUCTION
CONSTRUCTION
CONSTRUCTION
February
2001
Circuit Ideas
2001
CIRCUIT
IDEAS
EDI
DWIV
S.C.
DHURJATI SINHA
called subscriber. When the call is established, no ring-back tone is heard by the
calling party. The calling subscriber has
then to press the asterik (*) button on
the telephone to activate the tone mode
(if the phone normally works in dial mode)
and dial extension number, say, 1, within
10 seconds. (In case the calling subscriber
fails to dial the required extension number within 10 seconds, the line will be
disconnected automatically.) Also, if the
dialed extension phone is not lifted within
10 seconds, the ring-back tone will cease.
The ring signal on the main phone
line is detected by opto-coupler MCT2E (IC1), which in turn activates the
10-second on timer, formed by IC2
(555), and energises relay RL10 (6V, 100ohm, 2 C/O). One of the N/O
contacts of the relay has been
used to connect +6V rail to the
processing circuitry and the
other has been used to provide
220-ohm loop resistance to deenergise the ringer relay in
telephone exchange, to cut off
the ring.
When the caller dials the
extension number (say, 1) in
tone mode, tone receiver
CM8870 (IC3) outputs code
0001, which is fed to the 4bit BCD-to-10 line decimal decoder IC4 (CD4028). The output of IC4 at its output pin
14 (Q1) goes high and
switches on the SCR (TH-1)
and associated relay RL1. Relay RL1, in turn, connects, via
its N/O contacts, the 50Hz extension ring signal, derived
from the 230V AC mains, to
the line of telephone 1. This
ring signal is available to telephone 1 only, because half
of the signal is blocked by diode D1 and DIAC1 (which do
not conduct below 35 volts).
As soon as phone 1 is
lifted, the ring current increases and voltage drop
across R28 (220-ohm, 1/2W resistor) increases and operates
opto-coupler IC5 (MCT-2E).
This in turn resets timer IC2
causing:
(a) interruption of the
power supply for processing
circuitry as well as the ring
CIRCUIT
ELECTRONIC CARD
LOCK SYSTEM
IDEAS
RUP
ANJA
NA
PRIYANK MUDGAL
high).
These outputs connected to address input
pins
A0
through A3
of
IC1
TABLE I
Appliance LDR2 LDR3 LDR4 LDR5
no.
1
*
*
*
2
*
*
*
3
*
*
4
*
*
*
5
*
*
6
*
*
7
*
8
*
*
*
9
*
*
10
*
*
11
*
12
*
*
13
*
14
*
15
- Blocked hole corresponding to selected binary address.
* Punched holes corresponding to LDR position on card
CIRCUIT
PULSED OPERATION OF A
CW LASER DIODE
IDEAS
EDI
DWIV
.
C
.
S
an inexpensive push-pull amplifier interface circuit. The block diagram of the system is shown in Fig. 1.
A 3mW CW diode laser at 670 nm
with voltage and current rating of 3V at
100mA, respectively, is used. The source
(a function generator) is capable of delivering square pulses of 3V amplitude, which are amplified by a
complementary symmetry pushpull circuit shown in Fig. 2.
The output of the amplifier
is connected to the diode laser
for pulsed operation. The laser
is focused onto a
photodiode terminated with 50ohm resistor (Fig.
1). The output of
photodiode is displayed on digital
storage oscilloscope
and it is
also connected to the
PC for getting a hard
copy.
Up to a frequency
of around 20 kHz, the
threshold voltage for
laser oscillations is
around 2.4V. For frequencies greater than
20 kHz, the threshold
for laser oscillations
depends on the operating frequency and is
higher than 2.4V. The
behaviour of laser pulses up to 10 kHz is
nearly similar. Laser output at a typical
frequency of 2 kHz is shown in Fig. 3, at
various voltages (2.6V, 3.4V, and 4V). The
input waveform A is shown at the bottom of the figure.
For a driving pulse of about 3V (which
is the normal operating voltage for CW
operation), the laser pulse becomes flat
after a delay of approximately 40 s (time
taken to build up the laser oscillations to
ELECTRONICS FOR YOU FEBRUARY 2001
CIRCUIT
IDEAS
CIRCUIT
IDEAS
ANJA
NA
PRAVEEN SHANKER
ing
switch
S1
momentarily
you can generate a single pulse of 5second duration. When switch S2 is
kept in b position, i.e. pins 6 and 2 are
shorted, timer 1 in NE556 triggers by
itself.
The output of the first timer is connected to trigger pin 8 of second timer,
which, in turn, is connected to a potential divider comprising resistors R4 and
R5. Resistor R1, preset VR1, resistor R2,
preset VR2, and capacitors C2 and C5
are the components determining time period. Presets VR1 and VR2 permit trim-
CIRCUIT
HIGH-/LOW-VOLTAGE
CUTOUT WITH TIMER
IDEAS
EDI
DWIV
.
C
.
S
DR D.K. KAUSHIK
his inexpensive circuit can be
connected to an air-conditioner/
fridge or to any other sophisticated electrical appliance for its protection. Generally, costly voltage stabilisers
are used with such appliances for maintaining constant AC voltage. However,
due to fluctuations in AC mains supply,
a regular click sound in the relays is
heard. The frequent energisation/deenergisation of the relays leads to electrical noise and shortening of the life of
electrical appliances and the relay/
stabiliser itself. The costly yet faultprone stabiliser may be replaced by this
inexpensive high-low cutout circuit with
timer.
The circuit is so designed that relay
RL1 gets energised when the mains voltage is above 270V. This causes resistor
R8 to be inserted in series with the load
and thereby dropping most of the voltage across it and limiting the current
through the appliance to a very low
value.
If the input AC mains is less than 180
volts or so, the low-voltage cut-off circuit
interrupts the supply to the electrical
appliance due to energisation of relay
Construction
2001
CONSTRUCTION
CONSTRUCTION
Now you may terminate the connectors originating from control panel on
the cabinet at the motherboard. Connect the loudspeaker connector to CN14,
Continued
ELECTRONICS FOR YOU FEBRUARY 2001
TABLE XI
Pin Assignment Internal Audio
Connector Internal Audio Connector
CN25 : AUX-IN
Pin
Assignment
1
AUX-L
2
GND
3
GND
4
AUX-R
CN24 : CD-IN
Pin
Assignment
1
CD-L
2
GND
3
GND
4
CD-R
CN33 : CD-IN
Pin
Assignment
1
CD-R
2
GND
3
CD-L
4
GND
CN32 : CD-IN
Pin
Assignment
1
GND
2
CD-L
3
GND
4
CD-R
CONSTRUCTION
CMOS setup
Continued
the PCI slots, using the software drivers supplied with them, can be attempted subsequently.
CONSTRUCTION
To select any other screen/setup utility option, press Esc, select the next
item from setup utility menu, and press
Enter. The next screenshot (screen shot
3) pertains to Advanced BIOS Features.
Here you may edit and change the first,
second, and third boot devices to read
CD-ROM, HDD-0, and floppy, respectively. This will enable you to boot/run
the computer from CD-ROM (if you have
a Windows installation), CD, HDD (after formatting and transferring the system files), or floppy drive (using the
startup floppy created earlier), in that
priority.
Press Esc to come back to the open-
ing screen. For the time being, skip utilities/screens 4 through 7 with their default values. Select the last Frequency/
Voltage Control menu item. Edit CPU
clock/spread spectrum item to read
100MHz/On. Thereafter press Esc and
select Save and Exit Setup or F10 key,
and then Y and Enter for saving the
edited BIOS selections.
CONSTRUCTION
Now you will be able to access CDROM drive by typing E:. After the
prompt E:\>, type Format C:/S/U/V
and press Enter. (Here C: refers to
drive to be formatted, S to system
(transfer of system files to C drive during formatting), U to unconditional, and
V to verification.) After formatting C
drive, you will come back to the prompt
E:\Win98>. Type setup and press Enter to install Windows 98 on C drive.
As the program is interactive, keep
answering the questions logically.
Choose typical while selecting the Win-
CONSTRUCTION
Ethernet
card for LAN.
Ethernet cards
capable of running at 10Mbps to
100Mbps, of different makes such
as Intel, Real Tek,
Mercury and Dax,
as Ethernet PCI
adapter are available in the market.
Each
card
comes with a bracket, driver diskette,
and user manual. The bracket would
have an LED and RJ-45 jack. This jack
is used for running a twisted-pair
unshielded cable (max. length 100
metres) between the card and the hub/
concentrator (10Base-T or 100Base-Tx)
to which other computers LAN cards
are similarly connected. Once the cable
is connected to the hub, the LED on
Ethernet card would light up. Before
installing, remove a cutout opposite the
PCI slot to make space for the bracket
of Ethernet card. When you install the
CONSTRUCTION
EDI
DWIV
S.C.
the intelligent digital liquid level controller circuit presented here. It has the
following features:
It can automatically switch on the
pump when the tank is empty and
switch it off when the tank becomes full.
It can check the ground tank
(sump tank) water level from which the
water is pumped into the overhead tank
(OHT). If the sump tank water level is
below the predetermined level, the unit
switches off the pump to protect the
pump from dry-run, even though the
overhead tank may be completely
empty.
It includes under- and over-voltage cutout to switch off the pump if the
voltage is not within specified low
(200V) and high (250V) limits.
It includes a circuit for digital dis-
CONSTRUCTION
(cathode) No. 1 is in
touch with the water,
the voltage at pin 3 of
IC1 becomes logic high
(i.e. +5V), and hence
voltage at line No. 1
(L-1) also becomes
high. Now due to conduction of diode D3,
the BCD code 0001 (Q3
Q2 Q1 Q0) is generFig. 3: Construction details of probes for mineral water
ated and converted
to
equivalent 7segment code
by
IC2
(74LS47) to
display
the
decimal digit
1.
Similarly,
when the tips
of the both sensors 1 and 2
are in touch
with water, the
voltage at pin 3
Fig. 4: Construction details of probes for non-conducting liquids
becomes logic
play of the overhead tank level to indi- low (0V) while the voltages at pin 4 and
cate water levels 0 through 4 as per line 2 (L-2) become logic high (i.e. +5V).
positions of the tips of the sensors in- Now due to conduction of diode D6, the
side the overhead tank.
corresponding BCD code 0010 is gener The sensors used in this project ated and decimal digit 2 is displayed on
have a lifetime of more than five years.
the 7-segment display.
Digital display circuit (refer
When the tank is completely empty,
Fig. 1.) This circuit comprises a quad the outputs of all XOR gates of IC1 are
2-input XOR gate IC1 (CD4030) for sum low and the display shows decimal digit
outputs, decimal to BCD code converter 0. In this way the display circuit works
using diode matrix of diodes D3 through to show decimal digits 0 through 4, corD7, a BCD to 7-segment decoder/driver responding to the level of the water, as
IC2 (74LS47), and common-anode type defined by the position of the sensors
7-segment display LTS 542R.
at different heights. Here the resistors
When only the tip of sensor probe R9 through R12 and R19 through R21
ELECTRONICS FOR YOU FEBRUARY 2001
CONSTRUCTION
PARTS LIST1
Semiconductors:
IC1
- CD4030 quad 2-input XOR
gate
IC2
- 74LS47 BCD to 7-segment
decoder/driver
IC3-IC5
- CD4001 quad 2-input NOR
gate
IC6
- LM7812 regulator 12-volt
IC7
- LM7805 regulator 5-volt
T1-T2
- SL100 npn transistor
D1-D15,
D17-D20
- 1N4001 rectifier diode
D16
- Red LED
DIS1
- LTS542R 7-segment common anode display
Resistors (all -watt, 5% carbon, unless
stated otherwise):
R1-R8
- 33-kilo-ohm
R9-R18
- 56-kilo-ohm
R19-R21
- 1.5-kilo-ohm
R22, R24
- 2.2-kilo-ohm
R23
- 1.2-kilo-ohm
R25
- 1-kilo-ohm
R26, R27
- 220-kilo-ohm
R28-R34
- 330-ohm
VR1, VR2
- 100-kilo-ohm preset
Capacitors:
C1-C4, C7 - 0.01F ceramic disc
C5
- 470F, 35V DC electrolytic
C6
- 2200F, 35V DC electrolytic
C8,C9
- 10F, 25V DC electrolytic
Miscellaneous:
RL1
- 12V, 200-ohm 2 C/O relay
X1
- 230V AC primary to
(a) 0-15V, 750 mA, and
(b) 0-12V, 100 mA secondary
transformer
S1
- Push-to-on button
S2
- On/Off switch
- IC sockets
- Heat sinks for regulator ICs
- SS304, 5mm dia. stainless
steel rod for anode and 3mm
dia. for all cathodes - of appropriate length
- Multi-core feed wire
N4 becomes logic high to make its output pin 10 go low. Transistor T1 is cut
off and the relay is kept disabled, even
though the overhead tank is fully empty.
The relay will be enabled only when the
water level in the sump tank is above
level 2'.
When the ground tank water level
is above level 2' but the line voltage is
out of range, gate N12 output pin 3 goes
low to cut off transistor T2, making diode D11 conduct. In this state the output of gate N6 and the output of gate
N2 become logic low. Although diode
D12 does not conduct, diode D11 conducts and the output of gate N4 goes
low to cut off transistor T1. This disables relay RL1 and the pump remains
CONSTRUCTION
A UNIQUE LIQUID
LEVEL INDICATOR
digital ICs, LEDs, and 7-segment display. The 12V secondary is used for sampling the mains. One of its terminals is
grounded while its other terminal,
marked G, is connected to point G of
high/low cutout circuit in Fig. 1. The
other secondary rated at 15V, 750 mA
is used for deriving the regulated DC
supplies required for operation of the
circuit.
Construction of sensors (Fig. 3).
The highlight of the circuit are its electrodes (Fig. 3) used for mineral/conductive water, which are made of stainless
steel (grade SS-304) rods. These electrodes have a life span of more than five
years. Anode is a rod of 5 mm diameter
and each of the cathodes is of 3 mm
diameter, as shown in the figure.
The cathodes and the anode should
be long enough so that their soldered
terminals are not in contact with water,
even when the tank is full. The joints
should be covered with insulation in such
PARTS LIST2
NA
ANJA
RUP
Semiconductors:
IC1-IC3
- CD 4030 quad 2-input X-OR
gate
IC4
- 74LS47 BCD to 7-segment
decoder/driver
IC5
- UM66 melody generator
DIS1-DIS3 - LTS 542 common anode
7-segment display
T1, T3, T4 - SL100 npn transistor
T2
- BC 108 npn transistor
D1-D16,
D21, D22
- 1N4001 rectifier diode
ZD1
- 3.1 volt zener diode
LED1-LED4 - Red LED
Resistors (all -watt, 5% carbon, unless
stated otherwise):
R1
- 3.3-kilo-ohm
R2-R5
- 1.5-kilo-ohm
R6-R24
- 330-ohm
R25-R34
- 56-kilo-ohm
R35-R44
- 33-kilo-ohm
R45
- 100-kilo-ohm
R46
- 2.7-kilo-ohm
R47, R48
- 680-ohm
Capacitor:
C1
- 100F, 25V electrolytic
Miscellaneous:
LS
- 8-ohms speaker 7.5 cm dia
- SS 304, 5 mm dia and 3mm
dia stainless steel rods of appropriate length for anode
and cathodes respectively.
- Multi-core feed wire
CONSTRUCTION
coder/driver
(IC4). When
the tip of
sensor-1 is in
touch with
the water,
the line (L-1)
connected to
pin 3 of IC1
(CD 4030)
goes to logic
1
state
(+5V).
W h e n
the tips of sensors 1 and 2 both touch
the water, pin 3 of IC1 goes to logic 0
(0V), while line L-2 connected to pin 4
of IC1 becomes high (+5V). Thus which
one of the lines (L-1 through L-10) will
be at logic 1 would depend on which
last sensor (counted from bottom of the
tank) is in touch with the water. If the
tank is totally empty, all the lines, L-1
through L-10, would be at logic 0.
These lines (L-1 through L-10) represent the decimal numbers 1 through
ELECTRONICS FOR YOU FEBRUARY 2001
CONSTRUCTION
Fig. 9: Actual-size, single-sided PCB for the unique liquid level indicator
March
2001
Circuit Ideas
2001
CIRCUIT
IDEAS
CIRCUIT
IDEAS
other to a screw (as shown in the figure). The complete circuit is connected
to a single pencil cell of 1.5V.
When the touch-plate gap is bridged
with a finger, the emitter-collector junction of transistor BC148 starts conduct-
EDI
DWIV
S.C.
CIRCUIT
IDEAS
NON-CONTACT LIQUID-LEVEL
CONTROLLER
EDI
DWIV
S.C.
permissible.
In resistance type sensors, the resistance is altered through some mechanical arrangement, which means a
tric conduction, or variation in resistance or capacitance principle, are employed for level sensing.
In conduction type of sensors, the
electric current passes through the liquid. The corrosion of contacts is a major problem while using DC excitation.
The cost and the size are the two restrictive factors in using AC excitation.
Further, passing current through the
liquid in combustive environments is not
large operating
force is required, which
may be a problem in small
tanks. In capacitive transducer type, the
construction
cost is high.
In
the
present project,
an easy but effective liquidlevel controller
is presented using the magnetic principle. It is non-contact type
and hence can be used in almost all applications, irrespective of whether the
liquid is conductive or not. Two reed
switches (with glass enclosure) and a
ring magnet (normally used in loudspeakers) form the sensor unit. The reed
switches used are normally-open type
and they close when placed (and oriented properly) in a magnetic field.
The electronic circuit is a simple biELECTRONICS FOR YOU MARCH 2001
CIRCUIT
IDEAS
CIRCUIT
IDEAS
The astable
multivibrator
section provides
clock pulses in
the
10
to
1000Hz range to
the
decade
counter and the
LED array section. The LEDs
are grouped into
two parts to
form two distinctive indicators. These
two groups are successively
driven by Q0 to Q4 and Q5 to Q9 outputs
of IC1. Only one of the two groups LEDs
will turn on sequentially, depending on
which of the two transistors (transistor
T3 or transistor T4) is on, which, in turn,
is dependent upon the phase sequence of
the three-phase supply. This becomes
clear from the following explanation of
AC MAINS PHASE-SEQUENCE
INDICATOR
EDI
DWIV
S.C.
CIRCUIT
work at the power-house or repair/replacement of a 3-phase transformer), the conditions are reversed (refer waveform for
IDEAS
condition 2, as observed by
EFY Lab), and Q become
high and red LEDs D11
through D20 are switched
on (sequentially) by transistor T4 to show an
anticlockwise-rotating ring.
While testing for the
phase sequence, there is no
need to keep the device on
for a long time. A push-toon read switch can be used
during the phase-sequence
testing. If the device is to
be used for long periods, use a high-capacity battery in place of PP3 battery. Also
replace 2W resistors R17 to R19 with 5W
fusible-type resistors.
The frequency of the astable
multivibrator is unimportant, except that
the speed of the LED ring must be easily
visible. Zener diodes ZD1 and ZD2 are
used for protection of transistors T5 and
T6, respectively.
Precautions. 1. Never use an AC
mains adaptor-type power supply in place
of the battery.
2. Correctly position LEDs D1
through D20 in the ring for its proper
viewing.
3. Assemble resistors R11 to R19 on
the PCB at a slightly elevated level using
ceramic beads for proper dissipation of
heat.
CIRCUIT
IDEAS
EDI
DWIV
S.C.
Both packages work equally well. However, to get the best results with the
COB package, change values of resistors R2 through R4 to 330-kilo-ohm, capacitor C4 to 0.47F, 63V electrolytic
(positive end to pin 3 of IC1), and C5 to
0.005F, 63V.
This bicycle horn project can also be
used as a telephone extra ringer by just
removing all components on the left side
of capacitor C3 and connecting the circuit shown in Fig. 2 to the terminals of
capacitor C3.
CIRCUIT
LUXURIOUS TOILET/
BATHROOM FACILITY
IDEAS
EDI
DWIV
S.C.
A.R. GIDWANI
Fig. 1
ELECTRONICS FOR YOU MARCH 2001
CIRCUIT
Fig. 2
IDEAS
though IC3 is used as MMV, it is triggered here with a positive pulse through
its pin 4 (reset pin) rather than its pin
6 (trigger pin). This arrangement makes
it unique for setting and resetting IC3
through pin 4, and resetting IC1(a)
through pin 5 of IC3 and transistor T1.
Battery backup facility ensures
memory backup during power failure.
Power supply uses a normal 2-diode fullwave rectifier circuit, which needs no
further explanation. The purpose of using bi-colour LED1 and LED2 is that,
initially when the door is closed these
emit green light as the green LED part
gets the supply via resistor R15 to indicate that bathroom/toilet is vacant.
When bathroom/toilet is occupied, transistor T3/T4 conduct to light up the red
LED part as well.
Melody generator IC4 (UM66) is
switched on through diodes D3/D4 and
transistor T5, which conducts when
IC1(a) pin 2 or IC2(a) pin 2 goes low.
When transistor T5 conducts, zener ZD1
breaks down and supplies regulated
3.9V to IC4, to produce a melodious tune
via transistor T6 and the speaker.
As most toilets and bathrooms are
attached nowadays, only a single circuit is required, and the circuit can be
wired on a general-purpose veroboard.
A small modification of the circuit,
by adding additional SPST switch S3,
as shown in Fig. 2, needs to be done
inside the wooden switchboard box. This
permits the user to operate the lamp
and fan during cleaning of the toilet or
for bypassing the circuit, when bathroom or toilet undergo repair work.
Construction
2001
CONSTRUCTION
SHAILA GHANTI
Strobe (STR)
Auto Feed (AF)
Device Select (DSL)
Initialise (INIT)
In
In
In
In
11
13
32
12
19 to
30, 33
Busy (BSY)
Select (SEL)
Error (ERR)
Paper end (PE)
Out
Out
Out
Out
Ground
be printed and stores them in an internal buffer. When the printer detects a
carriage return (0dH), it prints out the
first row of characters from the printer
buffer. When the printer detects a second carriage return, it prints out the
second row of characters. The process
continues until the desired characters
are printed.
Transfer of ASCII
codes from the microprocessor to a printer
needs to be done on
a handshake basis because the microprocessor can send characters much faster
than the printer can
print them.
The printer
must in some
way let the microprocessor
know that its
buffer is full,
and it cannot
accept
any
more characters until it
prints
out
some of the already stored
characters. A
common standard for interfacing with
parallel printers is the
Centronics interface.
Centronics
interface
Centronics
printers usually have a 36pin interface
connector. The
pin
assignments of the
significant
pins
of
Centronics interface connector, used in
this project,
CONSTRUCTION
Instructions
Code Comments
Memory
location
7112
XCHG
1B
7157
7158
7159
715A
715B
715C
715D
715E
715F
7160
7161
7162
7163
7164
7165
7166
7167
7168
7169
716A
716B
716C
716D
716E
716F
7170
7171
7172
7173
7174
7175
7176
7177
7178
7179
717A
717B
717C
717D
717E
717F
7180
7181
7182
7183
7184
7185
7186
7187
7188
7189
718A
718B
718C
718D
718E
718F
7190
7191
7113
7114
7115
7116
7117
7118
7119
711A
711B
711C
711D
711E
711F
7120
7121
7122
7123
7124
7125
7126
7127
7128
7129
712A
712B
712C
712D
712E
712F
7130
7131
7132
7133
7134
7135
7136
7137
7138
7139
713A
713B
713C
713D
713E
713F
7140
7141
7142
7143
7144
7145
7146
7147
7148
7149
714A
714B
714C
714D
714E
714F
7150
7151
7152
7153
7154
7155
7156
LXI D 2A20
MOV A,H
CALL 70FC
MOV A,H
CALL7100
MOV A,L
CALL 70FC
MOV A,L
CALL 7100
MOV A,M
CALL 70FC
MOV A,M
CALL 7100
INX H
MOV A,M
CPI CF
JNZ 7116
MVI A,43
STAX D
INX D
MVI A, 46
STAX D
DCX D
LXI H 2A20
MVI A, 82
OUT 0B
MVI A, 0B
OUT 0B
CALL 7200
MVI A,05
OUT 0B
IN 09
ANI 02
CPI 02
JNZ 714F
11
20
2A
7C
CD
FC
71
7C
CD
00
71
7D
CD
FC
70
7D
CD
00
71
7E
CD
FC
70
7E
CD
00
71
23
7E
FE
CF
C2
16
71
3E
43
12
13
3E
46
12
1B
21
20
2A
3E
82
D3
0B
3E
0B
D3
0B
CD
00
72
3E
05
D3
0B
DB
09
E6
02
FE
02
C2
4F
Instructions
MVI B,04
CALL 7220
INX H
DCR B
JNZ 715A
MVI A, 20
OUT 08
MVI A,09
OUT 0B
MVI A,08
OUT 0B
MVI C,02
CALL 7220
INX H
DCR C
JNZ 7170
MVI A, 0A
OUT 08
MVI A,0D
OUT 08
MVI A,09
OUT 0B
MVI A,08
OUT 0B
MOV A,E
XRA L
JNZ 7158
MOV A,D
XRA H
JNZ 7158
RST 1
Code
71
06
04
CD
20
72
23
05
C2
5A
71
3E
20
D3
08
3E
09
D3
0B
3E
08
D3
0B
0E
02
CD
20
72
23
0D
C2
70
71
3E
0A
D3
08
3E
0D
D3
08
3E
09
D3
0B
3E
08
D3
7B
Ad
C2
58
71
7A
AC
C2
58
71
CF
Comments
CONSTRUCTION
Memory
location
7106
7107
7108
7109
710A
710B
710C
710D
Instructions
ADI 07
ADI 30
STAX D
INX D
RET
Code Comments
Memory
location
Instructions
Code Comments
70
C6
07
C6
30
12
13
C9
722E
722F
7230
7231
7232
7233
7234
7235
7236
7237
7238
7239
723A
723B
723C
OUT 08
D3
08
3E
08
D3
0B
3E
09
D3
0B
3E
08
D3
0B
C9
0E
FF
0D
C2
02
72
C9
Add 07 to data
Else add 30H to data to convert data
into ASCII code.
MVI A,08
OUT 0B
MVI A,09
OUT 0B
MVI A,08
OUT 0B
RET
Hex code
310095
11209D
EB
9007 11209A
900A 7C
900B
900E
900F
9012
9013
9016
9017
901A
901B
901E
901F
9022
9023
9024
9026
9029
902B
902C
902D
902F
9030
9031
CDFC90
7C
CD0091
7D
CDFC90
7D
CD0091
7E
CDFC90
7E
CD0091
23
7E
FECF
C20A90
3E43
12
13
3E46
12
1B
21209A
9034
9036
9038
903A
903C
903E
9040
9043
9045
9047
3E82
D30B
3E30
D30A
3E10
D30A
CD0092
3E30
D30A
3E02
Label
X1:
Mnemonics
Remarks
LXI SP,9500H ;Initialise stack pointer
LXI D,9D20H ;Store location where
XCHG
;data to be printed starts
;into register pair DE
LXI D,9A20H ;Location where ASCII
MOV A,H
;conversion of data is
;stored
CALL 90FCH ;Convert addresses of
MOV A,H
;mem. locations of data
CALL 9100H
;to be printed into ASCII
MOV A,L
CALL 90FCH
MOV A,L
CALL 9100H
MOV A,M
;Convert data to be
CALL 90FCH ;printed into ASCII
MOV A,M
CALL 9100H
INX H
MOV A,M
CPI CFH
;End of data?
JNZ X1
MVI A,43H
;ASCII code of C
STAX D
INX D
MVI A,46H
;ASCII code of F
STAX D
DCX D
LXI H,9A20H ;Initialise mem. pointer
;to start of ASCII codes
MVI A,82H
;Initialise 8255
OUT 0BH
MVI A,30H
;Initialise Printer
OUT 0AH
MVI A,10H
OUT 0AH
CALL 9200H
;Call delay
MVI A,30H
OUT 0AH
MVI A,02H
;ASCII code for start of
;text
Addr.
9049
904B
904E
9051
9053
9056
9057
9058
905B
Hex code
D308
CD5092
CD7092
0604
CD2492
23
05
C25390
3E20
Label
905D
905F
9062
9065
9067
906A
906B
906C
906F
9072
9073
D308
CD5092
CD7092
0602
CD2492
23
05
C26790
CD9092
7B
AD
9074
9077
9078
9079
907C
C25190
7A
AC
C25190
3E03
JNZ X4
MOV A,D
XRA H
JNZ X4
MVI A,03H
907E
9080
9083
9086
9088
908A
908D
9090
D308
CD5092
CD7092
3E04
D308
CD5092
CD7092
76
OUT 08H
CALL 9250H
CALL 9270H
MVI A,04H
OUT 08H
CALL 9250H
CALL 9270H
HLT
X4:
X2:
X3:
Mnemonics
OUT 08H
CALL 9250H
CALL 9270H
MVI B,04H
CALL 9224H
INX H
DCR B
JNZ X2
MVI A,20H
OUT 08H
CALL 9250H
CALL 9270H
MVI B,02H
CALL 9224H
INX H
DCR B
JNZ X3
CALL 9290H
MOV A,E
XRA L
Remarks
;Call status
;Call strobe
;Counter of 4 for printing
;four digits of addresses
;of memory location
;Send blank space to
;printer
;Call status
;Call strobe
;Counter of 2 for printing
;two digits of data
;Call LFCR
;Check whether all data
;has been transfered for
;printing
CONSTRUCTION
0F
0F
E60F
FE0A
DA0991
C607
C630
12
13
C9
Label
X5:
Mnemonics
RRC
RRC
ANI 0FH
CPI 0AH
JC X5
ADI 07H
ADI 30H
STAX D
INX D
RET
;Output Subroutine
9224 7E
9225 D308
9227 CD5092
922A CD7092
922D C9
MOV A,M
OUT 08H
CALL 9250H
CALL 9270H
RET
;Delay Subroutine
9200 C5
9201 06FF
9203 0EFF
X7:
9205 0D
X6:
9206 C20592
9209 05
920A C20392
920D C1
920E C9
PUSH B
MVI B,FFH
MVI C,FFH
DCR C
JNZ X6
DCR B
JNZ X7
POP B
RET
;Status Subroutine
9250 C5
9251 06FF
X9:
9253 0EFF
X8:
9255 DB09
9257 E60F
9259 FE06
PUSH B
MVI B,FFH
MVI C,FFH
IN 09H
ANI 0FH
CPI 06H
Remarks
Label
X11:
;Strobe subroutine
9270 3E20
9272 D30A
9274 C5
9275 0EFF
9277 0D
X10:
9278 C27792
927B C1
927C 3E30
927E D30A
9280 C9
;Line
9290
9292
9294
9297
929A
929C
929E
92A1
92A4
;In port B
;Compare with 06H
CA6692
0D
C25392
05
C25192
C1
C9
92A6
92A8
92AB
92AE
Mnemonics
Remarks
JZ X11
DCR C
JNZ X8
DCR B
JNZ X9
POP B
RET
MVI A,20H
OUT 0AH
PUSH B
MVI C,FFH
DCR C
JNZ X10
POP B
MVI A,30H
OUT 0AH
RET
CONSTRUCTION
PARTS LIST
Semiconductors:
IC1, IC2
- 7407 hex buffer/driver (opencollector type)
Resistors (all -watt, 5% carbon, unless
stated otherwise):
R1-R12
- 1-kilo-ohm (or use one-/tworesistor networks)
Miscellaneous:
- Centronics connector and
cable
C O N S T R U C T I O N
MORSE PROCESSOR
Hardware
NA
ANJA
RUP
JUNOMON ABRAHAM
The circuit is configured around the basic 8085 microprocessor. For simplifying the overall design, a programmable
keyboard/display interface 8279 chip has
been used, which relieves the microprocessor from scanning the keyboard and
display. Here, 25 keys, including SHIFT
and CNTL keys, and six 7-segment com-
TABLE III
DATA FORMAT IN SCAN KEY BOARD MODE
(FOR ANALYSING RETURNED HEX CODE)
TABLE IV
Lookup Table
Chr/
word
Address
Hexcode
Ch/
word
Address Hexcode
Ch/
word
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
G
H
I
0300
0304
0308
030C
0310
0314
0318
031C
0320
0324
0328
032C
0330
0334
0338
033C
0340
0344
0348
3F AA 0E 00
06 A9 0E 00
5B A5 0E 00
4F 95 0E 00
66 55 0E 00
6D 55 0D 00
7D 56 0D 00
07 5A 0D 00
7F 6A 0D 00
6F AA 0D 00
77 39 00 00
7C 56 03 00
39 66 03 00
5E D6 00 00
79 0D 00 00
71 65 03 00
3D DA 00 00
76 55 03 00
30 35 00 00
J
K
L
M
034C
0350
0354
0358
035C
.
,
;
?
N
O
P
Q
R
S
T
U
V
W
X
Y
Z
0380
0384
0388
038C
0390
0394
0398
039C
03A0
03A4
03A8
03AC
03B0
1E A9 03 00
70 E6 00 00
38 59 03 00
55 3A 00 00
46
Address Hexcode
03B4
03B8
03BC
03C0
03C4
03C8
54 36 00 00 EOM* 03CC
5C EA 00 00 WAIT* 03D0
73 69 03 00 BT*
03D4
67 9A 03 00 SK*
03D8
50 D9 00 00 SELECt 03DC
03E0
6D D5 00 00
78 0E 00 00 trAnSt 03E4
3E E5 00 00 M oVEr 03E8
2A 95 03 00 rECEIE 03EC
6A E9 00 00
03F0
03F4
52 96 03 00 SEtUP
6E A6 03 00
03F8
4B 5A 03 00
03FC
2. WAIT=
4. SK=End of work=
80 99 39 00
04 5A 3A 00
84 66 36 00
D3 A5 35 00
08 56 39 00
00 3F 00 00
0F 99 0D 00
7E 59 0D 00
49 56 0E 00
4F 95 39 00
6D 79 38 79
39 78 78 50
77 54 6D 78
55 00 5C 2A
79 50 50 79
39 79 30 79
6D 79 78 3E
73 00 00 00
00 00 00 00
C O N S T R U C T I O N
mon-cathode
character displays are used.
Though 7-segment displays
are not suitable
for alphanumeric characters, these have
been used here
with some compromise for reducing the overall cost. (Note.
The use of dotmatrix LCD display avoids the
difficulty in displaying characters in 7-segment format.
One can go for
a
microcontroller design, if
needed.) The 7segment display
pattern
employed for different characters is shown in
Table I.
Two hardware
interrupts, RST5.5
and RST6.5, are
used for reading
the key entries.
These
are
driven by the
IRQ line from
the keyboard/
display interface IC 8279.
A
buffer
(IC8) is connected at the
display output
of 8279 to drive
the 7-segment
displays. The
encoded scan
lines (SL2 SL0) are decoded by an octal
decoder
74LS138 (IC9),
whose outputs
drive the common cathode of
displays
via
ELECTRONICS FOR YOU MARCH 2001
C O N S T R U C T I O N
PARTS LIST
Semiconductors:
IC1
- 8085A microprocessor
IC2
- 74LS373 octal D-type latches
IC3
- 6116 RAM (2 kB)
IC4
- 27C32 EPROM (4 kB)
IC5
- 8279 keyboard/display
decoder
IC6, IC9
- 74LS138 3-bit binary decoder
IC7
- 74LS123 retriggerable
monostable multivibrator
IC8
- 74LS244 octal bus driver
IC10
- 7805 +5 volt regulator
T1
- BC548 npn transistor
T2
- BC549 npn transistor
T3-T8
- BC558 pnp transistor
D1
- 1N4148 switching diode
LED1
- LED
DIS1-DIS6 - LTS543 common-cathode
display
Resistors (all -watt, 5% carbon, unless
stated otherwise):
R1
- 68-kilo-ohm
R2
- 3.3-kilo-ohm
R3
- 2.2-kilo-ohm
R4
- 5.6-kilo-ohm
R5
- 1-mega-ohm
R6
- 15-kilo-ohm
R7, R8
- 1-kilo-ohm
R9-R16
- 68-ohm
R17-R22
- 220-ohm
R23
- 180-ohm
VR1
- 2.2-kilo-ohm preset
VR2
- 100-ohm preset
Capacitors:
C1
- 2.2F, 16V electrolytic
C2, C4, C6 - 0.1F ceramic disc
C3
- 10F, 16V electrolytic
C5
- 0.001F ceramic disc
C7
- 10pF ceramic disc
Miscellaneous:
PZ1
- Piezo buzzer
MIC
- Condenser microphone
S1-S26
- Tactile switches for keyboard
- 6.144 MHz crystal
XTAL
C O N S T R U C T I O N
program). RAM 6116 stores the keyboard entries and also acts as a stack.
One can enter/store a maximum of approximately 1,750 characters in the
RAM. This is adequate for normal applications. In case one needs to store
lengthy text, one should use a largercapacity RAM. Battery backup may be
used for avoiding loss of data due to
power failure. The low-level address/
data lines of 8085 are demultiplexed
using an octal transparent latch IC
74LS373.
The address bits A12 and A13 are
decoded by IC6 to generate chip select
(CS) signals for various ICs. The address map of devices is indicated in
Table II.
Firmware
The software driver routines for the circuit, along with their Assembly language
code, are listed in Appendix A. Basically, the following functions are performed by the software program:
(a) Initialisation of the peripherals.
(b) Reading the depressed key data
and its storage in RAM.
(c) Writing data into the display
RAM in 8279.
(d) Generation of Morse code.
(e) Recognition of Morse code from
its sound.
(f) Giving proper messages at appropriate time.
Since Morse code is a time-dependent code, the program contains many
jump instructions. The program has
been made interactive and user-friendly.
The firmware is divided into the following modules: (a) booting, (b) keyboard,
(c) transmit, (d) receive, (e) play, and
(f) lookup table.
The logic of the program can be generally understood from the Assembly
language listing given in Appendix A. A
brief description of each module is, however, given below:
(a) Booting. This section initialises
stack pointer 8279 and the interrupts.
It also fixes default speed for Morse
code. It is the first module executed
when you switch on the power supply.
(b) Keyboard. When a key is
pressed, IRQ pin of 8279 interrupts
8085. The ISR (interrupt service routine) reads the keyboard data and, if
needed, does some manipulations. It also
displays the entered characters in the
C O N S T R U C T I O N
Opcode Label
Mnemonics
Comments
31FF17
3E10
D321
3E40
D321
3E0D
30
325017
LXI SP,17FFH
MVI A,10H
OUT 21H
MVI A,40H
OUT 21H
MVI A,0DH
SIM
STA 1750H
0011
0014
0017
001A
001D
0020
0023
0024
211D00
225117
21246C
227017
11DC03
CDE000
FB
76
LXI H,001DH
SHLD 1751H
LXI H,6C24H
Fixing default setup
SHLD 1770H
LXI D,03DCH
CALL DISPLAY Display SELECt
EI
HLT
Halt
Activating RST6.5
Updating mode and
position data
RST 5.5
002C
C3F700
JMP 00F7H
Go to ISR of RST5.5
RST 6.5
0034
DB20
IN 20H
0036
0037
F5
FE8A
PUSH PSW
CPI 8AH
0039
003C
CA0002
FE8C
JZ RECEIVE
CPI 8CH
003E
0041
CA8001
FE84
0043
0046
CAD001
FE86
0048
004B
CAD501
FE98
004D
0050
0053
0055
0056
0057
0059
005C
005F
C26000
210010
36C8
23
7C
FE17
DA5300
2A5117
E9
0060
FE8E
0062
0065
0067
0068
006B
C27700
3E0E
30
11F403
CDE000
006E
006F
0070
0072
0073
0076
FB
76
3E0D
30
2A5117
E9
0077
007A
3A5017
B7
007B
CA8000
007E
007F
0080
data
FB
76
F1
JZ KEYBOARD
CPI 84H
Checking CNTL+PLAY
key
JZ PLAY
CPI 86H
Checking CNTL+
CONTINUE key
JZ 01D5H
CPI 98H
Checking CNTL+
CLEAR key
JNZ 0060H
LXI H,1000H
Clearing the RAM
MVI M,C8H
INX H
MOV A,H
CPI 17H
JC 0053H
LHLD 1751H
Return to mode from
PCHL
where clearing action
is called
CPI 8EH
Checking CNTL+
SETUP key
JNZ 0077H
MVI A,0EH
Activating RST5.5
SIM
LXI D,03F4H
CALL DISPLAY Display the message
SEtUP
EI
HLT
MVI A,0DH
Activating RST6.5
SIM
LHLD 1751H
PCHL
Return to mode from
where setup action is
called
LDA 1750H
The following CNTL
ORA A
key functions are only
for TRANSMIT mode
JZ 0080H
Checking whether we
were in the TRANSMIT
mode
EI
HLT
POP PSW
Getting key closure
Checking CNTL+
TRANSMIT key
Addr.
0081
0083
0086
0087
0088
0089
008B
Opcode Label
FE92
C28900
2B
2B
C9
FE90
C8
Mnemonics
CPI 92H
JNZ 0089H
DCX H
DCX H
RET
CPI 90H
RZ
008C
FE80
CPI 80H
008E
0091
C29600
110500
JNZ 0096H
LXI D,0005H
0094
0095
0096
19
C9
FE82
DAD D
RET
CPI 82H
0098
009B
C2A000
11F9FF
JNZ 00A0H
LXI D,FFF9H
009E
009F
00A0
19
C9
FE88
DAD D
RET
CPI 88H
00A2
00A5
CA1001
FE96
JZ TRANSMIT
CPI 96H
00A7
00AA
00AB
C2BA00
E5
46
JNZ 00BAH
PUSH H
MOV B,M
00AC
00AD
00AE
00AF
00B0
00B1
00B3
00B6
00B7
00B8
00B9
00BA
2B
70
23
23
7C
FE17
DAAB00
E1
2B
2B
C9
FE94
DCX H
MOV M,B
INX H
INX H
MOV A,H
CPI 17H
JC 00ABH
POP H
DCX H
DCX H
RET
CPI 94H
00BC
00BF
C2D100
2B
JNZ 00D1H
DCX H
00C0
00C1
00C2
00C4
00C5
00C6
00C7
00C8
00C9
00CB
00CE
00CF
00D0
00D1
E5
46
36C8
23
7E
70
47
7C
FE17
DAC400
E1
2B
C9
FE7F
PUSH H
MOV B,M
MVI M,C8H
INX H
MOV A,M
MOV M,B
MOV B,A
MOV A,H
CPI 17H
JC 00C4H
POP H
DCX H
RET
CPI 7FH
00D3
00D6
00D7
00D8
D2CF00
07
77
C9
JNC 00CFH
RLC
MOV M,A
RET
DISPLAY SUBROUTINE:
00E0
0E06
DISPLAY:
MVI C,06H
00E2
1A
LDAX D
00E3
00E5
00E6
00E7
D320
13
0D
C2E200
OUT 20H
INX D
DCR C
JNZ 00E2H
Comments
Checking CNTL+key
Shifting the characters
right by one place
Checking CNTL+key
Shifting the characters
by one place
Checking CNTL+TABR
key
Shifting the characters
left by six places
Checking CNTL+TABL
key
Shifting the characters
right by six places
Checking CNTL+
START key
Checking CNTL+DEL
key
Delete one character in
the left most position of
the display
Checking CNTL+INS
key
Inserting a space for
adding character
C O N S T R U C T I O N
Addr.
Opcode Label
Mnemonics
Comments
Addr.
Opcode Label
Mnemonics
00EA
00ED
00F0
CDC001
CDC001
C9
CALL DELAY2
CALL DELAY2
RET
017A
017B
E1
C9
POP H
RET
IN 20H
00F9
00FB
00FC
00FF
0100
0101
0102
0105
ANI 3FH
RLC
STA 1770H
MOV B,A
ADD B
ADD B
STA 1771H
RET
E63F
07
327017
47
80
80
327117
C9
TRANSMIT SUBROUTINE:
0110
31FF17 TRANSMIT:
0113
7C
0114
FE17
0116
D2B301
0119
1603
011B
5E
011C
1A
011D
D320
LXI SP,17FFH
MOV A,H
CPI 17H
JNC 01B3H
MVI D,03H
MOV E,M
LDAX D
OUT 20H
011F
0120
0121
0123
0124
0125
0126
0129
012B
012D
0130
0131
0133
0136
0138
013B
013C
013D
013E
013F
0140
F3
E5
0E04
13
1A
F5
217017
E603
FE01
CA4801
23
FE02
CA4801
FE03
CA5901
F1
E1
FB
7E
23
FECC
DI
PUSH H
MVI C,04H
INX D
LDAX D
PUSH PSW
LXI H,1770H
ANI 03H
CPI 01H
JZ 0148H
INX H
CPI 02H
JZ 0148H
CPI 03H
JZ 0159H
POP PSW
POP H
EI
MOV A,M
INX H
CPI CCH
0142
0145
0148
014A
014B
014C
014F
0150
0153
0155
0156
0159
015A
015D
015E
0161
0162
0163
0164
0165
0168
C21001
C3B301
3ECD
30
46
CD7001
05
C24C01
3E4D
30
217017
46
CD7001
05
C25A01
F1
0F
0F
0D
C22501
C32101
JNZ 0110H
JMP 01B3H
MVI A,CDH
SIM
MOV B,M
CALL DELAY1
DCR B
JNZ 014CH
MVI A,4DH
SIM
LXI H,1770H
MOV B,M
CALL DELAY1
DCR B
JNZ 015AH
POP PSW
RRC
RRC
DCR C
JNZ 0125H
JMP 0121H
DELAY1 SUBROUTINE:
0170
E5
DELAY1:
PUSH H
0171
0174
0175
0176
0177
LXI H,01CFH
DCX H
MOV A,H
ORA L
JNZ 0174H
21CF01
2B
7C
B5
C27401
Return
KEYBOARD SUBROUTINE:
0180
AF
KEYBOARD:XRA A
Comments
Display character in
the RAM
Morse code generation
Checking end of
message character ]
Setting SOD line
Waiting
Resetting SOD line
Waiting
0181
0184
0187
018A
018D
325017
218001
225117
11E203
CDE000
0190
0193
31FF17
210610
0196
0199
019A
019C
019E
019F
01A0
01A2
01A3
01A4
01A7
01A8
01AA
01AD
01B0
11FBFF
19
0E06
1603
5E
1A
D320
23
0D
C29E01
7C
FE17
DAB301
11E803
CDE000
01B3
01B4
01B5
FB
76
C39601
MVI C,9FH
01C2
01C5
01C6
01C9
CALL DELAY1
DCR C
JNZ 01C2H
RET
PLAY SUBROUTINE:
01D0
1603
PLAY:
01D2
210510
01D5
F3
01D6
23
01D7
7C
01D8
FE17
01DA
D2EB01
01DD
5E
01DE
1A
01DF
D320
01E1
CDC001
01E4
FB
01E5
7E
01E6
FECC
MVI D,03H
LXI H,1005H
DI
INX H
MOV A,H
CPI 17H
JNC 01EBH
MOV E,M
LDAX D
OUT 20H
CALL DELAY2
EI
MOV A,M
CPI CCH
01E8
01EB
JNZ 01D5H
JMP 01B3H
C2D501
C3B301
RECEIVE SUBROUTINE:
0200
3EFF RECEIVE:
Executing these
instructions require
approximately
3 msec
STA 1750H
LXI H,0180H
SHLD 1751H
LXI D,03E2H
Displaying message
CALL DISPLAY trAnSt for indicating
the TRANSMIT mode
LXI SP,17FFH
LXI H,1006H
Entering keyboard data
to the RAM
LXI D,FFFBH
DAD D
MVI C,06H
MVI D,03H
MOV E,M
LDAX D
OUT 20H
INX H
DCR C
JNZ 019EH
MOV A,H
CPI 17H
Checking end of mem.
JC 01B3H
LXI D,03E8H
CALL DISPLAY If mem. is over display
MoVEr
EI
HLT
JMP 0196H
DELAY2 SUBROUTINE:
01C0
0E9F
DELAY2:
CD7001
0D
C2C201
C9
0202
0205
0208
020B
020E
325017
210002
225117
11EE03
CDE000
0211
0214
0217
0218
021B
021C
021D
0220
11FA03
CDE000
FB
110510
13
D5
218117
3600
MVI A,FFH
Wait approximately
400 msec
STA 1750H
LXI H,0200H
SHLD 1751H
LXI D,03EEH
CALL DISPLAY Display message
rECEIE
LXI D,03FAH
CALL DISPLAY Clear the display
EI
LXI D,1005H
Morse code aquisition
INX D
PUSH D
LXI H,1781H
MVI M,00H
C O N S T R U C T I O N
Addr.
Opcode Label
Mnemonics
0222
0223
0224
0226
0228
0229
022B
022E
022F
0230
0231
0234
0235
0238
2B
E5
0E00
1E04
61
0600
CD7001
04
20
07
DA2B02
24
3A7117
BC
DCX H
PUSH H
MVI C,00H
MVI E,04H
MOV H,C
MVI B,00H
CALL DELAY1
INR B
RIM
RLC
JC 022BH
INR H
LDA 1771H
CMP H
0239
023C
023D
023F
0242
0244
0246
0249
024A
DA6602
78
FE02
DA2902
2600
1640
3A7117
0F
B8
JC 0266H
MOV A,B
CPI 02H
JC 0229H
MVI H,00H
MVI D,40H
LDA 1771H
RRC
CMP B
024B
024E
024F
0250
0251
0252
0253
0254
0255
0256
0257
D25702
7A
07
57
00
00
00
00
00
00
79
JNC 0257H
MOV A,D
RLC
MOV D,A
NOP
NOP
NOP
NOP
NOP
NOP
MOV A,C
0258
0259
025A
025B
025C
025D
0260
0261
0262
0263
0266
0267
0268
0269
026B
026C
026F
0270
0271
0274
0275
0F
0F
B2
4F
1D
C22902
E1
71
23
C32302
79
0F
0F
F6C0
1D
CA7402
0F
0F
C36B02
E1
77
RRC
RRC
ORA D
MOV C,A
DCR E
JNZ 0229H
POP H
MOV M,C
INX H
JMP 0223H
MOV A,C
RRC
RRC
ORI C0H
DCR E
JZ 0274H
RRC
RRC
JMP 026BH
POP H
MOV M,A
Comments
Constructing morse
code data
Addr.
Opcode Label
Mnemonics
Comments
0276
0278
0638
21FD02
MVI B,38H
LXI H,02FDH
Comparing obtained
morse code data with
lookup data
027B
027E
027F
0280
0281
0282
0283
3A8017
23
23
23
23
05
C29102
LDA 1780H
INX H
INX H
INX H
INX H
DCR B
JNZ 0291H
0286
0288
028B
028E
0291
0292
0295
0298
0299
029A
029B
029E
029F
02A0
02A1
02A3
02A6
02A7
02A9
02AA
FE04
DA1D02
215C03
C39F02
BE
C27B02
3A8117
23
BE
2B
C27B02
2B
D1
7A
FE17
D2D102
7E
D320
7D
12
CPI 04H
JC 021DH
LXI H,035CH
JMP 029FH
CMP M
JNZ 027BH
LDA 1781H
INX H
CMP M
DCX H
JNZ 027BH
DCX H
POP D
MOV A,D
CPI 17H
JNC 02D1H
MOV A,M
OUT 20H
MOV A,L
STAX D
02AB
02AD
02B0
02B1
02B2
02B3
02B4
02B7
02B8
02B9
02BA
02BD
02BE
02BF
02C2
02C3
02C4
02C7
02C8
02CA
02CB
02CD
0600
217017
7E
07
23
86
D2B802
04
4F
0B
CD7001
20
07
DA1B02
78
B1
C2B902
AF
D320
13
3EC8
12
MVI B,00H
LXI H,1770H
MOV A,M
RLC
INX H
ADD M
JNC 02B8H
INR B
MOV C,A
DCX B
CALL DELAY1
RIM
RLC
JC 021BH
MOV A,B
ORA C
JNZ 02B9H
XRA A
OUT 20H
INX D
MVI A,C8H
STAX D
02CE
02D1
C31B02
76
JMP 021BH
HLT
C O N S T R U C T I O N
Control-key functions
Before going to the operating procedure,
we have to know the functions of keys
associated with CNTL key.
CNTL+SETUP (8EH). The default
speed is initialised for approximately 5
words/minute. If you want to change
this setting, you can do so by using this
control key combination. When you
press this combination, the message
SEtUP is displayed. Here you can enter any one of the characters ranging
from 1 through 9 and A through K
to change the speed. Note that the minimum speed is associated with K and
the maximum with 1.
CNTL+CLEAR (98H). It clears the
RAM content.
CNTL+PLAY (84). CNTL+PLAY is
used for displaying the RAM content in
moving format. You can interrupt any
process by pressing any control key that
has no function.
CNTL+CONT (86). It is used for
continuing the play operation if it were
interrupted.
Operating procedure
1. Switch on the power supply. A message SELECt will be displayed. By depressing the appropriate key, you can
select any one of the following modes:
(a) transmit, (b) receive, (c) setup, (d)
play, (e) continue, and (f) clear.
2. Press CNTL+TRANSMIT keys for
entering into the transmit mode. A message trAnSt appears for a second, after which you can enter your message.
3. At the end of the message you
have to enter ] symbol (by pressing
SHIFT+] keys, i.e. 66H) for invoking the
microprocessor.
4. By the use of arrow keys ( or )
or by TAB (TAB R or TAB L) keys, set
the location in the message at which the
transmission is to start. If you want to
transmit the message from beginning,
depress CNTL+TRANSMIT keys again
for getting into the first character.
Construction
PCB designed particularly for this circuit (as given in Fig. 2, with component
layout shown in Fig. 3) is needed for
making this circuit. IC bases are preferred for fixing the ICs. For continuous operation, provide a heat sink for
the regulator IC. Since this circuit is
based on time comparison, it is necessary to use the correct frequency crystal (6.144 MHz).
EFY Note. Although the circuit has
been fully tested using the given firmware, elaboration of certain software instructions, requested from the author,
is still awaited. These clarification,
when received, will be suitably published
in a coming issue.
April
2001
Circuit Ideas
2001
CIRCUIT
EEPROM W27C512
(WINBOND) ERASER
IDEAS
EDI
DWIV
S.C.
J.P. SHARMA
PROMs (electrically erasable
PROMs) are generally erased by
ultraviolet rays, and it takes half
an hour or so to erase the data in an
ERPOM. Nowadays a special EEPROM
from Winbond is available in the market,
which is being used in telecommunication due to its low cost.
The simple, low-cost circuit presented
here takes only 100 ms to erase old programs electrically. The programming voltage VPP for the mentioned IC is 12.7V,
unlike the 28xxxx series EEPROMs that
can be written to or read like a RAM, in
situ. Multiple ICs connected in parallel
is reset.
Insert the next IC to be erased in IC5
socket (preferably use a ZIF socket) and
reset IC4 by pushing switch S1 momentarily. It takes only 100 milliseconds to
erase the EEPROM IC.
CIRCUIT
INTELLIGENT
ELECTRONIC LOCK
IDEAS
EDI
DWIV
S.C.
K. UDHAYA KUMARAN
his intelligent electronic lock circuit is built using transistors
only. To open this electronic lock,
one has to press tactile switches S1
through S4 sequentially. For deception
you may annotate these switches with
different numbers on the control panel/
keypad.
For example, if you want to use ten
switches on the keypad marked 0
through 9, use any four arbitrary numbers out of these for switches S1 through
S4, and the remaining six numbers may
be annotated on the leftover six switches,
which may be wired in parallel to disable
switch S6 (shown in the figure). When
four password digits in 0 through 9 are
mixed with the remaining six digits connected across disable switch terminals,
energisation of relay RL1 by unauthorised
person is prevented. For authorised persons, a 4-digit password number is easy
to remember.
To energise relay RL1, one has to
press switches S1 through S4 sequentially
within six seconds, making sure that each
of the switch is kept depressed for a du-
one minute. Even if one enters the correct 4-digit password number within one
minute after a disable operation, relay
RL1 wont get energised. So if any
unauthorised person keeps trying different permutations of numbers in quick
successions for energisation of relay RL1,
he is not likely to succeed. To that extent, this electronic lock circuit is foolproof.
This electronic lock circuit comprises
disabling, sequential switching, and relay
latch-up sections.
The disabling section comprises zener
diode ZD5 and transistors T1 and T2. Its
function is to cut off positive supply to
sequential switching and relay latch-up
ELECTRONICS FOR YOU APRIL 2001
CIRCUIT
IDEAS
CIRCUIT
IDEAS
MAR
IL KU
SUN
D. PRABAHARAN
CIRCUIT
IDEAS
MAR
IL KU
SUN
ARTHUR LOUIS
ere are two simple, low-cost circuits that can be used to shut
off the mains supply to any audio or video equipment (such as tape recorder, CD player, and amplifier). These
circuits are helpful to those in the habit
of falling asleep with their music system
on.
The circuits will also protect the equipment from getting damaged due to highvoltage spikes whenever there is a resumption of power after a break. This is
possible because the equipment will get
switched off automatically under such conditions but will not get switched on automatically on resumption of mains supply.
The circuit in Fig. 1 can be used to
shut off any cassette player that has a
reliable auto-stop mechanism. Whenever
switch S1 is pressed momentarily, it extends the supply to the step-down transformer of the tape recorder and charges
capacitor C1 through diode D1. This, in
turn, makes transistor T1 conduct and
energise relay RL1 to provide a parallel
path to switch S1, so that supply to the
step-down transformer continues even
when switch S1 is released.
When any button on the cassette
player is pressed, the capacitor charges
through diode D2. This ensures conduction of transistor T1 and thus the continuity of operation of cassette player. However, whenever the auto-stop mechanism
functions at the end of a tape, the leaf
switch gets opened. This cuts the charging path for the capacitor and it starts
discharging slowly. After about one
minute, the relay opens and interrupts
main power to the transformer. The time
delay can be increased by increasing the
value of capacitor C1.
If the appliance used is a two-in-one
type (e.g. cassette player-cum-radio), just
connect another diode in parallel with diodes D1 and D2 to provide an additional
path for charging capacitor C1 via the
tape-to-radio changeover switch, so that
when radio is played the relay does not
CIRCUIT
IDEAS
driven from the preamplifier of the gadget used, and not from its power amplifier output. Switches S1 and S2 are 2pole push-to-on switches. These can also
be fabricated from 2-pole on-off switches,
which are widely used in cassette players, by removing the latch pin from them.
CIRCUIT
IDEAS
MAR
IL KU
SUN
MALAY BANERJEE
CIRCUIT
IDEAS
SIMPLE
WATER-LEVEL
INDICATORCUM-ALARM
PRADEEP G.
EDI
DWIV
S.C.
Construction
2001
CONSTRUCTION
ACCESS-CONTROL SYSTEM
NA
ANJA
RUP
BHASKAR BANERJEE
DIP switch.
If any one or more of the six consecutive keyboard-entered digits do not conform to the predetermined code, an alarm
generator sounds the alarm to indicate
wrong code. If the result of final comparison of all the six digits is correct, a mono
multivibrator, serving as lock driver for
opening/closing a lock, gets activated for
a fixed preset duration.
The detailed description of individual
units, as shown in Fig. 2, is as follows:
Description
Keyboard and keyboard encoder.
The block diagram of the system shown The keyboard consists of 16 push-to-on
in Fig. 1 provides an overall view of its type keys in a 4x4 matrix format. It can
composition and working. A 16-digit key- be made using data switches or one can
pad is used for sequentially entering six use membrane-type keyboard at some exHex numbers, which are decoded by the tra cost. The keys should be numbered in
keyboard encoder into their equivalent bi- Hex as shown in the figure.
The encoder is built around 74C922
nary numbers and stored in separate data
(IC1), which is a 16-key keyboard encoder.
latches in binary form.
The first three Hex numbers are used It generates a 4-bit binary number correas an address for an EPROM, which stores sponding to the key pressed; for example,
a predetermined code at prefixed addresses shorting pin 1 (R1) with pin 11 (C1) genallocated to separate users or used for erates the binary equivalent of digit 0.
Whenever a key is pressed, the signal
separate purposes. The code data output
from EPROM (one byte/two nibbles) at a generated by this encoder IC is available
specified address is compared with the as logic high output at pin 12 and is
next two keyboard entries in two 4-bit used to activate a piezo-buzzer (PZ1) via
transistor T1 (BC547). The continuous
comparators that are cascaded together.
The resultant outputs of these two tone of PZ1 indicates that a key is pressed.
comparators are connected to the next The key-pressed signal is also used to
comparator stage, in which the last key- store data in the latches.
The output from pin 12 is connected
board digit (i.e. sixth Hex digit) is compared with the system code selected by to pin 13 of IC5 (CD4017 counter) for
clocking at its
trailing edge.
On each clocking, counter IC5
advances by one
count
and
thereby stores
data in separate
data latches one
after the other.
IC1 also holds
the last number
at its output
pins.
Fig. 1: Block diagram of the access-control system
ELECTRONICS FOR YOU APRIL 2001
CONSTRUCTION
IC5 provides
a high output
to clear and
store pins 1
and 2 of IC2A,
thereby clearing its 4-bit
register.
When a
key
is
pressed, the
equivalent binary code is
present at
data input
pins of all the
latches. On
releasing the
key, pin 12 of
IC1 changes
its state from
high to low,
thereby generating the
required clock
pulse for IC5.
This clocking
makes pins 3
and 2 of IC5
low and high,
respectively,
causing the
binary data
corresponding
to the first
Hex digit keyboard entry to
be stored and
available at
the output of
IC2A.
Similarly,
when the second key is
pressed, new
data is stored
in IC2B without affecting
the previously
stored data in
IC2A. The
outputs from
first three
data latches
are connected
to address
pins
of
E P R O M
27C32 (IC6).
The outputs
CONSTRUCTION
from fourth and fifth data latches are connected to two 4-bit magnitude comparators IC7 and IC8 (CD4063), and the output from sixth data latch is connected to
a similar 4-bit magnitude comparator IC9
for further processing.
The memory. All 8-bit codes, except
the 4-bit system code, are stored at different locations (addresses) in the EPROM
(IC6). Out of the six Hex digits, first five
digits are used as personalised code, and
out of these five digits, the first three are
used to form an address for EPROM.
The leftmost digit of the code is the
MSD (most significant digit) and the third
digit from left is the LSD (least signifi-
CONSTRUCTION
Construction
Data input/output pins are to be connected
with utmost care because improper connection will force the system to work unpredictably. Also, care should be taken
while using IC1, as it is quite costly. The
points marked Vcc should be connected
to the power supply directly.
The system can be built on a generalpurpose PCB or a veroboard. A singlesided PCB layout for the circuit is, however, shown in Fig. 3, with its component
layout shown in Fig. 4.
Operation
IC7 and IC8 compare the 8-bit data output of EPROM with the corresponding
fourth and fifth digits entered via the keyboard and stored in latches IC3B and IC4A.
While IC7 compares the upper 4-bit
output of IC6 with the contents of IC3B
(i.e. the fourth digit from left), IC8 compares the lower 4-bit output of IC6 with
the contents of IC4A (i.e. the fifth digit
from left). Similarly, IC9 compares the
last digit (i.e. the contents of IC4B) with
the code entered/formed by 4-way DIP
switch S3 (marked A through D), which
is referred to here as the system code.
This system code digit can be changed
from time to time.
C O N S T R U C T I O N
TELEPHONE LINE-INTERFACED
GENERIC SWITCHING SYSTEM
PART I
EDI
DWIV
S.C.
Description
The block diagram of the system is shown
in Fig. 1. It consists of the following three
units:
1. The interface and control unit
2. The authentication unit
3. The main device selection and
switching circuit
The interface and control unit provides control signals and BCD data to the
other two units. It handles interfacing
with the telephone line and also generates control signals for hanging up (HUP)
and a universal reset pulse, which is used
by the authentication circuit for its operation. Its design may be altered to
achieve connectivity to another network,
which is capable of providing certain control and data signal sequences.
The authentication unit stores four
presettable digits of code data and
compares the same against the 4-digit
DTMF code sent via the telephone lines
before the time-out occurs. If the 4-digit
code is found valid, the authentication
unit issues an authorisation signal to
the main device selection and switching
unit. However if an incorrect password
is entered, the device terminates the
call by returning to the off-hook condition.
The fifth DTMF digit determines the
address of the group to be selected, while
the sixth digit determines the device number that is to be selected within that
group. The selected device can be switched
on or switched off by a momentary depression of the telephone keypad switches
marked * (code1011 binary) and # (code
C O N S T R U C T I O N
the call has not been answered yet (local telephone handset still on
cradle), the counter (IC2)
is frozen and D flip-flop
(IC3A) is set. This activates relay RL1 that
places a 220-ohm load
across the lines to simulate handset off-cradle
condition and also enables CM8870 (IC4) by
applying a low at its inhibit (active high) pin 5.
This causes the ring signal, in turn, to be taken
off the telephone lines
(by telephone exchange)
and establish a connection (analogous to the
maturity of a call). The
circuit is now ready to
receive signals from the
remote-end telephone.
In case the call is answered from the local
telephone before the preset count of IC2 is
reached, the ring ceases
as the local telephone is
in off-hook condition.
Since there is no other
way of re-triggering IC5,
a time-out eventually occurs and the device
reinitialises all units automatically. The device is
also protected against activation by dialing from
a parallel phone instrument, since the ring signal is necessary to power
up the ASIC MT8870 (after a pre-programmed
number of rings).
CM8870 (IC4) generates an StD pulse whenever fresh data is
latched onto its outputs.
This signal is used as a
data valid gate wherever appropriate.
Also, when a key is pressed, an ESt (Early
steering) pulse is generated at its pin 16,
which lasts till the key is pressed. This
ESt pulse is used for clocking IC12B in
the authentication and control unit and
retriggering monostable multivibrator
74123 (IC5), extending the duration of
Reset pulse. This ensures that the circuit will operate as long as the user
C O N S T R U C T I O N
C O N S T R U C T I O N
put of IC9B goes high and saturates transistor T2 in the interface and control unit
and thereby shunts capacitor C10 to
ground, thus simulating a power-on-reset condition. As a consequence CLR signal (at output of IC6A) is activated and
the line interface circuit is initialised.
Also, since the monoshot IC5 is cleared,
Reset goes low (active) and resets the
authentication unit also. When the Authentication unit is initialised, IC9A and
9B are set, which causes Q2 output of
IC9 to be reset, and thus transistor T2 is
cut off again. Capacitor C10 now charges
through resistor R5 as it did when the
circuit was initially switched on.
The Reset signal is initially low. As a
result, this circuit is in its initialised state,
wherein IC13 (CD4017) is reset and ICs
9A and 9B (7474) are set (i.e. their Q
outputs are high and Q outputs are low).
Also, IC12A has its CLR pin low and it
is in reset state with its Q pin low. As
stated earlier, the Auth signal is initially
high.
The password consisting of four 4-bit
words is applied at the input pins D0_0
through D0_3 to D3_0 through D3_3 of
74LS244 ICs 15 and 14 respectively as
shown in Fig. 3. These words may be programmed using thumbwheel switches or
arrays of DIP switches with pull-down resistors as shown in Fig. 5.
May
2001
Circuit Ideas
2001
CIRCUIT
IDEAS
MAR
IL KU
SUN
P. THANGAVEL
the capacitance value is given by the relationship C=Tx103 while the inductor
value is given by the relationship
L=Tx103. The time period (1/frequency)
of timer 555 (IC2) is adjusted for 1 ms
and 1 s in b1 and b2 positions, respectively, of the range switch. The values of
capacitors and inductors covered in each
range, together with displayed values, are
shown in the table.
From the table it is obvious that this
circuit can measure capacitance from 1
nF to 9,999 F and inductance from 1
mH to 9999 H. While presets VR1 and
VR2 are to be adjusted for the in-circuit
value of 1.717 kilo-ohm each, the in-circuit value of preset VR3 is close to 4.7
kilo-ohm. If a regulated +5V is not used,
the measurement of capacitance and inductance will be imprecise.
Given below are some important
points to be taken care of:
1. The position of mode-select switch
S2 and range-select switch S3 should be
changed before switch S1 is pressed.
2. If the circuit is allowed to function
CIRCUIT
IDEAS
and when it is
in position a2,
555 IC
Capacitance
Displayed
inductances
Time period
range
value
C=Tx10 3
can be mea1 ms
When T=1 ms,
Capacitance in
sured.
(Switch S3 in C=1 F
F and inductance
4. When
position b1)
When T=
in H
range-select
9999 ms,
switch S3 is in
C=9999 F
1 s
When T=1 s,
When T=1 s,
Capacitance in nF position b1,
(Switch S3 in C=1 nF
L=1 mH
and inductance
the output of
position b2)
When T=9999 s, When T=9999 s,
in mH
555 IC will
C=9999 nF
L=9.999H
have a time
=9.999 F
=9999 mH
period of 1 ms
until it displays a constant value, the (frequency = 1 kHz), and when it is in
maximum time taken for measurement position b2, the output of 555 IC will
will be 10 seconds.
have a time period of 1 s. (EFY lab note.
3. When mode-select switch S2 is in The guaranteed frequency of NE555 is
position a1, capacitances can be measured, limited to 500 kHz, and hence it may not
TABLE
Inductance
range
L=Tx103
When T=1 ms, L=1H
When T=9999 ms,
L=9999 H
CIRCUIT
IDEAS
UNDER-/OVER-VOLTAGE BEEP
FOR MANUAL STABILISER
MAR
IL KU
SUN
K. UDHAYA KUMARAN
anual stabilisers are still popular because of their simple construction, low cost, and high reliability due to the absence of any relays
while covering a wide range of mains AC
voltages compared to that handled by automatic voltage stabilisers. These are used
mostly in homes and in business centres
for loads such as lighting, TV, and fridge,
and in certain areas where the mains AC
voltage fluctuates between very low (during peak hours) and abnormally high (during non-peak hours).
Some manual stabilisers available in
the market incorporate the high-voltage
CIRCUIT
IDEAS
longer duration with longer interval between successive beeps compared to that
during high-voltage level sensing.
This circuit can be added to any existing stabiliser (automatic or manual) or
UPS to monitor its performance.
CIRCUIT
IDEAS
ULTRA-SENSITIVE SOLIDSTATE
CLAP SWITCH
MAR
IL KU
SUN
PRADEEP G.
CIRCUIT
IDEAS
and 35V.
The first section of the circuit comprises a digital up-down counter built
around IC1 a quad 2-input NAND
schmitt trigger (4093), followed by
IC2 a binary up-down counter (4029).
Two gates of IC 4093 are used to generate up-down logic using push buttons S1 and S2, respectively, while the
other two gates form an oscillator to
provide clock pulses to IC2 (4029). The
frequency of oscillations can be varied
by changing the value of capacitor C1
or preset VR1.
IC2 receives clock pulses from the oscillator and produces a sequential binary
output. As long as its pin 5 is low, the
counter continues to count at the rising
edge of each clock pulse, but stops counting as soon as its pin 5 is brought to logic
1.
Logic 1 at pin 10 makes the counter
to count upwards, while logic 0 makes it
count downwards. Therefore the counter
counts up by closing switch S1 and counts
NAVEEN THARIYAN
RUP
ANJA
NA
CIRCUIT
IDEAS
TABLE
Binary
output
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Equivalent
dec no.
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
LED4
R14 (W)
Shorted
Shorted
Shorted
Shorted
Shorted
Shorted
Shorted
Shorted
1500
1500
1500
1500
1500
1500
1500
1500
LED3
R13 (W)
Shorted
Shorted
Shorted
Shorted
820
820
820
820
Shorted
Shorted
Shorted
Shorted
820
820
820
820
LED2
R12 (W)
Shorted
Shorted
470
470
Shorted
Shorted
470
470
Shorted
Shorted
470
470
Shorted
Shorted
470
470
LED1
R11 (W)
Shorted
220
Shorted
220
Shorted
220
Shorted
220
Shorted
220
Shorted
220
Shorted
220
Shorted
220
R2' (W)
0
220
470
690
820
1040
1290
1510
1500
1720
1970
2190
2390
2540
2790
3010
Vout (V)
1.25
2.27
3.43
4.44
5.05
6.06
7.22
8.24
8.19
9.21
10.37
11.39
11.99
13.01
14.17
15.19
Working
When the power is switched on, IC2 re-
CIRCUIT
MICROPHONE FOR
COMPUTER
IDEAS
EDI
DWIV
S.C.
VYJESH M.V.
socket for microphone that is in compatible with stereo jack pins. The stereo socket
takes condenser microphone as
input and provides the necessary positive voltage for a condenser microphone. Before
building the full circuit, connect three wires to the jackpin,
switch on the computer, and
insert the jack pins; into the
socket of the sound card. With
Construction
2001
CONSTRUCTION
PROGRAMMABLE MELODY
GENERATOR - PART I
NA
ANJA
RUP
VYJESH M.V.
Basics of music
Generally, an electronic organ or piano is
played with both hands. Now imagine
playing a 32-key organ with a single
finger. In that case, only one key can
be pressed at a time and hence only one
note can be heard. Considering that the
time taken by the finger to move from
one key to another is very short, the re-
CONSTRUCTION
EPROM-/RAM-based
melody generator
CONSTRUCTION
EPROM-based circuit
In Fig. 2, NE555 timer (IC1) is wired in
astable mode, which provides clock pulses
for the 12-stage binary counter CD4040
(IC2). In the EPROM version, jumper J1
is used to permanently short pin 3 of IC1
and pin 10 of IC2, while there is no need
to operate push-to-on switches S2 and S3
and you can leave them open (i.e. in off
state).
An 8-bit, 4k EPROM 2732 is used for
IC3. Since its pin 21 is
address A11, switch S6 is
to be kept in position a
to connect it to O11 output of IC2. When clock
pulses are fed to IC2, it
starts counting up from
its reset state (all outputs
zero). The binary outputs
of IC2 serve as the address for memory locations in the EPROM,
where the data for the
notes is stored. For the
EPROM version, the pins
of connector K2(F) are to
be kept shorted to the
Fig. 5: Flow
corresponding pins of
chart of
connector K3(M). Suffixes
doorbell
CONSTRUCTION
input from
NAND gate
N1 and the
clock oscillator starts oscillating.
The flow
chart for a
doorbell
given in Fig.
5 shows the
order
in
which the
data is entered/read.
First, the
data pertaining to
the
first
tune
is
stored. Once
all the notes
(including
breaks/no
sound periods) for the
first tune
are stored, a
stop-clock
data
(10
hex)
is
stored at the
Fig. 7: Actual-size single-sided PCB-2 layout for circuit of Figs 3 and 11
end of tune1 that stops
of both decoder ICs go high.
after the first tune. Now on pressing
Since Q0 outputs are not connected push-to-off switch S1 momentarily, the
to the tone oscillator circuit (or anywhere clock advances to start the second tune
else), no note or sound is produced for (tune-2). Thus each tune is made to end
hex value 00, and there is only time with 10 hex code for stop signal. When
elapse. No sound code is used as break all tunes of the doorbell are exhausted,
between the notes.
the last stop-clock data is followed by a
Reset (01 hex). When the data out- reset data (01 hex), so that one goes to
put of EPROM corresponds to 01 (hex), the start of tune-1 (on reset), and the cycle
Q1 output of IC4 goes high. Since Q1 out- repeats.
put of IC4 is connected to MR (master
For instance, the hexadecimal value
reset) pin 11 of counter IC2 via resistor- of SA is 70H (refer Table I) or binary
capacitor network R2-C3, IC2 is reset 0111 0000, which means that binary data
when data 01 hex appears at the output at the input of IC4 and IC5 is 0000 and
of EPROM.
0111, respectively. As a result, only Q7
Stop-clock signal (10 hex). When output of IC5 goes high. This output
the data output of EPROM corresponds brings the associated preset resistor tuned
to 10 (hex), Q1 output of IC5 goes high, to the frequency of SA (595 Hz) into the
which after inversion by NAND gate N1 oscillator circuit. Simultaneously, data
is applied to pin 4 of IC1 via normally- 0000 at the input pins of IC4 causes its
closed contacts of push-to-off switch S1. Q0 pin to go high. But since Q0 is left
As a result, IC1 stops oscillating and pro- open, there is no effect.
ducing clock pulses. The active high Q1
Similarly, when binary data correoutput of IC5 is therefore referred to as sponding to note SA (05 hex) is output
stop-clock signal in this circuit. Pushing by the EPROM, Q5 of IC4 and Q0 of IC5
switch S1 at this stage removes logic high go high. The Q5 output of IC4 brings
PARTS LIST
(Common to EPROM, RAM and ROM)
Semiconductors:
IC101
- NE555 timer
IC201
- 7805 +5V regulator
D101-D128
- 1N4007 rectifier diode
D201-D204
- 1N4001 rectifier diode
Resistors (-watt 5% carbon, unless otherwise stated)
R101
- 5-kilo-ohm
VR101-VR128 - Refer Table I
VR129
- 10-kilo-ohm preset
Capacitors:
C101
- 0.1F ceramic disc
C102
- 0.22F ceramic disc
C103
- 10F, 12V electrolytic
C201
- 100F, 25V electrolytic
C202
- 1000F, 16V electrolytic
Miscellaneous:
LS101
- 8-ohm, 4W loudspeaker
X201
- 230V AC primary to 0-6V,
500mA sec. transformer
(for EPROM and ROM)
Semiconductors:
IC1
- NE555 timer
IC2
- CD4040 counter
IC3
- (1) 2732 EPROM
- (2) 6116 RAM
IC4, IC5
- CD4514 1-of-16 decoder
IC6
- CD4011 quad NAND gate
T1-T8
- BC547 npn transistor
D1-D64
- 1N4007 rectifier diode
LED1-LED20
- Red LED
Resistors (-watt 5% carbon, unless otherwise stated)
R1, R7
- 10-kilo-ohm
R2
- 22-kilo-ohm
R3, R8
- 470-ohm
R4
- 1-mega-ohm
R5, R9-R16
- 1-kilo-ohm
R6
- 2.2-kilo-ohm
R17, R18
- 100-ohm
R19
- 330-ohm
VR1
- 100-kilo-ohm preset
Capacitors:
C1
- 22F, 12V electrolytic
C2
- 0.1F ceramic disc
C3
- 0.01F ceramic disc
C4
- 0.22F ceramic disc
Miscellaneous:
S1
- Push-to-off switch
S2-S5
- Push-to-on switch
S6
- SPDT switch
J1, J2
- Jumper
K1-K5
- Connectors
CONSTRUCTION
in the circuit diagram of Fig. 3, but adjusting the variable resistors to lower values in the table may be very tedious.
Any method may be used to adjust
all the variable resistors. But after playing a tune, it may be felt that the tune
doesnt sound proper, even if it sounded
right with computer. The reason can be
that the resistors were not properly tuned
or it may be due to minute imperfections
in output voltages from IC4 and IC5.
These imperfections can be overcome by
readjusting the resistors by the method
given below.
The imperfections can only be adjusted when data from the EPROM is
heard. But, the notes of a tune will not
be in an increasing frequency sequence.
The sequence should be PA , dha , ----- to
----- DHA , ni . To do this, include at least
two sets of sequence data from Table I
with 2-3 bytes of gap in between successive sequences, after all the tunes, as
shown in the flowchart of Fig. 10. This
method of readjustment is used only to
prevent disconnection of PCB of Fig. 7
from PCB of Fig. 6 and tuning the resistors again and again.
Remove jumpers J1 and J2. Switch
on the power supply. Press switch S4 to
provide clock pulses for IC2. Say, if the
EPROM contains 10 tunes, after the tenth
tune release S4. Now keep pressing S2
momentarily until the first note of the
sequence (PA ) sounds. Now connect the
frequency meter at the speaker terminals
(disconnect speaker if necessary) and adjust VR101 if the value of the frequency
meter reading is not consistent with the
value in the Table I. Press S2 again to
adjust VR102, and so on. After the readjustment process insert jumpers J1 and
J2 and press S3 to reset IC2.
The actual-size, single-sided PCB layouts for the circuits of Figs 2 and 3
(common for EPROM and RAM versions
of the melody generator) are shown in
Figs 6 (PCB-1) and 7 (PCB-2), respectively.
The component layouts for PCBs of Figs 6
and 7 are shown in Figs 8 and 9, respectively. The power supply circuit (Fig. 11)
has also been integrated in PCB-2.
This circuit can be used as a doorbell, or even as a car-reverse horn. The
flow chart for car-reverse horn is shown
in Fig. 12. The necessary connections are
shown in Fig. 13. When the circuit is used
as a car-reverse horn, data flows from
the next address location to where it
stopped earlier.
Preset adjustment
Connections to join the two PCBs should
be made only after the adjustment of presets on PCB-2 using any of the following
three procedures:
Using frequency meter. Assemble all
the components of PCB-2. Connect a probe
to the Vcc using a crocodile clip at the
other end. Switch on the 5V power supply
and connect the output from the tone
oscillator on the PCB to the frequency
meter. Now connect the probe to the anode of diode D101 and adjust preset resis-
RAM-based circuit
The only difference between the EPROMand RAM-based circuits is the use of
RAM chip in place of EPROM and a keyboard for programming the RAM in RAMbased circuits. Besides, an LED panel is
used for displaying the selected RAM address.
Switch S2 is used to manually provide clock pulses to IC2. Similarly, switch
S3 is used to manually reset IC2 before
and after programming. Both switches (S2
and S3) are integrated into Fig. 2. The
connector K1 in between IC2 and IC3 is
used to connect to K5(M) connecter along
CONSTRUCTION
same manner as in an
EPROMbased circuit. The inputs of N1
are shorted
and
connected to
the ground
via resistor
R7. So the
output of N1
becomes
high, which
keeps IC1
oscillating.
After a
stop-clock
(active
high) signal
appears at
the input of
NAND gate
N1, its output
goes
low. When
switch S1 is
pressed, the
output of N1
goes high
and
IC1
starts oscillating again.
Gates N2 and N3 are used to provide read
and write logic for RAM. In read condition, the output of N3 is at logic 0 be-
CONSTRUCTION
TABLE I
Music
note
Frequency
of music
note
(Hz)
Data
character
Hex
value
Variable
resistor
(preset)
number
Variable
resistor
in-circuit
value (ohm)
Maximum
value of
variable
resistor
446
472
500
530
561
1
2
3
A
B
20
30
40
50
60
VR101
VR102
VR103
VR104
VR105
8274
7740
7230
6744
6288
10k
10k
10k
10k
10k
595
630
668
707
749
794
841
891
944
1000
1062
1120
C
D
E
F
G
H
I
J
K
L
M
N
70
80
90
A0
B0
C0
D0
E0
F0
02
03
04
VR106
VR107
VR108
VR109
VR110
VR111
VR112
VR113
VR114
VR115
VR116
VR117
5850
5445
5055
4698
4356
4029
3726
3438
3165
2910
2655
2445
10k
10k
10k
5k
5k
5k
5k
5k
5k
5k
5k
5k
1190
1260
1335
1414
1498
1588
1682
1782
1888
2002
2122
O
P
Q
R
S
T
U
V
W
X
Y
05
06
07
08
09
0A
0B
0C
0D
0E
0F
VR118
VR119
VR120
VR121
VR122
VR123
VR124
VR125
VR126
VR127
VR128
2220
2016
1824
1644
1473
1308
1158
1014
876
747
624
5k
5k
2k
2k
2k
2k
2k
2k
1k
1k
1k
Lower octave
PA
dha
DHA
ni
NI
Middle octave
SA
re
RE
ga
GA
MA
ma
PA
dha
DHA
ni
NI
Upper octave
SA
re
RE
ga
GA
MA
ma
PA
dha
DHA
ni
no sound
00
Reset 01
Stop-clock 10
Programming. Connect
LED connector
K5(M) to K1(F)
and keyboard
connector
K4(M)
to
K2(F). Press
switch S3 momentarily to
reset IC2. No
LED glows on
the LED connector, indicating the initial
address
as
zero.
Now
touch the tab
Fig. 14: LED indicator
marked 00
circuit
with the probe.
Press S5 momentarily and lift the probe.
Glowing of no LED on the keyboard indicates that 00 is entered in the initial
memory location. (It is good to enter 00
in the first memory location.)
Now get the hex dump values of the
tunes. Press switch S2 to go to the next
memory location, indicated by LED1 (corresponding to address line A0), on the
LED connector strip. Touch the appropriate tab with the probe to enter the corresponding hexadecimal value at memory
location 1. Press switch S5 and lift the
probe. The data entered into memory location 1 is shown by keyboard LEDs in
binary form.
Hex data values (refer Table I) are
such that any of the four LEDs corre-
CONSTRUCTION
Appendix A
#include <stdio.h>
#include <dos.h>
#include <stdlib.h>
#include <conio.h>
#include <ctype.h>
void play(char *str,int d);
void main()
{
int f,d=200;
char ch1[180],ch2;
clrscr();
printf(\n Enter delay value:);
scanf( %d ,&d);
while(1)
{
printf(\n enter tune :);
scanf( %s ,&ch1);
play(ch1,d);
a:ch2=getch();
if (tolower(ch2)==r)
{ play(ch1,d);
goto a;
}
if (tolower(ch2)==e)
exit(0);
}
}
void play(char *str,int d)
{
int i=0;
while(str[i]!=\0')
{
switch(str[i])
{
case1':sound(446);
break;
case2':sound(472);
break;
case3':sound(500);
break;
caseA:sound(530);
break;
caseB:sound(561);
break;
caseC:sound(595);
break;
caseD:sound(630);
break;
caseE:sound(668);
break;
caseF:sound(707);
break;
caseG:sound(749);
break;
caseH:sound(794);
break;
caseI:sound(841);
break;
caseJ:sound(891);
break;
caseK:sound(944);
break;
caseL:sound(1000);
break;
caseM:sound(1062);
break;
caseN:sound(1120);
break;
caseO:sound(1190);
break;
caseP:sound(1260);
break;
caseQ:sound(1335);
break;
caseR:sound(1414);
break;
caseS:sound(1498);
break;
caseT:sound(1588);
break;
caseU:sound(1682);
break;
caseV:sound(1782);
break;
caseW:sound(1888);
break;
caseX:sound(2002);
break;
caseY:sound(2122);
break;
case-:nosound();
break;
}
delay(d);
i++;
}
nosound();
}
C O N S T R U C T I O N
TELEPHONE LINE-INTERFACED
GENERIC SWITCHING SYSTEM
PART II
EDI
DWIV
S.C.
n Part I we had covered the interface and control unit and the authentication unit. Before we proceed
with the description of the next unit (main
device selection and switching unit) shown
in the block diagram of Fig. 1, the following modifications may be incorporated in
Part I:
1. In the interface unit (Fig. 2), replace 2-input AND gate IC6A (7408) with
a 3-input AND gate (7411) and connect
Reset signal from pin 13 of IC5 (1Q) to
the third input of the new 3-input AND
gate. This modification has been done so
that when Reset signal is low (active), no
part of the circuit is active. All ICs will
be asynchronously reset. To avoid any confusion, change in the input connections of
IC6A AND gate is shown in Fig. 6.
2. In the authentication circuit (Fig.
3), CLR2* pin 13 of IC12B is to be disconnected from +5V rail and joined with
Fig. 6: Modification
CLR1 pin 1 of IC12A, so that authentication signal AUTH is deactivated on system reset.
Main device selection and switching unit (Fig. 7). This circuit receives
StD control signal after a successful authentication of the four-digit code by the
authentication unit. The AUTH and its
inverse AUTH signals available on code
authentication are used in this circuit for
enabling various chips such as IC23 and
IC24 (74LS195), IC25 (CD4017), IC27
through IC29 (74LS154), and StD gate
IC19C (7408).
A combinational logic circuit, comprising three 3-input NOR gates inside 7427
(IC16) and two inverter gates (IC17B and
17C) of 7404, has been used to discriminate between an address (numeric digit)
and a switching signal (* for on and #
for off). DTMF digit switches 1 through
9 and 0 (0 on the telephone keypad stands
for decimal 10 and the decoded output from
MT8870 is the equivalent
binary number 1010) generate a logic-1, R_EN
(register enable) signal,
while keys marked * and
# generate a logic-1,
S_EN (switching enable)
signal. Thus this combinational logic differentiates between register enable (R_EN) and device
switching enable (S_EN)
signals. The R_EN and
S_EN outputs for various
key depressions of the
telephone keypad are
shown in Truth Table.
The combinational
logic circuit is followed
ELECTRONICS FOR YOU MAY 2001
PARTS LIST
Semiconductors:
IC1
- NE555 timer
IC2, IC13, IC25 - CD4017 decade counter
IC3, IC9, IC12,
IC21, IC22
- 7474 dual D flip-flops
IC4
- MT8870 DTMF decoder
IC5
- 74123 dual retriggerable
monostable multivibrator
IC6
- *7411 triple 3-input AND
gates
IC7
- 7432 quad OR gates
IC8
- 74LS85 4-bit magnitude
comparator
IC10, IC19
- 7408 quad 2-input AND
gates
IC11, IC17
- 7404 hex inverters
IC14, IC15
- 74LS244 octal buffers/line
drivers
IC16
- 7427 triple 3-input gates
IC18
- 7400 quad 2-input NAND
gates
IC20
- 74125 quad bus buffers
IC23, IC24
- 74195 4-bit parallel access
shift registers
IC26
- 7414 hex Schmitt inverters
IC27-IC29
- 74LS154 4-line to 16-line
decoders
Opto-1
- MCT2E opto-coupler
T1,T2
- 2N2222 npn transistor
D1,D2
- 1N4001 rectifier diode
D3, D4
- 1N4148 switching diode
ZD1, ZD2
- Zener diode 5.1V
LED1-LED10 - Red LEDs
Resistors (1/4W 5% carbon, unless specified otherwise)
R1, R2, R5, R29 - 10-kilo-ohm
R3, R12, R30
- 100-kilo-ohm
R4
- 220-ohm
R6-R9
- 51-kilo-ohm
R10
- 39-kilo-ohm
R11
- 56-kilo-ohm
R13
- 330-kilo-ohm
R14-R18
- 1.2-kilo-ohm
R19
- 20-kilo-ohm
R20, R27, R28 - 1-mega-ohm
R21-R24,
R31-R34
- 470-ohm
R25,R26
- 1-kilo-ohm
R31-R34
- 4.7-kilo-ohm
Capacitors:
C1
- 0.47F, 160V polyester
C2,C4-C6
- 0.01F ceramic disc
C3, C9, C13
- 10F, 16V electrolytic
C7, C8, C14
- 0.1F ceramic disc
C10
- 100F, 16V electrolytic
C11, C12
- 47F, 16V electrolytic
Miscellaneous:
Xtal
- 3.57946MHz quartz crystal
RL1
- Relay 6V, 100-ohm, 1 C/O
- 5V, 1A regulated power
supply
- Berg stick/FRC connectors
- Ribbon cable etc.
*Note. IC 7408 is replaced with 7411 (refer
Fig. 6).
C O N S T R U C T I O N
C O N S T R U C T I O N
by the RCLK and SCLK generation circuitry comprising ICs 18, 19, 25, and 26,
which allows the following functions to
be performed:
After AUTH signal at Q (pin 8 of
IC12B in Fig. 3) goes low (active), one
can select a group and a device within
the selected group by next two DTMF
switch depressions on the telephone keypad, while a third key depression of * or
# results into switching on or off of the
desired device.
Multiple devices can be switched
on/off one after the other, once
authorisation signal AUTH becomes active (low) without a system reset.
The system can be reset after or
before switching on/off of the desired
device with the help of remote telephone
keypad. This feature can also be used for
avoiding switching on/off of a device if
the user perceives that he has selected a
wrong device.
When R_EN signal is logic 1, IC25
(CD4017) is clocked at the leading edge
of StD pulse, while one of the 74LS195
registers (IC23 or IC24, as enabled by
one of the Q outputs of IC25) is latched
at the trailing edge of the delayed Std
pulse (RCLK) as indicated by the direction of arrow on RCLK pulse in Fig. 7.
The resistor-capacitor combinations R26C11 and R25-C12 wired around Schmitt
inverter gates A through D of IC26 (7414)
provide the necessary delay for reliable
latching of the data in IC23 and IC24.
Resistors R27 and R28 across capacitors
C11 and C12, respectively, serve as bleeders for discharging the respective capacitors.
When S_EN signal is logic 1, clocking
of 7474 D flip-flops via active 74LS125
gates occurs corresponding to the leading
edge of Std (SCLK) pulses, while the trailing edge resets IC25 via capacitor C14, to
enable receiving of fresh group and device selection data.
(EFY note. The circuit comprising
IC25 and IC26 includes some modifications by EFY Lab to improve the timing
of RCLK and SCLK for reliable operation
of the RCLK and SCLK generation part
of the circuit.)
Group selection. When any of DTMF
numeric keys 1 through 9 and 0 on the
remote telephone keypad is depressed immediately after AUTH signal goes active
low, R_EN signal goes to logic 1 (while
S_EN is logic 0). As a result, Std pulse
passing through NAND gates IC18B and
C O N S T R U C T I O N
C O N S T R U C T I O N
Switching on or
off refers to Q output of the corresponding D flip-flop
(7474) going high or
low, respectively.
You may suitably
use the flip-flop outputs to energise a relay or fire a triac or
control the corresponding device/devices.
If you press any
number key (1
through 9 or 0) instead of * or # key on
the DTMF keypad, IC25 will receive a
clock pulse via AND gates IC18B and
IC18C, and the high state will shift from
Q2 to Q3 (pin 7 of IC25). Since Q3 output
is
coupled
to
the
base
of transistor T2 via diode D4, it will result into a system reset (as explained
in Part I). A system reset implies that
you have to redial the local telephone
number from remote telephone. When relay RL1 again energises, redial the fourdigit authentication code, followed by
group select, device select, and switch on
(*) or switch off (#) codes, as explained
earlier.
Thus, after dialing two digits identifying the group and the device within that
group, if we press a third numeric digit
instead of * or # on the remote telephone keypad, a system reset can be
achieved remotely. This feature can also
be utilised to bypass switching operation
if the user realises that he has selected a
wrong group/device.
Operation summary. The entire operation can be summarised as below:
Using the remote telephone keypad, dial the local number of the
telephone to which the circuit is connected.
If the local handset is lifted before
the programmed number of rings, a normal conversation can ensue.
If the handset is not lifted before
the programmed number of rings, wait
for simulated off-hook status of the local
telephone handset (indicating energisation
of relay RL1).
Now dial the four digits of the preset authentication code in a proper sequence from the remote keypad within
the preset duration. A system reset will
occur in case the 4-digit code is not
dialed within the preset duration or
June
2001
Circuit Ideas
2001
CIRCUIT
IDEAS
An advantage of using this high-voltage circuit is that the current gets restricted to a low value. It delivers only 3
mA (approx.) when testing zener diodes
with higher breakdown values (e.g. 120V
zener diode), but while testing zener diodes of low breakdown values, such as
3.3V, it delivers a current slightly above
20 mA. Such power-supply characteristics suit our requirement, as stated earlier. Since a small current is used for testing of zener diodes, there is no danger of
zener diodes getting damaged during testing using the dynamic impedance method.
Before using the circuit, check DC voltage across test terminals A and B without
connecting any zener diode and then flip
toggle switch S2 to quick-test position. DC
voltage available across terminals A and
B will be around 200V DC. Now put toggle
switch to quality-test position. DC voltage
can now be adjusted from 6V DC to 200V
DC (approx.) with the help of potentiometer VR1. After these preliminary checks,
the circuit is ready for operation.
To test zener diode by quick-test
method, connect zener diode across termi-
MAR
IL KU
SUN
CIRCUIT
IDEAS
CIRCUIT
IDEAS
The circuit uses the commonly available telephony ICs such as dial-tone generator 91214B/91215B (IC1) and DTMF
decoder CM8870 (IC2) in conjunction with
infrared LED (IR LED1), photodiode D1,
and other components as shown in the
figure. A properly regulated 5V DC power
supply is required for operation of the circuit.
The transmitter part is configured
around dialer IC1. Its row 1 (pin 15) and
output from IC3. This tone output is amplified by Darlington transistor pair of T3
and T4 to drive IR LED1 via variable resistor VR1 in series with fixed 10-ohm
resistor R14. Thus IR LED1 produces
tone-modulated IR light. Variable resistor VR1 controls the emission level to vary
the transmission range. LED 3 indicates
that transmission is taking place.
A part of modulated IR light signal
transmitted by IR LED1, after reflection
K.S. SANKAR
RUP
ANJA
NA
CIRCUIT
IDEAS
MAR
IL KU
SUN
CIRCUIT
LOW-COST INTERCOM
IDEAS
MAR
IL KU
SUN
PRADEEP G.
CIRCUIT
IDEAS
MAR
IL KU
SUN
T.K. HAREENDRAN
cuit is added. If the output voltage exceeds 15V due to some reason such as
component failure, the SCR fires because
of the breakdown of zener ZD2. Once SCR
fires, it presents a short-circuit across the
unregulated DC supply, resulting in the
blowing of fuse F1 instantly. This offers
guaranteed protection to the equipment
CIRCUIT
IDEAS
EDI
DWIV
S.C.
ciently wet, the resistance between sensor probes decreases rapidly. This causes
pin 1 of op-amp N1 to go high. LED1
glows to indicate the presence of adequate
water in the soil. The threshold point at
which the output of op-amp N1 goes low
can be changed with the help of preset
VR1.
To arrange the circuit, insert copper
wires in the soil to a depth of about 2 cm,
keeping them 3 cm apart. When the soil
Construction
2001
CONSTRUCTION
PROGRAMMABLE MELODY
GENERATOR - PART II
RUP
ANJA
NA
VYJESH M.V.
ROM-based circuit
The circuit diagram of ROM-based melody
generator is shown in Fig. 17. Here timer
NE 555 (IC1) is wired as an astable
multivibrator. The output pulses from IC1
are used as clock for decade counter
CD4017 (IC2). The ten sequential outputs
from IC2 are applied to npn BC547 transistors T1 through T10.
CONSTRUCTION
CONSTRUCTION
maining components.
Programming
CONSTRUCTION
CONSTRUCTION
EDI
DWIV
S.C.
D. DINESH
nduction motors widely used in workshops, irrigation pump sets, etc require a 3-phase supply. Normally,
these motors are connected to 3-phase
supply from electricity boards using thermal bimetal relays and relay contactors.
Thermal relays protect the motor from
overload. Relay coils having hold-on contacts with push-to-on and push-to-off
switches are used for activating and deactivating the relay contacts.
Single-phasing, line dropout, and reverse phasing are harmful for 3-phase motors. In the event of line dropout and singlephasing, the motor draws a heavy current
from the existing phases, and during phase
reversal the motor simply rotates in reverse direction. Further, an operator (attendant) for switching on/off the motor
is always not possible, especially when the
motor has to be operated round the clock.
Also the protection provided by the thermal relay in the starter assembly is inadequate, since it involves some delay in activation. Thus some damage to the windings of the motor can take place, especially
if overload conditions occur frequently.
The circuit presented here incorporates the following features to overcome
all the above-mentioned problems:
Electronic sensing of phase sequence
Circuit description
PARTS LIST
Semiconductors:
IC1-IC3
- MCT2E optocoupler
IC4
- CD4027 J-K flip-flop
IC5, IC6
- NE555 timer
IC7, IC9, IC10 - CD4017 decade counter
IC8
- CD4060 14-stage counter
and oscillator
IC11
- 7805 5V regulator
D1-D30
- 1N4007 rectifier diode
ZD1, ZD2
- 3.3V zener diode
LED1-LED4
- Red LED
Resistors (1/4W 5% carbon, unless specified otherwise)
R1-R3
- 100-kilo-ohm, 0.5 watt
R4-R6, R16,
R18-R23, R25,
R30, R31, R38,
R47, R49
- 4.7-kilo-ohm
R7, R24
- 27-kilo-ohm
R8-R10 R17,
R26, R29, R32,
R37, R39, R43,
R44, R46, R48,
R51-R53
- 10-kilo-ohm
R11, R28, R34 - 1-kilo-ohm
R12
- 220-kilo-ohm
R13, R41
- 1-mega-ohm
R14, R35, R36,
R45, R50
- 470-ohm
R15
- 470-ohm, 0.5 watt
R27
- 180-kilo-ohm
R33
- 2.2-kilo-ohm
R40
- 22-kilo-ohm
R42
- 82-kilo-ohm
VR1
- 4.7-kilo-ohm preset
VR2
- 47-kilo-ohm preset
Capacitors:
C1-C3, C6,
C13
- 0.1 ceramic disk
C4, C7, C11, C17- 100F, 63V electrolytic
C5, C14-C16,
C18, C19
- 10F, 25V electrolytic
C8, C10, C12
- 47F, 25V electrolytic
C9
- 1000F, 63V electrolytic
Miscellaneous:
X1-X3
- Current-sensing transformers
X4
- 0-230V AC primary to
12V-0-12V, 500mA
secondary transformer
S1
- On/off switch
S2
- SPDT switch
S3
- 7-way rotary switch
- 1.5V X4 battery
- Starter assembly
- Cabinet
CONSTRUCTION
the output of IC2 is already high, resulting in the output Q of FF2 going low.
The above process repeats once during each 50Hz cycle. If Q outputs of both
ELECTRONICS FOR YOU JUNE 2001
CONSTRUCTION
sistor R11 and transistor T1 starts conducting. As a result, IC5 is triggered and
hence sequence OK LED connected to
pin 3 of IC5 via resistor R14, glows.
IC5 is a popular 555 timer wired as a
retriggerable monoshot. Its time period
is set at 25 milliseconds (approx.). If the
monoshot is not retriggered within 25 milliseconds, the sequence OK signal goes
low. The circuit operates smoothly at fre-
quencies up to 42 Hz.
If any of the phase fails, the phase
sequence is disturbed, resulting in the output of IC5 going low and sequence OK
LED goes off. The LED status in relation
to the phase sequence is shown in Table I.
The output of IC5 is also used for driving
relay RL1 via transistor T2 (SL100).
Normally-open (N/O) contacts of relay RL1 are wired in series with off
CONSTRUCTION
cade counter CD4017 (IC10). It monitors each on-off cycle of the motor by
advancing the count of decade counter
by one on every start.
The clock for IC10 is obtained from
the output of IC5 via resistor R15. This
point i.e. the junction of resistor R15
and diode D30 is also used as supply
point for transistors T6, T7, T12 and
T13 as also for reset pin of timer IC6.
On the third start, pin 7 (Q3) goes high
and transistor T13 gets forward biased.
As a result, CK pin 14 of IC10 is pulled
low to stop any further clock to the
decade counter, which thus gets latched
and LED3 glows to indicate the latched
state of the counter. Simultaneously,
this low signal causes transistor T2 to
cut off and de-energise relay RL1. Thus
the motor cannot restart automatically
and only complete resumption of power
can reset the latch.
Motor on-off timer. A timer is provided to run the motor for a predetermined time. It counts run time of the
motor and thereafter switches off the
motor automatically. The signal from
pin 11 (Q9) of IC7 is connected to the
base of transistor T11 via resistor R38
(as referred in auto-starter and curresensing circuit). Thus the collector of
transistor T11 goes low to activate the
oscillator circuit of CD4060 (IC8), while
the motor is running. Prior to that, the
oscillator circuit of CD4060 was inactive because its pin 11 was at logic 1,
being connected to +ve rails via resistors R39, R40 and diode D22. The frequency of oscillation is set by R-C network comprising 47F capacitor C8 and
resistor R42 in series with preset VR2.
A timing of either 30 minutes or 60
minutes can be selected with the help
of switch S2 for the output of on/off timer
to go from low to high state.The output
from the pole of switch S2 is connected to
the clock input of decade counter IC9. The
outputs of IC9 go high sequentially after
30/60-minute time intervals, depending on
the selection made via switch S2. Thus
multiples of 30-/60-minute basic timing
can be selected with the help of 7-way
rotary switch S3. (The 7-way rotary switch
CONSTRUCTION
X
F.B. De-energised
supply for the circuit in any phase
is provided by a small Note: R.B. = Reverse bias; F.B. = Forward bias; X = Dont care
step-down transformer
X4 connected between R (red) phase once again. Then after a delay of 15 secand neutral, followed by rectifier and onds, relay RL2 should again energise for
filter capacitor. The unregulated volt- one second. Now short momentarily pin
age is used for operation of the relays, 14 of counter CD4017 (IC10) to ground
while the 5V regulated supply is used thrice. On the third touching, Q3 of IC10
for the remaining circuit.
will go high and LED3 will glow, folFig. 4: Layout of cabinet for mounting
transformer relays and the PCB
lowed by de-energisation of relay RL1. The
mains should be interrupted completely
Construction and testing
may be substituted with decade thumbto reset IC10.
wheel switch, if desired.)
An actual-size, single-sided PCB for the
Current transformers X1 through X3,
The output available at the pole of motor controller circuit of Fig. 1 is shown step-down transformer X4, and relays RL1
rotary switch S3 goes high after the se- in Fig. 2, with its component layout shown and RL2 may be mounted side by side in
lected duration to forward bias transistor in Fig. 3. It is recommended to use bases a compact box as shown in Fig. 4. The
T12, which, in turn, causes de- for ICs.
PCB may be mounted over the transformenergisation of relay RL1. Also, when
Before connecting the circuit to starter ers and relays using insulated spacers.
the selected run time is over, the oscilla- assembly, a bench test is required for the Current transformers are to be connected
tor of IC8 (CD4060) gets inhibited because adjustment of timer. Apply 3-phase power before the starter relay contacts.
oscillator pin 11 of IC8 goes high due to to the circuit. Observe pin 3 of IC5
Over-current adjustment can be done
(NE555), which should go only after connecting the load. Connect
high, provided the sequence all the wires to the starter point and the
is correct. Else, interchange load. Keep wiper contact of VR1 towards
any two phase wires. As se- ground side and switch on the 3-phase
quence OK signal at pin 3 of supply. Relay RL1 activates. After 5 secIC5 goes high, relay RL1 onds, relay RL2 also activates and the
energises and IC6 (IC555) is motor starts running. Now slide the wiper
activated. As a result, relay of VR1 and mark the position just before
RL2 energises after a delay the motor trips. (Remember that such
of 15 seconds for one second.
trips will be counted by latching counter.)
Now adjust preset VR2
Caution. Some parts of this circuit
such that 30-minute-duration contain live 3-phase voltages. So avoid
Fig. 5: Creation of virtual neutral from 3-phaes 3-wires
pulse train (time period 60 touching the circuit with bare hands.
system
minutes) is available at pin
Note. In the case of non-availability
the feedback from the pole of switch S3 14 of IC8 (CD4060). Flip switch S2 to 30- of neutral terminal, assembler a circuit
via resistor R43 and diode D23. LED1 minute position. Select the required run as shown in Fig. 5. Connect N marked
glows to indicate that run time is over. time using rotary switch S3. On comple- wire (shown in Fig. 1) to two more transTo restart the motor, IC8 and IC9 can be tion of the selected run time, time over formers X5 and X6 that are identical to
manually reset by closing and then open- LED should glow and the timer should X4. The secondaries of these transforming switch S1. The timer may be bypassed stop. Relay RL1 should de-energise.
ers (X5 and X6) are kept open, while the
After resetting the timer with the help secondary of X4 is connected to the powerby keeping switch S1 closed.
The timer section requires very low of switch S1, relay RL1 should energise supply circuit as shown in Fig. 1.
July
2001
Circuit Ideas
2001
CIRCUIT
IDEAS
NA
ANJA
VIJAYA KUMAR P.
CIRCUIT
IDEAS
DialCLK.C
#include <stdio.h>
#include <dos.h>
#include <stdlib.h>
#define PORT 0x0378
main()
{ int k=0;
clrscr();
gotoxy(30,10);
printf(1.(D)ial Clock\n);
gotoxy(30,12);
printf(2.(R)un Electronic Roulette \n);
gotoxy(30,14);
printf(3.(E)xit\n);
do
{
k=getch();
k=toupper(k);
if(k==D)
{
Aclock(0,0,0);
}
if(k==R)
{
Roulet();
}
}
while(k!=E);
clrscr();
printf(By Vijaya kumar.P,3rd Sem,E&C,
K.V.G.C.E,Sullia\n);
printf(Dedicated to Father of Electricity
Michael Faraday who is my favorite
Scientist.\n);
exit(0);
}
Aclock(int shor,int smin,int ssec)
{
int ho,sc,mn,mnt,k,i=0;
struct time tim;
clrscr();
do
{
gettime(&tim);
gotoxy(30,8);
ho=tim.ti_hour;
mn=tim.ti_min;
sc=tim.ti_sec;
mnt=mn;
if(ho>12)
{
ho=ho-12;
}
if(ho==0)
{
ho=12;
}
i=sc % 2;
mn=mn*i; /*Making minute LED to blink*/
mn=mn/5;
outportb(PORT,ho*16+mn);
printf(hour:min:sec = %02d:%02d:%02d\n,
ho,mnt,sc);
gotoxy(30,10);
printf(1.(G)oto MAIN MENU\n);
gotoxy(30,12);
printf(2.(S)et Alaram\n);
if(shor==ho&&smin==mnt&&ssec==sc)
{
alarm(15);
}
if(mnt==0&&sc==0)
{
alarm(1);
}
if(bioskey(1)) /* To check Whether any key is
pressed */
k=getch();
k=toupper(k);
if(k==S)
{
setala();
}
}
while(k!=G);
{
outportb(PORT,0);
main();
}
}
setala() /*Function to set Alarm*/
{
int hrs,mns,scs;
clrscr();
printf(Enter hour\n);
scanf(%d ,&hrs);
printf(Enter Minute\n);
scanf(%d ,&mns);
printf(Enter seconds\n);
scanf(%d ,&scs);
Aclock(hrs,mns,scs);
}
alarm(int beps) /*Function to produce beeping
sound*/
{
int i;
for(i=0;i<beps;i++)
{
sound(1500);
delay(100);
nosound();
delay(100);
}
}
Roulet()/*Function for Roulette Wheel*/
{
int i,k=0;
clrscr();
gotoxy(30,10);
printf(1.Press any key to Reset\n);
gotoxy(30,12);
printf(2.(P)lay\n);
gotoxy(30,14);
printf(3.(G)oto MAIN MENU\n);
k=getch();
k=toupper(k);
do
{
for(i=1;i<13;i++)/* To generate decimal
number from 1 to 12*/
{
if(bioskey(1))
k=getch();
k=toupper(k);
if(k==P)
break;
outportb(PORT,i);/*outputting binary
equivalents of i
through Data pins of LPT port*/
delay(50);
}
}
while(k!=G);
outportb(PORT,0);
main();
}
CIRCUIT
SIMPLE TELEPHONE
RING TONE GENERATOR
IDEAS
MAR
IL KU
N
U
S
tor (CMOS IC CD4060B) is used to generate three types of pulses, which are
available from pin 1 (O11), pin 3 (O13), and
pin 14 (O7), respectively. Preset VR1 is
adjusted to obtain 0.3125Hz pulses (1.6second low followed by 1.6-second high)
at pin 3 of IC1. At the same time, pulses
available from pin 1 will be of 1.25 Hz
caded in such a way that the positive voltage available at the emitter of transistor
T1 is extended to the collector of transistor T3 when the outputs of all the three
stages are low. As a result, transistors
T1 through T3 are forward biased for 0.4,
1.6, and 0.025 seconds, respectively and
reverse biased for similar durations.
Using a built-in oscillator-type piezobuzzer produces around 1kHz tone. In this
circuit, the piezo-buzzer is turned on and
off at 20 Hz for ring tone sound by transistor T3. 20Hz pulses are available at
the collector of transistor T3 for 0.4-second duration. After a time interval of 0.4
second, 20Hz
pulses become
again available for another 0.4-second duration.
This is followed by two
seconds of nosound interval. Thereafter the pulse
pattern repeats itself.
Refer the figure that indicates waveforms available at various points including the collector of transistor T3. Preset
VR2 can be used for adjusting the amplitude of the ring tone.
CIRCUIT
IDEAS
DUAL-INPUT HIGH-FIDELITY
AUDIO MIXER
MAR
IL KU
SUN
PRASAD J.
puts.
Gate 1 receives the negative bias resulting from the voltage developed by the
current passing through resistor R1 that
is in series with the source. Gate 2 receives the positive bias produced across
resistor R3 by the voltage divider formed
by resistors R3 and R4.
The mixed common output signal de-
CIRCUIT
ANTI-THEFT SECURITY
FOR CAR AUDIOS
IDEAS
EDI
DWIV
S.C.
T.K. HAREENDRAN
his small circuit, based on popular CMOS NAND chip CD4093,
can be effectively used for protecting your expensive car audio system
against theft.
When 12V DC from the car battery is
Whenever an attempt is made to remove the car audio from its mounting by
cutting its connecting wires, the
optocoupler immediately turns off, as its
LED cathode terminal is hanging. As a
result, the oscillator circuit built around
gates N2 and N3 is enabled and it controls the on/off timings of the relay via
transistor T2. (Relay contacts can be used
to energise an emergency beeper, indicator, car horns, etc, as desired.)
Different values of capacitor C2 give
different on/off timings for relay RL1 to
be on/off. With 100F we get approxi-
CIRCUIT
IDEAS
UNIPOLAR/BIPOLAR TRIANGULAR
AND BIPOLAR SQUARE
WAVE GENERATOR
YOGESH KATARIA
EDI
DWIV
.
C
.
S
Construction
2001
CONSTRUCTION
TELEPHONE REMOTE
CONTROL
MAR
IL KU
SUN
The circuit
At the remote telephone end, the ringing
signal is detected by a high-input-imped-
JUNOMON ABRAHAM
Operation
Instead of straightway proceeding with
the circuit description, we shall start with
the operation as this would help us in
understanding the circuit better. The operation is as follows:
1. From the local telephone, dial the
TABLE I(A)
A2
L
L
L
L
H
H
H
H
Input
A1
L
L
H
H
L
L
H
H
WR
A0
L
H
L
H
L
H
L
H
Output
Qn = addressed
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
TABLE I(B)
Q
Addressed
L
L
= DATA
L
H
= DATA
H
L
hold
H
H
L
H = High; L = Low
Q
un-addressed
hold
L
hold
L
number of the
remote telephone
to
which the circuit is connected. In a
short while
you will hear
a
musical
note indicating that the
circuit connected to the
remote telephone is active.
2. Now if
you want to
switch on a
particular relay/device,
press * button on the
telephone
keypad followed by any
one of digits 1
to 7 corresponding to
the device/relay number
that you desire to switch
on.
The
switching on
of the relay
will be acknowledged/
indicated by a
musical note.
Now you may
keep
the
handset on
the cradle.
3. If you
want
to
switch off
CONSTRUCTION
resistor R21. IC2 (NE556) comprises two timers (NE555 type) that
have been configured as
monostables.
When a ring is detected by IC1,
its output triggers one of the timers in IC 556. The output of the
timer after inversion by one of the
NAND gates of IC3 (CD4011), enables IC4 (CD4060) by taking its
reset pin 12 low. (IC4 is an oscillator-cum-14-bit binary counter.) As
a result, IC4 starts counting when
the ring signal strikes the input of
the circuit.
After some time, decided by the
setting of preset VR3, Q12 output
of IC4 goes high. This output
coupled to pin 8 of a NAND gate
inside IC3 will enable it. The detected ring signal (if the ring signal is still persisting) applied to pin
9 of the same NAND gate (after
inversion by another NAND gate)
will pass through it to trigger the
second monostable inside IC2
(NE556) as well as IC5 (NE555),
which is again wired as a
monostable. This arrangement
avoids the circuit from being triggered by any transients or false ring
signals on the telephone line.
The output of the second
monostable of IC2, available at its
pin 9, drives transistor T2 and
shunts the telephone line with 220ohm resistor (R20). As a result, the
telephone line voltage drops to
around 10 to 12 volts. This is
equivalent to the lifting of the telephone handset of the remote telephone. As mentioned earlier, both
IC5 and the second monostable of
IC2 are triggered simultaneously.
The output of monostable IC5 starts
melody generator IC6 (UM66) and
the musical note obtained from it
is coupled to the telephone line.
This informs the caller that the remote circuit is in energised state.
As the remote circuit is in energised
condition, the next step for the operator
CONSTRUCTION
PARTS LIST
Semiconductors:
IC1
- CA3140E op-amp
IC2
- NE556 dual timer
IC3
- CD4011 quad NAND gate
IC4
- CD4060 14-stage counter/
oscillator
IC5
- NE555 timer
IC6
- UM66 melody generator
IC7
- CM8870 DTMF-decoder
IC8
- CD4099 8-bit addressable
latch
IC9
- 7805 regulator +5V
T1
- BC548 npn transistor
T2-T9
- BC547 npn transistor (only
T2 and T6 shown)
LED1, LED2 - Green LED
LED3
- Yellow LED
LED4
- Red LED
D1, D2
- 1N4148 switching diode
D3-D10
- 1N4007 rectifier diode (only
D3 and D4 shown)
Resistors (all -watt, 5% carbon, unless
otherwise stated)
R1, R16, R17 - 150-kilo-ohm
R2, R21
- 10-kilo-ohm
R3
- 33-kilo-ohm
R4
- 680-kilo-ohm
R5
- 560-ohm
R6, R10
- 22-kilo-ohm
R7
- 1-mega-ohm
R8, R15
- 390-ohm
R9, R12
- 15-kilo-ohm
R11
- 270-ohm
R13, R14
- 3.3k-kilo-ohm
R18
- 330-kilo-ohm
R19, R22-R27 - 4.7-kilo-ohm (R22-R27 not
shown in the figure)
R20
- 220-ohm
VR1
- 10-kilo-ohm preset
VR2
- 1-mega-ohm preset
VR3
- 220-kilo-ohm preset
VR4
- 470-kilo-ohm preset
Capacitor:
C1
- 0.22F ceramic disk
C2
- 220F, 10V electrolytic
C3
- 100F, 10V electrolytic
C4, C5, C8
- 0.01F ceramic disk
C6, C11, C12 - 0.1F ceramic disk
C7
- 10F, 10V electrolytic
C9
- 0.02F ceramic disk
C10
- 0.47F, 100V polyester
Miscellaneous:
- 3.58MHz crystal
XTAL
- 6V, 150-ohm 1C/O relay
RL1-RL7
(only RL4 shown)
at local telephone is to press the * button, which makes the local telephone to
operate in the tone-dialing mode. The digits that are pressed after pressing the *
button are converted to DTMF tones.
The tone is decoded by IC7 and its
three LSBs (covering binary equivalent
of decimal digits 0 through 7) are connected to the address inputs, while the
MSB line is connected to reset pin 2 of
IC8 (CD4099, an 8-bit addressable latch).
When a valid DTMF tone is detected at
the input of IC7, its pin 15 goes high to
enable IC8 after inversion by NAND gate
of IC2. At the same time, it triggers IC5
for informing the caller that his key-press
is accepted.
Numbers 1 to 7 on the local keypad
cause latching of the corresponding relays, while number 8 causes reset operation, which means that we can switch on
seven relays independently one by one and
switch off all relays simultaneously by
pressing number 8. The output of IC8
drives the relays via the relay driver transistor. Truth tables I(A) and I(B) of
CD4099 indicate relay operation.
Alignment
1. Connect the circuit to the telephone
line.
2. Adjust preset VR1 so that the ringing pulse causes LED1 to flicker. For better performance, set the voltage at pin 3
of IC1 at approximately 2 volts.
3. The time required to activate/
energise the circuit is adjusted by preset
VR3 with the help of LED2.
4. The time available for remote
switching action can be set by preset VR2
with the help of LED4. Indirectly, the setting of preset VR2 determines the charge
that will have to be paid to the telecom
department.
5. The period of the musical note can
be controlled by the adjustment of VR4
with the help of LED3.
C O N S T R U C T I O N
MICROCONTROLLER-BASED
SCHOOL TIMER
NA
ANJA
RUP
U.B. MUJUMDAR
he basic requirements of a realtime programmable timer generally used in schools and colleges
for sounding the bell on time are:
Precise time base for time keeping.
Read/write memory for storing the
bell timings.
LCD or LED display for displaying real time as well as other data to
make the instrument user-friendly.
Keys for data entry.
Electromechanical relay to operate the bell.
We are describing here a sophisticated, yet economical, school timer
based
on
Motorolas
20-pin
MC68HC705J1A microcontroller.
Description
The pin assignments and main features
of the microcontroller are shown in
Fig.1 and the Box, respectively. The
complete system is divided into four
sections, namely, the time keeping section, the input section (keyboard), the
output (display, indicators, and relay
driving) section, and power supply and
battery backup.
The time-keeping section. Accurate time-keeping depends on the
accuracy of time base used for driving
the microcontroller. In this project, the
PARTS LIST
Semiconductors:
IC1
- 68HC705JIACP
microcontroller
IC2
- CD4532 8-bit priority
encoder
IC3
- 74LS138 3-line to 8-line
decoder
IC4
- 74LS47 BCD-to-7-segment
decoder/driver
T1-T3
- BC547/BC147 npn
transistor
T4-T7
- 2N2907 pnp transistor
D1- D7
- 1N4007 diode
ZD1
- 5.6V, 0.5watt zener
Resistors (-watt, 5% carbon, unless stated
otherwise)
R1
- 210-ohm, 0.5 watt
R2
- 27-ohm
R3, R12-R14,
R24-R27
- 1-kilo-ohm
R4-R8
- 100-kilo-ohm
R9 -R11,
R23,R29
- 10-kilo-ohm
R15-R22
- 47-ohm
R28
- 10-mega-ohm
Capacitors:
C1
- 350F, 25V electrolytic
C2, C3
- 1F, 16V electrolytic
C4, C5
- 27pF ceramic disk
C6
- 0.1F ceramic disk
Miscellaneous:
S1-S5
- Push-to-on switch (key)
S6
- On/off switch
PZ1
- Piezo buzzer
RL1
- Relay 12V, 300-ohm, 1C/O
XTAL
- 3.2768MHz AT-cut crystal
X1
- 230V AC primary to 12V0-12V, 500mA secondary
transformer
DIS.1-DIS.4
- LTS542 common-anode
display
- 4 x 1.2V Ni-Cd cells
C O N S T R U C T I O N
C O N S T R U C T I O N
Power supply
and battery backup.
The microcontroller
and the associated IC
packages require a
5V DC supply, while
the relay and the
buzzer require 12V
DC supply. A simple
rectifier along with
zener diode-regulated
power supply is used.
The microcontroller is
Fig. 3: Power supply circuit for the school timer
fed through a batment displays are used for data dis- tery-backed power supply, so that in
play. As LEDs are brighter, these have the case of power failure the functionbeen used in the system. There are two ing of the controllers timer section is
techniques for driving the displays: (i) not affected. During power failure the
driving each display using a separate timer is taken to low power mode
driver (like 74LS47 or CD4511) and (ii) (called wait mode). In this mode the
controller draws a very small current.
using multiplexed displays.
The first technique works well, but So small Ni-Cd batteries can provide a
practically it has two problems: it uses good backup.
A simple diode-resistance (27-ohm,
a large number of IC packages and consumes a fairly large amount of current. 1/4-watt) charger maintains the charge
By using multiplexed display both the of the battery at proper charging rate.
problems can be solved. In multiplexing, only one input is displayed at any
Software
given instant. But if you chop or alter
inputs fast enough, your eyes see the Motorola offers Integrated Development
result as a continuous display. With Environment (IDE) software for proLEDs, only one digit is lighted up at a gramming its microcontroller and comtime. This saves a lot of power and plete development of the system.
also components, making the system The development board comes with
economical.
Editor, Assembler, and Programmer
Generally, displays are refreshed at software to support Motorolas device
a frequency of 50 to 150 Hz. Here, dis- programmer and software simulator.
plays are refreshed at a frequency of The ICS05JW in-circuit simulator
100 Hz (after every 10 ms). The dis- along with development board (pod)
play-refreshing program is an interrupt forms a complete simulator and
service routine program. BCD-to-7-seg- non-real-time I/O emulator for simument decoder/driver 74LS47, along with lating, programming, and debugging
transistor 2N2907, and 3-line-to-8-line code for a MC68HC705J1A/KJ1 family
decoder 74LS138 are used for driving device.
common-anode displays.
When you connect the pod to your
In multiplexed display, the current host computer and target hardware,
through the segments is doubled to you can use the actual inputs and
increase the displays brightness. outputs of the target system during
74LS47 is rated for sinking a current simulation of the code. You can
of up to 24 mA. As the current persists also use the ISC05JW software to edit
for a very small time in multiplexed and assemble the code in standalone
display, it is peaky and can be as high mode, without input/output to/from pod.
as 40 mA per segment.
The pod (MC68HC705J1CS) can be inThe decimal point is controlled terfaced to any Windows 3.x- or Winindividually by transistor BC547, dows 95-based IBM computer using seas 74LS47 does not support the deci- rial port.
mal point. PA0 and PA1 bits of port
The software for the timer has been
A are used for controlling the electro- so developed that the system becomes
mechanical relay and buzzer, respec- as user-friendly as possible. The main
tively.
constraint is read/write memory (RAM)
ELECTRONICS FOR YOU JULY 2001
C O N S T R U C T I O N
TABLE I
Timer Status and Control Register (TSCR)
Bit
Signal
TOF
RTIF
TOIE
Reset
0
0
0
TOF: Timer overflow flag
RTIE: Real-time interrupt enable
RTI
0
0
1
1
RTO
0
1
0
1
Interrupt period
fop 214
fop 215
fop 216
fop 217
RTIE
TOFR
RTIFR
RTI
RTO
0
0
0
1
1
RTIF: Real-time interrupt flag
RTI and RTO: Real-time interrupt select bit.
For 3.2768MHz crystal
Frequency of operation (fop)
= 3.2768x106/2 = 1.638x106MHz
For RTI=RTO=0
Interrupt period = 10ms (100Hz)
C O N S T R U C T I O N
Operating procedure
When the power is switched on, the
display shows 12.00. Two settings are
required in the timer: (a) setting of real
time and (b) setting of bell operating
timings. For setting real-time clock
Time key is used, while for setting
bell timings Bell key is used.
Storing of real time. To store real
time, say, 05:35 p.m., flip Run/Set
key (S6) to set mode. The display will
show 0.000. Press Time key. Further
TABLE II
Truth Table for Priority Encoder CD4532
Keys
E1
D7
D6
D5
D4
D3
D2
D1
D0
Q2
Q1
Q0
Store
Digit Adv.
Bell
Time
Delete
1
1
1
1
1
1
0
0
0
0
X
1
0
0
0
X
X
1
0
0
X
X
X
1
0
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
1
1
1
0
1
1
0
0
1
1
0
1
0
1
Programming
There are two ways to program the
EPROM/OTPROM (one-time programmable ROM):
1. Manipulate the control bits in the
EPROM programming register to program the EPROM/OTPROM on a byteby-byte basis.
2. Program the EPROM/OTPROM
with Motorolas MC68HC705J in-circuit
simulator.
The author has used the second
method for programming the OTPROM.
(EFY note. Readers who wish to
acquire a Pod for 705KJ1/J1A
microcontrollers, along with the required software, may contact Vinay
Chaddha at gvc@vsnl.com.)
An actual-size, single-sided PCB
for the circuits in Figs 2 and 3 is shown
in Fig. 4, with its component layout
shown in Fig. 5.
August
2001
Circuit Ideas
2001
CIRCUIT
LONG-RANGE CORDLESS
BURGLAR ALARM
IDEAS
EDI
DWIV
.
C
.
S
T.K. HAREENDRAN
Fig. 1
Fig. 2
CIRCUIT
IDEAS
WATER-LEVEL CONTROLLER
MAR
IL KU
SUN
CIRCUIT
IDEAS
CIRCUIT
INVISIBLE BROKEN
WIRE DETECTOR
IDEAS
EDI
DWIV
S.C.
ortable loads such as video cameras, halogen flood lights, electrical irons, hand drillers, grinders, and cutters are powered by connecting long 2- or 3-core cables to the mains
plug. Due to prolonged usage, the power
cord wires are subjected to mechanical
strain and stress, which can lead to internal snapping of wires at any point. In
such a case most people go for replacing
the core/cable, as finding the exact loca-
CIRCUIT
PC-BASED MULTI-MODE
LIGHT CHASER
IDEAS
RUP
ANJA
NA
VIJAYA KUMAR P.
TABLE I
Pin Configuration
Pin
Description
1
*Strobe
2
Data bit 0
3
Data bit 1
4
Data bit 2
5
Data bit 3
6
Data bit 4
7
Data bit 5
8
Data bit 6
9
Data bit 7
10
Acknowledge
11
*Busy
12
Paper end
13
Select
14
*Auto feed
15
Error
16
Initialise
17
*Select input
18-25
Ground
Note: *indicates that pins are internally
(hardware) inverted.
with a 25-core cable. Instead of connecting 230V bulbs you can connect small
6.2V miniature lamps, which are easily
available in electrical shops. Connections
are shown in Fig. 3. While using
6.2V miniature lamps, 50 miniature
lamps must be connected in series
and the net combination of 50 bulbs
in series should be connected to
each channel (channel 1 through
channel 8).
Since LEDs require very small
current, parallel ports can directly
drive LEDs. Software can be tested
using simple hardware as shown in
Fig. 2.
C language provides a built-in
outportb() function to output binary
data to a hardware port. To understand this, let us consider the following program:
#include <dos.h>
main()
{
int i;
printf(Input a decimal number);
scanf (%d,&i);
outportb() (0x0378,i);
}
CIRCUIT
IDEAS
main()
{
int temp=0,i,ch,PORT = 0x0378;
printf(Press x to exit);
run:
for(i=0;i<8;i++)
{
tempb=pow(2,i);
outportb(PORT,temp); /* outputs BINARY no.
to LPT1 */
delay(2000); /*using delay to control speed */
if(bioskey(1))/*To check whether any key is
pressed */
ch=getch();
ch=toupper(ch);
if(ch==X)
{
exit(0);
}
}
goto run;
}
Binary equivalents
00000001
00000010
00000100
00001000
00010000
00100000
01000000
10000000
It is clear from the table that the resulting binary numbers will produce the
running light effect. Delay function defines the speed of running. Go to statement is used to take control unconditionally to for loop, so as to repeat the running process.
By changing the formula of producing
binary number patterns, one can get different actions. The multi-mode light
chaser program is divided into a number
of cases. Each case will produce two or
more actions. These cases are made to
switch automatically using switch statement and one for loop. Further, by changing the delay time, one can increase or
decrease the speed of running lights.
EFY note. The complete source-level
program of multi-mode chaser lights in
C language has been published in Software Section of this issue on page No.
86. It will also be included along with
the executable version of the program in
the next months EFY-CD.
CIRCUIT
IDEAS
EDI
DWIV
S.C.
the bottom part of the LED gets the supply and therefore only the red part of the
LED is lit. The formulae for working out
the values of current-limiting resistors for
each colour LED are shown in Table I.
These relationships are applicable to the
circuits of Figs 1 and 2.
Colour of LED1
Red+green=yellow
Red
Blown
Forward
Forward
Nil
Colour of
LED1 and LED2
Continuous green LED1+
flash red LED1+flash red
LED2=green and yellow
alternate+flash red
Flashing red LED1 and LED2
Supply input
DC
AC
Colour of LED1
Red-continuous
Green-continuous
Alternates between red
and green at 50 Hz and
appears yellow
CIRCUIT
IDEAS
this LED is done usually by using a current-limiting resistor and DC supply only.
All the circuits can be effectively altered to suit an individuals requirement.
Construction
2001
CONSTRUCTION
MAR
IL KU
SUN
CONSTRUCTION
CONSTRUCTION
CONSTRUCTION
CONSTRUCTION
FLUID-LEVEL CONTROLLER
WITH INDICATOR
RUP
ANJA
NA
BHASKAR BANERJEE
The circuit
The main part of the circuit as shown in
Fig. 1 is dot/bar graph driver LM3914
(IC1). This IC is linearly scaled and is
intended for use in LED voltmeter application where the number of illuminated
LEDs indicates the value of input voltage. It contains a floating 1.2V reference
source between pins 7 and 8 that may be
used as the reference input for the IC.
The voltage from the sensor is fed to the
input of IC1 at pin 5.
The output of the sensor may vary
CONSTRUCTION
0 (empty/
low level)
to 4 (full/
high level).
Thus the
five levels
are empty,
one-fourth,
half, threefourth, and
full. This
division is
meant only
for controlFig. 2: Optical sensor
ling the
level, while all levels
including the intermediate levels are
constantly displayed
on LED bar graph.
The lower level
can be set anywhere
between 0 and 3 in
steps of 1 and high
Fig. 3: Sensor
level can be set beusing float
tween 1 and 4. The
operated potmeter
fluid level can be
maintained between any two levels by using IC3 and IC4. IC3 selects the high level
and gets inputs of levels 1, 2, 3, and 4,
while IC4 selects the low level and gets
inputs of levels 0, 1, 2, and 3. All other
unused input pins of IC3 and IC4 are
PARTS LIST
Semiconductors:
IC1
- LM3914 bar/dot display
driver
IC2
- 4069 hex inverter
IC3, IC4, IC5 - 4051 8-channel analogue
multiplexer
IC6
- 4520 dual binary counter
IC7
- 555 timer
IC8
- 4081 quad 2-input AND
gate
IC9, IC10
- 4511 BCD-to-7-segment
latch/decoder/driver
LED1, 3, 5, 7, 9 - Green LED
LED2, 4, 6, 8,
10, 11
- Red LED
Resistors (all -watt, 5% carbon unless
stated otherwise):
R1-R10,
R16-R31
- 470-ohm
R11-R15
- 10-kilo-ohm
R32-R33
- 47-kilo-ohm
R34
- 1-kilo-ohm
VR1
- 10-kilo-ohm preset
Capacitors:
C1, C2
- 22F, 25V electrolytic
C3, C4
- 10F, 25V electrolytic
C5
- 1F ceramic disk
Miscellaneous:
DIS1, DIS2
- Common-cathode
7-segment display
S1, S2
- Push-to-on switch
Fig. 4: Actual-size, single-sided PCB layout for fluid-level controller with indicator
grounded.
The selection takes place according to
the binary word preset at the select input
pins (pin 9, 10, and 11) of IC3 and IC4.
The required binary word is generated by
a dual divide-by-16 counter IC6 (4520).
(IC6 can be replaced by a divide-by-10
counter 4518, if desired.) Half of IC6 is
used for high level and the other half for
low level. IC6 gets its counting pulse from
a 555 timer (IC7) used for generation of
approximately 1Hz pulse train.
The high level is set by pressing
switch S1, while the low level is set by
pressing switch S2. IC6 is reset when the
power is switched on. This power-on-reset function is realised using capacitors
C1 and C2, and resistors R12 and R13.
The part of IC6 connected to high-level
selector also gets reset when the count is
5 (101 binary). This reset pulse is generated using AND gates of IC CD4081.
The selected minimum and maximum
ELECTRONICS FOR YOU AUGUST 2001
levels are displayed by two 7-segment displays DIS1 and DIS2 that are controlled
by two BCD-to-7-segment decoders 4511
(IC9 and IC10, respectively).
The outputs of IC3 and IC4 are fed to
the select input pins of IC5 (4051). The
output of IC5 is fed back to one of its
select inputs through an inverter. IC5 determines the control logic. The pump (or
the heater in temperature controller)
should be on when the fluid (or temperature) level is below the minimum level
and should remain on until the maximum level is reached. It must not start if
the fluid level falls below the maximum
level but remains above the minimum
level. This function is realised by IC5 that
can operate a pump (or an alarm, or a
flow valve, or a heater, as required) according to this control logic. For this, the
input lines of IC5 are set to appropriate
logic levels, which must not be disturbed.
Sensor. To control the fluid level (say,
CONSTRUCTION
September
2001
Circuit Ideas
2001
CIRCUIT
A HIERARCHICAL
PRIORITY ENCODER
IDEAS
MAR
IL KU
SUN
DR BHASKARA RAO N.
CIRCUIT
IDEAS
CIRCUIT
DIGITAL MAINS
VOLTAGE INDICATOR
PRATAP CHANDRA SAHU
IDEAS
EDI
DWIV
.
C
.
S
The voltage from the wipers of presets are multiplexed by CD4067B and the
output from pin 1 of CD4067B is fed to
the non-inverting input of comparator A2
(half of op-amp LM358) after being buffered by A1 (the other half of IC2). The
unregulated voltage sensed from rectifier
output is fed to the inverting input of comparator A2.
The output of comparator A2 is low
until the sensed voltage is greater than
the reference input applied at the noninverting pins of comparator A2 via buffer
A1. When the sensed voltage goes below
the reference voltage, the output of comparator A2 goes high. The high output
from comparator A2 inhibits the decoder
(CD4514) that is used to decode the out-
CIRCUIT
IDEAS
and then adjusting the corresponding preset to ensure that only those LEDs that
are up to the applied voltage glow.
(EFY note. It is advisable to use additional transformer, rectifier, filter, and
regulator arrangements for obtaining a
regulated supply for the functioning of
the circuit so that performance of the circuit is not affected even when the mains
voltage falls as low as 50V or goes as
high as 280V. During Lab testing regulated 12-volt supply for circuit operation
was used.)
CIRCUIT
IDEAS
ELECTRONIC DICE
RUP
ANJA
NA
VIJAYA KUMAR P.
#include <dos.h>
main()
{
int i;
printf(Input a decimal number);
scanf (%d,&i);
outportb(0x0378,i);
}
Fig. 2
TRUTH TABLE
Throw
Data pins
Logic state
D2
D1
State of LEDs
D0
OFF
OFF
OFF
OFF
OFF
OFF
ON
ON
OFF
OFF
OFF
OFF
ON
OFF
ON
OFF
OFF
OFF
OFF
ON
ON
ON
OFF
ON
ON
OFF
ON
OFF
ON
OFF
ON
ON
OFF
ON
ON
ON
ON
ON
ON
ON
ON
OFF
Fig. 1
Display
CIRCUIT
IDEAS
Fig. 3
number, or press letter X to exit the program. The program is given below:
#include <stdio.h>
#include <dos.h>
#include <graphics.h>
#include <stdlib.h>
main()
{
int ran,PORT = 0x0378;
int gd=DETECT,gm,ch,x,y;
initgraph(&gd,&gm , ); /* initializes graphics
mode */
/* Decorating the screen */
x = getmaxx();
y = getmaxy();
setbkcolor(BLUE);
rectangle(10,y-10,x-10,10);
setcolor(YELLOW);
settextstyle(TRIPLEX_FONT,HORIZ_DIR,3);
outtextxy(175,20,**ELECTRONIC DICE**);
setcolor(GREEN);
settextstyle(DEFAULT_FONT,HORIZ_DIR,2);
outtextxy(x/5,180,1.Press T to Throw Dice);
outtextxy(x/5,230,2.Press X to Exit);
/* Actual program */
do
{
ch= getch();
ch= toupper(ch);
if(ch==T)
{
randomize ();
ran=random(6); /* to generate random
number between 0&7 */
ran=ran+1;
outport(PORT,ran); /* outputs BINARY no. to
LPT1 */
}
}
while(ch!=X);
closegraph();
printf(By Vijaya Kumar.p);
exit(0);
}
CIRCUIT
LIGHT-OPERATED ORGAN
IDEAS
MAR
IL KU
SUN
PRADEEP G.
Construction
2001
CONSTRUCTION
EDI
DWIV
S.C.
Circuit
Oscillator. In Fig. 2, Schmitt trigger input NAND gate N1 of IC1 (CD4093), capacitor C1, and potmeter VR1 form the
oscillator circuit. Let us presume that capacitor C1 is in discharged state and pin
2 of gate N1 is in high state. As the input
pin is low, output pin 3 is high and capacitor C1 starts charging through
potmeter VR1.
When the voltage across capacitor
C1 reaches above half of the supply
voltage, input pin 1 of gate N1 goes high
and output pin 3 goes low. Now capacitor C1 discharges through potmeter
VR1. When the voltage across capacitor
C1 falls below half of the supply voltage,
pin 1 of gate N1 goes low and the output
pin goes high. Now capacitor C1 starts
charging again and the cycle repeats
itself.
The pulses from the output of gate
N1 reach counter IC2 through resistor
R1. Switch S1 is provided to stop the
counting manually by grounding the
pulses through R1 when switch S1 is
pressed.
Counter and display. The output of
PARTS LIST
Semiconductors:
IC1
- CD4093 quad 2-input
Schmitt trigger NAND gate
IC2, IC3
- CD4033 decade counter/
7-segment decoder
IC4
- 7805 +5V regulator
T1
- BC557 pnp transistor
T2
- SL100 npn transistor
D1-D7
- 1N4148 switching diode
D8, D9
- 1N4001 rectifier diode
LED1
- Red LED
Resistors (all -watt, 5% carbon, unless
stated otherwise)
R1, R6-R9
- 100-kilo-ohm
R2
- 220-kilo-ohm
R3
- 470-kilo-ohm
R4
- 3.3-kilo-ohm
R5, R10, R11 - 330-ohm
VR1
- 1mega-ohm pot., linear
VR2
- 47-kilo-ohm pot., linear
Capacitors:
C1, C3
- 0.001F ceramic disk
C2
- 4.7F, 10V tantalum
C4
- 1000F, 25V electrolytic
C5, C6
- 0.1F ceramic disk
Miscellaneous:
X1
- 230V AC primary to 9-0-9V
AC, 100mA secondary
transformer
S1, S2
- Push-to-on switch
S3
- SPST switch, 230V AC
DIS1, DIS2 - LT543 7-segment, commoncathode type LED display
SOC1 - SOC4 - Earphone socket
SOC5
- DC IN socket
PZ1
- Piezo-buzzer
- IC bases, knobs, mains
chord, cabinet
- Banana-type earphone plugs
CONSTRUCTION
f
1
0
0
0
1
1
1
0
1
1
CONSTRUCTION
Construction
Figs 3 and 4 show suggested actual-size,
single-sided PCB layout and component
layout, respectively, for the circuit in Fig.
2. Solder the components in the order of
IC sockets, jumpers, resistors, capacitors,
diodes, LED, and transistors. Then connect the rest of the components through
wires. Fig. 5 shows the proposed frontpanel layout of MGMA.
Before connecting VR1 and VR2 to the
PCB, mark the dials using a digital multimeter. Both dial 1 and dial 2 (refer Fig.
5) are calibrated in terms of resistance
for the variable resistance values of 1
mega-ohm in case of VR1 and 47 kiloohm in case of VR2, respectively, using a
digital multimeter. (Note. There may be
dead-ends on both ends of the potmeter,
and it may vary in construction from
manufacturer to manufacturer.) Mark the
dials for every ten units for easy reading
and setting.
Applications
For high-resistance and low-resistance
transducers, use earphone-type sockets
SOC1 and SOC3, respectively. For lowcapacitance and high-capacitance testing,
use earphone-type sockets SOC2 and
SOC4, respectively. For SOC1 and SOC2,
the reading will decrease for the increasing value of resistance and capacitance,
and vice versa for SOC3 and SOC4.
Strength-0-meter. This game requires two small rods or prods. Connect
CONSTRUCTION
CONSTRUCTION
RUP
ANJA
NA
RAJESH GUPTA
The circuit
The circuit has two partsthe first for
generation of control signals for streetlight
and traffic light modes and the second for
generation of four sides of traffic light signals.
The circuit for streetlight and traffic
light modes (Part I) controls the switching
time of streetlights in evenings and mornings and the time to changeover from continuous traffic light mode to blinking yellow light mode (at night), and from blinking yellow light mode to continuous traffic
CONSTRUCTION
Fig. 2: Schematic diagram for the traffic and street light controller
ELECTRONICS FOR YOU SEPTEMBER 2001
CONSTRUCTION
individually to the two inputs of a comparator. Low and high states of the comparator output decide morning and
evening timings, respectively. The output
of comparator is properly delayed for obtaining the signals for streetlight and traffic light modes.
In the detailed circuit diagram shown
above the dotted line in Fig. 2, a natural
light-dependent voltage is obtained at the
junction of light-dependent resistor LDR1
and resistor R7. Resistor R6 is used in
parallel with LDR1 to limit the variation
of the LDR. Light-dependent voltage and
variable reference voltage are connected
to the inverting and non-inverting terminals respectively of comparator IC1(a).
In the evening, voltage at the inverting terminal of the comparator decreases
with time due to the increasing resistance
of LDR1. At a particular natural light intensity (determined by variable reference
voltage, which can be adjusted with the
help of preset VR8), it becomes less than
the voltage at the non-inverting terminal. This drives the comparator into positive saturation region. Similarly, in the
morning the comparator goes into negative saturation region at the same natural light intensity. In this way, the comparator gives high voltage (logic 1) for
evening and low voltage (logic 0) for morning.
IC1(b), with the non-inverting terminal biased at about 1/3rd Vcc, is simply
used as an inverter (though wired as comparator). The inverted output of comparator IC1(a) is coupled to transistor T1
through resistor R4, while its direct output is coupled to transistor T2 via resistor R5.
It is observed that transistor T1 is
cut off in the evening and Vcc is applied
to pin 7 of timer IC3 (wired in astable
multivibrator mode) via resistor combination RA1 (=R2+R3+VR1), while in the
morning T2 is cut off and Vcc is applied
to pin 7 of IC3 via RA2 (=R1+R8+VR2).
In other words, the time period of IC3 is
dependent on RA1 from the evening and
RA2 from the morning.
The diode pair of D1 and D2 or D4
and D5 is used to effectively isolate pin 7
of IC3 from being pulled towards ground
via the conducting transistor (T2 in the
evening and T1 in the morning). Time
period of 555 clock in astable mode can
be determined from the following relationship:
T = RA (C/1.44) + 2 RB (C/1.44)
TABLE I
Functional Summary of Part I Circuit
Time
Output Output at Output at Activated RA Street Traffic
Light Light
of IC1(a) QA of IC5 QH of IC5 Resistance
(LED1) Mode
Evening
HIGH
LOW
LOW
RA1
OFF
A
After 8 cycles of clock-1
HIGH
HIGH
LOW
RA1
ON
A
(Delay time for streetlight)
After 120 cycles of clock-1 HIGH
HIGH
HIGH
RA1
ON
B
(Delay time for night)
Morning
LOW
HIGH
HIGH
RA2
ON
B
After 8 cycles of clock-1
LOW
LOW
HIGH
RA2
OFF
B
(Delay time for streetlight)
After 120 cycles of clock-1 LOW
LOW
LOW
RA2
OFF
A
(Delay time for day)
Evening
HIGH
LOW
LOW
RA1
OFF
A
Delay times and evening/morning times are adjustable.
A: Continuous traffic light mode B: Blinking yellow light mode
ELECTRONICS FOR YOU SEPTEMBER 2001
CONSTRUCTION
CONSTRUCTION
CONSTRUCTION
TABLE II
Daytime Functions of Part II Circuit
Counter
Decoder output
Activated RA
Glowing LEDs
contents
G1 G2 G3 G4
resistance
000000 0 1 1 1
RA3
4,6,9,12 (Yellow light of 1st side and
000001
red light of other sides)
000010 0 1 1 1
RA3
2,6,9,12 (Green light of 1st side and
001101
red light of other sides)
001110 0 1 1 1
RA3
4,6,9,12 (Yellow light of 1st side and
001111
red light of other sides)
010000 1 0 1 1
RA4
3,7,9,12 (Yellow light of 2nd side and
010001
red light of other sides)
010010 1 0 1 1
RA4
3,5,9,12 (Green light of 2nd side and
011101
red light of other sides)
011110 1 0 1 1
RA4
3,7,9,12 (Yellow light of 2nd side and
011111
red light of other sides)
100000 1 1 0 1
RA5
3,6,10,12 (Yellow light of 3rd side and
100001
red light of other sides)
100010 1 1 0 1
RA5
3,6,8,12 (Green light of 3rd side and
101101
red light of other sides)
101110 1 1 0 1
RA5
3,6,10,12 (Yellow light of 3rd side and
101111
red light of other sides)
110000 1 1 1 0
RA6
3,6,9,13 (Yellow light of 4th side and
110001
red light of other sides)
110010 1 1 1 0
RA6
3,6,9,11 (Green light of 4th side and
111101
red light of other sides)
111110 1 1 1 0
RA6
3,6,9,13 (Yellow light of 4th side and
111111
red light of other sides)
Note. The two MSB digits determine the side, while the next four digits determine the time for
which the mentioned LEDs are on.
CONSTRUCTION
Calibration
Set preset VR8 in such a position that the
output of comparator IC1(a) switches from
one state to the other at a particular intensity of natural light. Variable resistors
VR1 and VR2 can be calibrated on a time
scale using the following relationships:
VR1 = (1/120) (1.44 TNight/220) 106
(122.2) 103
VR2 = (1/120) (1.44 TDay/220) 106
(122.2) 103
where TDay and TNight are delay times in
seconds (time interval between switching
of comparator IC1(a) and when the traffic light switches its mode) corresponding
to day and night, respectively.
Variable resistors VR4 through VR7
can be calibrated on a time scale by the
following relationship:
VR (4,5,6,7) = (1/16)(1.44 T/6.8) 106
(122.2) 103 2 VR3
where T is the time allowed (in seconds)
for the side of traffic light in which the
corresponding variable resistance is connected.
Possible enhancements. Stepper
motor-driven wiper can be used for clean-
October
2001
Circuit Ideas
2001
CIRCUIT
IDEAS
EDI
DWIV
S.C.
SUNIL P.B.
CIRCUIT
IDEAS
CIRCUIT
IDEAS
T.K. HAREENDRAN
ere is a stereo tape head preamplifier circuit for your PC sound
card that can playback your
favourite audio cassette through the PC.
Audio signals from this circuit can be di-
rectly connected to the stereo-input (lineinput) socket of the PC sound card for
further processing.
The circuit is built around a popular
stereo head preamp IC LA3161. Weak
electrical signals from the playback heads
are fed to pins 1 and 8 of IC1 via DC
decoupling capacitors C1 and C6, respectively. Components between pins 2 and 3
and pins 6 and 7 provide adequate
equalisation to the signals for a normal
tape playback.
CIRCUIT
IDEAS
EDI
DWIV
.
C
.
S
VIJAYA KUMAR P.
CIRCUIT
gates.
When the output of IC4 (Q) goes
high, the outputs of IC2 get inverted and
IDEAS
CIRCUIT
IDEAS
EDI
DWIV
.
C
.
S
PRADEEP G.
CIRCUIT
IDEAS
EDI
DWIV
.
C
.
S
D. PRABAKARAN
CIRCUIT
A SIMPLE TRANSISTOR
TESTER
IDEAS
EDI
DWIV
S.C.
J. BALAJI
Construction
2001
CONSTRUCTION
CONSTRUCTION
CONSTRUCTION
PARTS LIST
Semiconductors:
IC1
- LM324 quad op-amp
T1
- TIP142 power Darlington
transistor
T2, T3
- BC549 npn transistor
T4-T7
- 2N2222A npn transistor
D1, D2,
D7-D11
- 1N4007 rectifier diodes
D3-D6, D12 - 1N5408 rectifier diodes
LED1
- Green LED
LED2
- Red LED
LED3
- Bright yellow LED
LED4, LED5 - Bright green LED
LED6, LED7 - Bright red LED
ZD1
- 15V, 1W zener diode
ZD2
- 6.8V, 1W zener diode
Capacitors:
C1, C2
- 2200F, 40V electrolytic
C3
- 1000F, 40V electrolytic
C4
- 470F, 25V electrolytic
C5
- 100nF ceramic
Resistors (all -watt, 5% carbon unless
stated otherwise)
R1-R4
- 15-kilo-ohm, 1W
R5
- 2.2-kilo-ohm
R6
- 4.7-kilo-ohm, 0.5W
R7, R10, R12 - 1-kilo-ohm
R8
- 100-ohm
R9
- 470-ohm
R11
- 4.7-kilo-ohm
R13
- 47-ohm
R14-R15
- 0.66-ohm, 3W wirewound or
fusible
R16
- 0.67-ohm, 3W wirewound or
fusible
R17
- 0.20-ohm, 3W wirewound or
fusible
R18
- 0.47-ohm, 3W wirewound or
fusible
R19
- 1.0-ohm, 1W wirewound
R20-R23
- 470-ohm, MFR 0.5% or 0.1%
R24
- 820-ohm, MFR 0.5% or 0.1%
R25
- 10-kilo-ohm, MFR 0.5% or
0.1%
R26-R28
R29
VR1-VR2
VR3
VR4
Miscellaneous:
RL1-RL4
-
1.2-kilo-ohm
1.5-kilo-ohm
2.2-kilo-ohm preset
10-kilo-ohm preset
15-kilo-ohm preset
X1
S1
F1
TABLE
LED/Relay Operation and Charging Resistance
Battery
voltage
LED/Relay status
LED3
LED4
LED5
/RL1
/RL2
/RL3
<10.5V
Off
Off
Off
10.5V
On
Off
Off
11.5V
On
On
Off
12.5V
On
On
On
13.5V
On
On
On
* 0.5A is taken as the trickle charging current.
against the preset values and the charging current is selected accordingly. Thus
a battery of any charge level can be connected and left unattended under the control of this charger circuit.
When the battery is flat with terminal voltage below 10.5 volts, the initial
charging current is selected at just one
ampere because a higher initial charging
current may cripple both the battery and
the charger. A higher charging current is
LED
/RL4
Off
Off
Off
Off
On
Charging
resistance
Preset
current
1 ohm
0.33 ohm
0.53 ohm
1 ohm
2 ohms
1A
3A
2A
1A
0.5A*
resumes charging.
Figs 3 and 4 show the actual-size,
single-sided PCB and the component layout, respectively, of the charger circuit.
Note. To ensure proper functioning
of the circuit, use good-quality relays and
precise-value resistors (R14 through R24)
with tolerance as mentioned in the Parts
List. Connect the metal housing of the
charger circuit to the earth line of the AC
CONSTRUCTION
MICROCONTROLLER-BASED
DIGITAL CLOCK
Hardware
NJA
UPA
NA
CONSTRUCTION
continued...
CONSTRUCTION
contd...
Range
0-7
0-59
0-59
0-23
Frequency of increment
Every 125 milliseconds
Every second
Every minute
Every hour
CONSTRUCTION
PARTS LIST
Semiconductors:
IC1
- 68HC705P6A Motorola
microcontroller
IC2
- LM7805 regulator +5V
IC3
- 74LS374 octal latch
IC4
- 7406 hex inverter (opencollector)
D1
- 1N4001 rectifier diode
Resistors (all -watt, 5% carbon unless
stated otherwise):
R1
- 4.7-mega-ohm
R2, R3
- 10-kilo-ohm
R4-R7
- 33-kilo-ohm
VR1
- 2-kilo-ohm preset
Capacitors:
C1, C6
- 10F, 16V electrolytic
C2
- 0.22 ceramic disk
C3
- 1F, 16V tantalum
C4, C5
- 33pF ceramic disk
C7
- 10F, 35V electrolytic
Miscellaneous:
LCD
- LCD module (16 characters
x 1 row)
Pz1
- Piezobuzzer
S1-S3
- Tactile switch
XTL
- 4MHz quartz crystal
- 9 -12V, 200mA supply
source
Software
The complete software is assembled and
tested using WINIDE (Windows-based integrated development environment) that
allows seamless integration of several different program modules into one development environment. Its edit utility is
used to create the assembly file (.Asm) in
text mode.
The .Asm file is created only when
there are no errors and produces two files
with extensions, namely, .Lst and .S19.
The .Lst is a listing file in text mode that
includes variable, addresses, code, etc. The
.S19 file contains information relating to
address, code/data, start and termination
November
2001
Circuit Ideas
2001
CIRCUIT
SPELLER EFFECT
SIGN DISPLAY
IDEAS
EDI
DWIV
S.C.
VIJAYA KUMAR P.
he circuit described here uses lowcost and easily available IC
CD4017 to produce a speller type
light display. In such displays, each letter of the sign sequentially lights up, one
after the other, until all letters are glowing. After a few seconds, the letters switch
off and the cycle repeats. This circuit provides a maximum of nine channels and
therefore can be used to spell a word or
sign having up to nine characters.
Timer IC1 (555) is configured in
high, transistor T1 goes off and its output at the collector goes low. Since the
emitter of transistor T2 is connected to
the collector of transistor T1, and collector and emitter terminals of transistors
T1 through T9 are connected in series,
all transistors next to transistor T1, i.e.
transistors T2 through T9, do not get supply and hence all their outputs go low.
Next, when Q1 output goes high, transistor T2 goes off. Thus outputs of transistors T2 through T9 remain low. Since
Q0 output at this instant is low, transistor T1 is forward biased and its output
goes high to light up the first character.
Similarly, when Q2 output goes high,
Q0 and Q1 outputs are low and therefore
outputs of transistors T1 and T2 go high
to light up the first and second characters.
This process continues until all transistors turn on, making all the characters
CIRCUIT
DARKROOM TIMER
IDEAS
MAR
IL KU
SUN
D. PRABAKARAN
A tone signal is generated by transistor T2 and R-C coupled phase-shift oscillator. Part of the signal taken from the
collector of transistor T2 is coupled to a
small speaker through a transistor-radio
type output transformer.
The 22-kilo-ohm value of resistor R3
represents a compromise between tone duration and intensity. You can use resistors having a value anywhere between 10
kilo-ohms and 25 kilo-ohms for different
durations and intensities of the output
signals.
Since the unijunction transistor is
functioning as the oscillator trigger,
changing the values of one or more components in the UJT circuit will change
the rate of the tone burst. The tone frequency can be varied by changing the
value of any or more of capacitors C2
through C4 and resistors R5 and R6 in
the phase-shift network.
The primary winding of transformer
X1 can be tuned for a slight increase in
the output, using capacitor values between 0.05 and 0.25 F for C5 by trialand-error method. Tone pulses should begin about ten seconds after the unit is
turned on. After a minute or so, adjust
preset VR1 for 1-second beats by comparing the timing of the beats with the seconds needle on your wristwatch.
CIRCUIT
LONG-RANGE
TARGET SHOOTER
IDEAS
EDI
DWIV
.
C
.
S
everybody to have a gun. The circuit presented here makes you feel the excitement of shooting a target situated at a
distance of more than 100 metres without any risk or much expenditure.
The circuit simply uses a laser pointer
(also referred to as laser torch) as the
transmitter at the gun end. Laser pointers can reach a maximum of 1 kilometre
distance but it is advisable to limit the
range within, say, 200 metres.
While constructing the gun no change
has to be made in the readymade pointer.
Just tightly fit the pointer inside the toy
gun, so that the triggering switch can activate the press-to-on button of the laser
pointer, as shown in Fig. 1.
The receiver comprises a counter-cum7-segment display driver IC (CD4033)
with a debouncer formed by 555 timer
and an LDR sensor at the input. The
counter works as a scoreboard and directly
shows the number of successful hits.
The LDR senses the pointers laser
beam and activates the monostable
multivibrator wired around 555 timer IC.
To increase the sensitively of the receiver,
the LDR current is amplified by transistors T1 and T2. The timer pulse-width is
set at around 100 milliseconds so as to
work as a debouncer. The timer output is
coupled to IC CD4033.
CD4033 is a serial decade countercum-7-segment decoder/driver. With every output pulse from monostable IC1,
the count in CD4033 gets incremented by
one. Thus the output of IC2 reflects the
latest score by a competitor. Pressing reset switch resets the display too.
You can increase the size of the
display board manyfolds using the additional circuit shown in Fig. 3. This mul-
CIRCUIT
IDEAS
CIRCUIT
IDEAS
EDI
DWIV
S.C.
operation.
The number of turns in inductor L1
would have to be reduced as operation
area shifts towards the upper end of the
high-frequency band. A 180H RFC in se-
CIRCUIT
IDEAS
EDI
DWIV
.
C
.
S
PRADEEP G.
ere is a simple power supply circuit that can be used for citizen-band and VHF walkie-talkies of power rating up to 10 watts. The
circuit uses a step-down transformer, followed by bridge rectifier, filter, regulator, and current booster stages.
A pnp power transistor is added to
the circuit to increase its current sourcing capabilities. Regulator 7812 can support around 100 mA current. When the
current flowing through R1 nears 100mA
value, the voltage (>0.65V) across the
emitter-base junction makes transistor T1
to conduct and provide a path for additional current.
The circuit can source around one ampere of current at 12+1.4 volts=13.4 volts.
CIRCUIT
HIGH-PERFORMANCE
INTERRUPTION DETECTOR
IDEAS
EDI
DWIV
S.C.
JUNOMON ABRAHAM
Construction
2001
CONSTRUCTION
AMPLITUDE MEASUREMENT OF
SUB-MICROSECOND PULSES
ANIL KUMAR MAINI
RUP
ANJA
NA
The circuit
The pulse under measurement is fed to
the input of a cascaded arrangement of
two unity-gain peak detection stages built
around IC1 and IC2 using high-speed opamps AD829, as shown in Fig. 1. The opamp has a guaranteed unity-gain bandwidth of 120 MHz and a slew rate of 230
V/s, and it is capable of driving highly
capacitive loads. This makes it ideal for
receiving input pulses as narrow as 100
ns. D1 and D2 (1N914) are high-speed
switching diodes having a response time
of the order of 2 ns to 3 ns.
The input pulse gets stretched to
about 10 s at the output of the first peakdetection stage built around IC1 and to
about 100 s at the output of the second
peak-detection stage built around IC2.
With switch S1 open, the circuit can
CONSTRUCTION
feeding the
same to the
analogue input of IC5
(ADC-type
AD0808). This
ensures that
for the maximum input
pulse amplitude of 100
volts, the ADC
analogue input is limited
to 5 volts,
which is the
maximum amplitude it can
accept.
The output of the first
peak detector
stage after a
division by a
factor of 2 by
the arrangement of resistors R11 and
R12
feeds
comparator
Fig. 2: Waveforms at various points of the circuit
LM319 (IC3).
The leading edge of the pulse output from
ment of resistors R1 through R3.
The peak amplitude of the stretched the comparator coincides with the leadpulse at the output of the second peak ing edge of the input pulse. The leadingdetector is the same as the input pulse edge comparator output triggers monoshot
peak amplitude. This output amplitude is 74121 (IC4) to produce a 1s pulse (as
halved by resistors R9 and R10 before determined by timing components R17-
CONSTRUCTION
DAC output, which is a latched DC current, is converted into a proportional voltage in the current-to-voltage circuit built
around op-amp LF356 (IC7). This DC voltage is connected to the multimeter for
indication of peak amplitude of the input
pulse to the circuit. Potentiometer VR1 is
meant for calibration.
Operation
Every time there is a pulse at the input,
there is a stretched pulse appearing at
the analogue input of the ADC, with its
leading edge coinciding with the leading
edge of the input pulse. Fig. 2 shows waveforms available at various test points marked A,
B, C, D, and E in the circuit shown in Fig. 1.
Also, there is a start-ofconversion pulse appearing at the relevant input
of the ADC. The conversion starts at the trailing edge (test point E) of
this pulse 1 s after the
leading edge of the input
pulse.
Since the stretched
pulse is about 100s
wide, the peak amplitude
of the pulse 1 s later is
almost the same as the
actual peak amplitude.
At the same time, this
small delay ensures that
ELECTRONICS FOR YOU NOVEMBER 2001
PARTS LIST
Semiconductors:
IC1, IC2
- AD829 op-amp
IC3
- LM329 comparator
IC4
- 74121 monostable
multivibrator
IC5
- AD0808 analogue-to-digital
converter
IC6
- DAC0808 digital-toanalogue converter
IC7
- LF356 op-amp
IC8 (N1-N3)
- 74HCT04 hex inverter
IC9 (N4-N7)
- 7400 NAND gate
D1, D2
- 1N914 high-speed switching diode
ZD1
- 2.5V zener diode
Resistors (all -watt, 5% carbon, unless
stated otherwise):
R1, R2
- 18-kilo-ohm
R3, R16
- 1-kilo-ohm
R4
- 12-kilo-ohm
R5, R6
- 22-kilo-ohm
R7, R8
- 15-kilo-ohm
R9-R12
- 100-kilo-ohm
R13
- 470-ohm
R14
- 220-kilo-ohm
R15, R18, R19,
R24, R25
- 10-kilo-ohm
R17
- 2.2-kilo-ohm
R20, R21
- 2.7-kilo-ohm
R22
- 4.7-kilo-ohm
R23
- 33-kilo-ohm
VR1
- 50-kilo-ohm preset
Capacitors:
C1, C2, C4, C5,
C7-C9, C11-C17
C19
- 0.1F ceramic disk
C3, C10
- 0.001F ceramic disk
C6
- 0.01F ceramic disk
C18
- 56 pF ceramic disk
Miscellaneous:
S1, S2
- On/off switch (SPST)
Meter
- Multimeter
CONSTRUCTION
AUTOMATIC SUBMERSIBLE
PUMP CONTROLLER
MAR
IL KU
N
U
S
K.C. BHASIN
Fig. 1: Line diagram of control panel for manual operation of ESP motor
ESP basics
Electrical submersible pumps are singleor multiple-stage radial-flow pressure series impeller pumps that are close coupled
to the motor for low and medium heads.
These find applications in domestic, industrial, irrigation, air-conditioning, and
various other systems.
The ESPs are classified by the bore
diameter (which generally varies from 100
mm to 200 mm), horse-power (from about
0.5 HP to 40 HP), and discharge rate (typically 120 litres per minute for 0.5 HP to
about 2000 litres per minute for 40 HP).
These are run at a fixed speed, which is
tor, the run capacitor value can be calculated using the simple thumb rule (70 F
per HP), while the start capacitor value
may be determined from Table I.
Manual operation of ESP motor
(Fig. 1). The control panel comprises an
isolator switch, push-to-on single-/dual-section start button, push-to-off stop button, a triple-pole moulded case circuit
breaker (MCCB) for motor protection with
magnetic trip and resetting facility (with
an adjustable current range of 12 to 25
amperes), start and run capacitors, ampere-meter, voltmeter, neon indicators, etc.
(Note. The MCCBs used for motor
control are termed as motor circuit protectors (MCPs). These are classified/catalogued by number of poles, continuous
ampere rating, and magnetic trip range
(current). For details, you may visit Cutler-Hammers Website or contact Bhartia
Cuttler-Hammer dealers.)
Fig. 1 shows a simplified control panel
diagram, along with ESP motor wiring.
The start pushbutton (green), which is
normally open, and the stop pushbutton
(red), which is normally closed, are in series with the live or phase line.
The isolator switch is normally in on
position. When start button is momentarily pressed, the contactor energises via
the closed contacts of off button. One of
the contact pairs of the contactor is used
as the hold contact to shunt on button
and provide a parallel path to the
Motor rating
in HP
CONSTRUCTION
Fig. 2: Circuit diagram for automatic control of ESP motor via control panel (Fig. 1)
going to off button terminal, i.e. in series with off button). Points E and F will
be used if the ESP does not have an integral centrifugal switch.
It may be recalled, by referring to Fig.
1 of the project Auto Control for 3-phase
Motor published in EFYs June issue, that
wiring of on and off buttons of 3-phase
(4-wire system) and split-phase motors are
identical. Hence the control circuit described here can equally be used for 3phase motors of up to about 10 HP. For
motors of higher HP, one must use stardelta type starter configuration.
The circuit
As shown in Fig. 2, the 230V AC mains
(tapped from the same points from which
it is fed to the control panel of Fig. 1) is
stepped down to 12V-0-12V by transformer X1. The rectified output smoothed
by capacitor C1 is used for operation of
heavy-duty 24V, 250-ohm relays RL1 and
RL2 having contact rating of 30 amp. The
relay contacts identified by letters A
through F in Fig. 2 are to be connected
to identically marked points in Fig. 1.
Note that point C in Fig. 1 is created
CONSTRUCTION
Precautions
The following are the vital points to be
borne in mind during wiring, assembly,
and installation:
1. One-watt resistor R18 should be
mounted leaving some space below it.
2. Use multistrand insulated copper
wires of 15-amp rating for taking connections from relay terminals and terminate
them on a tag block, marking each terminal properly. Similarly, terminate the
points to be extended to the OHT/storage
tank on a tag block (TB) using 25-28SWG
wire, marking them suitably.
3. Mount the relays inside the body of
a suitable metallic enclosure. The enclosure should be properly earthed via the
earth lead of the mains. Also mount the
step-down transformer inside the same
enclosure/cabinet. Use a TB for incoming
live, neutral, and earth connections from
the mains (to be taken from the manual
control panel of ESP motor).
4. After assembly, position the cabinet as close to the manual control panel
of ESP motor as possible and extend connections from tag blocks for relay and
power supply to the corresponding points,
as explained earlier, using cables of cor-
PARTS LIST
Semiconductors:
IC1, IC2
- NE555 timer
IC3
- CD4049 hex inverter/buffer
T1, T2
- BC548 npn transistor
T3, T4
- BD139/SL100 npn transistor
D1-D4, D7-D9 - 1N4007 rectifier diode
D5, D6
- 1N4001 rectifier diode
ZD1
- 12V, 1W zener diode
Resistors (all -watt 5% carbon unless
stated otherwise)
R1, R3, R5,
R7, R9, R12,
R14
- 10-kilo-ohm
R2, R6, R11,
R15-R17
- 1-kilo-ohm
R4, R13
- 220-kilo-ohm
R8, R10
- 330-kilo-ohm
R18
- 330-ohm
Capacitors:
C1
- 470F, 63V electrolytic
capacitors
C2
- 470F, 25V electrolytic
capacitors
C3, C7
- 47, 25V electrolytic
capacitors
C4, C6
- 0.01F ceramic disk
C5, C8
- 10F, 25V electrolytic
capacitors
Miscellaneous:
X1
- 230V AC primary to 12V-012V, 1amp
Secondary transformer
L1
- NE2 (neon bulb with inbuilt
resistor)
S1
- On/off switch
F1
- 3amp fuse
RL1
- 24V, 250-ohm, 1 c/o relay,
30A contact rating
rect ratings.
5. For probes, use stainless steel rods
of about 10cm length and 5 to 8 mm diameter with arrangement for screwing the
telephone-type 25/26 SWG wire to be used
for extending the probes connections to
the circuit. Teflon-insulated wires are,
however better as they would last longer.
The joint may be covered by epoxy.
6. The probes can be hung from the
lid of the tank to appropriate levels using
the same wire. Make sure that the common probe goes up to the bottom of the
tank/storage tank.
7. All the wires from tank to the TBs
in the cabinet should be routed in such a
way that they do not interfere with any
mains wiring. The length of the wires
hardly matters as the CMOS gates used
for terminating the wires from probes
have very high input impedance.
EFY note. The above circuit is being
used with ESP motor control panel at EFY
head office and is performing satisfactorily for over two months now.
December
2001
Circuit Ideas
2001
CIRCUIT
IDEAS
functioning as they should during operate and release conditions, the tester immediately displays fail on 7-segment display. If the relay under test is good, the
display shows pass on 7-segment display.
When the mains supply is connected
to the circuit by closing switch S1, 5V DC
supply goes to the ICs, transistors (collectors), and common points (poles) of the
relay under test, and 12V DC supply goes
As soon as the relay is inserted in 28pin ZIF socket and test pushbutton S2 is
pressed, the tester displays pass or fail
on 7-segment display. If the relay coil is
open or N/O and N/C contacts are not
EDI
DWIV
S.C.
KRISHNA SHARMA
CIRCUIT
IDEAS
tester.
2. Insert the relay to be tested into
ZIF socket and lock it.
3. For 4C/O relay leave knob S3 released, and for 2C/O relay keep the knob
pressed.
4. Press test switch S2 and observe
the display for pass/ fail.
5. Unlock ZIF socket and segregate
the relay as per the result.
CIRCUIT
DECORATIVE SIGNBOARD
PRATAP CHANDRA SAHU
IDEAS
EDI
DWIV
S.C.
CIRCUIT
For illuminating more than one message, use two rows of characters wired
reverse to each other. This sequence of
characters in opposite directions gives a
special effect.
The characters can be made by wiring
IDEAS
CIRCUIT
OVERLOAD PROTECTOR
WITH RESET BUTTON
IDEAS
MAR
IL KU
SUN
VIJAY KUMAR P.
CIRCUIT
FASTEST FINGER
FIRST INDICATOR
IDEAS
uiz-type game shows are increasingly becoming popular on television these days. In such games,
fastest finger first indicators (FFFIs) are
used to test the players reaction time.
The players designated number is displayed with an audio alarm when the
player presses his entry button.
the active-low input condition into the corresponding binary coded decimal (BCD)
number output. The outputs of IC4 after
inversion by inverter gates inside hex inverter 74LS04 (IC5) are coupled to BCDto-7-segment decoder/display driver IC6
(7447). The output of IC6 drives common-
EDI
DWIV
S.C.
P. RAJESH BHAT
CIRCUIT
CONDENSER MIC
AUDIO AMPLIFIER
IDEAS
MAR
IL KU
SUN
D. PRABAKARAN
CIRCUIT
SMOKE ALARM
IDEAS
EO
I TH
SAN
PRADEEP G.
Construction
2001
CONSTRUCTION
A. SARAVANAN
Block diagram
The transistor curve tracer is built around
the ramp generator and the current-tovoltage converter. The ramp generator
produces a linear ramp that is applied to
the transistor under test either as the
collector-emitter voltage (VCE) or the baseemitter voltage (VBE). The ramp is also
used to deflect the electron beam horizontally (along x-axis) on the screen of
the CRO. Similarly, the current-to-voltage converter converts either the collector current (IC) or the base current (IB)
into a proportional voltage that is used to
deflect the electron beam vertically (along
y-axis) on the screen.
The signal conditioning and switching circuits, along with the ramp generator and current-to-voltage converter, make
a complete curve tracer for the input and
output characteristics of an npn transistor.
Output characteristics (Fig. 1). The
ramp and clock generator generates a linear ramp and 1 kHz clock pulses. The
ramp is amplified by the ramp buffer amplifier to 0 to 5 volts. This amplified ramp
is applied to the collector of the transistor under test as the collector-emitter voltage (VCE) through the current-to-voltage
converter.
The current-to-voltage converter gives
an output voltage proportional to collector current IC that is applied to the CRO
to deflect the beam in y-axis. The 0-5V
ramp output is applied to the CRO to deflect the beam in x-axis. Hence we can
trace the output characteristics of the
transistor with the collector-emitter voltage (VCE) on x-axis and IC on y-axis.
To trace the output characteristic
graph for various base current (IB) values, the generators clock output fed to
the counter is incremented for each clock
pulse. The count sequence is 000, 001,
010, 011, 100, 101, 110, and 111 (0 to 7
decimal). After 111, the counter resets automatically to 000 and the sequence repeats. The lower three bits of the counter
are applied to the base-current control circuit.
The base-current control circuit sets
IB in eight discrete 100A steps, i.e. 0 A,
CONSTRUCTION
counts the number of pulses in the binary form. Q0 output of the counter is
used as the collector-emitter voltage control that toggles VCE with 0 volt and 10
volts for every clock pulse. Thus we can
trace the input characteristics for VCE = 0
volt and VCE = 10 volts.
The circuit
The transistor curve tracer circuit (Fig.
3) comprises power supply, ramp and clock
generator, ramp buffer and offset null,
current-to-voltage converter, counter, base
current control, and switching sections.
1. The power supply section. The
circuit operates on 12V regulated power
supply. The input AC mains supply is
stepped down by transformer X1 to deliver a secondary supply of 15-0-15V AC
at 1 ampere. The output of the transformer is rectified by a bridge rectifier.
The 1000F, 35V capacitors act as filters
to eliminate ripples and provide unregulated DC output voltage.
The unregulated dual DC voltage is
converted by three-terminal ICs AN7812
and AN7912 into 12V regulated power
ELECTRONICS FOR YOU DECEMBER 2001
CONSTRUCTION
CONSTRUCTION
CONSTRUCTION
circuit. We cannot apply this small floating potential directly to the CRO for a
significant deflection. Therefore we use a
differential amplifier to have an output
voltage with respect to the ground that is
proportional to the current though the circuit. The differential amplifier has a gain
of 100 that can be fine-tuned with the
help of gain adjust preset VR7 in the feedback path.
The current-to-voltage converter converts the current of 1 mA into a potential difference of 1 volt that can be applied to the CRO to deflect the beam in
vertical axis. In order to nullify the offset voltage of the op-amp, connect a balancing preset to the offset null terminals
of the op-amp.
5. The counter section. The base current (IB) is to be changed in discrete steps
for every ramp to enable the transistors
output characteristics for various IB values simultaneously on the CRO screen.
In the counter circuit, the output of
timer 555 (IC3) from pin 3 is a square
wave that intimates the end of ramp. This
output is used as clock pulse for the
counter wired around CMOS binary/decade, up/down IC MC14029B or CD4029B
(IC7).
IC7 is wired as a 3-bit binary upcounter so that the output of the counter
(Q2, Q1, and Q0) is incremented by bi-
Construction
Wire the circuit on a 2.5mm, IC-type general-purpose printed circuit board (PCB)
as shown in Fig. 3. The use of glass-epoxy PCB is recommended. An actual-size,
single-side PCB for the circuit is shown
in Fig. 4, with its component layout shown
in Fig. 5.
Carefully solder all the components
and use sockets for ICs. All range resistors used should be stable, close-tolerance
type (preferably MFRs). Preferably use
linear-type IB SET potentiometer and
mount it on the front panel of the instrument. Enclose the circuit board, power
transformer, and other circuit components
in a metal box having approximate dimensions of 22x17x7.5 cm. Extend input
and output leads to the corresponding
points in the circuit. Terminate the outputs for connection to the CRO in BNC(F)
connectors.
Calibration
After construction, check the circuit thoroughly for short circuits, breaks, and open
circuits on the PCB. After switching on
the instrument, let it warm up for a few
minutes before commencing with the calibration. Calibration procedure of the circuit is as follows:
1. Check and ensure 12V regulated
voltage with respect to ground.
2. Connect a CRO to shorted pins 2
CONSTRUCTION
and 6 of timer 555 (ramp output). A linear ramp with positive slope is observed
on the screen of the CRO. By adjusting
frequency control potentiometer VR1, set
the frequency of the ramp at 1 kHz (refer
waveform 1 in Fig. 6).
3. Connect the CRO to the output of
ramp buffer. Adjust preset VR2 to nullify
the DC offset voltage in the output of
ramp buffer. Adjust preset VR3 to set the
amplitude of ramp output to 0 to 5 volts
(refer waveform 2 in Fig. 6).
4. Connect CRO at the output of ramp
attenuator and amplifier. Adjust preset
VR4 to nullify the DC offset voltage in
the output of ramp buffer. Adjust preset
VR5 to set the amplitude of ramp output
to 0 to 1 volt (refer waveform 3 in Fig. 6).
5. Calibrate the current-to-voltage converter by connecting a 1-kilo-ohm. 1%
metal film resistor between the collector
and emitter terminals of the transistor
under test. Connect the output of the current-to-voltage converter to a CRO. By
observing the ramp waveform on the
PARTS LIST
Semiconductors:
IC1
IC2
IC3
IC4, IC6
-
IC7
IC8
ZD1
Miscellaneous:
X1
- 230V AC primary to
15V-0-15V AC, 500mA
secondary transformer
S1
- On/off switch
S2
- DPDT switch
screen of the CRO, nullify DC offset voltage using preset VR6 and adjust the amplitude of the observed ramp waveform
to 0-5 volts with the help of preset VR7.
Calibrate the current-to-voltage converter
to convert 1 mA of current into 1 volt
(refer waveform 4 in Fig. 6). Then check
the clock output by connecting the CRO
to pin 3 of timer 555 (refer waveform 5 in
Fig. 6).
6. Verify the outputs of the counter
by using a dual-trace oscilloscope. Connect one input channel of the CRO with
clock pulses at pin 3 of IC3 and the outputs at pins 6, 11, and 14 of counter IC7
to the other input of the CRO sequentially (refer waveforms 5, 6, 7, and 8 in
Fig. 6).
7. Short-circuit the base-emitter terminals of the transistor under test. Select input/output characteristics switch S2
to output characteristics position and connect the CRO to the output of the current-to-voltage converter. By adjusting IB
SET potentiometer VR8 on the front panel
of the instrument, check proper operation of the base-current section by observing stair-case ramp of varying amplitude
on the screen of the CRO (refer waveform 9 in Fig. 6).
Operation
After calibration, the instrument is ready
for use to trace the input and output characteristics of npn transistors. Follow the
operating procedure given below every
time to get correct traces of input and
output characteristics of the transistor:
1. Connect the x-axis and y-axis BNC
pins of the transistor curve tracer to the
corresponding inputs of the CRO.
2. Plug in the AC cord of both the
CRO and the transistor curve tracer and
switch them on.
3. Set the CRO inputs to ground.
4. Allow warm-up time of at least 10
minutes for the circuit components to get
stabilised.
5. Set the CRO for X-Y mode of operation.
6. Adjust intensity and focus controls
to get a sharp spot on the screen of the
CRO.
7. Set the volts/div control of x-axis to
0.5 volt/div.
8. Set the volts/div scale of y-axis to 2
volts/div.
9. Adjust the position controls of the
CRO to position the spot on the left botELECTRONICS FOR YOU DECEMBER 2001
Conclusion
To draw the characteristics of pnp transistors, insert an inverter circuit in the
ramp path of collector-emitter voltage VCE
and base-emitter voltage VBE, and invert
the output of the current-to-voltage converter.
By using a potential divider and
buffer amplifier circuit in place of the
base-current control circuit you can draw
the characteristics of FETs and
MOSFETs.
To trace the forward characteristics
of diodes, connect the anode of the diode
to the base terminal and the cathode to
the emitter terminal. Set the transistor
curve tracer to draw input characteristics, and the CRO screen displays the
forward characteristics of the diode.
Similarly, with simple add-on circuits
to the motherboard, you can draw the
characteristics of UJTs, SCRs, TRIACs,
etc.
Thin and faint retrace lines visible
along with the characteristic traces can
be removed by connecting a retrace blanking circuit to the Z-mod input of the CRO.
Almost all CROs exceeding 30MHz bandwidth have the Z-mod input facility.
CONSTRUCTION
TRIPPING SEQUENCE
RECORDER-CUM-INDICATOR
MAR
IL KU
SUN
The circuit
IC1 and IC2 (CD4043) Quad NOR RS flipflops in Fig. 2 are used to capture and
store the information pertaining to the
tripping of individual units. Reset pins of
all the eight flip-flops and sub-parallel enable (PE) pin 1 of BCD up-/down-counter
CD4510 (IC3) are returned to ground via
10-kilo-ohm resistor R22, while set pins
of all RS flip-flops are returned to ground
CONSTRUCTION
Operation
Let us assume that three units,
say, E, H, and A (fifth, eighth,
and first), tripped in that order
following a fault.
When the system is reset (before any tripping), the outputs of
all RS flip-flops (1Q through 8Q)
are low. This LE* active-low
makes latches IC4 through IC11
transparent and as the counter
is preset to 1 (since P1 input is
high while P2, P3, and P4 are
low) with the help of switch S9,
all the latches hold that 1 and
their decoded b and c segment
outputs go high.
However, the common-cathode drive is absent in all the 7segment displays because driver
transistors T4 through T11 are Fig. 3: Actual-size, single-side PCB of the main control portion of tripping sequence controller-cumcut off due to the low outputs of indicator circuit
ELECTRONICS FOR YOU DECEMBER 2001
CONSTRUCTION
The End