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flow is observed.
On the other hand, in this paper conventional grid
connected inverter topology, that is DPGS, is taken into
account [5]. Hardware schematics is shown in Fig 1. It
should be noted that no DC-link side rectifier is used. DClink is rather charged via inverter itself, or specifically via
freewheeling diodes. This way, experimental setup is
simplified, without losing any functionalities met in
inverter with separate rectifier. In order to properly charge
DC-link on startup pre-charge resistors and an
appurtenant contactor are used.
1. INTRODUCTION
Applications in which inverter is a focal point can be
roughly devided in three categories. The first is one in
which inverter acts as a bridge between renewable energy
sources and existing grid. These applications are generally
referred to as distributed power generation systems. The
second group is comprised of motor drive applicarions in
which inverter acts as a bridge between existing grid or
other source of energy, and motor drive. The last group
includes other applications that do not belong to previous
two (var compensators etc.)[1]. Although these
applications are quite different, system models are similar
if not the same and thus controller synthesis proposed
here can be extended and applied to most of the abovementioned applications[2]. Hardware is also similar, and
thus hardware setup proposed here can be used as a
starting point in many inverter applications.
Traditional control structures in grid-tie inverter based
applications comprise of outer voltage loop and of inner
current loop[3]. Voltage loop controlls DC-link voltage,
and thus, indirectly the power flow. Inner current loop
controls the current flow and secures inverter from
reaching undesired working points. This paper focuses on
voltage loop controller parameters determination (current
loop parameters being determined following the wellknown Dahlins algorithm[4]). As it will be shown,
through both simulation and experimental results,
following proposed algorithm fast aperiodic response is
d id
=ri d + xiq +u dC udG
dt
di
el q =ri qxi d + uqC uqG
dt
el
(0)
(0)
pG=u dG i d
qG =udG i q
(0)
Fig 4. Simplified current loop.
(0)
K pi =
dq
1e T
K( e
Ti
Ts
(0)
1)
Ti
Ts
(0)
K i =e 1.
i dq
K idc T dc 2 z
Gsl = 3 2
z + z ( K 1 + K 22 ) + z ( K 2 +1 )K 1
Where:
K T
K T
K 1= pdc dc , K 2= idc dc
2
2
(0)
(0)
zz 3
z + z (z 1z 2z 3 )
+ z ( z 1 z2 + z 1 z 3 + z2 z 3) z 1 z 2 z 3=0
(0)
z 1+ z 2 + z 3=2K 1 K 2
z 1 z 2+ z1 z3 + z 2 z 3=K 2 +1
z 1 z 2 z 3=K 1
(0)
z p=0.587 .
(0)
Proportional and integral values of DC-link voltage loop
should be set according to (0).
z 3p 0.202
Kp =
=
,
T dc
T dc
2
2
2
3 z p1 0.0337
Ki =
=
.
T dc
T dc
2
2
udc
(0)
udc