A Sub-100W 2GHz Differential Colpitts

CMOS/FBAR VCO
Jianlei Shi and Brian P. Otis
University of Washington
Seattle, WA 98105, USA
(jlshi,botis)@uw.edu
Abstract- We present a thin film bulk acoustic wave resonator
(FBAR)-based Colpitts VCO with a cross-coupled gain boosting
transistor pair. The combination of the cross-coupled pair and
capacitive feedback in the Colpitts oscillator increases the
effective gm to reduce the start-up current requirement,
increases the output swing at a low supply voltage, and reduces
the phase noise. The differential Colpitts VCO was fabricated in
a 0.13m CMOS process and oscillates at 2GHz under a wide
range of supply voltage (0.51V-1.5V). The minimum power
consumption is 67W with -141 dBc/Hz phase noise at a 1 MHz
offset and a -220dB Figure-of-Merit. At nominal 0.6V supply
voltage, the VCO consumes 126 W, achieves -149 dBc/Hz phase
noise at 1MHz offset and shows a FOM of -224dB.

Combining the favorable phase noise performance of the

Colpitts with the high Q FBAR structure, we realize an
oscillator FOM of -224dB, which is the best reported to date
for resonator-tank based oscillators. Applications of this
oscillator include the LO for low power transceivers (possibly
locked to quartz with a PLL or ADPLL), low jitter clock
source for high performance ADCs, clock source for serial
communications, or a quartz replacement clock source
allowing a reduction in form-factor.

I. INTRODUCTION
Thin film bulk acoustic resonators (FBARs) have been
deployed by the billions in mobile phones as duplexers and RF
filters due to their small size, high selectivity, and low
insertion loss. In the past decade, research in the use of FBAR
as the resonant tank in oscillators has been shown to provide
an over 30dB improvement in phase noise for a given power
dissipation compared to LC oscillators [1]-[4].
Most of the existing FBAR oscillator designs use the
crystal oscillator-inspired Pierce structure for its simplicity
and low bias current. However, the single-ended nature is
undesirable from a substrate/supply noise perspective, which
is becoming increasingly important in complicated
digital/analog mixed signal SOCs. The cross-coupled LC
oscillator is widely used in RFICs because of its easy
implementation and differential nature. This structure has also
been adapted to an FBAR based oscillator, but incurs
additional complexity due to common-mode feedback and low
frequency instability problems [2]. The CMOS Colpitts
oscillator topology has superior phase noise, but it is rarely
used in ICs because of the single-ended nature and high startup current requirement. Recently, several differential Colpitts
LC oscillators have been reported [5][6]. We will show that a
modified differential Colpitts oscillator is highly suitable for
low power, low voltage FBAR oscillators.
This paper proposes a differential Colpitts architecture
adapted for FBAR and evaluates different gain boosting
techniques to reduce power consumption. An FBAR-based
differential gate-to-source feedback gm-boosted Colpitts VCO
was proposed and implemented in a 130nm CMOS process.
The cross-coupled pair used as a gain boosting stage increases
the loop gain and reduces the start-up requirement of the
oscillator. Moreover, a large swing can be achieved even at
low supply voltages, which helps reduce phase noise.

978-1-4577-0223-5/11/$26.00 2011 IEEE

Fig. 1. FBAR impedance magnitude plot and equivalent circuit model

II. DIFFERENTIAL FBAR COLPITTS OSCILLATOR

A. Differential FBAR Colpitts Oscillator
The FBAR is fabricated in a planar silicon process, where
a thin piezoelectric layer is sandwiched between two electrode
layers. Fig. 1 shows the measured impedance magnitude of a 2
GHz FBAR along with its circuit equivalent model. At the
parallel resonance, the typical impedance magnitude of the
FBAR is 1-5 k.
2L

C1

C1

C1

C2

C2

C2

(b)

(a)

FBAR

C1

C1

C2

C2

(c)

Fig. 2. Basic Colpitts oscillators. (a) single-ended LC (b) differential LC

(c) differential FBAR

Fig. 2(a) shows a single-ended common-gate Colpitts

oscillator. The differential version can be realized by

connecting two identical Colpitts oscillators back-to-back

(2(b)). The symmetric structure leads to voltages 180 degrees
out-of-phase across the tank, which in turn leads to a virtual
ground in the center of the inductor. At its parallel resonance,
the FBAR behaves like an inductor: it absorbs tank
capacitance and presents a real impedance at resonance.
Replacing the inductor in Fig. 2(b) with an FBAR with the
center of the FBAR tank as the virtual ground, we can realize
an FBAR-based differential Colpitts oscillator Fig. 2(c).
B. Evaluation of Differential FBAR Oscillators for Low
Voltage and Low Power Applications
While the proposed differential structure in Fig. 2(c) is
convenient because it provides fully differential output
without low frequency stability or common-mode feedback
problems, the Colpitts oscillator requires a relatively high bias
current for reliable start-up, moreover, its oscillation
amplitude is smaller than the cross-coupled oscillator. To
reduce the power consumption of the oscillator, loop gain
boosting techniques were used to enhance the small signal
loop gain to reduce the start-up current. In [5] and [9], a gateto-source feedback Colpitts LC oscillator with gain boosting
was proposed. In [6], a common source gm-boosted
differential LC Colpitts oscillator was proposed. Inspired by
these concepts, we present the family of FBAR-based
oscillators shown in Fig. 3. A standard differential Colpitts
oscillator without gain boosting (structure (a) in Fig. 3) and
the cross-coupled FBAR oscillator in [2](structure (b) in Fig.
3) are given for comparison purposes, while the proposed
modified Colpitts are shown in Fig. 3(c) and 3(d). Table I
presents an analytical comparison of the four oscillators.

not loaded by capacitors, gm << (C1 + C2 ) , it can be

observed that the negative conductance of oscillator (c) and
(d) has increased by 1 + ( gm3 / gm1) (1 + C1 / C2 ) and

1 + ( gm3 gm1) (C1 / C2 ) respectively compared with the

traditional Colpitts oscillator, thus allowing the startup current
to be lowered. We follow the procedure in [5] and [6] to find
the amplitude of oscillation, where IB is the total tail current
and is the small conducting angle for Colpitts oscillators
and can be neglected for simplicity. The minimum supply
voltage of the different configurations is also shown in Table
I. For low voltage, low power applications, the gm-boosted
differential Colpitts oscillator with gate to source feedback in
Fig. 3(c) is the most suitable, which provides comparable
amplitude of oscillation and negative conductance at a lower
supply voltage compared with the cross-coupled oscillator.
TABLE I. Comparison of differential FBAR oscillator structure for low
power applications

G(Y)
(a)

(b)
(c)
(d)

Y_IN

M1

M2

Vbp

M3

FBAR

M4

Y_IN

III. PROPOSED DIFFERENTIAL COLPITTS VCO AND DESIGN

C1

C1

C2

C2

CONSIDERATIONS

Ctune

FBAR

A. Circuit Implementation

M1

Vb

M3

Ctune

M2

M4

VDD

C_degenerate

Bias-T

Vbn

M5

(a)

Bias-T

FBAR

M6

M1

M2

(b)
Vtune

M7

Y_IN

Y_IN

C1

C2

M1

M2

M1
FBAR

C1
C2

M3

C2

M4

Vb

M3

(c)

M5

M4

Vb

M5

M4

C2
M6

M3

C2

C1

C1

C2

C1

M2

FBAR
C1

C_tune

M8

Fig. 4. Proposed FBAR-based differential Colpitts oscillator with gate-tosource feedback gain boosting

M5

(d)

Fig. 3. Various differential FBAR oscillator topologies

(a) Colpitts (b) cross-coupled (c)gm-boosting gate-source feedback
(d) gm-boosting source-source feedback

Derived from small signal analysis, the conductance of the

active circuit is listed in Table I. Assuming the transistors are

Fig. 4 shows the schematic of the proposed VCO. MIM

capacitors in top layer metals were used to implement the
capacitive divider. A linearized varactor is connected in
parallel to the FBAR for frequency tuning. The differential
outputs from the gate of M1-M2 are connected with open drain

buffers with an on-board Bias-T to interface to the test

equipment.
B. Design Considerations for Low Phase noise
In a Colpitts oscillator, the drain current (and noise) of
active devices is injected into the tank in only a small fraction
of the period. Moreover, the maximum noise generation
instant is aligned with the extremes of the oscillators output
voltage (when the oscillator has minimum sensitivity to
perturbation) [7]. The drain currents of transistor pair M1-M2
in the proposed oscillator are pulse shaped and the noise
injection from transistor pair M3-M4 into the tank is reduced
by the C1-C2 network. This, in combination with the improved
oscillation amplitude (greater than 450mVp-p for a 0.6V Vdd)
reduces the phase noise of the FBAR oscillator.
In a current-biased oscillator, the close-in phase noise is
mainly the result of the current source and switching
transistors. At small bias currents, the VCO works in the
current-limited region, where the 1/f noise of the bias
transistor is the dominant close-in phase noise source. With
increased bias current, the VCO will enter the voltage-limited
regime, where the bias transistor enters the linear region and
1/f noise from the switching transistors will be converted to
the output as phase noise via second harmonic modulation,
resulting in deteriorated phase noise [5][8].
For low power applications, the VCO will likely operate in
the current-limited region. The flicker noise from the current
source contributes to the close-in phase noise through upconversion by the sampling of the switching pair to amplitude
noise and then into phase noise through the AM-to-FM
conversion mechanism of the nonlinear capacitors. The
linearity of the varactor and parasitic capacitance of the
switching pairs determines the KAM/FM conversion gain. To
improve the linearity of the varactor (and reduce KAM/FM), two
MIM caps are connected in series with the varactor, thus
improving 1/f upconversion through the varactor nonlinearity
at the expense of tuning range. The nonlinearity of the
parasitic capacitance of the switching transistors will become
the dominant close-in phase noise degradation when the
switching transistors enter the linear region for a large portion
of each cycle. In [5], it was demonstrated that the gm-boosted
differential gate-to-source feedback structure can reduce the
nonlinearity of the total effective parasitic capacitance in
switching transistors M1-M2 and reduce the AM-FM noise
conversion. To further prevent the switching pair M1-M2 from
entering the linear region, the transistors are biased in the subthreshold region. A high impedance at the common source
node of M3-M4 helps minimize the phase noise via the second
harmonic modulation mechanism. Thus, a large M5 channel
length is used to both increase the output resistance and reduce
flicker noise [8].
C. Design Considerations for Low Power Consumption
As the loop gain of the oscillator in the parallel resonance
mode is proportional to the loaded tank impedance RP,L, the
minimum necessary gm (and thus minimum power
consumption) occur when tank impedance is maximized. The

native FBAR parallel impedance RP used in this paper is

approximately 4.5 k.
External capacitive loading across the FBAR tank will pull
the parallel resonance frequency downwards and reduce the
resonator RP,L. Therefore to reduce the power consumption,
the loading capacitance is carefully optimized. Small MIM
capacitors C1 (380fF) and C2 (170fF) are used to perform
capacitive division while minimizing loading to the FBAR
oscillator.
The transconductance efficiency (gm/ID) of the switching
pair M1-M2 can be improved by operating in weak inversion.
The size of the transistor pair is optimized to provide a large
gm while adding acceptable parasitic capacitive loading to the
FBAR.
IV. EXPERIMENTAL RESULTS
The oscillator was fabricated in a 0.13m CMOS process.
The VCO core has an active area of 100x120 m2. A die
photo is shown in Figure 5. The FBAR is bonded with 0.8 mil
gold bondwire to the oscillator. The oscillator can achieve
reliable startup at the minimum power level of 67W under a
510mV supply voltage.

Fig. 5. Chip photo with wirebonded FBAR.

The measured phase noise of the oscillator under nominal

Vdd of 0.6V and various bias conditions is shown in Fig. 6. An
Agilent E5052B Signal Source Analyzer was used for phase
noise characterization. Figure 7 and Figure 8 show the
dependence of phase noise and Figure-of-Merit (FOM) at 100
kHz and 1 MHz frequency offset with tail current. The
oscillator FOM is calculated using equation

Fig. 6. The measured phase noise of the oscillator across bias current
(Vdd=0.6V)

The phase noise improves quickly from the critical

oscillation with the increase of the bias current in the currentlimited region. A FOM of -224dB was achieved at a bias

df/dv {MHz/V]

Frequency deviation [ppm]

current of 210 A where the measured phase noise is 128dBc/Hz and -149dBc/Hz at 100 kHz and 1 MHz offset
respectively.

0.6

Fig. 7. Phase noise across bias current (Vdd=0.6V)

Fig. 8. FOM across bias current (Vdd=0.6V)

Figure 9 shows the frequency tuning range of the VCO. A

tuning range of approximately +/-500 ppm is achieved, which
is sufficient to provide calibration for process and temperature
variations. The oscillator operates over a wide supply range of
0.51-1.5V. Figure 10 shows the measured power supplyrejection. The average sensitivity to supply variation is
75ppm/V (150 kHz/V).

Fig. 9. Measured tuning range

Table II shows the performance of the differential FBAR

gm-boosting Colpitts oscillator compared to other published
FBAR oscillators. The differential oscillators are marked with
an asterisk. This works achieves the best FOM of FBARbased oscillators reported to date, while providing a
differential output and adequate tuning range for tolerance of
process and temperature variations.

0.7

0.8

0.9

1.0
Vdd [V]

1.1

1.2

1.3

1.4

Fig. 10. Frequency variation with voltage

Table II: Performance comparison of the low power differential VCO to
previously published work
FOM
Vdd Power
Vdd
PN@
PN@
Ref.
fosc
(dB)
(GHz)
1MHz
(V)
rejection 100kHz
(W)
(dBc/Hz)
(dBc/Hz)
(ppm/V)
This
2.0
0.6
126
75
-128
-149
-224
work*
2.0
0.5
67
75
-120
-141
-220
[1]
1.9
1
300
/
-120
-140
-211
[2]*
2.1
1
600
/
-122
-143.5
-212
[3]*
0.6
1.2 56000
730
-140
-150
-208
[4]
1.9
0.5
100
/
-122
-138
-217
V. CONCLUSION

The proposed FBAR-based differential Colpitts VCO

benefits from the superb phase noise property of the Colpitts
structure while reducing the requirement of startup current
through a gate-to-source feedback gain boosting mechanism.
The VCO has large oscillation amplitude at a low supply
voltage. The measured phase noise is -149dBc/Hz at a 1MHz
offset. A +/- 500ppm tuning range was demonstrated which
can accommodate process and temperature compensation
(either by using a PLL or a free-running compensation
scheme). The low power and low voltage VCO and its
differential nature make it an ideal choice for high purity local
oscillators in RF frontends for low power sensor networks.
ACKNOWLEDGEMENTS
The authors thank Avago Technologies for their support
and FBAR fabrication.
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