Documente Academic
Documente Profesional
Documente Cultură
Instructors
Massimo ALIOTO (Part 1)
Email: massimo.alioto@nus.edu.sg
Office: E4-05-24
Teaching Assistants
Mr AHMAD Shahzor, elesha@nus.edu.sg
Mr Christopher Moy Shin Lee Lan Chong, llc@nus.edu.sg
Module introduction
Contents
Part 1
Number systems
Boolean Algebra and logic gates
Hardware Description Languages: Verilog
Gate-level design and minimization + Verilog
Combinational logic circuits and design + Verilog
Part 2
Course Description
First course on digital systems
Introduces fundamental digital logic, digital circuits, and
programmable devices
The course also provides an overview of computer
systems
This course provides students with an understanding of
the building blocks of modern digital systems and methods
of designing, simulating and realizing such systems
The emphasis of this module is on understanding the
fundamentals of digital design across different levels of
abstraction using Hardware Description Languages
Developing valuable design skills for the design of digital
systems through FPGAs and state-of-the-art CAD tools,
as required by the job market (exciting projects)
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Module organization
Part-1
10 lectures (2+1 hours/week)
5 tutorial sessions starting in Week 2 (Check your group and
venue)
4 Laboratory sessions, starting in Week 3
Part-2
12 lectures (2+1 hours/week)
5 tutorial sessions (Check your group and venue)
5 Laboratory sessions, of which 4 are devoted to the final project
(full system on FPGA), starting in Week 7
Module Assessment
Part 1 (50%)
Project D1 (D1B&C):
Mid-term quiz:
30%
20%
Part 2 (50%)
Project D2 (D2A&B):
Final quiz:
30%
20%
No final exam
Lectures
Remark
Week 2
Boolean Algebra/Verilog
Week 3
Week 4
Week 5
Complex combinational
logic/Verilog
Week 6
Week 1
EE2020 Part II
MAJOR TOPICS
DETAILS
Recess week
Counters and registers
FSM Design
Memory Devices
10
Lab (Part 1)
Lab (Part 2)
Week 3
Week 4
Week 5
Week 6
Recess Week
No lab
Quizzes
No lab
mid-term quiz
Week 7
Week 8
Project 4
Week 9
Project 5
Week 10
Project 6
Week 11
Project 7
Week 12
Project evaluation
Week 13
Final Quiz
11
Tutorials
WK1
No tutorial
WK2
Tutorial - 1
WK3
Tutorial - 2
WK4
Tutorial - 3
WK5
Tutorial - 4
WK6
Tutorial - 5
Assignment
Recess Week
For each tutorial, questions will be posted on IVLE the week before, the solutions will be
published at the end of the same week
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Module information
Course materials
IVLE (everything about the course)
Need help
Discussion Forum under IVLE (preferred)
Tutors (tutorial questions)
TAs and GAs (labs and projects)
during lab sessions
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Introduction
1. Analog vs. digital circuit
2. Why digital?
3. Why study this module?
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Analog signal
Digital signals
17
Inverter
Vo
Vin
Vo
18
Why digital?
Robustness (reliability)
Programmability
Scalability (in integrated circuit technology)
Cost
19
Technology Scaling
Semiconductor Technology Scaling
10
Moores
law
2013:
Intel Xeon E7-8870 processor (10 cores) 2.6
billion transistors
IBM zEC12 5.5 GHz clock freq., MCM with 6
X 6 cores in 32 nm SOI, 6 X 300W power
(liquid cooling!), 2.75 billion transistors for
each core, single-thread high performance
Intel Core i7-4960X (6 cores)
22
in 22nm trigate CMOS
11
log
Dennards
scaling
power
power limited
regime
100-150 W
1W
1971
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