Electric Power Systems Research 73 (2005) 187196

The protection of sensitive loads from interharmonic

currents using shunt/series active filters
Amit Kumar Jindal, Arindam Ghosh , Avinash Joshi
ACES-101 B, Department of Electrical Engineering, Indian Institute of Technology, Kanpur 208016, UP, India
Received 12 April 2004; received in revised form 12 July 2004; accepted 11 August 2004

Abstract
The paper discusses the operation and control algorithms of shunt and series active filters. Performance of each of these filters is studied
separately when it is connected to protect sensitive loads in a power distribution system. It is assumed that the distribution system is polluted
due to the presence of the loads that may be unbalanced and draw interharmonic currents from the feeder. Separate algorithms have been
proposed for the shunt and the series active filters. These are operated such that the voltage waveform at the sensitive load bus terminal is
a clean balanced sinusoid. The proposed algorithms are verified through the computer simulation studies using PSCAD/EMTDC software
package.
2004 Elsevier B.V. All rights reserved.
Keywords: Distribution system; Interharmonics; Pole shift control; Sensitive load; Series active filter; Shunt active filter

1. Introduction
Harmonic interferences in a power distribution system are
caused by harmonic producing power electronic loads such as
diode or thyristor converters, cycloconverters, arc furnace etc.
An arc furnace is an unbalanced, nonlinear and time variant
load that causes unbalance and voltage flicker while drawing
harmonic, interharmonic and subharmonic currents. The harmonic currents are components that have frequencies which
are integer multiples of fundamental frequency. The components with frequencies which are greater than and not an integer multiple of the fundamental frequency are interharmonic.
The term subharmonic component does not have any official
definition but is similar to interharmonic with frequency less
than the fundamental frequency [1]. Passive filters consisting
of a bank of LC filters and/or a high pass filter have been
broadly used to suppress harmonics because of a low initial
cost and high efficiency. However, the passive filters oper Corresponding author.
Tel.: +91 512 2597179/2597801(O)/2598799(R); fax: +91 512 2590063.
E-mail address: aghosh@iitk.ac.in (A. Ghosh).

0378-7796/$ see front matter 2004 Elsevier B.V. All rights reserved.
doi:10.1016/j.epsr.2004.08.003

ate at one particular tuned frequency. The source impedance,

which varies with the system configuration, strongly influences the filtering characteristics of the passive filters. Also,
this causes series and parallel resonance with the source.
In these circumstances, it is worthwhile considering active
filters. In 1976, Gyugyi and Strycula [2] presented a family
of shunt and series active filters, and established the concept of the active filters consisting of PWM inverters using
power transistors. The shunt active filter acts as a harmonic
compensator and injects the current in anti-phase with the
distortion components present in the line current, while the
series active filter acts as a harmonic isolator. Hence, the required rating of the series active filter is much smaller than
that of a conventional shunt active filter. The active filters for
power conditioning in industrial plants and distribution systems have been discussed further in ref. [3]. These filters have
provided the required harmonic filtering and control performance in comparison to conventional passive filters and static
var compensators consisting of capacitor banks and thyristorcontrolled reactors. The integration of series and shunt active
filters as a new device called unified power quality conditioner (UPQC) has been discussed in ref. [4]. It is shown that

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a UPQC compensates for reactive power, harmonics, voltage

imbalance, negative-sequence current and/or voltage regulation. These days, the active power filters are used in power
quality improvement of the distribution systems [5,6]. However, most of the work reported in the literature considers
only even and odd harmonic. The compensation for interharmonic currents has not been discussed. The impacts of
interharmonic frequency components include heating, torsional oscillations, overload of conventional series tuned filters, communications interference, ripple control interference
etc.
This paper presents the operation of shunt and series active
filters when the distribution system is polluted with interharmonic currents. The main objective of the active filters discussed in this paper is to protect sensitive loads that require
a nearly sinusoidal balanced voltage against all kinds of disturbances occurring in the distribution system. The structures
of the shunt and the series filters are discussed. These are realized by three H-bridge inverters, which are connected to a
common dc energy storage capacitor. The shunt active filter is
operated such that it maintains the voltage of the distribution
bus to a pre-specified value, while the series active filter is operated such that the voltage at the sensitive load bus terminal
is held constant. The magnitude of the bus voltage is chosen
as a nominal value, while its phase angle is obtained through
a feedback loop that maintains the voltage across the dc energy storage capacitor. Pole shift control technique has been
used each for the shunt and the series active filter to track the
reference three-phase voltages. The controller is designed in
discrete-time using pole shifting law in the polynomial domain that radially shifts the open-loop system poles towards
the origin. The rating issues are also discussed in the end. The
simulation results carried out by the PSCAD/EMTDC (version 3) show that the proposed design and control algorithms
effectively eliminate the interharmonic components present
in the sensitive load bus voltages and load currents.

2. Distribution system description

The single line diagram of one phase of a radial distribution system (three-phase, four-wire) considered in the paper
is shown in Fig. 1.
The system is supplied by a three-phase balanced voltage
source (vs ). There are two feeders connected in the distribution system. The load L-1 is connected to bus B-1 that is
supplied by Feeder-1 with impedance of Rs1 + jLs1 . This
load has two components: an unbalanced RL component and
a nonlinear component that may even draw interharmonic
currents ihl1 . The Feeder-2 with impedance of Rs2 + jLs2
connected at the end of Feeder-1, terminates at bus B-2. The
loads L-2 and L-3 are connected at the bus B-2. The B-2 bus
voltage is denoted by vt . The load L-2 has also two components, i.e., an unbalanced passive RL component and a nonlinear interharmonic current component ihl2 . The load L-3 is
a sensitive load and it requires a clean balanced sinusoidal

Fig. 1. Single line diagram of a typical radial distribution system.

supply. The currents drawn by the three loads are indicated

as il1 , il2 in and il . The various distribution system parameters
chosen for the study in this paper are given in Appendix A.
It is desired that the voltage across the sensitive load bus terminals, vl , is to be held constant with a magnitude of 11 kV
(LL, rms), i.e., equal to the source voltage. In the following
sections, the details of the shunt and the series active filters
will be discussed.

3. Shunt active lter

3.1. Shunt active lter structure
The schematic diagram of the shunt active filter compensated three-phase, four-wire distribution system is shown in
Fig. 2. In addition to the shunt active filter, an ac filter capacitor, Cf , is also connected in shunt at bus B-2 to provide a
low impedance path for the harmonic current generated due
to inverter switching. Both the bus B-2 voltage and Feeder-2
current will get distorted in the absence of the filter capacitor
[7].
The shunt active filter is realized by three H-bridge inverters. The dc bus of the inverters is supplied through a
common dc energy storage capacitor (Cdc ) [8]. The voltage
across the dc capacitor is indicated as Vdc . The detailed structure is shown in Fig. 3. In H-bridge, each switch represents a
power semiconductor device and an anti-parallel diode combination. Three single-phase transformers are connected to

Fig. 2. Shunt active filter compensated distribution system.

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189

sults in the following equation:

x(k + 1) = x(k) + z(k)

(2)

where k is the kth sampling instant. The transfer function of

(2) is obtained and can be written as:
y(k) =

Fig. 3. The structure of shunt active filter.

the three outputs of the inverters to provide isolation between

them and also to provide inductance between the B-2 bus and
the inverters. The secondary winding of these transformers
is connected between the respective phase at the bus B-2 and
the neutral point. The neutral point is grounded in this case.
In this figure and also in all subsequent discussions, we shall
denote the three phases by subscripts a, b and c.
3.2. Pole shift controller for shunt active lter
As mentioned earlier, the shunt active filter is operated
such that it regulates the distribution bus voltage. The singlephase equivalent circuit of the shunt active filter is shown
in Fig. 4. The transformers connecting the inverters are represented by the leakage inductance Lf and the resistance Rf
represents the inverter and the transformer losses. The inverter is represented by a voltage source uVdc , where u = 1
is the switching control applied to the inverter. The switching control law is generated using pole shift control [9,10] as
discussed below.
Let us define the state vector as xT = [vt id ], the state space
model for the system of Fig. 3 can be given as:
x = Ax + Bz,
where,

y = Cx

0
A=
1

Lf

1
Cf
,
Rf

Lf

C = [1 0]

and

(1)

B = Vdc
Lf
zT = [ uc

C1f
0

B(z1 )
uc (k)
A(z1 )

(3)

where y(k) is the sampled value of the system output and

z1 is the delay operator. The pole-shift control is an output
feedback control technique in which the output of the system
is fed back to the system such that the reference value of the
output (yref ) is tracked accurately. The resulting control law
is given by:
uc (k) =

S(z1 )
{yref (k) y(k)}
R(z1 )

(4)

where S and R are the appropriate polynomials having the

controller parameters. From (3) and (4), the closed-loop system is then written as:
y(k) =

B(z1 )S(z1 )
yref (k)
A(z1 )R(z1 ) + B(z1 )S(z1 )

(5)

The closed-loop system poles are obtained by shifting the

open-loop system poles by a pole-shift factor and the resulting closed-loop system characteristic equation is given
by:
T (z1 ) = A(z1 ) = 1 + a1 z1 + + n an zn

(6)

Here, T(zl ) is the characteristic polynomial of the closedloop system. The closer is to one, the smaller will be the
control action. The controller parameters, i.e., the coefficients
of S and R are obtained by solving Eq. (6) and are substituted
in (4). The Eq. (6) is known as Aryabhatta/Bezout identity.
Once uc (k) is obtained, the control input u is obtained as:

+1 for uc > h
u=
(7)
1 for uc h
where 2h is a hysteresis band. This switching law produces
a variable switching frequency control action.

ish ]

Here, uc is the continuous time equivalent of u. The B-2 bus

voltage vt is the system output. The discretization of (1) re-

Fig. 4. The single-phase equivalent circuit of shunt active filter.

3.3. Regulation of dc capacitor voltage

The main aim of the shunt active filter is to hold the magnitude of the B-2 bus voltage to a pre-specified value vt . Note
that the voltage vt is equal to vl , i.e., the voltage across the
sensitive load. This pre-specified voltage is taken as yref in the
pole shift control scheme discussed above. Even though the
magnitude of the reference voltage |Vtmag | is pre-specified,
its phase angle () is adjusted to maintain the power balance
in the circuit. To set the phase angle, we note that the dc
capacitor (Cdc in Fig. 3) must be able to supply the inverters while maintaining its dc bus voltage constant by drawing
power from the ac system [11]. A proportional control loop

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Fig. 5. Block diagram of the complete control system.

is used for regulating the dc capacitor voltage (Vdc ). This is

given by:
= KP (Vdcref Vdcav )

Table 1
The system parameters of the shunt active filter structure shown in Fig. 3
System quantity

(8)

where Vdcav is the average voltage across the dc capacitor

over a cycle, Vdcref is its set reference value and KP is the
proportional gain. It is to be noted that the average voltage
Vdcav is obtained using a moving average low pass filter to
eliminate all switching components from the signal.
The block diagram of the complete control system is
shown in Fig. 5. The three-phase instantaneous signal vt is
obtained using |Vtmag | as magnitude and angle calculated
through a proportional controller given by (8). The control
signal uc is calculated by substituting the controller parameters, i.e., the coefficients of polynomials S and R in (4). The
control input u is obtained using the hysteresis band given by
(7) which is used for gating the inverter switches.

Base operation frequency (Hz)

dc capacitor (Cdc ) (F)
Single-phase transformers rating (MV A, 11 kV/11 kV)
Rf ()
Transformer Leakage reactance (Lf ) (per unit)
Filter capacitor (Cf ) (F)
Reference dc capacitor voltage (Vdcref ) (kV)
Proportional gain (KP )

Parameters
50
2000
1
0.01
0.1
50
17
0.025

The proposed shunt active filter structure and control is tested through extensive simulation studies using
PSCAD/EMTDC (version 3) for the distribution system
given in Fig. 1. Two different tests are reported below.
It is desired to hold the magnitude of the B-2 bus voltage |Vtmag | to be 11 kV (LL, rms), i.e., equal to the source
voltage. The simulation results, when no shunt active filter is
connected at the bus B-2, are shown in Figs. 6 and 7. Note

that the waveforms for the phases a, b and c shown here and
in the following results are depicted by solid, dashed and dotted lines, respectively. It is assumed that the source voltages
are balanced with a peak value of 9 kV (11 kV, LL, rms).
The instantaneous three-phase B-2 bus voltages and L-1 load
currents are shown in Fig. 6. It can be seen that due to the presence of the nonlinear loads L-1 and L-2, the waveforms are
unbalanced and distorted with interharmonic components.
The currents drawn by the other loads are shown in Fig. 7.
In Fig. 7(a), the three-phase current waveforms drawn by the
load L-2 (il2 ) contain unbalance and interharmonic frequency
components as given in Appendix A (Table 1). It can be seen
from Fig. 7(b) that the currents drawn by the sensitive load
L-3 (il ) are also distorted due to the distorted B-2 voltages
shown in Fig. 6(a).
Now the shunt active filter is connected at bus B-2 as
shown in Fig. 2. The parameters of the shunt active filter,

Fig. 6. B-2 bus voltages and L-1 load currents.

Fig. 7. The three-phase currents flowing in the loads L-2 and L-3.

3.4. Operation of shunt active lter

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191

Fig. 10. Series active filter compensated distribution system.

4. Series active lter

Fig. 8. The performance of shunt active filter.

transformers and the angle controller are given in Table 1.

The value of the dc capacitor supplying the inverters is chosen as 2000 F. The other system parameters are given in
Appendix A. The base impedance is 121  and hence the
transformer leakage reactance is 12.1 . The switching actions of the inverter switches are obtained using the pole shift
controller as discussed earlier. The controller parameters are
calculated using MATLAB. The value of the pole shift factor
() is chosen to be 0.9.
The simulation results are shown in Figs. 8 and 9. It can be
seen from Fig. 8(a) that after some initial transients for about
two cycles, the B-2 bus voltages become balanced sinusoids
with a peak of 9 kV as desired and are free from all kinds
of interharmonics. As the sensitive load L-3 is balanced, the
L-3 load currents are also perfectly balanced. In other words,
the sensitive load is fully protected from the disturbances
present in the distribution system. The voltage across the dc
capacitor (Vdc ) supplying the inverters and the angle controller output, i.e., the phase angle () of the B-2 bus voltage
is shown in Fig. 9. It can be seen that the Vdc rises to near
its reference value of 17 kV and the phase angle at 0.17 rad
(about 10 ). The variation in angle indicates the continuous
chargingdischarging of the dc capacitor as given by (8).

Fig. 9. The dc capacitor voltage and angle controller output.

In this section, the operation and control of the series active filter is discussed. The main objective of the series active
filter is to keep the voltage waveforms across the sensitive
load bus terminals perfectly balanced against all kinds of disturbances occurring in the distribution system. An algorithm
is discussed to generate the reference voltages, which the series active filter will inject into the distribution system. A pole
shift controller has been designed such that these reference
voltages are tracked accurately.
4.1. Series active lter structure
The shunt active filter of Fig. 2 is now replaced by a series
active filter as shown in Fig. 10. The series active filter is
connected between the bus B-2 terminals and the sensitive
load (L-3) bus terminals as shown in Fig. 10. Like shunt
active filter, a filter capacitor Cf is connected in shunt with
the bus B-2 to provide a low impedance path for the harmonic
components flowing in the line currents. The voltage across
the filter capacitor will be vt as indicated in the Fig. 10. The
configuration of the series active filter is shown in Fig. 11.
It is realized by three H-bridge inverters supplied through a
common dc energy storage capacitor (Cdc ). The outputs of
the inverters are connected to three single-phase transformers
that are connected in series with the three phases at the bus B2. The injected voltages in the phases a, b and c are denoted
as vda ,vdb and vdc , respectively. An ac filter capacitor Cd
is also connected across each of the secondary windings of
the transformers to bypass the harmonics generated by the
inverter switching [12].

Fig. 11. The configuration of the series active filter.

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A.K. Jindal et al. / Electric Power Systems Research 73 (2005) 187196

The series active filter injects voltage, vd in the bus B-2 and
cancels the effect of interharmonics in the B-2 bus voltages
vt . The KVL at bus B-2 is written as:
vt + vd = vl

(9)

It is required that the series active filter regulates the load

voltage vl to a reference value. The reference-injected voltage
by the series active filter (vd ) is then:
vd = vl vt

(10)

where vl is the reference (desired) load voltage.

4.2. Reference voltage generation
As mentioned earlier, the desired load voltage is perfectly
balanced sinusoid or in other words vl must be strictly positive
sequence. To force vl to be positive sequence, from (10) the
injected voltage must cancel the zero and negative sequence
components of vt . As the inverters are supplied through dc
capacitor, the power loss occurs in the inverter circuit. This
is supplied by the ac system, i.e., from the bus B-2. From
Fig. 10, the power relation is written as [12]:
ptav = vta isa + vtb isb + vtc isc = plav + ploss

(11)

where, ptav is the average power entering the B-2 bus terminals, plav is the average power supplied to the sensitive load
and the power loss in the series active filter is ploss . Since
the load voltage vl is strictly positive sequence, the average
power to the load is also positive sequence. This gives:
ptav ploss = plav = |Vl ||Il 1 |cos( )

(12)

where, |Vl | is the pre-specified magnitude of the desired load

voltage vl and is an unknown load angle to be computed
and |Il 1 | is the fundamental phasor positive sequence
component of the load current il . Combining (11) and (12),
the load angle is given by:


1 ptav ploss
= cos
+
(13)
|Vl ||Il 1 |
In the above equation, |Vl | is the magnitude of the load voltage and is known. The average power ptav is obtained by
calculating the product of the instantaneous values of vs and
is and then passing it through a lowpass filter with a low cutoff
frequency. Once is obtained, the reference phasor sequence
components of the series active filter voltages are obtained
from (10) as:

V d0
0
V t0

(14)
V d1 = |Vl | V t1

V d2
0
V t2
Here the zero, positive and negative phasors are denoted by
the subscripts 0, 1 and 2, respectively. Also note that in (14)
and in the following discussion, the variables in upper case
bold letters indicate the fundamental phasor quantities of the

variables and those in lower case letters indicate the instantaneous values of the corresponding variables. The reference
phasor voltages (V da , V db V dc ) are then obtained by the inverse symmetrical component transformation. The instantaneous reference phase voltage (vd ) then can be obtained from
the phasor voltages. The entire operation is synchronized with
an arbitrary phase reference.
4.3. Fundamental phasor sequence components
calculation
As the loads L-1 and L-2 connected in the distribution
system (Fig. 1) are unbalanced and are drawing interharmonic
current waveforms, the B-2 bus voltages (vt ) and the currents
(il ) drawn by the load L-3 (Figs. 6 and 7) are also distorted
with unbalance and interharmon-ics. The rms fundamental
phasor sequence components of the load currents (or B-2
bus voltages) are extracted from the instantaneous sampled
values of the il (or vt ). These are obtained through a two-stage
integration and filtering process.
In the first stage, the following integral has been evaluated
[12,13]:

t+T 1 1 1
F a0
xa
2

j(t/2)
2
dt
F a1 =
1 a a xb e
T 3 t
2
F a2
xc
1 a
a
(15)

where a = ej120 and T is the integration interval. The variables

xa , xb and xc are the instantaneous samples of the voltages (or
currents) and Fa0 , Fa1 and Fa2 are the corresponding phasor sequence components. It has been observed [13] that by
choosing T as half or full cycle for a fundamental frequency of
50 Hz (i.e., 10 m s or 20 m s), the unbalance and the periodic
harmonic components (integral multiple of the fundamental
frequency) are eliminated from the real and imaginary parts
of the complex phasors (Fa0 , Fa1 and Fa2 ). However, the interharmonic components or the time varying components are
still present in the phasors.
In the second stage of the extraction, the time varying real
and imaginary values of the phasor sequence components are
passed through a lowpass butterworth filter [14]. The butterworth filter gives the complex dc value of the phasors, i.e.,
the fundamental phasor sequence components of the instantaneous samples of the voltages (or currents). These fundamental phasor sequence components are then substituted in
equations (13) and (14) to calculate the reference voltages
injected by the series active filter (vd ) in the sequence domain. The reference values obtained in (14) are converted to
phasor form by inverse symmetrical component transformation. Then the instantaneous values vd are obtained from the
phasor form.
4.4. Pole shift control for series active lter
In this subsection, a pole shift controller has been designed
to track the reference-injected voltages vd with the actual volt-

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193

Table 2
Series active filter parameters for the configuration in Fig. 11
System quantity

Fig. 12. Single-phase equivalent circuit of the series active filter.

ages (vd ) injected by the inverters in the distribution system.

The single-phase equivalent circuit of the series active filter is shown in Fig. 12. In this, Rd represents the switching
losses of the inverter and the transformer leakage inductance
is denoted by Ld . The inverter output is represented by uVdc ,
where u is the switching control. Defining a state variable as
xT = [vd id ], the state space model can then be written of the
form (1) where,

1
0
0
C1d
Cd
,
,
A= 1
B = Vdc
d

R
L
d
Ld
Ld
C = [1

0 ] and

zT = [ uc

il ]

(16)

In (16), the load current, il (or the current is ) is the forcing

function along with uc . The injected voltage vd is the output
of the system. The system is first descretized and the transfer
function of the form (3) is obtained.
The control block diagram for the series active filter is
shown in Fig. 13. The term ploss in (11) is the real power supplied/absorbed by the dc capacitor Cdc such that the voltage
across it remains constant. This is accomplished through a
proportional-plus-integral (PI) controller and is given by:

ploss = Kp (Vdcref Vdcav ) + KI (Vdcref Vdcav )dt (17)

where Vdcav is the average of the dc capacitor voltage over a
cycle and Vdcref is the set reference value. The parameters KP
and KI are the proportional and integral gains, respectively.
Note that the dc capacitor voltage contains the switching fre-

Parameters

Base operation frequency (Hz)

dc capacitor (Cdc ) (F)
Single-phase transformers rating (MV A, 11 kV/11 kV)
Rd ()
Transformer leakage reactance, Ld (per unit)
Filter capacitor (Cd ) (F)
Filter capacitor (Cf ) (F)

50
2000
1
0.01
0.1
30
30

quency ripple. Therefore, its measurements are smoothed by

the averaging process. Here a moving average filter has been
used which, at any given time, averages the measurements of
the last one cycle sample values. The sequence components
of the voltage vt are obtained using the extraction algorithm
discussed in Section 4.3. The phasor components and hence
the instantaneous values of the reference injected voltage vd
is obtained using (14). Note that in (16), uc is the continuous switching variable and is obtained using Eq. (4) as was
discussed in the case of shunt active filter. The reference vd
is taken as yref at each sampling instant. Once the switching
control law uc is obtained, the control input u is determined
which is used for generating the inverter switches firing signal.
4.5. Simulation results
The series active filter is connected to the bus B-2 as
shown in Fig. 10. The simulations have been carried out using PSCAD/EMTDC. The series active filter parameters are
given in Table 2. The transformer parameters and the value
of the dc capacitor supplying the inverters are same as in case
of the shunt active filter, i.e., 2000 F. The Vdcref is chosen
as 5 kV and the PI controller parameters are:
KP = 0.5

and

KI = 0.75

The value of the pole shift factor () is chosen to be same

as the case of shunt active filter, i.e., 0.9. The simulations have
been carried out using the integration and filtering process for
the fundamental phasor sequence components calculation.

Fig. 13. The control block diagram of the series active filter.

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A.K. Jindal et al. / Electric Power Systems Research 73 (2005) 187196

Fig. 14. The system response when no lowpass filter is used.

Fig. 16. The currents flowing in the line and in the load.

The B-2 bus voltages vt remain unbalanced and distorted in

this case as these are not being regulated. The system response
is shown in Fig. 14 when only the integration (15) is used
to calculate the phasor sequence components. It means no
lowpass filter has been used. It can be seen that the sensitive
load bus voltages vl and the corresponding load currents il are
still distorted with interharmonic components. Note that the
integration process given by (15) eliminates all the integer
harmonics from the load bus voltages and currents as well.
The sensitive load bus voltages are shown in Fig. 15 (a) after the second stage of extraction. It can be seen that these are
perfectly balanced with 9 kV peak as desired and are free from
all kinds of harmonics. In the filtering process, a lowpass butterworth filter of order 3 with a base frequency of 5.0 Hz has
been used to obtain the dc values of the time varying real and
imaginary values of the phasor sequence components (15).
The unbalance and the harmonic components are neutralized
by the injected voltages vd as shown in Fig. 15(b).
The currents flowing in the line i s and the load currents
il are shown in Fig. 16. It can be seen from Fig. 16(a) that
the line currents are still distorted due to the currents flowing
in the other loads L-1 and L-2 are the same as shown earlier
in Figs. 6(b) and 7(a), respectively. However, the load L-3

Fig. 17. The tracking errors in each phase.

currents are balanced because of the balanced load voltages.

This is evident from Fig. 16(b). The balanced load voltages of
Fig. 15 indicate the perfect tracking of the reference voltages
vd by the series active filter. The tracking errors in the three
phases (a, b and c), err = vd vd are shown in Fig. 17. It can
be seen that these become zero as the steady state is reached.
As the voltages across the load L-3 are perfectly balanced
using shunt and series active filters, it can be concluded that
the sensitive load L-3 is fully protected from the other unbalanced and distorted loads present in the distribution system.

5. Rating issues of the active lters

For practical implementation, one of the main considerations is the power rating, i.e., power required or injected/absorbed by the active filters. The simulation studies
have been performed in PSCAD/EMTDC software for both
the shunt and series active filters and are discussed here.
5.1. Shunt active lter
Fig. 15. The load voltages and the injected voltages, when lowpass filter is
used.

The average power drawn by the various loads connected

at bus B-2 is shown in Fig. 18. It can be seen from Figs. 18(a)

A.K. Jindal et al. / Electric Power Systems Research 73 (2005) 187196

Fig. 18. Power drawn by the loads.

and (b) that the load L-2 draws about 1.67 MW while the
load L-3 draws about 1.07 MW power from the feeder in the
steady state. The total power required by the bus B-2 is around
2.9 MW. However, the power drawn by the shunt active filter
is about 0.16 MW, which is just about 5% of the total power
drawn by the bus B-2. This is evident from the results shown
in Figs. 19(a) and (b).

195

Fig. 20. Performance of the dc capacitor controller.

It has been discussed in Section 4.2 that the power loss occurring in the series active filter circuit is supplied by the ac
system, i.e., from the bus B-2. This is accomplished through
a PI controller given by (17). The performance of the PI controller is shown in Fig. 20, which takes about six cycles to
reach the steady state. It can be seen from Fig. 20(a) that the
voltage across the dc capacitor reaches to its reference set
value of 5 kV in the steady state. The PI controller output,
i.e., the power loss in the inverter circuit ploss is shown in
Fig. 20(b), which is about 0.04 MW. The terminal power and
the power drawn by the load L-3 are shown in Fig. 21. It
can be seen from Figs. 21(a) and (b) that the terminal power
is about 1.11 MW and the power drawn by the load L-3 is

1.07 MW. It should be observed that the power drawn by

load L-3 is same as was in the case of shunt active filter as
this is load dependent and is independent of the active filter
connected in the system. Also note that the power required by
the series active filter is only 3.7% of the power drawn by the
load L-3.
From above, it is inferred that the power drawn by the
shunt active filter is little higher as compared to the series
active filter case. This is due to the fact that the shunt active
filter is regulating the whole B-2 bus voltage to which two
loads have been connected. However, the series active filter is
regulating only the sensitive load (L-3) bus voltage. The transformers in the active filter structures used in this paper are
1 MV A, 11 kV/11 kV and the dc bus of the inverters is supplied though a constant dc capacitor of 2000 F. However, the
power semiconductor devices voltage rating can be reduced
by using 440 V/11 kV transformers. But at lower voltage rating, the size of the dc capacitor required will be enormously
high. The losses in the inverter circuit and the current rating of
the switches are also increased at lower voltage ratings. The
simulation results using various combinations of transformer
ratings and dc capacitor can also be studied.

Fig. 19. Total power drawn by the bus B-2 and the power absorbed by the
shunt active filter.

Fig. 21. Power drawn at the terminals and by the load L-3.

5.2. Series active lter

196

A.K. Jindal et al. / Electric Power Systems Research 73 (2005) 187196

6. Discussion and conclusion

Acknowledgements

The paper illustrates the operation of series and shunt active filter in a power distribution system. The purpose of connecting the active filters is to protect a load from the disturbances occurring in the system. The load is assumed to
be a sensitive load, which cannot tolerate any interruption at
all. The disturbances are due to the presence of other loads,
which are unbalanced and are drawing interharmonic current
waveform as well. The magnitude of the sensitive load bus
voltage is pre-specified.
It has been clarified that the shunt active filter eliminates
the voltage unbalance and also compensate for all kinds of
harmonics present in the B-2 bus voltage. The series active
filter is connected between B-2 bus terminals and the load
bus terminals. It has been demonstrated that the series active
filter is able to eliminate the integer and noninteger harmonics present in the sensitive load voltages and currents. The
structures have been discussed in which both the shunt and
the series active filters are realized by three H-bridge inverters connected through a common dc capacitor. The multiple
shunt active and series active filters can be connected in a big
radial or ring main distribution system to improve the power
quality at different load buses.

The authors would like to thank the Central Power Research Institute (CPRI), Bangalore, India for providing the
financial support for this work under the research project
Development of active power line conditioners for power
distribution systems.

Table A.1
System parameters for the distribution system shown in Fig. 1
System quantity

Parameters

System frequency () (rad/s)

Source voltage (vs ) (kV (LL, rms)
Feeder-1 impedance (Rs1 + jLs1 ) ()

100
11
0.3 + j2.42

Load L-1 contains three unbalanced RL loads with impedances () of

Phase a
48.4 + j36.3
Phase b
96.8 + j72.6
Phase c
24.2 + j18.1
Load L-1 draw interharmonic currents (ihl1 ) (A) with components in each
phase
At 1.73
15 (peak)
At 0.55
10 (peak)
Feeder-2 impedance (Rs2 + jLs2 ) ()

0.3 + j2.42

Load L-2 contains three unbalanced RL loads with impedances () of

Phase a
48.4 + j36.3
Phase b
72.6 + j54.4
Phase c
32.3 + j24.2
Load L-2 draw interharmonic currents (ihl2 ) (A) with components in each
phase
At 1.73
15 (peak)
At 2.24
10 (peak)
At 0.55
10 (peak)
Load L-3 contains three balanced RL loads with
72.6 + j54.4
impedances of ()
Desired sensitive load bus voltage (vl ) (kV (LL, rms) 11

Appendix A
See Table A.1.

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