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VND830ASP

DOUBLE CHANNEL HIGH SIDE SOLID STATE RELAY


TYPE
VND830ASP

RDS(on)
60 m (*)

IOUT
6 A (*)

VCC
36 V (*)

(*) Per channel

)
s
(
ct

10

DC SHORT CIRCUIT CURRENT: 6A


CMOS COMPATIBLE INPUTS
PROPORTIONAL LOAD CURRENT SENSE
UNDERVOLTAGE AND OVERVOLTAGE
SHUT-DOWN
OVERVOLTAGE CLAMP
THERMAL SHUT-DOWN
CURRENT LIMITATION
VERY LOW STAND-BY POWER DISSIPATION

PROTECTION AGAINST:
LOSS OF GROUND AND LOSS OF VCC
REVERSE BATTERY PROTECTION (**)

)
(s

DESCRIPTION
The VND830ASP is a monolithic device made using
STMicroelectronics VIPower M0-3 technology. It
is intended for driving any kind of load with one

t
c
u

BLOCK DIAGRAM

d
o
r

PowerSO-10

s
b
O

Pr

PACKAGE

TUBE

T&R

PowerSO-10 VND830ASP VND830ASP13TR

e
t
e
ol

side connected to ground. Active VCC pin voltage


clamp protects the device against low energy
spikes (see ISO7637 transient compatibility table).
This device has two channels in high side
configuration; each channel has an analog sense
output on which the sensing current is proportional
(according to a known ratio) to the corresponding
load current. Built-in thermal shut-down and
outputs current limitation protect the chip from
over temperature and short circuit. Device turns off
in case of ground pin disconnection.

s
b
O

P
e

t
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o

u
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ORDER CODES

VCC

OVERVOLTAGE
VCC CLAMP

UNDERVOLTAGE
PwCLAMP 1
DRIVER 1

OUTPUT 1

ILIM1

INPUT 1

Vdslim1

LOGIC

IOUT1

INPUT 2

Ot1

CURRENT
SENSE 1

PwCLAMP 2
DRIVER 2

GND

Ot1

OVERTEMP. 1
OVERTEMP. 2

Vdslim2
Ot2

OUTPUT 2

ILIM2
IOUT2

Ot2

CURRENT
SENSE 2

(**) See application schematic at page 8

September 2013

DocID9696 Rev 3

1/17

VND830ASP
ABSOLUTE MAXIMUM RATING
Symbol
VCC
-VCC
-IGND
IOUT
IR
IIN
VCSENSE

Parameter
DC Supply Voltage
Reverse Supply Voltage
DC Reverse Ground Pin Current
Output Current
Reverse Output Current
Input Current
Current Sense Maximum Voltage

Value
41
- 0.3
- 200
Internally Limited
-6
+/- 10
-3

Unit
V
V
mA
A
A
mA
V

+15

)
s
(
ct

Electrostatic Discharge (Human Body Model: R=1.5; C=100pF)


VESD

- INPUT

4000

- CURRENT SENSE

2000

u
d
o

- OUTPUT

EMAX
Ptot
Tj
Tc
Tstg

5000

- VCC
Maximum Switching Energy
(L=1.8mH; RL=0; Vbat=13.5V; Tjstart=150C; IL=9A)
Power Dissipation at TC=25C
Junction Operating Temperature
Case Operating Temperature
Storage Temperature

o
s
b

O
)

CONNECTION DIAGRAM (TOP VIEW)

GROUND
INPUT2
INPUT1
C.SENSE1
C.SENSE2

s
(
t
c

u
d
o

e
t
e
ol

Pr

OUTPUT 2
OUTPUT 2
N.C.
OUTPUT 1
OUTPUT 1

5
4
3

6
7
8
9

10

1
11

VCC

CURRENT AND VOLTAGE CONVENTIONS

s
b
O

IS
VCC
IIN1
INPUT1
VIN1

OUTPUT1

VIN2

IOUT2
INPUT2

VOUT1

ISENSE1

CURRENT SENSE 1
IIN2

OUTPUT2

CURRENT SENSE 2
GROUND
IGND

2/17

VCC
IOUT1

VSENSE1

VOUT2
ISENSE2
VSENSE2

V
V

5000

100

mJ

74
Internally Limited
- 40 to 150
- 55 to 150

W
C
C
C

r
P
e

let

VND830ASP
THERMAL DATA
Symbol
Rthj-case

Parameter
Thermal Resistance Junction-case

Value
1.2

Unit
C/W

Rthj-amb

Thermal Resistance Junction-ambient

51.2 (*)

C/W

(*) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35m thick). Horizontal mounting and no artificial air
flow

ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40C< Tj <150C, unless otherwise specified)


(Per each channel)
POWER OUTPUT
Symbol
VCC
VUSD
VOV
RON

Parameter
Operating Supply Voltage
Undervoltage Shut-down
Overvoltage Shut-down

Clamp voltage

IS

Supply Current

Min
5.5
3
36

IOUT =2A; Tj=25C

On State Resistance

Vclamp

Test Conditions

IOUT =2A; Tj=150C


ICC=20 mA (see note 1)
Off State; VCC=13V; VIN=VOUT=0V

e
t
e
ol

Max
36
5.5
60

Unit
V
V
V
m

48
12

120
55
40

m
V
A

12

25

7
50
0
5
3

mA
A
A
A
A

Max

Unit

u
d
o

Pr

41

)
s
(
ct

Typ
13
4

Off State; VCC=13V; VIN=VOUT=0V;


Tj =25C

s
b
O

On State; VIN=5V; VCC=13V; IOUT=0A;


Off State Output Current
Off State Output Current
Off State Output Current
Off State Output Current

IL(off1)
IL(off2)
IL(off3)
IL(off4)

SWITCHING (VCC =13V)

Parameter

P
e

Turn-on Delay Time

td(on)

let

td(off)

so

)
(s

t
c
u

d
o
r

Symbol

RSENSE=3.9K
VIN=VOUT=0V; VCC=36V; Tj=125C
VIN=0V; VOUT=3.5V
VIN=VOUT=0V; VCC=13V; Tj =125C
VIN=VOUT=0V; VCC=13V; Tj =25C

Turn-off Delay Time

Test Conditions
RL=6.5 from VIN rising edge to
VOUT=1.3V
RL=6.5 from VIN falling edge to
VOUT=11.7V

dVOUT/dt(on) Turn-on Voltage Slope

RL=6.5 from VOUT=1.3V to VOUT=10.4V

dVOUT/dt(off) Turn-off Voltage Slope

RL=6.5 from VOUT=11.7V to VOUT=1.3V

b
O

0
-75

Min

Typ
30

30

See
relative
diagram
See
relative
diagram

V/s

V/s

LOGIC INPUT (Channels 1,2)


Symbol
VIL
IIL
VIH
IIH
VI(hyst)
VICL

Parameter
Input low level voltage
Low level input current
Input high level voltage
High level input current
Input hysteresis voltage
Input clamp voltage

Test Conditions
VIN=1.25V

Min

Typ

1
3.25

VIN=3.25V
IIN=1mA
IIN=-1mA

Max
1.25

10
0.5
6

6.8
-0.7

Unit
V
A
V
A
V
V
V

Note 1: Vclamp and VOV are correlated. Typical difference is 5V.

3/17

VND830ASP
ELECTRICAL CHARACTERISTICS (continued)
VCC - OUTPUT DIODE
Symbol
VF

Parameter
Forward on Voltage

Test Conditions
-IOUT=2A; Tj=150C

Min

Typ

Max
0.6

Unit
V

PROTECTIONS
Symbol
Ilim
TTSD
TR
THYST
Vdemag
VON

Parameter

Test Conditions

Min
6

Vcc=13V

Current limitation

5.5V<Vcc<36V
Thermal shut-down
temperature
Thermal reset temperature
Thermal hysteresis
Turn-off output voltage clamp IOUT=2A; VIN=0V; L=6mH
Output voltage drop limitation IOUT=10mA

150

Parameter

K0

IOUT/I SENSE

K1

IOUT/I SENSE

dK1/K1
K2
dK2/K2
K3

P
e

ro

IOUT/I SENSE

t
e
l
o

dK3/K3

bs

ISENSE

Current Sense Ratio Drift

Max

600

1300

2000

1000

1400

1900

Max Analog Sense Output


Voltage

VSENSEH

Sense Voltage in
Overtemperature conditions

Analog Sense Output


RVSENSEH Impedance in
Overtemperature Condition
Current sense delay
tDSENSE
response

Note: Sense pin doesnt have to be left floating.

-10

+10

IOUT1 or IOUT2=1.6A; VSENSE=4V; other


channels open; Tj=-40C

1280

1500

1800

Tj=25C...150C

1300

1500

1780

IOUT1 or IOUT2=1.6A; VSENSE=4V; other


channels open; Tj=-40C...150C

-6

+6

IOUT1 or IOUT2=2.5A; VSENSE=4V; other


channels open; Tj=-40C

1280

1500

1680

Tj=25C...150C

1340

1500

1600

IOUT1 or IOUT2=2.5A; VSENSE=4V; other


channels open; Tj=-40C...150C
VIN=0V; IOUT=0A; VSENSE=0V;

Tj=-40C...150C
VCC=5.5V; IOUT1,2=1.3A; RSENSE=10k
VCC>8V, IOUT1,2=2.5A; RSENSE=10k
VCC=13V; RSENSE=3.9k

VCC=13V; Tj>TTSD; All Channels Open


to 90% ISENSE (see note 2)

Note 2: current sense signal delay after positive input slope.

4/17

-O

Analog Sense Leakage Cur- Tj=-40C...150C


rent
VIN=5V; IOUT=0A; VSENSE=0V;

VSENSE

)
s
(
ct

200

Typ

ct

du

Current Sense Ratio Drift

Min

bs

(s)

15

r
P
e

t
e
l
o

IOUT/I SENSE

Unit
A

u
d
o

Test Conditions
IOUT1 or IOUT2=0.05A; VSENSE=0.5V;
other channels open; Tj= -40C...150C
IOUT1 or IOUT2=0.25A; VSENSE=0.5V;
other channels open; Tj= -40C...150C
IOUT1 or IOUT2=0.25A; VSENSE=0.5V;
other channels open; Tj= -40C...150C

Current Sense Ratio Drift

175

Max
15

135
7
15
VCC-41 VCC-48 VCC-55
50

CURRENT SENSE (9VVCC16V) (See figure 1)


Symbol

Typ
9

C
C
V
mV

Unit

-6

+6

10

V
5.5

400

500

VND830ASP
TRUTH TABLE (per channel)
CONDITIONS
Normal operation
Overtemperature
Undervoltage
Overvoltage

Short circuit to GND

Short circuit to VCC


Negative output voltage
clamp

INPUT

OUTPUT

SENSE

H
L

H
L

0
Nominal

H
L

L
L

VSENSEH
0

H
L

L
L

0
0

H
L

L
L

0
0

(Tj<TTSD) 0

H
L

L
H

(Tj>TTSD) VSENSEH
0

e
t
e
ol

ELECTRICAL TRANSIENT REQUIREMENTS


ISO T/R 7637/1

II

-25 V
+25 V
-25 V
+25 V
-4 V
+26.5 V

-50 V
+50 V
-50 V
+50 V
-5 V
+46.5 V

Test Pulse
1
2
3a
3b
4
5
ISO T/R 7637/1
Test Pulse

s
b
O

e
t
e
ol
1
2
3a
3b
4
5

CLASS
C
E

u
d
o

s
(
t
c

Pr

I
C
C
C
C
C
C

)-

s
b
O

)
s
(
ct

u
d
o

Pr

TEST LEVELS
III

IV

-75 V
+75 V
-100 V
+75 V
-6 V
+66.5 V

-100 V
+100 V
-150 V
+100 V
-7 V
+86.5 V

TEST LEVELS RESULTS


II
III
C
C
C
C
C
C
C
C
C
C
E
E

< Nominal
0

Delays and
Impedance
2 ms 10
0.2 ms 10
0.1 s 50
0.1 s 50
100 ms, 0.01
400 ms, 2

IV
C
C
C
C
C
E

CONTENTS
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure to disturbance
and cannot be returned to proper operation without replacing the device.

5/17

VND830ASP
Figure 1: IOUT/ISENSE versus IOUT
Iout/Isense
2250

2000

m ax Tj= -40C

1750

m ax Tj=25...150C
1500

)
s
(
ct

typical value
m in Tj=25...150C

1250

u
d
o

m in Tj= -40C

r
P
e

1000

750

500
0

0.5

t
e
l
o

bs

1.5

2.5

Iout (A)

O
)

Figure 2: Switching Characteristics (Resistive load RL=6.5)

s
(
t
c

VOUT

u
d
o

90%

80%

r
P
e

dVOUT /dt(off)

dVOUT /dt(on)

let

o
s
b

tr

10%

tf
t

ISENSE
90%

INPUT

tDSENSE

td(on)

td(off)

6/17

VND830ASP
Figure 3: Waveforms

NORMAL OPERATION
INPUTn
LOAD CURRENTn
SENSEn
UNDERVOLTAGE
VCC

)
s
(
ct

VUSDhyst
VUSD

INPUTn

u
d
o

LOAD CURRENTn
SENSEn
OVERVOLTAGE

t
e
l
o

VOV

VCC

VCC > VOV

VCC < VOV

INPUTn
LOAD CURRENTn
SENSEn

)
(s

t
c
u

INPUTn

r
P
e

s
b
O

SHORT TO GROUND

d
o
r

LOAD CURRENTn
LOAD VOLTAGEn
SENSEn

P
e

s
b
O

t
e
l
o

SHORT TO VCC

INPUTn

LOAD VOLTAGEn
LOAD CURRENTn
SENSEn

<Nominal

<Nominal

OVERTEMPERATURE
Tj

TTSD
TR

INPUTn
LOAD CURRENTn
SENSEn

ISENSE=

VSENSEH
RSENSE

7/17

VND830ASP
APPLICATION SCHEMATIC

+5V

Rprot
INPUT1

VCC
Dld

Rprot

CURRENT SENSE1

Rprot

INPUT2

Rprot

CURRENT SENSE2

u
d
o

o
s
b
RGND

VGND

RSENSE2

r
P
e

let

GND

RSENSE1

)
s
(
ct

OUTPUT1

OUTPUT2

DGND

O
)

GND PROTECTION
REVERSE BATTERY

u
d
o

s
(
t
c

NETWORK

r
P
e

AGAINST

Solution 1: Resistor in the ground line (RGND only). This


can be used with any type of load.
The following is an indication on how to dimension the
RGND resistor.
1) RGND 600mV / IS(on)max.
2) RGND (VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can
be found in the absolute maximum rating section of the
devices datasheet.
Power Dissipation in RGND (when VCC<0: during reverse
battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where IS(on)max becomes the
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the RGND will
produce a shift (IS(on)max * RGND) in the input thresholds
and the status output values. This shift will vary
depending on how many devices are ON in the case of
several high side drivers sharing the same RGND.

t
e
l
o

s
b
O

8/17

If the calculated power dissipation leads to a large resistor


or several devices have to share the same resistor then
the ST suggests to utilize Solution 2 (see below).
Solution 2: A diode (DGND) in the ground line.
A resistor (RGND=1k) should be inserted in parallel to
DGND if the device will be driving an inductive load.
This small signal diode can be safely shared amongst
several different HSDs. Also in this case, the presence of
the ground network will produce a shift (j600mV) in the
input thresholds and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
Series resistor in INPUT line is also required to prevent
that, during battery voltage transient, the current exceeds
the Absolute Maximum Rating.
Safest configuration for unused INPUT pin is to leave it
unconnected, while unused SENSE pin has to be
connected to Ground pin.

LOAD DUMP PROTECTION


Dld is necessary (Voltage Transient Suppressor) if the
load dump peak voltage exceeds VCC max DC rating. The
same applies if the device will be subject to transients on
the VCC line that are greater than the ones shown in the
ISO T/R 7637/1 table.

VND830ASP
C I/Os PROTECTION:

-VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax

If a ground protection network is used and negative


transient are present on the VCC line, the control pins will
be pulled negative. ST suggests to insert a resistor (Rprot)
in line to prevent the C I/Os pins to latch-up.
The value of these resistors is a compromise between the
leakage current of C and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up limit
of C I/Os.

Calculation example:
For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V
5k Rprot 65k.
Recommended Rprot value is 10k.

)
s
(
ct

u
d
o

r
P
e

t
e
l
o

)
(s

s
b
O

t
c
u

d
o
r

P
e

t
e
l
o

s
b
O

9/17

VND830ASP
High Level Input Current

Off State Output Current


IL(off1) (uA)

Iih (uA)

4.5

Vin=3.25V

Off state
Vcc=13V
Vin=Vout=0V

3.5

2.5

1.5

)
s
(
ct

u
d
o

75

1
-50

-25

25

50

75

100

125

150

175

-50

-25

Input High Level

Vicl (V)

3.6

bs

7.8

3.4

Iin=1mA
7.6

O
)

7.4
7.2

t(s

7
6.8

c
u
d

6.6

ro

P
e

6
-50

-25

t
e
l
o

25

50

75

100

125

150

175

100

125

150

175

100

125

150

175

Vcc=13V

3.2
3
2.8
2.6
2.4
2.2
2

100

125

150

-50

175

-25

25

50

Tc (C)

Tc (C)

Input Low Level

s
b
O

75

t
e
l
o

Vih (V)

6.2

50

Tc (C)

Input Clamp Voltage

6.4

25

r
P
e

Tc (C)

Input Hysteresis Voltage

Vil (V)

Vhyst (V)

2.6

1.5
1.4

2.4

Vcc=13V

Vcc=13V

1.3

2.2
1.2
2

1.1

1.8

1
0.9

1.6

0.8
1.4
0.7
1.2

0.6

0.5
-50

-25

25

50

75

Tc (C)

10/17

100

125

150

175

-50

-25

25

50

75

Tc (C)

VND830ASP
ILIM Vs Tcase

Overvoltage Shutdown
Vov (V)

Ilim (A)

50

20

47.5

17.5

45

15

42.5

12.5

40

10

37.5

7.5

35

32.5

2.5

Vcc=13V

30

)
s
(
ct

u
d
o

0
-50

-25

25

50

75

100

125

150

175

-50

-25

25

Tc (C)

Turn-on Voltage Slope

Turn-off Voltage Slope


dVout/dt(off) (V/ms)

600

500

s
b
O
450

550

Vcc=13V
Rl=6.5Ohm

400

)-

450

t(s

400

c
u
d

350
300

200

e
t
e
ol

-50

-25

25

o
r
P
50

75

150

175

100

125

150

175

Vcc=13V
Rl=6.5Ohm

350
300
250
200
150

50
0

100

125

150

175

-50

-25

25

Tc (C)

50

75

Tc (C)

On State Resistance Vs VCC

Ron (mOhm)

Ron (mOhm)

100

100

90

Tc=150C

90

Iout=5A
Vcc=8V & 36V

80

125

100

On State Resistance Vs Tcase

s
b
O

100

t
e
l
o

dVout/dt(on) (V/ms)

250

75

r
P
e

Tc (C)

500

50

80

70

Iout=5A
70

60

60

50
40

50

30

Tc=25C
40

20

Tc= -40C

30

10

20

0
-50

-25

25

50

75

Tc (C)

100

125

150

175

10

15

20

25

30

35

40

Vcc (V)

11/17

VND830ASP
Maximum turn off current versus load inductance

ILMAX (A)
100

)
s
(
ct

u
d
o

10

r
P
e
A

t
e
l
o

)-

0.1

s
(
t
c

s
b
O

10

100

L(mH)

A = Single Pulse at TJstart=150C


B= Repetitive pulse at TJstart=100C
C= Repetitive Pulse at TJstart=125C

u
d
o

Conditions:
VCC=13.5V

r
P
e

t
e
l
o

Values are generated with RL=0

s
b
O

In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, IL
Demagnetization

Demagnetization

Demagnetization

12/17

VND830ASP

PowerSO-10 THERMAL DATA


PowerSO-10 PC Board

)
s
(
ct

u
d
o

r
P
e

t
e
l
o

Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm,
Cu thickness=35m, Copper areas: from minimum pad lay-out to 8cm2).

s
b
O

Rthj-amb Vs PCB copper area in open box free air condition

)
(s

t
c
u

d
o
r

RTHj_amb (C/W)

P
e

55

Tj-Tamb=50C

t
e
l
o
50

s
b
O

45
40
35
30

10

PCB Cu heatsink area (cm^2)

13/17

VND830ASP
PowerSO-10 Thermal Impedance Junction Ambient Single Pulse

ZTH (C/W)
1000

100

)
s
(
ct
0.5 cm2
6 cm2

u
d
o

10

r
P
e

t
e
l
o

)
(s0.1

0.1
0.0001

0.001

0.01

t
c
u

1
Time (s)

d
o
r

P
e

Thermal fitting model of a double channel HSD


in PowerSO-10

t
e
l
o

bs

Tj_1

100

1000

Z TH = R TH + Z THtp ( 1 )
= tp T

Thermal Parameter

C1

C2

C3

C4

C5

C6

R1

R2

R3

R4

R5

R6

C1

C2

R1

R2

Pd2

T_amb

14/17

10

Pulse calculation formula

where

Pd1

Tj_2

s
b
O

Area/island (cm2)
R1 (C/W)
R2 (C/W)
R3( C/W)
R4 (C/W)
R5 (C/W)
R6 (C/W)
C1 (W.s/C)
C2 (W.s/C)
C3 (W.s/C)
C4 (W.s/C)
C5 (W.s/C)
C6 (W.s/C)

0.5
0.15
0.8
0.7
0.8
12
37
0.0006
2.10E-03
0.013
0.3
0.75
3

22

VND830ASP

PowerSO-10 MECHANICAL DATA


mm.

DIM.

MIN.

A
A (*)
A1
B
B (*)
C
C (*)
D
D1
E
E2
E2 (*)
E4
E4 (*)
e
F
F (*)
H
H (*)
h
L
L (*)

(*)

TYP

3.35
3.4
0.00
0.40
0.37
0.35
0.23
9.40
7.40
9.30
7.20
7.30
5.90
5.90

s
b
O

MAX.

MIN.

3.65
3.6
0.10
0.60
0.53
0.55
0.32
9.60
7.60
9.50
7.60
7.50
6.10
6.30

0.132
0.134
0.000
0.016
0.014
0.013
0.009
0.370
0.291
0.366
0.283
0.287
0.232
0.232

1.35
1.40
14.40
14.35

0.049
0.047
0.543
0.545

1.80
1.10
8
8

s
(
t
c

u
d
o

Pr

MAX.
0.144
0.142
0.004
0.024
0.021
0.022
0.0126
0.378
0.300
0.374
300
0.295
0.240
0.248

)
s
(
ct

u
d
o

r
P
e

0.050
0.053
0.055
0.567
0.565

0.002

0.047
0.031
0
2

0.070
0.043
8
8

0.10 A B

10

E2

E4

SEATING
PLANE
e

DETAIL "A"

0.25

o
s
b

O
)

0.50
1.20
0.80
0
2

TYP.

let

1.27
1.25
1.20
13.80
13.85

(*) Muar only POA P013P

e
t
e
ol

inch

D
= D1 =
=
=
SEATING
PLANE

A
F

A1

A1

L
DETAIL "A"

P095A

15/17

VND830ASP
PowerSO-10 SUGGESTED PAD LAYOUT

TUBE SHIPMENT (no suffix)

14.6 - 14.9

CASABLANCA

10.8- 11

MUAR

6.30
C

A
A

0.67 - 0.73
10
9

9.5

2
3

0.54 - 0.6

All dimensions are in mm.

8
7

4
5

1.27

Base Q.ty Bulk Q.ty Tube length ( 0.5)

Casablanca
Muar

50
50

1000
1000

532
532

C ( 0.1)

10.4 16.4
4.9 17.2

0.8
0.8

)
s
(
ct

TAPE AND REEL SHIPMENT (suffix 13TR)

u
d
o

REEL DIMENSIONS

e
t
e
ol

)
(s

s
b
O

d
o
r

600
600
330
1.5
13
20.2
24.4
60
30.4

All dimensions are in mm.

t
c
u

TAPE DIMENSIONS

Pr

Base Q.ty
Bulk Q.ty
A (max)
B (min)
C ( 0.2)
F
G (+ 2 / -0)
N (min)
T (max)

According to Electronic Industries Association


(EIA) Standard 481 rev. A, Feb 1986

P
e

Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing

t
e
l
o

s
b
O

W
P0 ( 0.1)
P
D ( 0.1/-0)
D1 (min)
F ( 0.05)
K (max)
P1 ( 0.1)

All dimensions are in mm.

24
4
24
1.5
1.5
11.5
6.5
2
End

Start
Top

No components

Components

No components

cover
tape

500mm min
Empty components pockets
saled with cover tape.

500mm min

User direction of feed

16/17

VND830ASP

Please Read Carefully:

)
s
(
ct

Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (ST) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.

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d
o

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P
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17/17

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