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PD - 97282
IRF6785MTRPbF
Key Parameters
200
Features
VDS
Latest MOSFET Silicon technology
Key parameters optimized for Class-D audio amplifier
RDS(on) typ. @
applications
Qg typ.
Low RDS(on) for improved efficiency
Low Qg for better THD and improved efficiency
RG(int) max
Low Qrr for better THD and lower EMI
Low package stray inductance for reduced ringing and lower
EMI
Can deliver up to 250W per channel into 8 Load in
Half-Bridge Configuration Amplifier
Dual sided cooling compatible
Compatible with existing surface mount technologies
RoHS compliant containing no lead or bromide
MZ
Lead-Free (Qualified up to 260C Reflow)
Applicable DirectFET Outline and Substrate Outline (see p. 6, 7 for details)
SQ
SX
ST
SH
MQ
MX
MT
MN
VGS = 10V
85
26
V
m:
nC
3.0
DirectFET ISOMETRIC
MZ
Description
This Digital Audio MOSFET is specifically designed for Class-D audio amplifier applications. This MOSFET utilizes the
latest processing techniques to achieve low on-resistance per silicon area. Furthermore, gate charge, body-diode reverse
recovery and internal gate resistance are optimized to improve key Class-D audio amplifier performance factors such as
efficiency, THD, and EMI.
The IRF6785MPbF device utilizes DirectFETTM packaging technology. DirectFETTM packaging technology offers lower parasitic
inductance and resistance when compared to conventional wirebonded SOIC packaging. Lower inductance improves EMI
performance by reducing the voltage ringing that accompanies fast current transients. The DirectFETTM package is compatible
with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection
soldering techniques, when application note AN-1035 is followed regarding the manufacturing method and processes. The
DirectFETTM package also allows dual sided cooling to maximize thermal transfer in power systems, improving thermal resistance and power dissipation. These features combine to make this MOSFET a highly efficient, robust and reliable device for
Class-D audio amplifier applications.
Units
VDS
Drain-to-Source Voltage
Parameter
200
VGS
Gate-to-Source Voltage
20
ID @ TC = 25C
ID @ TA = 25C
19
3.4
ID @ TA = 70C
2.7
IDM
27
57
PD @TA = 25C
Power Dissipation
2.8
PD @TA = 70C
EAS
PD @TC = 25C
e
Power Dissipation e
c
IAR
Avalanche Current
TJ
TSTG
1.8
33
mJ
8.4
0.022
-40 to + 150
W/C
C
Thermal Resistance
Parameter
ek
hk
Junction-to-Ambient ik
Junction-to-Case jk
Typ.
Max.
Units
C/W
RJA
Junction-to-Ambient
45
RJA
Junction-to-Ambient
12.5
20
RJA
RJC
RJ-PCB
Junction-to-PCB Mounted
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1.4
1.4
1
04/18/07
IRF6785MTRPbF
Conditions
Min.
Typ.
Max.
Units
V(BR)DSS
200
V(BR)DSS/TJ
RDS(on)
0.22
V/C
85
100
VGS(th)
3.0
5.0
m
V
IDSS
20
IGSS
RG(int)
250
100
nA
VGS = 20V
VGS = -20V
-100
3.0
Min.
Typ.
Max.
Units
Forward Transconductance
8.9
Conditions
VDS = 10V, ID = 4.2A
26
36
VDS = 100V
Qgs1
6.3
VGS = 10V
Qgs2
1.3
Qgd
Gate-to-Drain Charge
6.9
Qgodr
11.5
Qsw
8.2
td(on)
6.2
VDD = 100V
tr
Rise Time
8.6
ID = 4.2A
td(off)
7.2
tf
Fall Time
14
RG = 6.0
VGS = 10V
Ciss
Input Capacitance
1500
VGS = 0V
Coss
Output Capacitance
160
Crss
31
Coss
Output Capacitance
1140
= 1.0MHz
VGS = 0V, VDS = 1.0V, = 1.0MHz
Coss
Output Capacitance
69
Coss eff.
140
Min.
Typ.
Max.
19
ID = 4.2A
nC
ns
VDS = 25V
pF
Diode Characteristics
Parameter
Continuous Source Current
IS
(Body Diode)
ISM
c
Units
A
VSD
trr
71
Qrr
190
showing the
integral reverse
27
(Body Diode)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25C, L = 0.94mH, RG = 25, IAS = 8.4A.
Surface mounted on 1 in. square Cu board.
Pulse width 400s; duty cycle 2%.
Coss eff. is a fixed capacitance that gives the same
charging time as Coss while VDS is rising from 0 to 80% VDSS.
Conditions
MOSFET symbol
ns
nC
1.3
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IRF6785MTRPbF
100
100
10
BOTTOM
VGS
15V
10V
9.0V
8.0V
7.0V
6.5V
6.0V
5.5V
VGS
15V
10V
9.0V
8.0V
7.0V
6.5V
6.0V
5.5V
TOP
TOP
5.5V
10
BOTTOM
5.5V
Tj = 150C
Tj = 25C
0.1
0.1
0.1
10
100
0.1
100
100
2.5
VDS = 25V
60s PULSE WIDTH
10
10
T J = -40C
T J = 25C
T J = 150C
1
0.1
ID = 4.2A
VGS = 10V
2.0
1.5
1.0
0.5
3
12.0
VGS = 0V,
f = 1 MHZ
Ciss = C gs + C gd, C ds SHORTED
ID= 4.2A
VGS, Gate-to-Source Voltage (V)
Crss = C gd
Coss = Cds + C gd
10000
Ciss
1000
Coss
100
C, Capacitance (pF)
Crss
10
10.0
VDS= 160V
VDS= 100V
8.0
VDS= 40V
6.0
4.0
2.0
0.0
10
100
1000
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10
15
20
25
30
IRF6785MTRPbF
100
T J = -40C
T J = 25C
T J = 150C
10
100
10
10msec
1msec
DC
T A = 25C
Tj = 150C
Single Pulse
VGS = 0V
0.1
0.1
0.2
0.4
0.6
0.8
1.0
1.2
10
100
1000
20
0.1
15
10
4.5
4.0
ID = 100A
3.5
ID = 250A
3.0
2.5
25
50
75
100
125
150
25
50
T J , Temperature ( C )
100
D = 0.50
10
0.20
0.10
0.05
0.02
0.01
0.1
R1
R1
J
1
R2
R2
R3
R3
A
1
Ci= i/Ri
Ci= i/Ri
SINGLE PULSE
( THERMAL RESPONSE )
0.01
0.001
1E-006
1E-005
0.0001
i (sec)
Ri (C/W)
R4
R4
1.2801
0.000322
8.7256
0.164798
21.75
2.2576
13.2511
69
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + T A
0.001
0.01
0.1
10
100
1000
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IRF6785MTRPbF
500
ID = 4.2A
400
300
200
T J = 125C
100
T J = 25C
0
4
10
12
14
200
175
T J = 125C
150
125
T J = 25C
100
75
Vgs = 10V
50
0
16
+
V
- DD
IAS
VGS
20V
0.01
tp
DRIVER
D.U.T
RG
20
150
15V
15
VDS
10
ID, Drain Current (A)
ID
TOP
0.85A
1.04A
BOTTOM 8.4A
125
100
75
50
25
0
25
50
75
100
125
150
I AS
RD
VDS
90%
D.U.T.
RG
- VDD
10V
Pulse Width 1 s
Duty Factor 0.1 %
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10%
VGS
td(on)
tr
td(off)
tf
IRF6785MTRPbF
Id
Vds
Vgs
L
VCC
DUT
20K
1K
Vgs(th)
Qgodr
D.U.T
RG
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
**
P.W.
Period
***
Reverse
Recovery
Current
VDD
D=
Period
VGS=10V
P.W.
Qgs2 Qgs1
Qgd
+
-
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
Ripple 5%
VDD
ISD
Fig 18. Diode Reverse Recovery Test Circuit for HEXFET Power MOSFETs
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IRF6785MTRPbF
DirectFET Substrate and PCB Layout, MZ Outline
(Medium Size Can, Z-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
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IRF6785MTRPbF
DirectFET Outline Dimension, MZ Outline
(Medium Size Can, Z-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
DIMENSIONS
IMPERIAL
METRIC
CODE
A
B
C
D
E
F
G
H
J
K
L
M
R
P
MIN
6.25
4.80
3.85
0.35
0.68
0.68
0.93
0.63
0.28
1.13
2.53
0.616
0.020
0.08
MAX
6.35
5.05
3.95
0.45
0.72
0.72
0.97
0.67
0.32
1.26
2.66
0.676
0.080
0.17
MAX
0.246
0.189
0.152
0.014
0.027
0.027
0.037
0.025
0.011
0.044
0.100
0.0235
0.0008
0.003
MAX
0.250
0.201
0.156
0.018
0.028
0.028
0.038
0.026
0.013
0.050
0.105
0.0274
0.0031
0.007
GATE MARKING
LOGO
PART NUMBER
BATCH NUMBER
DATE CODE
Line above the last character of
the date code indicates "Lead-Free"
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IRF6785MTRPbF
DirectFET Tape & Reel Dimension (Showing component orientation).
LOADED TAPE FEED DIRECTION
NOTE: CONTROLLING
DIMENSIONS IN MM
CODE
A
B
C
D
E
F
G
H
DIMENSIONS
IMPERIAL
METRIC
MIN
MIN
MAX
MAX
0.311
0.319
7.90
8.10
0.154
0.161
3.90
4.10
0.469
0.484
11.90
12.30
0.215
0.219
5.45
5.55
0.201
5.10
0.209
5.30
0.256
6.50
0.264
6.70
0.059
1.50
N.C
N.C
0.059
1.50
0.063
1.60
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